java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/memsafety/lockfree-3.0_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-408c70d-m [2018-04-13 05:42:14,728 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-13 05:42:14,729 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-13 05:42:14,741 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-13 05:42:14,741 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-13 05:42:14,742 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-13 05:42:14,743 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-13 05:42:14,744 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-13 05:42:14,746 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-13 05:42:14,746 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-13 05:42:14,747 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-13 05:42:14,747 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-13 05:42:14,748 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-13 05:42:14,749 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-13 05:42:14,749 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-13 05:42:14,751 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-13 05:42:14,752 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-13 05:42:14,754 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-13 05:42:14,755 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-13 05:42:14,756 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-13 05:42:14,757 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-04-13 05:42:14,762 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-13 05:42:14,762 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-13 05:42:14,763 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-04-13 05:42:14,772 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-13 05:42:14,772 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-13 05:42:14,773 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-13 05:42:14,773 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-13 05:42:14,773 INFO L133 SettingsManager]: * Use SBE=true [2018-04-13 05:42:14,774 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-13 05:42:14,774 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-13 05:42:14,774 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-13 05:42:14,774 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-13 05:42:14,774 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-13 05:42:14,774 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-13 05:42:14,775 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-13 05:42:14,775 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-13 05:42:14,775 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-13 05:42:14,775 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-13 05:42:14,775 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-13 05:42:14,775 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-13 05:42:14,775 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-13 05:42:14,776 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-13 05:42:14,776 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-13 05:42:14,776 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-13 05:42:14,776 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-13 05:42:14,776 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-13 05:42:14,776 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-13 05:42:14,807 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-13 05:42:14,817 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-13 05:42:14,820 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-13 05:42:14,822 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-13 05:42:14,822 INFO L276 PluginConnector]: CDTParser initialized [2018-04-13 05:42:14,822 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,109 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG137c6c819 [2018-04-13 05:42:15,264 INFO L287 CDTParser]: IsIndexed: true [2018-04-13 05:42:15,264 INFO L288 CDTParser]: Found 1 translation units. [2018-04-13 05:42:15,265 INFO L168 CDTParser]: Scanning lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,272 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-13 05:42:15,272 INFO L215 ultiparseSymbolTable]: [2018-04-13 05:42:15,272 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-13 05:42:15,273 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_flockfree_____true_valid_memsafety_i__pop ('pop') in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,273 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_flockfree_____true_valid_memsafety_i__push ('push') in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,273 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,273 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-13 05:42:15,273 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____off64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,273 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____qaddr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,273 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____blksize_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,273 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__blksize_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,273 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____caddr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,273 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__fd_set in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,274 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__sigset_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,274 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____rlim64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,274 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_quad_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,274 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__garbage in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,274 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____u_char in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,274 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____int32_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,274 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__ulong in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,274 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__mode_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,274 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pc1 in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,275 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_rwlockattr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,275 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__fsblkcnt_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,275 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__clock_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,275 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__daddr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,275 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____u_short in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,275 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____id_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,275 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pc4 in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,275 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__key_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,275 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____dev_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,275 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_int32_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,276 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_barrier_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,276 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____u_quad_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,276 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_long in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,276 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__size_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,276 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____ino_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,276 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____pid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,276 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____intptr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,276 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_mutexattr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,276 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____mode_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____gid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____timer_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____sigset_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_int in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__gid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____fsid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__caddr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____quad_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_short in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__div_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____suseconds_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____u_long in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_spinlock_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____rlim_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____int16_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____uint32_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__uid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,277 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_cond_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____socklen_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____pthread_list_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__lldiv_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__int16_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_int16_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__blkcnt_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_char in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__off_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____clockid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__quad_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____sig_atomic_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_attr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____uid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____int64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_once_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__wchar_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____uint64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__uint in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,278 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__ssize_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__nlink_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__loff_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____fsblkcnt64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____nlink_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____daddr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____clock_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____blkcnt64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_condattr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__int32_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__suseconds_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____ssize_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,279 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_int8_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,280 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____fd_mask in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,280 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__fsid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,280 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__timer_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,280 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__clockid_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,280 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____loff_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,280 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____int8_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,280 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____off_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,280 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__fd_mask in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,280 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__fsfilcnt_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,280 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____WAIT_STATUS in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,280 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_mutex_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,280 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__ino_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,281 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____uint16_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,281 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__int64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,281 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____fsfilcnt_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,281 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__ushort in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,281 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____ino64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,281 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____time_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,281 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__int8_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,281 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__u_int64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,281 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____key_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,281 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__time_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,281 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__S in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,282 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____uint8_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,282 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__ldiv_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,282 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__register_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,282 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__id_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,282 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____swblk_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,282 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____useconds_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,282 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____fsfilcnt64_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,282 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__dev_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,282 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_rwlock_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,282 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____blkcnt_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,283 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_barrierattr_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,283 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____u_int in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,283 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i____fsblkcnt_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,283 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_flockfree_____true_valid_memsafety_i__pthread_key_t in lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,295 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAG137c6c819 [2018-04-13 05:42:15,299 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-13 05:42:15,300 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-13 05:42:15,300 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-13 05:42:15,300 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-13 05:42:15,304 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-13 05:42:15,304 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.04 05:42:15" (1/1) ... [2018-04-13 05:42:15,306 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@18369095 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:42:15, skipping insertion in model container [2018-04-13 05:42:15,306 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.04 05:42:15" (1/1) ... [2018-04-13 05:42:15,316 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-13 05:42:15,336 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-13 05:42:15,440 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-13 05:42:15,477 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-13 05:42:15,484 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 115 non ball SCCs. Number of states in SCCs 115. [2018-04-13 05:42:15,523 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:42:15 WrapperNode [2018-04-13 05:42:15,524 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-13 05:42:15,524 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-13 05:42:15,524 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-13 05:42:15,524 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-13 05:42:15,536 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:42:15" (1/1) ... [2018-04-13 05:42:15,536 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:42:15" (1/1) ... [2018-04-13 05:42:15,548 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:42:15" (1/1) ... [2018-04-13 05:42:15,549 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:42:15" (1/1) ... [2018-04-13 05:42:15,558 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:42:15" (1/1) ... [2018-04-13 05:42:15,563 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:42:15" (1/1) ... [2018-04-13 05:42:15,565 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:42:15" (1/1) ... [2018-04-13 05:42:15,569 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-13 05:42:15,569 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-13 05:42:15,569 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-13 05:42:15,570 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-13 05:42:15,570 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:42:15" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-13 05:42:15,659 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-13 05:42:15,660 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-13 05:42:15,660 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_flockfree_____true_valid_memsafety_i__push [2018-04-13 05:42:15,660 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_flockfree_____true_valid_memsafety_i__pop [2018-04-13 05:42:15,660 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-13 05:42:15,660 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-04-13 05:42:15,660 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-13 05:42:15,660 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-13 05:42:15,660 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-13 05:42:15,660 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-13 05:42:15,661 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-13 05:42:15,661 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-13 05:42:15,661 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-13 05:42:15,661 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-13 05:42:15,661 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-13 05:42:15,661 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-13 05:42:15,661 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-13 05:42:15,661 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-13 05:42:15,661 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-13 05:42:15,661 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-13 05:42:15,662 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-13 05:42:15,662 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-13 05:42:15,662 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-13 05:42:15,662 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-13 05:42:15,662 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-13 05:42:15,662 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-13 05:42:15,662 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-13 05:42:15,662 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-13 05:42:15,662 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-13 05:42:15,663 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-13 05:42:15,663 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-13 05:42:15,663 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-13 05:42:15,663 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-13 05:42:15,663 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-13 05:42:15,663 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-13 05:42:15,663 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-13 05:42:15,663 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-13 05:42:15,664 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-13 05:42:15,664 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-13 05:42:15,664 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-13 05:42:15,664 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-13 05:42:15,664 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-13 05:42:15,664 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-13 05:42:15,664 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-13 05:42:15,664 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-13 05:42:15,664 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-13 05:42:15,665 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-13 05:42:15,665 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-13 05:42:15,665 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-13 05:42:15,665 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-13 05:42:15,665 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-13 05:42:15,665 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-13 05:42:15,665 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-13 05:42:15,665 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-13 05:42:15,665 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-13 05:42:15,666 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-13 05:42:15,666 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-13 05:42:15,666 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-13 05:42:15,666 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-13 05:42:15,666 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-13 05:42:15,666 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-13 05:42:15,666 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-13 05:42:15,666 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-13 05:42:15,666 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure __secure_getenv [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-13 05:42:15,667 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-13 05:42:15,668 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-13 05:42:15,668 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-13 05:42:15,668 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-13 05:42:15,668 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-13 05:42:15,668 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-13 05:42:15,668 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-13 05:42:15,668 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-13 05:42:15,668 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-13 05:42:15,668 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-13 05:42:15,668 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-13 05:42:15,668 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-13 05:42:15,668 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-13 05:42:15,669 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-13 05:42:15,669 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-13 05:42:15,669 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-13 05:42:15,669 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-13 05:42:15,669 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-13 05:42:15,669 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-13 05:42:15,669 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-13 05:42:15,669 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-13 05:42:15,669 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-13 05:42:15,669 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-13 05:42:15,669 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-13 05:42:15,670 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-13 05:42:15,670 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-13 05:42:15,670 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-13 05:42:15,670 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-13 05:42:15,670 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-13 05:42:15,670 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-13 05:42:15,670 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_flockfree_____true_valid_memsafety_i__push [2018-04-13 05:42:15,670 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-13 05:42:15,670 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-13 05:42:15,670 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-13 05:42:15,670 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_flockfree_____true_valid_memsafety_i__pop [2018-04-13 05:42:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-13 05:42:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-13 05:42:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-13 05:42:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-13 05:42:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-13 05:42:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-13 05:42:15,671 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-13 05:42:15,974 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-13 05:42:15,975 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.04 05:42:15 BoogieIcfgContainer [2018-04-13 05:42:15,975 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-13 05:42:15,975 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-13 05:42:15,976 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-13 05:42:15,978 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-13 05:42:15,979 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.04 05:42:15" (1/3) ... [2018-04-13 05:42:15,979 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28a405eb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.04 05:42:15, skipping insertion in model container [2018-04-13 05:42:15,979 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 05:42:15" (2/3) ... [2018-04-13 05:42:15,980 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28a405eb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.04 05:42:15, skipping insertion in model container [2018-04-13 05:42:15,980 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.04 05:42:15" (3/3) ... [2018-04-13 05:42:15,981 INFO L107 eAbstractionObserver]: Analyzing ICFG lockfree-3.0_true-valid-memsafety.i [2018-04-13 05:42:15,989 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-13 05:42:15,994 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-04-13 05:42:16,019 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-13 05:42:16,019 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-13 05:42:16,019 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-13 05:42:16,020 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-13 05:42:16,020 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-13 05:42:16,020 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-13 05:42:16,020 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-13 05:42:16,020 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-13 05:42:16,020 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-13 05:42:16,020 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-13 05:42:16,030 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states. [2018-04-13 05:42:16,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2018-04-13 05:42:16,037 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:16,038 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:16,038 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:16,041 INFO L82 PathProgramCache]: Analyzing trace with hash -1827855978, now seen corresponding path program 1 times [2018-04-13 05:42:16,042 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:16,042 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:16,071 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,071 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:16,072 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:16,114 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:16,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:16,147 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:42:16,147 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-13 05:42:16,148 INFO L442 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-04-13 05:42:16,160 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-04-13 05:42:16,160 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-04-13 05:42:16,162 INFO L87 Difference]: Start difference. First operand 78 states. Second operand 2 states. [2018-04-13 05:42:16,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:16,178 INFO L93 Difference]: Finished difference Result 78 states and 95 transitions. [2018-04-13 05:42:16,178 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-04-13 05:42:16,179 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 9 [2018-04-13 05:42:16,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:16,190 INFO L225 Difference]: With dead ends: 78 [2018-04-13 05:42:16,190 INFO L226 Difference]: Without dead ends: 75 [2018-04-13 05:42:16,192 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-04-13 05:42:16,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-04-13 05:42:16,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 75. [2018-04-13 05:42:16,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2018-04-13 05:42:16,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 92 transitions. [2018-04-13 05:42:16,222 INFO L78 Accepts]: Start accepts. Automaton has 75 states and 92 transitions. Word has length 9 [2018-04-13 05:42:16,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:16,222 INFO L459 AbstractCegarLoop]: Abstraction has 75 states and 92 transitions. [2018-04-13 05:42:16,222 INFO L460 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-04-13 05:42:16,222 INFO L276 IsEmpty]: Start isEmpty. Operand 75 states and 92 transitions. [2018-04-13 05:42:16,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-04-13 05:42:16,223 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:16,223 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:16,223 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:16,223 INFO L82 PathProgramCache]: Analyzing trace with hash 2024262411, now seen corresponding path program 1 times [2018-04-13 05:42:16,223 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:16,223 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:16,224 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,224 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:16,224 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:16,244 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:16,269 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:16,269 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:42:16,269 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-13 05:42:16,271 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-13 05:42:16,271 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-13 05:42:16,271 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 05:42:16,271 INFO L87 Difference]: Start difference. First operand 75 states and 92 transitions. Second operand 3 states. [2018-04-13 05:42:16,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:16,284 INFO L93 Difference]: Finished difference Result 76 states and 93 transitions. [2018-04-13 05:42:16,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-13 05:42:16,285 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-04-13 05:42:16,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:16,285 INFO L225 Difference]: With dead ends: 76 [2018-04-13 05:42:16,285 INFO L226 Difference]: Without dead ends: 76 [2018-04-13 05:42:16,286 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 05:42:16,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-04-13 05:42:16,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 76. [2018-04-13 05:42:16,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76 states. [2018-04-13 05:42:16,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76 states to 76 states and 93 transitions. [2018-04-13 05:42:16,290 INFO L78 Accepts]: Start accepts. Automaton has 76 states and 93 transitions. Word has length 12 [2018-04-13 05:42:16,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:16,290 INFO L459 AbstractCegarLoop]: Abstraction has 76 states and 93 transitions. [2018-04-13 05:42:16,290 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-13 05:42:16,290 INFO L276 IsEmpty]: Start isEmpty. Operand 76 states and 93 transitions. [2018-04-13 05:42:16,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-04-13 05:42:16,291 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:16,291 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:16,291 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:16,291 INFO L82 PathProgramCache]: Analyzing trace with hash 2026109453, now seen corresponding path program 1 times [2018-04-13 05:42:16,291 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:16,291 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:16,292 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,292 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:16,292 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:16,308 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:16,349 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:16,349 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:42:16,349 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-13 05:42:16,350 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-13 05:42:16,350 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-13 05:42:16,350 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 05:42:16,350 INFO L87 Difference]: Start difference. First operand 76 states and 93 transitions. Second operand 3 states. [2018-04-13 05:42:16,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:16,373 INFO L93 Difference]: Finished difference Result 134 states and 169 transitions. [2018-04-13 05:42:16,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-13 05:42:16,374 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 12 [2018-04-13 05:42:16,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:16,375 INFO L225 Difference]: With dead ends: 134 [2018-04-13 05:42:16,375 INFO L226 Difference]: Without dead ends: 134 [2018-04-13 05:42:16,375 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 05:42:16,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-04-13 05:42:16,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 116. [2018-04-13 05:42:16,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-04-13 05:42:16,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 161 transitions. [2018-04-13 05:42:16,383 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 161 transitions. Word has length 12 [2018-04-13 05:42:16,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:16,383 INFO L459 AbstractCegarLoop]: Abstraction has 116 states and 161 transitions. [2018-04-13 05:42:16,383 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-13 05:42:16,383 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 161 transitions. [2018-04-13 05:42:16,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-04-13 05:42:16,384 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:16,384 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:16,384 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:16,384 INFO L82 PathProgramCache]: Analyzing trace with hash -1615117846, now seen corresponding path program 1 times [2018-04-13 05:42:16,385 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:16,385 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:16,385 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,385 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:16,385 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:16,397 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:16,408 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:16,408 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:42:16,408 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-13 05:42:16,408 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-13 05:42:16,409 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-13 05:42:16,409 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 05:42:16,409 INFO L87 Difference]: Start difference. First operand 116 states and 161 transitions. Second operand 3 states. [2018-04-13 05:42:16,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:16,473 INFO L93 Difference]: Finished difference Result 151 states and 209 transitions. [2018-04-13 05:42:16,474 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-13 05:42:16,474 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2018-04-13 05:42:16,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:16,475 INFO L225 Difference]: With dead ends: 151 [2018-04-13 05:42:16,475 INFO L226 Difference]: Without dead ends: 147 [2018-04-13 05:42:16,475 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 05:42:16,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-04-13 05:42:16,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 137. [2018-04-13 05:42:16,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-04-13 05:42:16,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 194 transitions. [2018-04-13 05:42:16,482 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 194 transitions. Word has length 13 [2018-04-13 05:42:16,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:16,482 INFO L459 AbstractCegarLoop]: Abstraction has 137 states and 194 transitions. [2018-04-13 05:42:16,482 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-13 05:42:16,483 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 194 transitions. [2018-04-13 05:42:16,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-04-13 05:42:16,483 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:16,483 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:16,483 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:16,483 INFO L82 PathProgramCache]: Analyzing trace with hash 689129259, now seen corresponding path program 1 times [2018-04-13 05:42:16,483 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:16,483 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:16,484 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,484 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:16,484 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:16,494 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:16,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:16,538 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:42:16,538 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 05:42:16,539 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-13 05:42:16,539 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-13 05:42:16,539 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-13 05:42:16,539 INFO L87 Difference]: Start difference. First operand 137 states and 194 transitions. Second operand 5 states. [2018-04-13 05:42:16,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:16,579 INFO L93 Difference]: Finished difference Result 259 states and 361 transitions. [2018-04-13 05:42:16,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-13 05:42:16,580 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-04-13 05:42:16,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:16,582 INFO L225 Difference]: With dead ends: 259 [2018-04-13 05:42:16,582 INFO L226 Difference]: Without dead ends: 259 [2018-04-13 05:42:16,582 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-13 05:42:16,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-04-13 05:42:16,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 228. [2018-04-13 05:42:16,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-04-13 05:42:16,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 340 transitions. [2018-04-13 05:42:16,597 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 340 transitions. Word has length 15 [2018-04-13 05:42:16,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:16,597 INFO L459 AbstractCegarLoop]: Abstraction has 228 states and 340 transitions. [2018-04-13 05:42:16,598 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-13 05:42:16,598 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 340 transitions. [2018-04-13 05:42:16,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-13 05:42:16,598 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:16,598 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:16,598 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:16,599 INFO L82 PathProgramCache]: Analyzing trace with hash -112108404, now seen corresponding path program 1 times [2018-04-13 05:42:16,599 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:16,599 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:16,600 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:16,600 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:16,609 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:16,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:16,623 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:42:16,623 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-13 05:42:16,623 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-13 05:42:16,624 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-13 05:42:16,624 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-13 05:42:16,624 INFO L87 Difference]: Start difference. First operand 228 states and 340 transitions. Second operand 4 states. [2018-04-13 05:42:16,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:16,735 INFO L93 Difference]: Finished difference Result 392 states and 574 transitions. [2018-04-13 05:42:16,735 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 05:42:16,735 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-04-13 05:42:16,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:16,738 INFO L225 Difference]: With dead ends: 392 [2018-04-13 05:42:16,738 INFO L226 Difference]: Without dead ends: 392 [2018-04-13 05:42:16,738 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-13 05:42:16,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392 states. [2018-04-13 05:42:16,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392 to 360. [2018-04-13 05:42:16,755 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 360 states. [2018-04-13 05:42:16,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 360 states to 360 states and 550 transitions. [2018-04-13 05:42:16,757 INFO L78 Accepts]: Start accepts. Automaton has 360 states and 550 transitions. Word has length 16 [2018-04-13 05:42:16,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:16,758 INFO L459 AbstractCegarLoop]: Abstraction has 360 states and 550 transitions. [2018-04-13 05:42:16,758 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-13 05:42:16,758 INFO L276 IsEmpty]: Start isEmpty. Operand 360 states and 550 transitions. [2018-04-13 05:42:16,758 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-13 05:42:16,758 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:16,758 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:16,759 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:16,759 INFO L82 PathProgramCache]: Analyzing trace with hash -112108403, now seen corresponding path program 1 times [2018-04-13 05:42:16,759 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:16,759 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:16,760 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,760 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:16,760 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:16,769 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:16,792 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:16,792 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:42:16,793 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-04-13 05:42:16,793 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-13 05:42:16,793 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-13 05:42:16,793 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-13 05:42:16,793 INFO L87 Difference]: Start difference. First operand 360 states and 550 transitions. Second operand 4 states. [2018-04-13 05:42:16,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:16,905 INFO L93 Difference]: Finished difference Result 491 states and 721 transitions. [2018-04-13 05:42:16,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 05:42:16,907 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2018-04-13 05:42:16,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:16,909 INFO L225 Difference]: With dead ends: 491 [2018-04-13 05:42:16,909 INFO L226 Difference]: Without dead ends: 491 [2018-04-13 05:42:16,910 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-13 05:42:16,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 491 states. [2018-04-13 05:42:16,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 491 to 462. [2018-04-13 05:42:16,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 462 states. [2018-04-13 05:42:16,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 462 states to 462 states and 698 transitions. [2018-04-13 05:42:16,928 INFO L78 Accepts]: Start accepts. Automaton has 462 states and 698 transitions. Word has length 16 [2018-04-13 05:42:16,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:16,929 INFO L459 AbstractCegarLoop]: Abstraction has 462 states and 698 transitions. [2018-04-13 05:42:16,929 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-13 05:42:16,929 INFO L276 IsEmpty]: Start isEmpty. Operand 462 states and 698 transitions. [2018-04-13 05:42:16,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-04-13 05:42:16,929 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:16,929 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:16,930 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:16,930 INFO L82 PathProgramCache]: Analyzing trace with hash -1784605680, now seen corresponding path program 1 times [2018-04-13 05:42:16,930 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:16,930 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:16,932 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,932 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:16,932 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:16,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:16,941 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:16,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:16,966 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:42:16,967 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 05:42:16,967 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-13 05:42:16,967 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-13 05:42:16,967 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-13 05:42:16,967 INFO L87 Difference]: Start difference. First operand 462 states and 698 transitions. Second operand 5 states. [2018-04-13 05:42:17,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:17,019 INFO L93 Difference]: Finished difference Result 865 states and 1229 transitions. [2018-04-13 05:42:17,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-13 05:42:17,020 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2018-04-13 05:42:17,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:17,025 INFO L225 Difference]: With dead ends: 865 [2018-04-13 05:42:17,025 INFO L226 Difference]: Without dead ends: 865 [2018-04-13 05:42:17,025 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-13 05:42:17,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 865 states. [2018-04-13 05:42:17,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 865 to 830. [2018-04-13 05:42:17,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 830 states. [2018-04-13 05:42:17,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 830 states to 830 states and 1198 transitions. [2018-04-13 05:42:17,052 INFO L78 Accepts]: Start accepts. Automaton has 830 states and 1198 transitions. Word has length 16 [2018-04-13 05:42:17,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:17,052 INFO L459 AbstractCegarLoop]: Abstraction has 830 states and 1198 transitions. [2018-04-13 05:42:17,052 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-13 05:42:17,053 INFO L276 IsEmpty]: Start isEmpty. Operand 830 states and 1198 transitions. [2018-04-13 05:42:17,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-04-13 05:42:17,054 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:17,054 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:17,054 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:17,054 INFO L82 PathProgramCache]: Analyzing trace with hash -941901214, now seen corresponding path program 1 times [2018-04-13 05:42:17,054 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:17,054 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:17,055 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:17,055 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:17,055 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:17,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:17,066 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:17,099 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:17,100 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:17,100 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:17,100 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:17,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:17,144 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:17,180 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 7 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:17,181 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:17,181 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-04-13 05:42:17,181 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 05:42:17,181 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 05:42:17,182 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-13 05:42:17,182 INFO L87 Difference]: Start difference. First operand 830 states and 1198 transitions. Second operand 6 states. [2018-04-13 05:42:17,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:17,261 INFO L93 Difference]: Finished difference Result 1293 states and 1813 transitions. [2018-04-13 05:42:17,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-13 05:42:17,263 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-04-13 05:42:17,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:17,269 INFO L225 Difference]: With dead ends: 1293 [2018-04-13 05:42:17,269 INFO L226 Difference]: Without dead ends: 1293 [2018-04-13 05:42:17,269 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 27 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-04-13 05:42:17,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1293 states. [2018-04-13 05:42:17,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1293 to 1222. [2018-04-13 05:42:17,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1222 states. [2018-04-13 05:42:17,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1222 states to 1222 states and 1746 transitions. [2018-04-13 05:42:17,303 INFO L78 Accepts]: Start accepts. Automaton has 1222 states and 1746 transitions. Word has length 26 [2018-04-13 05:42:17,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:17,303 INFO L459 AbstractCegarLoop]: Abstraction has 1222 states and 1746 transitions. [2018-04-13 05:42:17,303 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 05:42:17,303 INFO L276 IsEmpty]: Start isEmpty. Operand 1222 states and 1746 transitions. [2018-04-13 05:42:17,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-04-13 05:42:17,304 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:17,304 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:17,305 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:17,305 INFO L82 PathProgramCache]: Analyzing trace with hash 1486720405, now seen corresponding path program 1 times [2018-04-13 05:42:17,305 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:17,305 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:17,306 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:17,306 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:17,306 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:17,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:17,316 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:17,384 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 1 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:17,384 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:17,385 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:17,385 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:17,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:17,408 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:17,450 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:17,450 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:42:17,450 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [10] total 12 [2018-04-13 05:42:17,450 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-13 05:42:17,451 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-13 05:42:17,451 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=104, Unknown=0, NotChecked=0, Total=132 [2018-04-13 05:42:17,451 INFO L87 Difference]: Start difference. First operand 1222 states and 1746 transitions. Second operand 12 states. [2018-04-13 05:42:18,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:18,684 INFO L93 Difference]: Finished difference Result 5425 states and 8644 transitions. [2018-04-13 05:42:18,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2018-04-13 05:42:18,684 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 27 [2018-04-13 05:42:18,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:18,712 INFO L225 Difference]: With dead ends: 5425 [2018-04-13 05:42:18,712 INFO L226 Difference]: Without dead ends: 5425 [2018-04-13 05:42:18,713 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1230 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=648, Invalid=3012, Unknown=0, NotChecked=0, Total=3660 [2018-04-13 05:42:18,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5425 states. [2018-04-13 05:42:18,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5425 to 4438. [2018-04-13 05:42:18,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4438 states. [2018-04-13 05:42:18,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4438 states to 4438 states and 6636 transitions. [2018-04-13 05:42:18,895 INFO L78 Accepts]: Start accepts. Automaton has 4438 states and 6636 transitions. Word has length 27 [2018-04-13 05:42:18,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:18,895 INFO L459 AbstractCegarLoop]: Abstraction has 4438 states and 6636 transitions. [2018-04-13 05:42:18,896 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-13 05:42:18,896 INFO L276 IsEmpty]: Start isEmpty. Operand 4438 states and 6636 transitions. [2018-04-13 05:42:18,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-13 05:42:18,897 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:18,897 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:18,897 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:18,898 INFO L82 PathProgramCache]: Analyzing trace with hash 455690443, now seen corresponding path program 1 times [2018-04-13 05:42:18,898 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:18,898 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:18,899 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:18,899 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:18,899 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:18,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:18,911 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:18,941 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:18,941 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:42:18,941 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-13 05:42:18,941 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 05:42:18,941 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 05:42:18,941 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-13 05:42:18,942 INFO L87 Difference]: Start difference. First operand 4438 states and 6636 transitions. Second operand 6 states. [2018-04-13 05:42:19,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:19,053 INFO L93 Difference]: Finished difference Result 1944 states and 2442 transitions. [2018-04-13 05:42:19,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-13 05:42:19,053 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2018-04-13 05:42:19,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:19,059 INFO L225 Difference]: With dead ends: 1944 [2018-04-13 05:42:19,059 INFO L226 Difference]: Without dead ends: 1512 [2018-04-13 05:42:19,060 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-04-13 05:42:19,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1512 states. [2018-04-13 05:42:19,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1512 to 1449. [2018-04-13 05:42:19,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1449 states. [2018-04-13 05:42:19,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1449 states to 1449 states and 1935 transitions. [2018-04-13 05:42:19,091 INFO L78 Accepts]: Start accepts. Automaton has 1449 states and 1935 transitions. Word has length 31 [2018-04-13 05:42:19,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:19,091 INFO L459 AbstractCegarLoop]: Abstraction has 1449 states and 1935 transitions. [2018-04-13 05:42:19,091 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 05:42:19,091 INFO L276 IsEmpty]: Start isEmpty. Operand 1449 states and 1935 transitions. [2018-04-13 05:42:19,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-04-13 05:42:19,092 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:19,093 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:19,093 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:19,093 INFO L82 PathProgramCache]: Analyzing trace with hash 973226151, now seen corresponding path program 1 times [2018-04-13 05:42:19,093 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:19,093 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:19,094 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:19,094 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:19,094 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:19,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:19,103 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:19,218 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:19,219 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:19,219 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:19,219 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:19,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:19,242 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:19,283 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:19,284 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:42:19,284 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [8] total 12 [2018-04-13 05:42:19,284 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-13 05:42:19,284 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-13 05:42:19,285 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-04-13 05:42:19,285 INFO L87 Difference]: Start difference. First operand 1449 states and 1935 transitions. Second operand 12 states. [2018-04-13 05:42:20,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:20,048 INFO L93 Difference]: Finished difference Result 2630 states and 3487 transitions. [2018-04-13 05:42:20,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-13 05:42:20,049 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 31 [2018-04-13 05:42:20,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:20,060 INFO L225 Difference]: With dead ends: 2630 [2018-04-13 05:42:20,060 INFO L226 Difference]: Without dead ends: 2618 [2018-04-13 05:42:20,060 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 31 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 142 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=158, Invalid=598, Unknown=0, NotChecked=0, Total=756 [2018-04-13 05:42:20,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2618 states. [2018-04-13 05:42:20,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2618 to 2014. [2018-04-13 05:42:20,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2014 states. [2018-04-13 05:42:20,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2014 states to 2014 states and 2688 transitions. [2018-04-13 05:42:20,113 INFO L78 Accepts]: Start accepts. Automaton has 2014 states and 2688 transitions. Word has length 31 [2018-04-13 05:42:20,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:20,113 INFO L459 AbstractCegarLoop]: Abstraction has 2014 states and 2688 transitions. [2018-04-13 05:42:20,113 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-13 05:42:20,114 INFO L276 IsEmpty]: Start isEmpty. Operand 2014 states and 2688 transitions. [2018-04-13 05:42:20,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-04-13 05:42:20,114 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:20,115 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:20,115 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:20,115 INFO L82 PathProgramCache]: Analyzing trace with hash 506774158, now seen corresponding path program 1 times [2018-04-13 05:42:20,115 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:20,115 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:20,116 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:20,116 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:20,116 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:20,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:20,127 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:20,184 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 17 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:20,184 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:20,184 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:20,185 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:20,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:20,219 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:20,246 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 6 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-04-13 05:42:20,246 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:42:20,247 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [8] total 10 [2018-04-13 05:42:20,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-13 05:42:20,247 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-13 05:42:20,247 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2018-04-13 05:42:20,247 INFO L87 Difference]: Start difference. First operand 2014 states and 2688 transitions. Second operand 10 states. [2018-04-13 05:42:20,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:20,727 INFO L93 Difference]: Finished difference Result 2235 states and 2906 transitions. [2018-04-13 05:42:20,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-13 05:42:20,727 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 38 [2018-04-13 05:42:20,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:20,736 INFO L225 Difference]: With dead ends: 2235 [2018-04-13 05:42:20,736 INFO L226 Difference]: Without dead ends: 2235 [2018-04-13 05:42:20,737 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 39 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=314, Unknown=0, NotChecked=0, Total=420 [2018-04-13 05:42:20,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2235 states. [2018-04-13 05:42:20,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2235 to 1962. [2018-04-13 05:42:20,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1962 states. [2018-04-13 05:42:20,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1962 states to 1962 states and 2580 transitions. [2018-04-13 05:42:20,776 INFO L78 Accepts]: Start accepts. Automaton has 1962 states and 2580 transitions. Word has length 38 [2018-04-13 05:42:20,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:20,776 INFO L459 AbstractCegarLoop]: Abstraction has 1962 states and 2580 transitions. [2018-04-13 05:42:20,776 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-13 05:42:20,776 INFO L276 IsEmpty]: Start isEmpty. Operand 1962 states and 2580 transitions. [2018-04-13 05:42:20,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-04-13 05:42:20,777 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:20,777 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:20,777 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:20,777 INFO L82 PathProgramCache]: Analyzing trace with hash -1866673214, now seen corresponding path program 1 times [2018-04-13 05:42:20,778 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:20,778 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:20,778 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:20,778 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:20,778 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:20,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:20,791 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:20,851 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 8 proven. 9 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-04-13 05:42:20,851 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:20,852 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:20,852 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:20,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:20,875 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:20,918 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 15 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 05:42:20,919 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:20,919 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 12 [2018-04-13 05:42:20,919 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-13 05:42:20,919 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-13 05:42:20,920 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2018-04-13 05:42:20,920 INFO L87 Difference]: Start difference. First operand 1962 states and 2580 transitions. Second operand 12 states. [2018-04-13 05:42:21,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:21,193 INFO L93 Difference]: Finished difference Result 2737 states and 3758 transitions. [2018-04-13 05:42:21,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-13 05:42:21,194 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 42 [2018-04-13 05:42:21,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:21,204 INFO L225 Difference]: With dead ends: 2737 [2018-04-13 05:42:21,204 INFO L226 Difference]: Without dead ends: 2737 [2018-04-13 05:42:21,205 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 64 GetRequests, 44 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=108, Invalid=312, Unknown=0, NotChecked=0, Total=420 [2018-04-13 05:42:21,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2737 states. [2018-04-13 05:42:21,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2737 to 2390. [2018-04-13 05:42:21,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2390 states. [2018-04-13 05:42:21,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2390 states to 2390 states and 3180 transitions. [2018-04-13 05:42:21,271 INFO L78 Accepts]: Start accepts. Automaton has 2390 states and 3180 transitions. Word has length 42 [2018-04-13 05:42:21,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:21,272 INFO L459 AbstractCegarLoop]: Abstraction has 2390 states and 3180 transitions. [2018-04-13 05:42:21,272 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-13 05:42:21,272 INFO L276 IsEmpty]: Start isEmpty. Operand 2390 states and 3180 transitions. [2018-04-13 05:42:21,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-04-13 05:42:21,273 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:21,273 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:21,273 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:21,273 INFO L82 PathProgramCache]: Analyzing trace with hash -2091506019, now seen corresponding path program 1 times [2018-04-13 05:42:21,273 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:21,274 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:21,274 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:21,274 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:21,274 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:21,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:21,286 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:21,366 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 18 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-13 05:42:21,366 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:21,366 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:21,367 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:21,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:21,392 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:21,430 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 18 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-13 05:42:21,430 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:21,430 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 9 [2018-04-13 05:42:21,430 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-13 05:42:21,431 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-13 05:42:21,431 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-04-13 05:42:21,431 INFO L87 Difference]: Start difference. First operand 2390 states and 3180 transitions. Second operand 9 states. [2018-04-13 05:42:21,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:21,609 INFO L93 Difference]: Finished difference Result 2034 states and 2697 transitions. [2018-04-13 05:42:21,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-13 05:42:21,609 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 43 [2018-04-13 05:42:21,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:21,614 INFO L225 Difference]: With dead ends: 2034 [2018-04-13 05:42:21,614 INFO L226 Difference]: Without dead ends: 2034 [2018-04-13 05:42:21,614 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=76, Invalid=164, Unknown=0, NotChecked=0, Total=240 [2018-04-13 05:42:21,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2034 states. [2018-04-13 05:42:21,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2034 to 1976. [2018-04-13 05:42:21,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1976 states. [2018-04-13 05:42:21,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1976 states to 1976 states and 2639 transitions. [2018-04-13 05:42:21,651 INFO L78 Accepts]: Start accepts. Automaton has 1976 states and 2639 transitions. Word has length 43 [2018-04-13 05:42:21,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:21,652 INFO L459 AbstractCegarLoop]: Abstraction has 1976 states and 2639 transitions. [2018-04-13 05:42:21,652 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-13 05:42:21,652 INFO L276 IsEmpty]: Start isEmpty. Operand 1976 states and 2639 transitions. [2018-04-13 05:42:21,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-04-13 05:42:21,653 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:21,653 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:21,653 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:21,653 INFO L82 PathProgramCache]: Analyzing trace with hash 844308241, now seen corresponding path program 1 times [2018-04-13 05:42:21,654 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:21,654 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:21,654 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:21,654 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:21,655 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:21,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:21,669 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:21,718 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 32 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-13 05:42:21,718 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:21,718 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:21,719 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:21,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:21,747 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:21,782 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 32 proven. 4 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-13 05:42:21,782 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:21,782 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-04-13 05:42:21,783 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-13 05:42:21,783 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-13 05:42:21,783 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-13 05:42:21,783 INFO L87 Difference]: Start difference. First operand 1976 states and 2639 transitions. Second operand 11 states. [2018-04-13 05:42:21,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:21,998 INFO L93 Difference]: Finished difference Result 2533 states and 3483 transitions. [2018-04-13 05:42:21,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-13 05:42:21,999 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 54 [2018-04-13 05:42:21,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:22,005 INFO L225 Difference]: With dead ends: 2533 [2018-04-13 05:42:22,005 INFO L226 Difference]: Without dead ends: 2533 [2018-04-13 05:42:22,005 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 43 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2018-04-13 05:42:22,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2533 states. [2018-04-13 05:42:22,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2533 to 2020. [2018-04-13 05:42:22,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2020 states. [2018-04-13 05:42:22,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2020 states to 2020 states and 2705 transitions. [2018-04-13 05:42:22,031 INFO L78 Accepts]: Start accepts. Automaton has 2020 states and 2705 transitions. Word has length 54 [2018-04-13 05:42:22,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:22,032 INFO L459 AbstractCegarLoop]: Abstraction has 2020 states and 2705 transitions. [2018-04-13 05:42:22,032 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-13 05:42:22,032 INFO L276 IsEmpty]: Start isEmpty. Operand 2020 states and 2705 transitions. [2018-04-13 05:42:22,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-04-13 05:42:22,032 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:22,033 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:22,033 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:22,033 INFO L82 PathProgramCache]: Analyzing trace with hash 581915855, now seen corresponding path program 1 times [2018-04-13 05:42:22,033 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:22,033 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:22,033 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:22,033 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:22,033 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:22,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:22,045 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:22,098 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 32 proven. 5 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-13 05:42:22,099 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:22,099 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:22,099 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:22,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:22,124 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:22,198 INFO L134 CoverageAnalysis]: Checked inductivity of 44 backedges. 37 proven. 3 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-13 05:42:22,198 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:22,198 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8] total 15 [2018-04-13 05:42:22,198 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-13 05:42:22,199 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-13 05:42:22,199 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2018-04-13 05:42:22,199 INFO L87 Difference]: Start difference. First operand 2020 states and 2705 transitions. Second operand 15 states. [2018-04-13 05:42:22,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:22,547 INFO L93 Difference]: Finished difference Result 3223 states and 4474 transitions. [2018-04-13 05:42:22,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-04-13 05:42:22,547 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 54 [2018-04-13 05:42:22,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:22,555 INFO L225 Difference]: With dead ends: 3223 [2018-04-13 05:42:22,556 INFO L226 Difference]: Without dead ends: 3167 [2018-04-13 05:42:22,556 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 87 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 222 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=253, Invalid=803, Unknown=0, NotChecked=0, Total=1056 [2018-04-13 05:42:22,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3167 states. [2018-04-13 05:42:22,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3167 to 2648. [2018-04-13 05:42:22,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2648 states. [2018-04-13 05:42:22,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2648 states to 2648 states and 3558 transitions. [2018-04-13 05:42:22,597 INFO L78 Accepts]: Start accepts. Automaton has 2648 states and 3558 transitions. Word has length 54 [2018-04-13 05:42:22,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:22,598 INFO L459 AbstractCegarLoop]: Abstraction has 2648 states and 3558 transitions. [2018-04-13 05:42:22,598 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-13 05:42:22,598 INFO L276 IsEmpty]: Start isEmpty. Operand 2648 states and 3558 transitions. [2018-04-13 05:42:22,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-04-13 05:42:22,598 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:22,599 INFO L355 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:22,599 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:22,599 INFO L82 PathProgramCache]: Analyzing trace with hash -1277262141, now seen corresponding path program 1 times [2018-04-13 05:42:22,599 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:22,599 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:22,600 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:22,600 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:22,600 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:22,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:22,608 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:22,728 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 51 proven. 6 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-13 05:42:22,728 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:22,729 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:22,729 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:22,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:22,755 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:22,827 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 51 proven. 6 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-13 05:42:22,828 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:22,828 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 13 [2018-04-13 05:42:22,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-13 05:42:22,828 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-13 05:42:22,828 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-04-13 05:42:22,829 INFO L87 Difference]: Start difference. First operand 2648 states and 3558 transitions. Second operand 13 states. [2018-04-13 05:42:23,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:23,163 INFO L93 Difference]: Finished difference Result 2597 states and 3449 transitions. [2018-04-13 05:42:23,163 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-13 05:42:23,163 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2018-04-13 05:42:23,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:23,172 INFO L225 Difference]: With dead ends: 2597 [2018-04-13 05:42:23,172 INFO L226 Difference]: Without dead ends: 2530 [2018-04-13 05:42:23,172 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 58 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=126, Invalid=336, Unknown=0, NotChecked=0, Total=462 [2018-04-13 05:42:23,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2530 states. [2018-04-13 05:42:23,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2530 to 1793. [2018-04-13 05:42:23,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1793 states. [2018-04-13 05:42:23,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1793 states to 1793 states and 2382 transitions. [2018-04-13 05:42:23,208 INFO L78 Accepts]: Start accepts. Automaton has 1793 states and 2382 transitions. Word has length 57 [2018-04-13 05:42:23,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:23,208 INFO L459 AbstractCegarLoop]: Abstraction has 1793 states and 2382 transitions. [2018-04-13 05:42:23,208 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-13 05:42:23,208 INFO L276 IsEmpty]: Start isEmpty. Operand 1793 states and 2382 transitions. [2018-04-13 05:42:23,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-04-13 05:42:23,210 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:23,210 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:23,210 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:23,210 INFO L82 PathProgramCache]: Analyzing trace with hash -1206407780, now seen corresponding path program 1 times [2018-04-13 05:42:23,210 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:23,210 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:23,211 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:23,211 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:23,211 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:23,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:23,226 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:23,273 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 50 proven. 15 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-04-13 05:42:23,273 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:23,273 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:23,274 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:23,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:23,292 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:23,331 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 66 proven. 4 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-04-13 05:42:23,332 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:23,332 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-04-13 05:42:23,332 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-13 05:42:23,332 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-13 05:42:23,332 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-13 05:42:23,333 INFO L87 Difference]: Start difference. First operand 1793 states and 2382 transitions. Second operand 11 states. [2018-04-13 05:42:23,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:23,592 INFO L93 Difference]: Finished difference Result 2157 states and 2912 transitions. [2018-04-13 05:42:23,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-13 05:42:23,592 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 68 [2018-04-13 05:42:23,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:23,598 INFO L225 Difference]: With dead ends: 2157 [2018-04-13 05:42:23,599 INFO L226 Difference]: Without dead ends: 2157 [2018-04-13 05:42:23,599 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=92, Invalid=250, Unknown=0, NotChecked=0, Total=342 [2018-04-13 05:42:23,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2157 states. [2018-04-13 05:42:23,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2157 to 2130. [2018-04-13 05:42:23,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2130 states. [2018-04-13 05:42:23,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2130 states to 2130 states and 2887 transitions. [2018-04-13 05:42:23,640 INFO L78 Accepts]: Start accepts. Automaton has 2130 states and 2887 transitions. Word has length 68 [2018-04-13 05:42:23,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:23,641 INFO L459 AbstractCegarLoop]: Abstraction has 2130 states and 2887 transitions. [2018-04-13 05:42:23,641 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-13 05:42:23,641 INFO L276 IsEmpty]: Start isEmpty. Operand 2130 states and 2887 transitions. [2018-04-13 05:42:23,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-04-13 05:42:23,642 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:23,643 INFO L355 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:23,643 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:23,643 INFO L82 PathProgramCache]: Analyzing trace with hash -2000652943, now seen corresponding path program 1 times [2018-04-13 05:42:23,643 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:23,643 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:23,644 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:23,644 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:23,644 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:23,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:23,658 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:23,757 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 51 proven. 8 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-04-13 05:42:23,758 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:23,758 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:23,758 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:23,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:23,782 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:23,895 INFO L134 CoverageAnalysis]: Checked inductivity of 83 backedges. 53 proven. 22 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-04-13 05:42:23,895 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:23,896 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 11] total 18 [2018-04-13 05:42:23,896 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-13 05:42:23,896 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-13 05:42:23,896 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=260, Unknown=0, NotChecked=0, Total=306 [2018-04-13 05:42:23,897 INFO L87 Difference]: Start difference. First operand 2130 states and 2887 transitions. Second operand 18 states. [2018-04-13 05:42:24,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:24,584 INFO L93 Difference]: Finished difference Result 3713 states and 5117 transitions. [2018-04-13 05:42:24,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-13 05:42:24,584 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 70 [2018-04-13 05:42:24,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:24,593 INFO L225 Difference]: With dead ends: 3713 [2018-04-13 05:42:24,593 INFO L226 Difference]: Without dead ends: 3662 [2018-04-13 05:42:24,594 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 73 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 263 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=291, Invalid=1041, Unknown=0, NotChecked=0, Total=1332 [2018-04-13 05:42:24,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3662 states. [2018-04-13 05:42:24,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3662 to 2742. [2018-04-13 05:42:24,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2742 states. [2018-04-13 05:42:24,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2742 states to 2742 states and 3650 transitions. [2018-04-13 05:42:24,656 INFO L78 Accepts]: Start accepts. Automaton has 2742 states and 3650 transitions. Word has length 70 [2018-04-13 05:42:24,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:24,656 INFO L459 AbstractCegarLoop]: Abstraction has 2742 states and 3650 transitions. [2018-04-13 05:42:24,656 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-13 05:42:24,656 INFO L276 IsEmpty]: Start isEmpty. Operand 2742 states and 3650 transitions. [2018-04-13 05:42:24,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-04-13 05:42:24,658 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:24,658 INFO L355 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:24,658 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:24,658 INFO L82 PathProgramCache]: Analyzing trace with hash 415832890, now seen corresponding path program 1 times [2018-04-13 05:42:24,658 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:24,659 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:24,659 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:24,659 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:24,659 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:24,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:24,673 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:24,803 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 68 proven. 31 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-04-13 05:42:24,803 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:24,803 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:24,804 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:24,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:24,831 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:24,933 INFO L134 CoverageAnalysis]: Checked inductivity of 137 backedges. 78 proven. 6 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2018-04-13 05:42:24,933 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:24,934 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-04-13 05:42:24,934 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-13 05:42:24,934 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-13 05:42:24,934 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-04-13 05:42:24,935 INFO L87 Difference]: Start difference. First operand 2742 states and 3650 transitions. Second operand 17 states. [2018-04-13 05:42:25,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:25,615 INFO L93 Difference]: Finished difference Result 3567 states and 4853 transitions. [2018-04-13 05:42:25,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-13 05:42:25,615 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 84 [2018-04-13 05:42:25,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:25,622 INFO L225 Difference]: With dead ends: 3567 [2018-04-13 05:42:25,622 INFO L226 Difference]: Without dead ends: 3491 [2018-04-13 05:42:25,622 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 85 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 178 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=219, Invalid=837, Unknown=0, NotChecked=0, Total=1056 [2018-04-13 05:42:25,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3491 states. [2018-04-13 05:42:25,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3491 to 2618. [2018-04-13 05:42:25,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2618 states. [2018-04-13 05:42:25,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2618 states to 2618 states and 3446 transitions. [2018-04-13 05:42:25,680 INFO L78 Accepts]: Start accepts. Automaton has 2618 states and 3446 transitions. Word has length 84 [2018-04-13 05:42:25,681 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:25,681 INFO L459 AbstractCegarLoop]: Abstraction has 2618 states and 3446 transitions. [2018-04-13 05:42:25,681 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-13 05:42:25,681 INFO L276 IsEmpty]: Start isEmpty. Operand 2618 states and 3446 transitions. [2018-04-13 05:42:25,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-04-13 05:42:25,682 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:25,683 INFO L355 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:25,683 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:25,683 INFO L82 PathProgramCache]: Analyzing trace with hash -1955592504, now seen corresponding path program 1 times [2018-04-13 05:42:25,683 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:25,683 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:25,684 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:25,684 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:25,684 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:25,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:25,697 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:25,760 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 40 proven. 64 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-04-13 05:42:25,760 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:25,761 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:25,761 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:25,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:25,787 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:25,876 INFO L134 CoverageAnalysis]: Checked inductivity of 142 backedges. 107 proven. 6 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2018-04-13 05:42:25,876 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:25,877 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 16 [2018-04-13 05:42:25,877 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-13 05:42:25,877 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-13 05:42:25,877 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=210, Unknown=0, NotChecked=0, Total=240 [2018-04-13 05:42:25,877 INFO L87 Difference]: Start difference. First operand 2618 states and 3446 transitions. Second operand 16 states. [2018-04-13 05:42:26,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:26,876 INFO L93 Difference]: Finished difference Result 5367 states and 7228 transitions. [2018-04-13 05:42:26,876 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-04-13 05:42:26,876 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 87 [2018-04-13 05:42:26,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:26,886 INFO L225 Difference]: With dead ends: 5367 [2018-04-13 05:42:26,886 INFO L226 Difference]: Without dead ends: 5286 [2018-04-13 05:42:26,887 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 785 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=554, Invalid=2752, Unknown=0, NotChecked=0, Total=3306 [2018-04-13 05:42:26,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5286 states. [2018-04-13 05:42:26,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5286 to 4572. [2018-04-13 05:42:26,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4572 states. [2018-04-13 05:42:26,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4572 states to 4572 states and 6164 transitions. [2018-04-13 05:42:26,935 INFO L78 Accepts]: Start accepts. Automaton has 4572 states and 6164 transitions. Word has length 87 [2018-04-13 05:42:26,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:26,935 INFO L459 AbstractCegarLoop]: Abstraction has 4572 states and 6164 transitions. [2018-04-13 05:42:26,935 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-13 05:42:26,935 INFO L276 IsEmpty]: Start isEmpty. Operand 4572 states and 6164 transitions. [2018-04-13 05:42:26,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-04-13 05:42:26,937 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:26,937 INFO L355 BasicCegarLoop]: trace histogram [7, 7, 7, 6, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:26,937 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:26,937 INFO L82 PathProgramCache]: Analyzing trace with hash 1385009110, now seen corresponding path program 1 times [2018-04-13 05:42:26,938 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:26,938 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:26,938 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:26,938 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:26,938 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:26,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:26,947 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:27,036 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 39 proven. 76 refuted. 0 times theorem prover too weak. 46 trivial. 0 not checked. [2018-04-13 05:42:27,036 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:27,036 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:27,037 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:27,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:27,067 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:27,170 INFO L134 CoverageAnalysis]: Checked inductivity of 161 backedges. 87 proven. 3 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2018-04-13 05:42:27,170 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:27,170 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8] total 17 [2018-04-13 05:42:27,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-13 05:42:27,171 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-13 05:42:27,171 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=240, Unknown=0, NotChecked=0, Total=272 [2018-04-13 05:42:27,171 INFO L87 Difference]: Start difference. First operand 4572 states and 6164 transitions. Second operand 17 states. [2018-04-13 05:42:29,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:29,395 INFO L93 Difference]: Finished difference Result 7850 states and 10621 transitions. [2018-04-13 05:42:29,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2018-04-13 05:42:29,395 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 99 [2018-04-13 05:42:29,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:29,411 INFO L225 Difference]: With dead ends: 7850 [2018-04-13 05:42:29,412 INFO L226 Difference]: Without dead ends: 7444 [2018-04-13 05:42:29,413 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 127 SyntacticMatches, 0 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2620 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1023, Invalid=7167, Unknown=0, NotChecked=0, Total=8190 [2018-04-13 05:42:29,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7444 states. [2018-04-13 05:42:29,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7444 to 6733. [2018-04-13 05:42:29,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6733 states. [2018-04-13 05:42:29,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6733 states to 6733 states and 9253 transitions. [2018-04-13 05:42:29,515 INFO L78 Accepts]: Start accepts. Automaton has 6733 states and 9253 transitions. Word has length 99 [2018-04-13 05:42:29,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:29,515 INFO L459 AbstractCegarLoop]: Abstraction has 6733 states and 9253 transitions. [2018-04-13 05:42:29,515 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-13 05:42:29,515 INFO L276 IsEmpty]: Start isEmpty. Operand 6733 states and 9253 transitions. [2018-04-13 05:42:29,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-04-13 05:42:29,517 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:29,517 INFO L355 BasicCegarLoop]: trace histogram [8, 8, 8, 7, 5, 5, 5, 5, 5, 4, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:29,518 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:29,518 INFO L82 PathProgramCache]: Analyzing trace with hash -1781032752, now seen corresponding path program 1 times [2018-04-13 05:42:29,518 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:29,518 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:29,525 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:29,526 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:29,526 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:29,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:29,544 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:29,656 INFO L134 CoverageAnalysis]: Checked inductivity of 212 backedges. 47 proven. 95 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2018-04-13 05:42:29,656 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:29,656 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:29,657 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:29,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:29,686 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:29,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 05:42:29,704 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:29,707 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:29,707 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-13 05:42:29,987 INFO L134 CoverageAnalysis]: Checked inductivity of 212 backedges. 85 proven. 91 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-04-13 05:42:29,987 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:29,987 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 13] total 21 [2018-04-13 05:42:29,988 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-13 05:42:29,988 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-13 05:42:29,988 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=405, Unknown=0, NotChecked=0, Total=462 [2018-04-13 05:42:29,989 INFO L87 Difference]: Start difference. First operand 6733 states and 9253 transitions. Second operand 22 states. [2018-04-13 05:42:31,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:31,633 INFO L93 Difference]: Finished difference Result 10477 states and 14418 transitions. [2018-04-13 05:42:31,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-13 05:42:31,633 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 105 [2018-04-13 05:42:31,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:31,650 INFO L225 Difference]: With dead ends: 10477 [2018-04-13 05:42:31,650 INFO L226 Difference]: Without dead ends: 10477 [2018-04-13 05:42:31,650 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 114 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 529 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=467, Invalid=2083, Unknown=0, NotChecked=0, Total=2550 [2018-04-13 05:42:31,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10477 states. [2018-04-13 05:42:31,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10477 to 9797. [2018-04-13 05:42:31,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9797 states. [2018-04-13 05:42:31,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9797 states to 9797 states and 13525 transitions. [2018-04-13 05:42:31,758 INFO L78 Accepts]: Start accepts. Automaton has 9797 states and 13525 transitions. Word has length 105 [2018-04-13 05:42:31,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:31,759 INFO L459 AbstractCegarLoop]: Abstraction has 9797 states and 13525 transitions. [2018-04-13 05:42:31,759 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-13 05:42:31,759 INFO L276 IsEmpty]: Start isEmpty. Operand 9797 states and 13525 transitions. [2018-04-13 05:42:31,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-04-13 05:42:31,762 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:31,762 INFO L355 BasicCegarLoop]: trace histogram [10, 10, 9, 8, 6, 6, 6, 6, 6, 5, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:31,762 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:31,762 INFO L82 PathProgramCache]: Analyzing trace with hash -1154616472, now seen corresponding path program 1 times [2018-04-13 05:42:31,762 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:31,763 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:31,763 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:31,763 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:31,763 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:31,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:31,774 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:31,813 INFO L134 CoverageAnalysis]: Checked inductivity of 327 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 284 trivial. 0 not checked. [2018-04-13 05:42:31,813 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:42:31,813 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-13 05:42:31,813 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 05:42:31,813 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 05:42:31,814 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-04-13 05:42:31,814 INFO L87 Difference]: Start difference. First operand 9797 states and 13525 transitions. Second operand 6 states. [2018-04-13 05:42:31,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:31,978 INFO L93 Difference]: Finished difference Result 14618 states and 20590 transitions. [2018-04-13 05:42:32,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-13 05:42:32,001 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 131 [2018-04-13 05:42:32,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:32,034 INFO L225 Difference]: With dead ends: 14618 [2018-04-13 05:42:32,034 INFO L226 Difference]: Without dead ends: 14618 [2018-04-13 05:42:32,034 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2018-04-13 05:42:32,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14618 states. [2018-04-13 05:42:32,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14618 to 14603. [2018-04-13 05:42:32,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14603 states. [2018-04-13 05:42:32,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14603 states to 14603 states and 20577 transitions. [2018-04-13 05:42:32,254 INFO L78 Accepts]: Start accepts. Automaton has 14603 states and 20577 transitions. Word has length 131 [2018-04-13 05:42:32,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:32,254 INFO L459 AbstractCegarLoop]: Abstraction has 14603 states and 20577 transitions. [2018-04-13 05:42:32,254 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 05:42:32,254 INFO L276 IsEmpty]: Start isEmpty. Operand 14603 states and 20577 transitions. [2018-04-13 05:42:32,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-04-13 05:42:32,260 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:32,260 INFO L355 BasicCegarLoop]: trace histogram [11, 11, 11, 10, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 4, 4, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:32,261 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:32,261 INFO L82 PathProgramCache]: Analyzing trace with hash -1162631629, now seen corresponding path program 1 times [2018-04-13 05:42:32,261 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:32,261 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:32,262 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:32,262 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:32,262 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:32,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:32,279 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:32,349 INFO L134 CoverageAnalysis]: Checked inductivity of 408 backedges. 188 proven. 21 refuted. 0 times theorem prover too weak. 199 trivial. 0 not checked. [2018-04-13 05:42:32,349 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:32,349 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:32,350 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:32,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:32,387 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:32,426 INFO L134 CoverageAnalysis]: Checked inductivity of 408 backedges. 210 proven. 4 refuted. 0 times theorem prover too weak. 194 trivial. 0 not checked. [2018-04-13 05:42:32,426 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:32,426 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-04-13 05:42:32,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-13 05:42:32,427 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-13 05:42:32,427 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-13 05:42:32,427 INFO L87 Difference]: Start difference. First operand 14603 states and 20577 transitions. Second operand 11 states. [2018-04-13 05:42:32,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:32,709 INFO L93 Difference]: Finished difference Result 15659 states and 21700 transitions. [2018-04-13 05:42:32,709 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-13 05:42:32,709 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 141 [2018-04-13 05:42:32,709 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:32,747 INFO L225 Difference]: With dead ends: 15659 [2018-04-13 05:42:32,747 INFO L226 Difference]: Without dead ends: 15197 [2018-04-13 05:42:32,747 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 143 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=280, Unknown=0, NotChecked=0, Total=380 [2018-04-13 05:42:32,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15197 states. [2018-04-13 05:42:32,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15197 to 13639. [2018-04-13 05:42:32,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13639 states. [2018-04-13 05:42:32,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13639 states to 13639 states and 18766 transitions. [2018-04-13 05:42:32,930 INFO L78 Accepts]: Start accepts. Automaton has 13639 states and 18766 transitions. Word has length 141 [2018-04-13 05:42:32,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:32,930 INFO L459 AbstractCegarLoop]: Abstraction has 13639 states and 18766 transitions. [2018-04-13 05:42:32,930 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-13 05:42:32,930 INFO L276 IsEmpty]: Start isEmpty. Operand 13639 states and 18766 transitions. [2018-04-13 05:42:32,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-04-13 05:42:32,937 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:32,937 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 12, 11, 7, 7, 7, 6, 6, 5, 5, 5, 5, 5, 5, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:32,937 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:32,938 INFO L82 PathProgramCache]: Analyzing trace with hash -231926562, now seen corresponding path program 1 times [2018-04-13 05:42:32,938 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:32,938 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:32,939 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:32,939 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:32,939 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:32,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:32,958 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:33,024 INFO L134 CoverageAnalysis]: Checked inductivity of 498 backedges. 203 proven. 11 refuted. 0 times theorem prover too weak. 284 trivial. 0 not checked. [2018-04-13 05:42:33,024 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:33,024 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:33,025 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:33,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:33,066 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:33,223 INFO L134 CoverageAnalysis]: Checked inductivity of 498 backedges. 225 proven. 10 refuted. 0 times theorem prover too weak. 263 trivial. 0 not checked. [2018-04-13 05:42:33,223 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:33,224 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 11] total 14 [2018-04-13 05:42:33,224 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-04-13 05:42:33,224 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-04-13 05:42:33,224 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2018-04-13 05:42:33,224 INFO L87 Difference]: Start difference. First operand 13639 states and 18766 transitions. Second operand 14 states. [2018-04-13 05:42:33,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:33,613 INFO L93 Difference]: Finished difference Result 7333 states and 9592 transitions. [2018-04-13 05:42:33,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-13 05:42:33,613 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 155 [2018-04-13 05:42:33,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:33,624 INFO L225 Difference]: With dead ends: 7333 [2018-04-13 05:42:33,624 INFO L226 Difference]: Without dead ends: 5823 [2018-04-13 05:42:33,624 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 157 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 229 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=275, Invalid=847, Unknown=0, NotChecked=0, Total=1122 [2018-04-13 05:42:33,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5823 states. [2018-04-13 05:42:33,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5823 to 4882. [2018-04-13 05:42:33,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4882 states. [2018-04-13 05:42:33,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4882 states to 4882 states and 6301 transitions. [2018-04-13 05:42:33,667 INFO L78 Accepts]: Start accepts. Automaton has 4882 states and 6301 transitions. Word has length 155 [2018-04-13 05:42:33,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:33,667 INFO L459 AbstractCegarLoop]: Abstraction has 4882 states and 6301 transitions. [2018-04-13 05:42:33,667 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-04-13 05:42:33,667 INFO L276 IsEmpty]: Start isEmpty. Operand 4882 states and 6301 transitions. [2018-04-13 05:42:33,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2018-04-13 05:42:33,672 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:33,672 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 11, 10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:33,672 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:33,673 INFO L82 PathProgramCache]: Analyzing trace with hash -1233899590, now seen corresponding path program 1 times [2018-04-13 05:42:33,673 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:33,673 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:33,673 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:33,673 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:33,673 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:33,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:33,693 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:33,755 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 162 proven. 14 refuted. 0 times theorem prover too weak. 298 trivial. 0 not checked. [2018-04-13 05:42:33,756 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:33,756 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:33,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:33,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:33,802 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:33,805 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 05:42:33,805 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:33,806 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:33,806 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 05:42:34,014 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 81 proven. 260 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-04-13 05:42:34,014 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:34,014 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 13] total 15 [2018-04-13 05:42:34,015 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-13 05:42:34,015 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-13 05:42:34,015 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2018-04-13 05:42:34,015 INFO L87 Difference]: Start difference. First operand 4882 states and 6301 transitions. Second operand 16 states. [2018-04-13 05:42:35,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:35,642 INFO L93 Difference]: Finished difference Result 5932 states and 7616 transitions. [2018-04-13 05:42:35,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-04-13 05:42:35,643 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 162 [2018-04-13 05:42:35,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:35,652 INFO L225 Difference]: With dead ends: 5932 [2018-04-13 05:42:35,652 INFO L226 Difference]: Without dead ends: 5932 [2018-04-13 05:42:35,653 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 227 GetRequests, 162 SyntacticMatches, 8 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 913 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=631, Invalid=2791, Unknown=0, NotChecked=0, Total=3422 [2018-04-13 05:42:35,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5932 states. [2018-04-13 05:42:35,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5932 to 4884. [2018-04-13 05:42:35,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4884 states. [2018-04-13 05:42:35,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4884 states to 4884 states and 6305 transitions. [2018-04-13 05:42:35,705 INFO L78 Accepts]: Start accepts. Automaton has 4884 states and 6305 transitions. Word has length 162 [2018-04-13 05:42:35,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:35,706 INFO L459 AbstractCegarLoop]: Abstraction has 4884 states and 6305 transitions. [2018-04-13 05:42:35,706 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-13 05:42:35,706 INFO L276 IsEmpty]: Start isEmpty. Operand 4884 states and 6305 transitions. [2018-04-13 05:42:35,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 163 [2018-04-13 05:42:35,709 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:35,710 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 11, 10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:35,710 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:35,710 INFO L82 PathProgramCache]: Analyzing trace with hash -1233899589, now seen corresponding path program 1 times [2018-04-13 05:42:35,710 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:35,710 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:35,711 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:35,711 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:35,711 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:35,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:35,723 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:35,887 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 69 proven. 272 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-04-13 05:42:35,887 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:35,888 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:35,888 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:35,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:35,942 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:35,949 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 05:42:35,949 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:35,952 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:35,952 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-13 05:42:36,428 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 81 proven. 260 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-04-13 05:42:36,428 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:36,428 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14] total 26 [2018-04-13 05:42:36,429 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-13 05:42:36,429 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-13 05:42:36,429 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=642, Unknown=0, NotChecked=0, Total=702 [2018-04-13 05:42:36,430 INFO L87 Difference]: Start difference. First operand 4884 states and 6305 transitions. Second operand 27 states. [2018-04-13 05:42:41,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:41,684 INFO L93 Difference]: Finished difference Result 10373 states and 13550 transitions. [2018-04-13 05:42:41,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 91 states. [2018-04-13 05:42:41,685 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 162 [2018-04-13 05:42:41,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:41,700 INFO L225 Difference]: With dead ends: 10373 [2018-04-13 05:42:41,700 INFO L226 Difference]: Without dead ends: 10373 [2018-04-13 05:42:41,702 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 312 GetRequests, 190 SyntacticMatches, 8 SemanticMatches, 114 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4293 ImplicationChecksByTransitivity, 3.5s TimeCoverageRelationStatistics Valid=2219, Invalid=11121, Unknown=0, NotChecked=0, Total=13340 [2018-04-13 05:42:41,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10373 states. [2018-04-13 05:42:41,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10373 to 6112. [2018-04-13 05:42:41,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6112 states. [2018-04-13 05:42:41,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6112 states to 6112 states and 7891 transitions. [2018-04-13 05:42:41,776 INFO L78 Accepts]: Start accepts. Automaton has 6112 states and 7891 transitions. Word has length 162 [2018-04-13 05:42:41,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:41,776 INFO L459 AbstractCegarLoop]: Abstraction has 6112 states and 7891 transitions. [2018-04-13 05:42:41,776 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-13 05:42:41,776 INFO L276 IsEmpty]: Start isEmpty. Operand 6112 states and 7891 transitions. [2018-04-13 05:42:41,779 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2018-04-13 05:42:41,779 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:41,779 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 11, 10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:41,779 INFO L408 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:41,779 INFO L82 PathProgramCache]: Analyzing trace with hash 403816925, now seen corresponding path program 1 times [2018-04-13 05:42:41,779 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:41,779 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:41,780 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:41,780 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:41,780 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:41,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:41,792 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:41,874 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 69 proven. 272 refuted. 0 times theorem prover too weak. 133 trivial. 0 not checked. [2018-04-13 05:42:41,875 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:41,875 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:41,875 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:41,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:41,903 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:42,024 INFO L134 CoverageAnalysis]: Checked inductivity of 474 backedges. 171 proven. 34 refuted. 0 times theorem prover too weak. 269 trivial. 0 not checked. [2018-04-13 05:42:42,025 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:42,025 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 10] total 19 [2018-04-13 05:42:42,025 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-13 05:42:42,026 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-13 05:42:42,026 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=297, Unknown=0, NotChecked=0, Total=342 [2018-04-13 05:42:42,026 INFO L87 Difference]: Start difference. First operand 6112 states and 7891 transitions. Second operand 19 states. [2018-04-13 05:42:45,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:45,122 INFO L93 Difference]: Finished difference Result 10514 states and 13429 transitions. [2018-04-13 05:42:45,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2018-04-13 05:42:45,122 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 163 [2018-04-13 05:42:45,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:45,137 INFO L225 Difference]: With dead ends: 10514 [2018-04-13 05:42:45,137 INFO L226 Difference]: Without dead ends: 10514 [2018-04-13 05:42:45,140 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 205 SyntacticMatches, 2 SemanticMatches, 116 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4821 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2020, Invalid=11786, Unknown=0, NotChecked=0, Total=13806 [2018-04-13 05:42:45,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10514 states. [2018-04-13 05:42:45,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10514 to 6445. [2018-04-13 05:42:45,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6445 states. [2018-04-13 05:42:45,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6445 states to 6445 states and 8259 transitions. [2018-04-13 05:42:45,210 INFO L78 Accepts]: Start accepts. Automaton has 6445 states and 8259 transitions. Word has length 163 [2018-04-13 05:42:45,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:45,211 INFO L459 AbstractCegarLoop]: Abstraction has 6445 states and 8259 transitions. [2018-04-13 05:42:45,211 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-13 05:42:45,211 INFO L276 IsEmpty]: Start isEmpty. Operand 6445 states and 8259 transitions. [2018-04-13 05:42:45,214 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2018-04-13 05:42:45,215 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:45,215 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 11, 10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:45,215 INFO L408 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:45,215 INFO L82 PathProgramCache]: Analyzing trace with hash 1198835182, now seen corresponding path program 1 times [2018-04-13 05:42:45,215 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:45,215 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:45,215 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:45,215 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:45,215 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:45,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:45,233 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:45,577 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 66 proven. 290 refuted. 0 times theorem prover too weak. 121 trivial. 0 not checked. [2018-04-13 05:42:45,577 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:45,578 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:45,578 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:45,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:45,631 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:45,792 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:42:45,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:42:45,794 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:45,795 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:45,800 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:42:45,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:42:45,802 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:45,803 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:45,807 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:45,807 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:33, output treesize:25 [2018-04-13 05:42:45,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-13 05:42:45,902 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 05:42:45,902 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 05:42:45,905 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:42:45,910 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-13 05:42:45,915 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 05:42:45,915 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-13 05:42:45,917 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:42:45,923 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:42:45,923 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:43, output treesize:18 [2018-04-13 05:42:45,995 INFO L134 CoverageAnalysis]: Checked inductivity of 477 backedges. 27 proven. 94 refuted. 0 times theorem prover too weak. 356 trivial. 0 not checked. [2018-04-13 05:42:45,995 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:42:45,995 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 18] total 34 [2018-04-13 05:42:45,995 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-13 05:42:45,996 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-13 05:42:45,996 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=1039, Unknown=0, NotChecked=0, Total=1122 [2018-04-13 05:42:45,996 INFO L87 Difference]: Start difference. First operand 6445 states and 8259 transitions. Second operand 34 states. [2018-04-13 05:42:50,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:50,106 INFO L93 Difference]: Finished difference Result 11306 states and 14849 transitions. [2018-04-13 05:42:50,106 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 71 states. [2018-04-13 05:42:50,106 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 170 [2018-04-13 05:42:50,107 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:50,124 INFO L225 Difference]: With dead ends: 11306 [2018-04-13 05:42:50,124 INFO L226 Difference]: Without dead ends: 11306 [2018-04-13 05:42:50,125 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 281 GetRequests, 167 SyntacticMatches, 13 SemanticMatches, 101 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3058 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=1455, Invalid=9051, Unknown=0, NotChecked=0, Total=10506 [2018-04-13 05:42:50,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11306 states. [2018-04-13 05:42:50,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11306 to 8099. [2018-04-13 05:42:50,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8099 states. [2018-04-13 05:42:50,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8099 states to 8099 states and 10383 transitions. [2018-04-13 05:42:50,206 INFO L78 Accepts]: Start accepts. Automaton has 8099 states and 10383 transitions. Word has length 170 [2018-04-13 05:42:50,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:50,206 INFO L459 AbstractCegarLoop]: Abstraction has 8099 states and 10383 transitions. [2018-04-13 05:42:50,206 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-13 05:42:50,206 INFO L276 IsEmpty]: Start isEmpty. Operand 8099 states and 10383 transitions. [2018-04-13 05:42:50,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2018-04-13 05:42:50,209 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:50,209 INFO L355 BasicCegarLoop]: trace histogram [12, 12, 11, 10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:50,209 INFO L408 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:50,210 INFO L82 PathProgramCache]: Analyzing trace with hash -1490816471, now seen corresponding path program 1 times [2018-04-13 05:42:50,210 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:50,210 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:50,210 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:50,210 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:50,210 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:50,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:50,223 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:50,229 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:42:50,229 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:50,229 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:50,230 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:50,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:50,262 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:50,335 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:42:50,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 05:42:50,336 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:50,339 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:42:50,339 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-13 05:42:50,373 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:42:50,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 05:42:50,374 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:50,376 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:42:50,376 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-13 05:42:50,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:42:50,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 05:42:50,396 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:50,398 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:42:50,398 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-13 05:42:50,427 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:42:50,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 05:42:50,428 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:50,430 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:42:50,430 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-13 05:42:50,448 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:42:50,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 05:42:50,449 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:50,451 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:42:50,451 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-13 05:42:50,487 WARN L1033 $PredicateComparison]: unable to prove that (exists ((~__U_MULTI_flockfree_____true_valid_memsafety_i__garbage~0.base Int)) (and (= (select |c_old(#valid)| ~__U_MULTI_flockfree_____true_valid_memsafety_i__garbage~0.base) 0) (= |c_#valid| (store |c_old(#valid)| ~__U_MULTI_flockfree_____true_valid_memsafety_i__garbage~0.base 0)))) is different from true [2018-04-13 05:42:50,521 INFO L134 CoverageAnalysis]: Checked inductivity of 476 backedges. 22 proven. 319 refuted. 0 times theorem prover too weak. 133 trivial. 2 not checked. [2018-04-13 05:42:50,522 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:42:50,522 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-04-13 05:42:50,522 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-13 05:42:50,522 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-13 05:42:50,522 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=178, Unknown=1, NotChecked=26, Total=240 [2018-04-13 05:42:50,522 INFO L87 Difference]: Start difference. First operand 8099 states and 10383 transitions. Second operand 16 states. [2018-04-13 05:42:52,116 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:42:52,116 INFO L93 Difference]: Finished difference Result 16597 states and 21372 transitions. [2018-04-13 05:42:52,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-04-13 05:42:52,116 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 171 [2018-04-13 05:42:52,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:42:52,138 INFO L225 Difference]: With dead ends: 16597 [2018-04-13 05:42:52,138 INFO L226 Difference]: Without dead ends: 16585 [2018-04-13 05:42:52,138 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 202 GetRequests, 151 SyntacticMatches, 6 SemanticMatches, 45 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 541 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=326, Invalid=1747, Unknown=1, NotChecked=88, Total=2162 [2018-04-13 05:42:52,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16585 states. [2018-04-13 05:42:52,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16585 to 15074. [2018-04-13 05:42:52,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15074 states. [2018-04-13 05:42:52,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15074 states to 15074 states and 19510 transitions. [2018-04-13 05:42:52,277 INFO L78 Accepts]: Start accepts. Automaton has 15074 states and 19510 transitions. Word has length 171 [2018-04-13 05:42:52,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:42:52,277 INFO L459 AbstractCegarLoop]: Abstraction has 15074 states and 19510 transitions. [2018-04-13 05:42:52,277 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-13 05:42:52,277 INFO L276 IsEmpty]: Start isEmpty. Operand 15074 states and 19510 transitions. [2018-04-13 05:42:52,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-04-13 05:42:52,280 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:42:52,280 INFO L355 BasicCegarLoop]: trace histogram [13, 13, 13, 12, 8, 8, 8, 7, 7, 6, 5, 5, 5, 5, 5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:42:52,280 INFO L408 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:42:52,280 INFO L82 PathProgramCache]: Analyzing trace with hash -706197154, now seen corresponding path program 1 times [2018-04-13 05:42:52,281 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:42:52,281 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:42:52,281 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:52,281 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:52,281 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:42:52,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:52,294 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:42:52,299 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:42:52,300 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:42:52,300 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:42:52,300 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:42:52,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:42:52,334 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:42:52,403 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:42:52,405 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:42:52,406 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:52,407 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:52,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:42:52,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:42:52,420 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:52,422 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:52,430 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:52,430 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:39, output treesize:31 [2018-04-13 05:42:52,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-13 05:42:52,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-13 05:42:52,598 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:52,599 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:52,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-13 05:42:52,604 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-13 05:42:52,605 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:42:52,605 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:52,607 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:42:52,607 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:37, output treesize:7 [2018-04-13 05:42:52,735 INFO L134 CoverageAnalysis]: Checked inductivity of 600 backedges. 130 proven. 414 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2018-04-13 05:42:52,735 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:42:52,735 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-04-13 05:42:52,735 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-13 05:42:52,735 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-13 05:42:52,736 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=634, Unknown=0, NotChecked=0, Total=702 [2018-04-13 05:42:52,736 INFO L87 Difference]: Start difference. First operand 15074 states and 19510 transitions. Second operand 27 states. [2018-04-13 05:43:03,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:43:03,031 INFO L93 Difference]: Finished difference Result 48364 states and 62601 transitions. [2018-04-13 05:43:03,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 219 states. [2018-04-13 05:43:03,031 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 173 [2018-04-13 05:43:03,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:43:03,142 INFO L225 Difference]: With dead ends: 48364 [2018-04-13 05:43:03,142 INFO L226 Difference]: Without dead ends: 48005 [2018-04-13 05:43:03,147 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 423 GetRequests, 187 SyntacticMatches, 0 SemanticMatches, 236 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23345 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=4924, Invalid=51482, Unknown=0, NotChecked=0, Total=56406 [2018-04-13 05:43:03,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48005 states. [2018-04-13 05:43:03,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48005 to 41420. [2018-04-13 05:43:03,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41420 states. [2018-04-13 05:43:03,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41420 states to 41420 states and 53360 transitions. [2018-04-13 05:43:03,730 INFO L78 Accepts]: Start accepts. Automaton has 41420 states and 53360 transitions. Word has length 173 [2018-04-13 05:43:03,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:43:03,731 INFO L459 AbstractCegarLoop]: Abstraction has 41420 states and 53360 transitions. [2018-04-13 05:43:03,731 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-13 05:43:03,731 INFO L276 IsEmpty]: Start isEmpty. Operand 41420 states and 53360 transitions. [2018-04-13 05:43:03,857 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2018-04-13 05:43:03,857 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:43:03,857 INFO L355 BasicCegarLoop]: trace histogram [13, 13, 13, 12, 8, 8, 8, 7, 7, 6, 5, 5, 5, 5, 5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:43:03,857 INFO L408 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:43:03,858 INFO L82 PathProgramCache]: Analyzing trace with hash 2031963369, now seen corresponding path program 1 times [2018-04-13 05:43:03,858 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:43:03,858 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:43:03,858 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:03,858 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:43:03,858 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:03,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:03,870 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:43:03,987 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 275 proven. 7 refuted. 0 times theorem prover too weak. 319 trivial. 0 not checked. [2018-04-13 05:43:03,987 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:43:03,987 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:43:03,988 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:43:04,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:04,037 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:43:04,103 INFO L134 CoverageAnalysis]: Checked inductivity of 601 backedges. 252 proven. 7 refuted. 0 times theorem prover too weak. 342 trivial. 0 not checked. [2018-04-13 05:43:04,103 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:43:04,103 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 13 [2018-04-13 05:43:04,103 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-13 05:43:04,103 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-13 05:43:04,104 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=124, Unknown=0, NotChecked=0, Total=156 [2018-04-13 05:43:04,104 INFO L87 Difference]: Start difference. First operand 41420 states and 53360 transitions. Second operand 13 states. [2018-04-13 05:43:04,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:43:04,416 INFO L93 Difference]: Finished difference Result 45348 states and 57931 transitions. [2018-04-13 05:43:04,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-13 05:43:04,416 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 175 [2018-04-13 05:43:04,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:43:04,483 INFO L225 Difference]: With dead ends: 45348 [2018-04-13 05:43:04,483 INFO L226 Difference]: Without dead ends: 44983 [2018-04-13 05:43:04,483 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 198 GetRequests, 175 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=127, Invalid=335, Unknown=0, NotChecked=0, Total=462 [2018-04-13 05:43:04,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44983 states. [2018-04-13 05:43:04,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44983 to 41989. [2018-04-13 05:43:04,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41989 states. [2018-04-13 05:43:04,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41989 states to 41989 states and 53411 transitions. [2018-04-13 05:43:04,862 INFO L78 Accepts]: Start accepts. Automaton has 41989 states and 53411 transitions. Word has length 175 [2018-04-13 05:43:04,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:43:04,863 INFO L459 AbstractCegarLoop]: Abstraction has 41989 states and 53411 transitions. [2018-04-13 05:43:04,863 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-13 05:43:04,863 INFO L276 IsEmpty]: Start isEmpty. Operand 41989 states and 53411 transitions. [2018-04-13 05:43:04,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-04-13 05:43:04,870 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:43:04,870 INFO L355 BasicCegarLoop]: trace histogram [13, 13, 12, 11, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 4, 4, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:43:04,871 INFO L408 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:43:04,871 INFO L82 PathProgramCache]: Analyzing trace with hash 893459287, now seen corresponding path program 2 times [2018-04-13 05:43:04,871 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:43:04,871 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:43:04,871 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:04,871 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:43:04,871 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:04,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:04,884 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:43:04,919 INFO L134 CoverageAnalysis]: Checked inductivity of 560 backedges. 63 proven. 0 refuted. 0 times theorem prover too weak. 497 trivial. 0 not checked. [2018-04-13 05:43:04,919 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 05:43:04,919 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 05:43:04,920 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-13 05:43:04,920 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-13 05:43:04,920 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-04-13 05:43:04,920 INFO L87 Difference]: Start difference. First operand 41989 states and 53411 transitions. Second operand 5 states. [2018-04-13 05:43:04,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:43:04,993 INFO L93 Difference]: Finished difference Result 34303 states and 43282 transitions. [2018-04-13 05:43:04,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-13 05:43:04,994 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 181 [2018-04-13 05:43:04,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:43:05,049 INFO L225 Difference]: With dead ends: 34303 [2018-04-13 05:43:05,049 INFO L226 Difference]: Without dead ends: 34295 [2018-04-13 05:43:05,050 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-04-13 05:43:05,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34295 states. [2018-04-13 05:43:05,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34295 to 34150. [2018-04-13 05:43:05,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34150 states. [2018-04-13 05:43:05,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34150 states to 34150 states and 43108 transitions. [2018-04-13 05:43:05,355 INFO L78 Accepts]: Start accepts. Automaton has 34150 states and 43108 transitions. Word has length 181 [2018-04-13 05:43:05,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:43:05,355 INFO L459 AbstractCegarLoop]: Abstraction has 34150 states and 43108 transitions. [2018-04-13 05:43:05,355 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-13 05:43:05,355 INFO L276 IsEmpty]: Start isEmpty. Operand 34150 states and 43108 transitions. [2018-04-13 05:43:05,365 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-04-13 05:43:05,365 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:43:05,365 INFO L355 BasicCegarLoop]: trace histogram [14, 14, 13, 12, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 5, 4, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:43:05,365 INFO L408 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:43:05,365 INFO L82 PathProgramCache]: Analyzing trace with hash 1226987177, now seen corresponding path program 1 times [2018-04-13 05:43:05,365 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:43:05,365 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:43:05,366 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:05,366 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:43:05,366 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:05,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:05,378 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:43:05,663 INFO L134 CoverageAnalysis]: Checked inductivity of 659 backedges. 331 proven. 64 refuted. 0 times theorem prover too weak. 264 trivial. 0 not checked. [2018-04-13 05:43:05,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:43:05,663 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:43:05,664 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:43:05,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:05,691 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:43:05,814 INFO L134 CoverageAnalysis]: Checked inductivity of 659 backedges. 370 proven. 16 refuted. 0 times theorem prover too weak. 273 trivial. 0 not checked. [2018-04-13 05:43:05,814 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:43:05,815 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8] total 16 [2018-04-13 05:43:05,815 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-13 05:43:05,815 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-13 05:43:05,815 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-04-13 05:43:05,815 INFO L87 Difference]: Start difference. First operand 34150 states and 43108 transitions. Second operand 16 states. [2018-04-13 05:43:08,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:43:08,002 INFO L93 Difference]: Finished difference Result 54691 states and 69101 transitions. [2018-04-13 05:43:08,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 115 states. [2018-04-13 05:43:08,003 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 193 [2018-04-13 05:43:08,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:43:08,096 INFO L225 Difference]: With dead ends: 54691 [2018-04-13 05:43:08,097 INFO L226 Difference]: Without dead ends: 54376 [2018-04-13 05:43:08,098 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 364 GetRequests, 242 SyntacticMatches, 2 SemanticMatches, 120 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5868 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=1657, Invalid=13105, Unknown=0, NotChecked=0, Total=14762 [2018-04-13 05:43:08,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54376 states. [2018-04-13 05:43:08,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54376 to 51244. [2018-04-13 05:43:08,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51244 states. [2018-04-13 05:43:08,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51244 states to 51244 states and 64745 transitions. [2018-04-13 05:43:08,698 INFO L78 Accepts]: Start accepts. Automaton has 51244 states and 64745 transitions. Word has length 193 [2018-04-13 05:43:08,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:43:08,698 INFO L459 AbstractCegarLoop]: Abstraction has 51244 states and 64745 transitions. [2018-04-13 05:43:08,698 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-13 05:43:08,698 INFO L276 IsEmpty]: Start isEmpty. Operand 51244 states and 64745 transitions. [2018-04-13 05:43:08,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2018-04-13 05:43:08,711 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:43:08,712 INFO L355 BasicCegarLoop]: trace histogram [14, 14, 13, 11, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 5, 5, 4, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:43:08,712 INFO L408 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:43:08,712 INFO L82 PathProgramCache]: Analyzing trace with hash 832620391, now seen corresponding path program 2 times [2018-04-13 05:43:08,712 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:43:08,712 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:43:08,713 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:08,713 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:43:08,713 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:08,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:08,727 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:43:08,731 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:43:08,731 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:43:08,731 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:43:08,731 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:43:08,761 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:43:08,761 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:43:08,768 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:43:08,878 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:43:08,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 05:43:08,879 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:08,881 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:43:08,881 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-13 05:43:08,906 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:43:08,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 05:43:08,907 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:08,909 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:43:08,909 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-13 05:43:08,926 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:43:08,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 05:43:08,926 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:08,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:43:08,928 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-13 05:43:08,947 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:43:08,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 05:43:08,947 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:08,949 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:43:08,949 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-13 05:43:08,967 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:43:08,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 05:43:08,968 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:08,969 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:43:08,970 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-13 05:43:09,004 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:43:09,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 05:43:09,005 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:09,007 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:43:09,007 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-13 05:43:09,031 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:43:09,032 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-04-13 05:43:09,032 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:09,034 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:43:09,034 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:9 [2018-04-13 05:43:09,085 WARN L1033 $PredicateComparison]: unable to prove that (exists ((~__U_MULTI_flockfree_____true_valid_memsafety_i__garbage~0.base Int)) (and (= (select |c_old(#valid)| ~__U_MULTI_flockfree_____true_valid_memsafety_i__garbage~0.base) 0) (= |c_#valid| (store |c_old(#valid)| ~__U_MULTI_flockfree_____true_valid_memsafety_i__garbage~0.base 0)))) is different from true [2018-04-13 05:43:09,165 INFO L134 CoverageAnalysis]: Checked inductivity of 659 backedges. 22 proven. 484 refuted. 0 times theorem prover too weak. 151 trivial. 2 not checked. [2018-04-13 05:43:09,165 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:43:09,166 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16] total 16 [2018-04-13 05:43:09,166 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-13 05:43:09,166 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-13 05:43:09,166 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=206, Unknown=1, NotChecked=28, Total=272 [2018-04-13 05:43:09,166 INFO L87 Difference]: Start difference. First operand 51244 states and 64745 transitions. Second operand 17 states. [2018-04-13 05:43:10,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:43:10,979 INFO L93 Difference]: Finished difference Result 57236 states and 72701 transitions. [2018-04-13 05:43:10,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-13 05:43:10,980 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 193 [2018-04-13 05:43:10,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:43:11,083 INFO L225 Difference]: With dead ends: 57236 [2018-04-13 05:43:11,083 INFO L226 Difference]: Without dead ends: 57224 [2018-04-13 05:43:11,084 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 228 GetRequests, 169 SyntacticMatches, 9 SemanticMatches, 50 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 702 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=383, Invalid=2170, Unknown=1, NotChecked=98, Total=2652 [2018-04-13 05:43:11,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57224 states. [2018-04-13 05:43:11,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57224 to 51507. [2018-04-13 05:43:11,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51507 states. [2018-04-13 05:43:11,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51507 states to 51507 states and 65549 transitions. [2018-04-13 05:43:11,840 INFO L78 Accepts]: Start accepts. Automaton has 51507 states and 65549 transitions. Word has length 193 [2018-04-13 05:43:11,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:43:11,840 INFO L459 AbstractCegarLoop]: Abstraction has 51507 states and 65549 transitions. [2018-04-13 05:43:11,840 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-13 05:43:11,840 INFO L276 IsEmpty]: Start isEmpty. Operand 51507 states and 65549 transitions. [2018-04-13 05:43:11,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 212 [2018-04-13 05:43:11,856 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:43:11,856 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 16, 15, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 6, 5, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:43:11,856 INFO L408 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:43:11,857 INFO L82 PathProgramCache]: Analyzing trace with hash 1408273221, now seen corresponding path program 2 times [2018-04-13 05:43:11,857 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:43:11,857 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:43:11,857 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:11,857 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:43:11,857 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:11,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:11,874 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:43:11,954 INFO L134 CoverageAnalysis]: Checked inductivity of 926 backedges. 404 proven. 25 refuted. 0 times theorem prover too weak. 497 trivial. 0 not checked. [2018-04-13 05:43:11,954 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:43:11,954 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:43:11,955 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:43:11,996 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:43:11,996 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:43:12,006 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:43:12,045 INFO L134 CoverageAnalysis]: Checked inductivity of 926 backedges. 448 proven. 4 refuted. 0 times theorem prover too weak. 474 trivial. 0 not checked. [2018-04-13 05:43:12,046 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:43:12,046 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-04-13 05:43:12,046 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-13 05:43:12,046 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-13 05:43:12,047 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-13 05:43:12,047 INFO L87 Difference]: Start difference. First operand 51507 states and 65549 transitions. Second operand 11 states. [2018-04-13 05:43:12,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:43:12,418 INFO L93 Difference]: Finished difference Result 39094 states and 48712 transitions. [2018-04-13 05:43:12,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-13 05:43:12,418 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 211 [2018-04-13 05:43:12,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:43:12,479 INFO L225 Difference]: With dead ends: 39094 [2018-04-13 05:43:12,479 INFO L226 Difference]: Without dead ends: 38394 [2018-04-13 05:43:12,480 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 237 GetRequests, 214 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=139, Invalid=367, Unknown=0, NotChecked=0, Total=506 [2018-04-13 05:43:12,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38394 states. [2018-04-13 05:43:12,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38394 to 37430. [2018-04-13 05:43:12,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37430 states. [2018-04-13 05:43:12,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37430 states to 37430 states and 46643 transitions. [2018-04-13 05:43:12,797 INFO L78 Accepts]: Start accepts. Automaton has 37430 states and 46643 transitions. Word has length 211 [2018-04-13 05:43:12,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:43:12,797 INFO L459 AbstractCegarLoop]: Abstraction has 37430 states and 46643 transitions. [2018-04-13 05:43:12,797 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-13 05:43:12,797 INFO L276 IsEmpty]: Start isEmpty. Operand 37430 states and 46643 transitions. [2018-04-13 05:43:12,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 225 [2018-04-13 05:43:12,808 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:43:12,808 INFO L355 BasicCegarLoop]: trace histogram [16, 16, 15, 14, 9, 9, 9, 9, 9, 7, 6, 6, 6, 6, 6, 5, 5, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:43:12,808 INFO L408 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:43:12,808 INFO L82 PathProgramCache]: Analyzing trace with hash 1857957655, now seen corresponding path program 2 times [2018-04-13 05:43:12,808 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:43:12,808 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:43:12,808 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:12,808 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:43:12,809 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:12,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:12,822 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:43:12,894 INFO L134 CoverageAnalysis]: Checked inductivity of 905 backedges. 375 proven. 63 refuted. 0 times theorem prover too weak. 467 trivial. 0 not checked. [2018-04-13 05:43:12,895 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:43:12,895 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:43:12,895 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:43:12,919 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:43:12,919 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:43:12,925 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:43:12,973 INFO L134 CoverageAnalysis]: Checked inductivity of 905 backedges. 483 proven. 5 refuted. 0 times theorem prover too weak. 417 trivial. 0 not checked. [2018-04-13 05:43:12,973 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:43:12,973 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 11 [2018-04-13 05:43:12,974 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-13 05:43:12,974 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-13 05:43:12,974 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-04-13 05:43:12,974 INFO L87 Difference]: Start difference. First operand 37430 states and 46643 transitions. Second operand 11 states. [2018-04-13 05:43:13,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:43:13,215 INFO L93 Difference]: Finished difference Result 42733 states and 54102 transitions. [2018-04-13 05:43:13,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-13 05:43:13,215 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 224 [2018-04-13 05:43:13,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:43:13,279 INFO L225 Difference]: With dead ends: 42733 [2018-04-13 05:43:13,279 INFO L226 Difference]: Without dead ends: 41970 [2018-04-13 05:43:13,279 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 225 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=280, Unknown=0, NotChecked=0, Total=380 [2018-04-13 05:43:13,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41970 states. [2018-04-13 05:43:13,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41970 to 34080. [2018-04-13 05:43:13,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34080 states. [2018-04-13 05:43:13,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34080 states to 34080 states and 42389 transitions. [2018-04-13 05:43:13,895 INFO L78 Accepts]: Start accepts. Automaton has 34080 states and 42389 transitions. Word has length 224 [2018-04-13 05:43:13,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:43:13,896 INFO L459 AbstractCegarLoop]: Abstraction has 34080 states and 42389 transitions. [2018-04-13 05:43:13,896 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-13 05:43:13,896 INFO L276 IsEmpty]: Start isEmpty. Operand 34080 states and 42389 transitions. [2018-04-13 05:43:13,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2018-04-13 05:43:13,906 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:43:13,906 INFO L355 BasicCegarLoop]: trace histogram [18, 18, 18, 17, 10, 10, 10, 10, 10, 8, 8, 8, 8, 7, 7, 6, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:43:13,907 INFO L408 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:43:13,907 INFO L82 PathProgramCache]: Analyzing trace with hash 1439437335, now seen corresponding path program 1 times [2018-04-13 05:43:13,907 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:43:13,907 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:43:13,908 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:13,908 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:43:13,908 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:43:13,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:13,930 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:43:13,947 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:43:13,947 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:43:13,947 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:43:13,948 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:43:14,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:43:14,049 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:43:14,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 05:43:14,073 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:14,078 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:14,079 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:15 [2018-04-13 05:43:14,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:43:14,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:43:14,153 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:14,154 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:14,164 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:43:14,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:43:14,175 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:14,177 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:14,188 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:14,188 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:45, output treesize:37 [2018-04-13 05:43:14,449 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:43:14,450 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:43:14,450 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 24 [2018-04-13 05:43:14,451 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:14,487 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 32 treesize of output 42 [2018-04-13 05:43:14,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 32 [2018-04-13 05:43:14,490 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:14,510 INFO L267 ElimStorePlain]: Start of recursive call 3: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:14,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 23 treesize of output 35 [2018-04-13 05:43:14,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 23 [2018-04-13 05:43:14,537 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:14,547 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:14,559 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 05:43:14,560 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:79, output treesize:69 [2018-04-13 05:43:14,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 41 treesize of output 49 [2018-04-13 05:43:14,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 40 treesize of output 49 [2018-04-13 05:43:14,820 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 05:43:14,850 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 05:43:14,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 35 treesize of output 47 [2018-04-13 05:43:14,861 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 4 xjuncts. [2018-04-13 05:43:14,894 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-04-13 05:43:14,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 32 treesize of output 42 [2018-04-13 05:43:14,953 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 28 treesize of output 47 [2018-04-13 05:43:14,954 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 4 xjuncts. [2018-04-13 05:43:14,990 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 27 treesize of output 36 [2018-04-13 05:43:14,990 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 05:43:15,012 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-04-13 05:43:15,059 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 2 dim-2 vars, End of recursive call: 26 dim-0 vars, and 14 xjuncts. [2018-04-13 05:43:15,059 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 7 variables, input treesize:95, output treesize:775 [2018-04-13 05:43:15,249 WARN L151 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 216 DAG size of output 91 [2018-04-13 05:43:15,282 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 111 treesize of output 107 [2018-04-13 05:43:15,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 96 [2018-04-13 05:43:15,285 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 88 [2018-04-13 05:43:15,325 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,361 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 05:43:15,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 72 [2018-04-13 05:43:15,362 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,382 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 40 [2018-04-13 05:43:15,434 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:43:15,434 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,441 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,496 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 92 [2018-04-13 05:43:15,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 66 [2018-04-13 05:43:15,502 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:43:15,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 65 [2018-04-13 05:43:15,548 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:43:15,590 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 58 [2018-04-13 05:43:15,591 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,628 INFO L267 ElimStorePlain]: Start of recursive call 8: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-13 05:43:15,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 50 [2018-04-13 05:43:15,718 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-13 05:43:15,718 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,726 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,727 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-04-13 05:43:15,728 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-13 05:43:15,728 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,737 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2018-04-13 05:43:15,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-13 05:43:15,740 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,750 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:15,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 59 [2018-04-13 05:43:15,835 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 05:43:15,836 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 2 xjuncts. [2018-04-13 05:43:15,848 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:43:15,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 72 treesize of output 73 [2018-04-13 05:43:15,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 60 [2018-04-13 05:43:15,947 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:43:15,987 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 59 [2018-04-13 05:43:15,987 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:43:16,027 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2018-04-13 05:43:16,027 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:16,061 INFO L267 ElimStorePlain]: Start of recursive call 20: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-13 05:43:16,176 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 51 [2018-04-13 05:43:16,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:43:16,178 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:16,187 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:16,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-04-13 05:43:16,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:43:16,190 INFO L267 ElimStorePlain]: Start of recursive call 27: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:16,198 INFO L267 ElimStorePlain]: Start of recursive call 26: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:16,308 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 7 dim-2 vars, End of recursive call: 15 dim-0 vars, and 9 xjuncts. [2018-04-13 05:43:16,309 INFO L202 ElimStorePlain]: Needed 27 recursive calls to eliminate 23 variables, input treesize:310, output treesize:244 [2018-04-13 05:43:16,647 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 111 treesize of output 108 [2018-04-13 05:43:16,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 101 treesize of output 86 [2018-04-13 05:43:16,656 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:43:16,707 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 67 [2018-04-13 05:43:16,707 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:16,709 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 75 [2018-04-13 05:43:16,709 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:16,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 93 treesize of output 87 [2018-04-13 05:43:16,772 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:43:16,828 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-13 05:43:16,933 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 92 [2018-04-13 05:43:16,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 65 [2018-04-13 05:43:16,936 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:43:16,972 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 58 [2018-04-13 05:43:16,972 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 66 [2018-04-13 05:43:17,014 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:43:17,055 INFO L267 ElimStorePlain]: Start of recursive call 7: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-13 05:43:17,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 40 [2018-04-13 05:43:17,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:43:17,187 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,194 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 69 [2018-04-13 05:43:17,322 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-13 05:43:17,322 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:43:17,336 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,347 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 63 treesize of output 65 [2018-04-13 05:43:17,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 54 [2018-04-13 05:43:17,354 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 46 [2018-04-13 05:43:17,403 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,430 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 05:43:17,430 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 36 [2018-04-13 05:43:17,430 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,446 INFO L267 ElimStorePlain]: Start of recursive call 16: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 79 treesize of output 81 [2018-04-13 05:43:17,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 70 [2018-04-13 05:43:17,454 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,493 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 05:43:17,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 52 [2018-04-13 05:43:17,494 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,524 INFO L267 ElimStorePlain]: Start of recursive call 20: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-04-13 05:43:17,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-13 05:43:17,633 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,642 INFO L267 ElimStorePlain]: Start of recursive call 23: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 50 [2018-04-13 05:43:17,645 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-13 05:43:17,645 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,660 INFO L267 ElimStorePlain]: Start of recursive call 25: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2018-04-13 05:43:17,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-13 05:43:17,664 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,673 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 59 [2018-04-13 05:43:17,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 05:43:17,779 INFO L267 ElimStorePlain]: Start of recursive call 30: End of recursive call: and 2 xjuncts. [2018-04-13 05:43:17,792 INFO L267 ElimStorePlain]: Start of recursive call 29: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:43:17,903 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-04-13 05:43:17,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:43:17,905 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,913 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,915 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 51 [2018-04-13 05:43:17,917 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:43:17,917 INFO L267 ElimStorePlain]: Start of recursive call 34: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:17,926 INFO L267 ElimStorePlain]: Start of recursive call 33: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:18,035 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 7 dim-2 vars, End of recursive call: 15 dim-0 vars, and 9 xjuncts. [2018-04-13 05:43:18,035 INFO L202 ElimStorePlain]: Needed 34 recursive calls to eliminate 23 variables, input treesize:310, output treesize:244 [2018-04-13 05:43:18,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 59 [2018-04-13 05:43:18,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 05:43:18,199 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 05:43:18,220 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:43:18,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 40 [2018-04-13 05:43:18,328 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:43:18,328 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:18,337 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:18,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 111 treesize of output 107 [2018-04-13 05:43:18,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 95 [2018-04-13 05:43:18,597 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:18,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 82 [2018-04-13 05:43:18,644 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:18,689 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 05:43:18,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 72 [2018-04-13 05:43:18,690 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:18,715 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:18,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 77 [2018-04-13 05:43:18,808 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2018-04-13 05:43:18,809 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:18,822 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:18,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 63 treesize of output 66 [2018-04-13 05:43:18,903 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 52 [2018-04-13 05:43:18,904 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:18,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 51 treesize of output 48 [2018-04-13 05:43:18,938 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:43:18,978 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 40 [2018-04-13 05:43:18,979 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:43:19,017 INFO L267 ElimStorePlain]: Start of recursive call 12: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-13 05:43:19,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 46 [2018-04-13 05:43:19,127 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:43:19,127 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:19,137 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:19,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 51 [2018-04-13 05:43:19,140 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:43:19,141 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:19,152 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:19,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 72 treesize of output 73 [2018-04-13 05:43:19,271 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 59 [2018-04-13 05:43:19,272 INFO L267 ElimStorePlain]: Start of recursive call 21: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:43:19,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2018-04-13 05:43:19,313 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:19,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 40 [2018-04-13 05:43:19,315 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:19,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 60 [2018-04-13 05:43:19,362 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:43:19,400 INFO L267 ElimStorePlain]: Start of recursive call 20: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-13 05:43:19,511 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 7 dim-2 vars, End of recursive call: 15 dim-0 vars, and 9 xjuncts. [2018-04-13 05:43:19,511 INFO L202 ElimStorePlain]: Needed 24 recursive calls to eliminate 23 variables, input treesize:310, output treesize:244 [2018-04-13 05:43:19,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 58 [2018-04-13 05:43:19,647 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-13 05:43:19,647 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:19,656 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:19,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 125 treesize of output 101 [2018-04-13 05:43:19,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 7 [2018-04-13 05:43:19,722 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:19,734 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:19,800 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 143 treesize of output 130 [2018-04-13 05:43:19,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 115 treesize of output 101 [2018-04-13 05:43:19,812 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:43:19,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 123 treesize of output 104 [2018-04-13 05:43:19,876 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:43:19,941 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 89 [2018-04-13 05:43:19,941 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:19,998 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-13 05:43:20,103 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 79 [2018-04-13 05:43:20,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 05:43:20,108 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-04-13 05:43:20,121 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:43:20,259 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-04-13 05:43:20,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 22 treesize of output 16 [2018-04-13 05:43:20,264 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 2 xjuncts. [2018-04-13 05:43:20,278 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:43:20,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 67 [2018-04-13 05:43:20,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:43:20,282 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 12 [2018-04-13 05:43:20,282 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,291 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 81 [2018-04-13 05:43:20,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:43:20,415 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,434 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 7 [2018-04-13 05:43:20,435 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,450 INFO L267 ElimStorePlain]: Start of recursive call 16: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,455 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 77 treesize of output 77 [2018-04-13 05:43:20,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 58 [2018-04-13 05:43:20,457 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 51 [2018-04-13 05:43:20,497 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,529 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 05:43:20,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 50 [2018-04-13 05:43:20,530 INFO L267 ElimStorePlain]: Start of recursive call 22: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,547 INFO L267 ElimStorePlain]: Start of recursive call 19: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 93 treesize of output 93 [2018-04-13 05:43:20,554 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 74 [2018-04-13 05:43:20,554 INFO L267 ElimStorePlain]: Start of recursive call 24: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,593 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 67 [2018-04-13 05:43:20,594 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,633 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 05:43:20,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 66 [2018-04-13 05:43:20,633 INFO L267 ElimStorePlain]: Start of recursive call 26: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,658 INFO L267 ElimStorePlain]: Start of recursive call 23: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 45 [2018-04-13 05:43:20,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:43:20,754 INFO L267 ElimStorePlain]: Start of recursive call 28: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,761 INFO L267 ElimStorePlain]: Start of recursive call 27: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,859 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 1 case distinctions, treesize of input 86 treesize of output 81 [2018-04-13 05:43:20,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 62 [2018-04-13 05:43:20,861 INFO L267 ElimStorePlain]: Start of recursive call 30: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:43:20,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 66 treesize of output 59 [2018-04-13 05:43:20,898 INFO L267 ElimStorePlain]: Start of recursive call 31: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:43:20,949 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 51 [2018-04-13 05:43:20,949 INFO L267 ElimStorePlain]: Start of recursive call 32: End of recursive call: and 1 xjuncts. [2018-04-13 05:43:20,990 INFO L267 ElimStorePlain]: Start of recursive call 29: 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-13 05:43:21,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 14 dim-0 vars, 8 dim-2 vars, End of recursive call: 31 dim-0 vars, and 9 xjuncts. [2018-04-13 05:43:21,116 INFO L202 ElimStorePlain]: Needed 32 recursive calls to eliminate 22 variables, input treesize:414, output treesize:364 [2018-04-13 05:43:22,199 INFO L134 CoverageAnalysis]: Checked inductivity of 1196 backedges. 146 proven. 1009 refuted. 6 times theorem prover too weak. 35 trivial. 0 not checked. [2018-04-13 05:43:22,199 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:43:22,199 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47] total 47 [2018-04-13 05:43:22,200 INFO L442 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-04-13 05:43:22,200 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-04-13 05:43:22,200 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=148, Invalid=2087, Unknown=21, NotChecked=0, Total=2256 [2018-04-13 05:43:22,200 INFO L87 Difference]: Start difference. First operand 34080 states and 42389 transitions. Second operand 48 states. [2018-04-13 05:43:22,794 WARN L148 SmtUtils]: Spent 121ms on a formula simplification that was a NOOP. DAG size: 46 [2018-04-13 05:43:28,480 WARN L151 SmtUtils]: Spent 347ms on a formula simplification. DAG size of input: 114 DAG size of output 75 [2018-04-13 05:43:29,479 WARN L151 SmtUtils]: Spent 542ms on a formula simplification. DAG size of input: 132 DAG size of output 78 [2018-04-13 05:43:31,053 WARN L151 SmtUtils]: Spent 1297ms on a formula simplification. DAG size of input: 139 DAG size of output 85 [2018-04-13 05:43:31,894 WARN L151 SmtUtils]: Spent 780ms on a formula simplification. DAG size of input: 121 DAG size of output 82 [2018-04-13 05:43:32,144 WARN L151 SmtUtils]: Spent 182ms on a formula simplification. DAG size of input: 137 DAG size of output 81 [2018-04-13 05:43:32,829 WARN L151 SmtUtils]: Spent 523ms on a formula simplification. DAG size of input: 111 DAG size of output 73 [2018-04-13 05:43:33,442 WARN L151 SmtUtils]: Spent 111ms on a formula simplification. DAG size of input: 137 DAG size of output 82 [2018-04-13 05:43:34,237 WARN L151 SmtUtils]: Spent 423ms on a formula simplification. DAG size of input: 129 DAG size of output 76 [2018-04-13 05:43:34,980 WARN L151 SmtUtils]: Spent 556ms on a formula simplification. DAG size of input: 141 DAG size of output 87 [2018-04-13 05:43:35,213 WARN L151 SmtUtils]: Spent 188ms on a formula simplification. DAG size of input: 125 DAG size of output 86 [2018-04-13 05:43:36,287 WARN L151 SmtUtils]: Spent 851ms on a formula simplification. DAG size of input: 125 DAG size of output 81 [2018-04-13 05:43:36,897 WARN L151 SmtUtils]: Spent 570ms on a formula simplification. DAG size of input: 109 DAG size of output 80 [2018-04-13 05:43:37,307 WARN L151 SmtUtils]: Spent 178ms on a formula simplification. DAG size of input: 163 DAG size of output 141 [2018-04-13 05:43:38,148 WARN L151 SmtUtils]: Spent 280ms on a formula simplification. DAG size of input: 133 DAG size of output 79 [2018-04-13 05:43:38,735 WARN L151 SmtUtils]: Spent 318ms on a formula simplification. DAG size of input: 116 DAG size of output 77 [2018-04-13 05:43:39,001 WARN L151 SmtUtils]: Spent 128ms on a formula simplification. DAG size of input: 162 DAG size of output 126 [2018-04-13 05:43:39,613 WARN L151 SmtUtils]: Spent 491ms on a formula simplification. DAG size of input: 140 DAG size of output 86 [2018-04-13 05:43:40,302 WARN L151 SmtUtils]: Spent 360ms on a formula simplification. DAG size of input: 134 DAG size of output 80 [2018-04-13 05:43:40,790 WARN L151 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 199 DAG size of output 118 [2018-04-13 05:43:41,095 WARN L151 SmtUtils]: Spent 205ms on a formula simplification. DAG size of input: 180 DAG size of output 144 [2018-04-13 05:43:42,216 WARN L151 SmtUtils]: Spent 983ms on a formula simplification. DAG size of input: 123 DAG size of output 84 [2018-04-13 05:43:42,821 WARN L151 SmtUtils]: Spent 180ms on a formula simplification. DAG size of input: 167 DAG size of output 124 [2018-04-13 05:43:43,882 WARN L151 SmtUtils]: Spent 546ms on a formula simplification. DAG size of input: 117 DAG size of output 78 [2018-04-13 05:43:44,195 WARN L151 SmtUtils]: Spent 193ms on a formula simplification. DAG size of input: 171 DAG size of output 129 [2018-04-13 05:43:45,838 WARN L151 SmtUtils]: Spent 1151ms on a formula simplification. DAG size of input: 79 DAG size of output 67 [2018-04-13 05:43:46,543 WARN L151 SmtUtils]: Spent 348ms on a formula simplification. DAG size of input: 225 DAG size of output 156 [2018-04-13 05:43:46,862 WARN L151 SmtUtils]: Spent 241ms on a formula simplification. DAG size of input: 179 DAG size of output 129 [2018-04-13 05:43:47,245 WARN L151 SmtUtils]: Spent 286ms on a formula simplification. DAG size of input: 131 DAG size of output 78 [2018-04-13 05:43:47,806 WARN L151 SmtUtils]: Spent 446ms on a formula simplification. DAG size of input: 85 DAG size of output 53 [2018-04-13 05:43:48,278 WARN L151 SmtUtils]: Spent 293ms on a formula simplification. DAG size of input: 142 DAG size of output 88 [2018-04-13 05:43:49,144 WARN L151 SmtUtils]: Spent 546ms on a formula simplification. DAG size of input: 232 DAG size of output 161 [2018-04-13 05:43:49,438 WARN L151 SmtUtils]: Spent 207ms on a formula simplification. DAG size of input: 186 DAG size of output 134 [2018-04-13 05:43:49,806 WARN L151 SmtUtils]: Spent 311ms on a formula simplification. DAG size of input: 126 DAG size of output 82 [2018-04-13 05:43:50,016 WARN L151 SmtUtils]: Spent 142ms on a formula simplification. DAG size of input: 169 DAG size of output 131 [2018-04-13 05:43:50,701 WARN L151 SmtUtils]: Spent 531ms on a formula simplification. DAG size of input: 113 DAG size of output 75 [2018-04-13 05:43:50,971 WARN L151 SmtUtils]: Spent 170ms on a formula simplification. DAG size of input: 184 DAG size of output 132 [2018-04-13 05:43:51,278 WARN L151 SmtUtils]: Spent 221ms on a formula simplification. DAG size of input: 185 DAG size of output 148 [2018-04-13 05:43:51,996 WARN L151 SmtUtils]: Spent 533ms on a formula simplification. DAG size of input: 133 DAG size of output 79 [2018-04-13 05:43:52,207 WARN L151 SmtUtils]: Spent 123ms on a formula simplification. DAG size of input: 159 DAG size of output 124 [2018-04-13 05:43:52,678 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 126 DAG size of output 101 [2018-04-13 05:43:53,154 WARN L151 SmtUtils]: Spent 386ms on a formula simplification. DAG size of input: 141 DAG size of output 105 [2018-04-13 05:43:53,672 WARN L151 SmtUtils]: Spent 456ms on a formula simplification. DAG size of input: 71 DAG size of output 50 [2018-04-13 05:43:54,041 WARN L151 SmtUtils]: Spent 280ms on a formula simplification. DAG size of input: 80 DAG size of output 58 [2018-04-13 05:43:54,334 WARN L151 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 130 DAG size of output 106 [2018-04-13 05:43:54,788 WARN L151 SmtUtils]: Spent 239ms on a formula simplification. DAG size of input: 87 DAG size of output 55 [2018-04-13 05:43:55,202 WARN L151 SmtUtils]: Spent 257ms on a formula simplification. DAG size of input: 61 DAG size of output 49 [2018-04-13 05:43:55,578 WARN L151 SmtUtils]: Spent 165ms on a formula simplification. DAG size of input: 184 DAG size of output 133 [2018-04-13 05:43:56,544 WARN L151 SmtUtils]: Spent 692ms on a formula simplification. DAG size of input: 165 DAG size of output 108 [2018-04-13 05:43:56,957 WARN L151 SmtUtils]: Spent 313ms on a formula simplification. DAG size of input: 222 DAG size of output 154 [2018-04-13 05:43:57,254 WARN L151 SmtUtils]: Spent 216ms on a formula simplification. DAG size of input: 176 DAG size of output 127 [2018-04-13 05:43:57,813 WARN L151 SmtUtils]: Spent 479ms on a formula simplification. DAG size of input: 124 DAG size of output 85 [2018-04-13 05:43:58,375 WARN L151 SmtUtils]: Spent 344ms on a formula simplification. DAG size of input: 229 DAG size of output 160 [2018-04-13 05:43:58,613 WARN L151 SmtUtils]: Spent 168ms on a formula simplification. DAG size of input: 188 DAG size of output 138 [2018-04-13 05:43:58,876 WARN L151 SmtUtils]: Spent 181ms on a formula simplification. DAG size of input: 173 DAG size of output 137 [2018-04-13 05:43:59,352 WARN L151 SmtUtils]: Spent 316ms on a formula simplification. DAG size of input: 231 DAG size of output 154 [2018-04-13 05:43:59,628 WARN L151 SmtUtils]: Spent 191ms on a formula simplification. DAG size of input: 172 DAG size of output 132 [2018-04-13 05:44:00,131 WARN L151 SmtUtils]: Spent 442ms on a formula simplification. DAG size of input: 82 DAG size of output 51 [2018-04-13 05:44:00,360 WARN L151 SmtUtils]: Spent 167ms on a formula simplification. DAG size of input: 157 DAG size of output 131 [2018-04-13 05:44:00,624 WARN L151 SmtUtils]: Spent 187ms on a formula simplification. DAG size of input: 165 DAG size of output 143 [2018-04-13 05:44:01,280 WARN L151 SmtUtils]: Spent 435ms on a formula simplification. DAG size of input: 172 DAG size of output 113 [2018-04-13 05:44:01,866 WARN L151 SmtUtils]: Spent 530ms on a formula simplification. DAG size of input: 93 DAG size of output 59 [2018-04-13 05:44:02,587 WARN L151 SmtUtils]: Spent 487ms on a formula simplification. DAG size of input: 88 DAG size of output 56 [2018-04-13 05:44:02,892 WARN L151 SmtUtils]: Spent 198ms on a formula simplification. DAG size of input: 187 DAG size of output 126 [2018-04-13 05:44:03,583 WARN L151 SmtUtils]: Spent 219ms on a formula simplification. DAG size of input: 191 DAG size of output 131 [2018-04-13 05:44:04,329 WARN L151 SmtUtils]: Spent 299ms on a formula simplification. DAG size of input: 233 DAG size of output 164 [2018-04-13 05:44:04,553 WARN L151 SmtUtils]: Spent 147ms on a formula simplification. DAG size of input: 164 DAG size of output 128 [2018-04-13 05:44:04,976 WARN L151 SmtUtils]: Spent 159ms on a formula simplification. DAG size of input: 219 DAG size of output 127 [2018-04-13 05:44:05,365 WARN L151 SmtUtils]: Spent 177ms on a formula simplification. DAG size of input: 181 DAG size of output 131 [2018-04-13 05:44:06,053 WARN L151 SmtUtils]: Spent 535ms on a formula simplification. DAG size of input: 134 DAG size of output 80 [2018-04-13 05:44:06,708 WARN L151 SmtUtils]: Spent 443ms on a formula simplification. DAG size of input: 240 DAG size of output 169 [2018-04-13 05:44:07,031 WARN L151 SmtUtils]: Spent 189ms on a formula simplification. DAG size of input: 171 DAG size of output 133 [2018-04-13 05:44:07,427 WARN L151 SmtUtils]: Spent 142ms on a formula simplification. DAG size of input: 169 DAG size of output 112 [2018-04-13 05:44:07,682 WARN L151 SmtUtils]: Spent 121ms on a formula simplification. DAG size of input: 164 DAG size of output 100 [2018-04-13 05:44:08,238 WARN L151 SmtUtils]: Spent 496ms on a formula simplification. DAG size of input: 95 DAG size of output 63 [2018-04-13 05:44:08,804 WARN L151 SmtUtils]: Spent 139ms on a formula simplification. DAG size of input: 162 DAG size of output 106 [2018-04-13 05:44:09,551 WARN L151 SmtUtils]: Spent 685ms on a formula simplification. DAG size of input: 181 DAG size of output 106 [2018-04-13 05:44:10,038 WARN L151 SmtUtils]: Spent 439ms on a formula simplification. DAG size of input: 159 DAG size of output 113 [2018-04-13 05:44:10,660 WARN L151 SmtUtils]: Spent 473ms on a formula simplification. DAG size of input: 79 DAG size of output 57 [2018-04-13 05:44:10,920 WARN L151 SmtUtils]: Spent 173ms on a formula simplification. DAG size of input: 165 DAG size of output 129 [2018-04-13 05:44:11,141 WARN L151 SmtUtils]: Spent 143ms on a formula simplification. DAG size of input: 167 DAG size of output 111 [2018-04-13 05:44:11,328 WARN L151 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 142 DAG size of output 103 [2018-04-13 05:44:11,764 WARN L151 SmtUtils]: Spent 155ms on a formula simplification. DAG size of input: 168 DAG size of output 112 [2018-04-13 05:44:12,338 WARN L151 SmtUtils]: Spent 119ms on a formula simplification. DAG size of input: 146 DAG size of output 107 [2018-04-13 05:44:12,523 WARN L151 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 129 DAG size of output 101 [2018-04-13 05:44:12,863 WARN L151 SmtUtils]: Spent 170ms on a formula simplification. DAG size of input: 191 DAG size of output 123 [2018-04-13 05:44:13,372 WARN L151 SmtUtils]: Spent 435ms on a formula simplification. DAG size of input: 183 DAG size of output 116 [2018-04-13 05:44:13,788 WARN L151 SmtUtils]: Spent 310ms on a formula simplification. DAG size of input: 230 DAG size of output 162 [2018-04-13 05:44:14,024 WARN L151 SmtUtils]: Spent 145ms on a formula simplification. DAG size of input: 161 DAG size of output 126 [2018-04-13 05:44:14,489 WARN L151 SmtUtils]: Spent 313ms on a formula simplification. DAG size of input: 237 DAG size of output 167 [2018-04-13 05:44:14,941 WARN L151 SmtUtils]: Spent 310ms on a formula simplification. DAG size of input: 233 DAG size of output 157 [2018-04-13 05:44:15,181 WARN L151 SmtUtils]: Spent 165ms on a formula simplification. DAG size of input: 180 DAG size of output 130 [2018-04-13 05:44:15,919 WARN L151 SmtUtils]: Spent 530ms on a formula simplification. DAG size of input: 190 DAG size of output 121 [2018-04-13 05:44:16,785 WARN L151 SmtUtils]: Spent 785ms on a formula simplification. DAG size of input: 88 DAG size of output 75 [2018-04-13 05:44:17,631 WARN L151 SmtUtils]: Spent 440ms on a formula simplification. DAG size of input: 191 DAG size of output 112 [2018-04-13 05:44:18,076 WARN L151 SmtUtils]: Spent 378ms on a formula simplification. DAG size of input: 165 DAG size of output 97 [2018-04-13 05:44:18,408 WARN L151 SmtUtils]: Spent 137ms on a formula simplification. DAG size of input: 183 DAG size of output 105 [2018-04-13 05:44:19,904 WARN L151 SmtUtils]: Spent 1172ms on a formula simplification. DAG size of input: 80 DAG size of output 68 [2018-04-13 05:44:20,628 WARN L151 SmtUtils]: Spent 163ms on a formula simplification. DAG size of input: 188 DAG size of output 121 [2018-04-13 05:44:20,824 WARN L151 SmtUtils]: Spent 133ms on a formula simplification. DAG size of input: 162 DAG size of output 106 [2018-04-13 05:44:21,137 WARN L151 SmtUtils]: Spent 157ms on a formula simplification. DAG size of input: 187 DAG size of output 120 [2018-04-13 05:44:21,683 WARN L151 SmtUtils]: Spent 163ms on a formula simplification. DAG size of input: 180 DAG size of output 114 [2018-04-13 05:44:21,946 WARN L151 SmtUtils]: Spent 165ms on a formula simplification. DAG size of input: 185 DAG size of output 119 [2018-04-13 05:44:22,379 WARN L151 SmtUtils]: Spent 166ms on a formula simplification. DAG size of input: 186 DAG size of output 120 [2018-04-13 05:44:24,786 WARN L151 SmtUtils]: Spent 439ms on a formula simplification. DAG size of input: 112 DAG size of output 68 [2018-04-13 05:44:25,618 WARN L151 SmtUtils]: Spent 298ms on a formula simplification. DAG size of input: 105 DAG size of output 62 [2018-04-13 05:44:26,169 WARN L151 SmtUtils]: Spent 325ms on a formula simplification. DAG size of input: 110 DAG size of output 66 [2018-04-13 05:44:26,597 WARN L151 SmtUtils]: Spent 185ms on a formula simplification. DAG size of input: 188 DAG size of output 121 [2018-04-13 05:44:27,145 WARN L151 SmtUtils]: Spent 199ms on a formula simplification. DAG size of input: 193 DAG size of output 126 [2018-04-13 05:44:27,608 WARN L151 SmtUtils]: Spent 205ms on a formula simplification. DAG size of input: 194 DAG size of output 127 [2018-04-13 05:44:27,867 WARN L151 SmtUtils]: Spent 124ms on a formula simplification. DAG size of input: 106 DAG size of output 94 [2018-04-13 05:44:28,831 WARN L151 SmtUtils]: Spent 348ms on a formula simplification. DAG size of input: 110 DAG size of output 67 [2018-04-13 05:44:29,264 WARN L151 SmtUtils]: Spent 268ms on a formula simplification. DAG size of input: 101 DAG size of output 59 [2018-04-13 05:44:30,394 WARN L151 SmtUtils]: Spent 326ms on a formula simplification. DAG size of input: 98 DAG size of output 65 [2018-04-13 05:44:31,705 WARN L151 SmtUtils]: Spent 252ms on a formula simplification. DAG size of input: 105 DAG size of output 56 [2018-04-13 05:44:36,442 WARN L151 SmtUtils]: Spent 767ms on a formula simplification. DAG size of input: 117 DAG size of output 67 [2018-04-13 05:44:37,161 WARN L151 SmtUtils]: Spent 477ms on a formula simplification. DAG size of input: 121 DAG size of output 63 [2018-04-13 05:44:37,862 WARN L151 SmtUtils]: Spent 639ms on a formula simplification. DAG size of input: 108 DAG size of output 59 [2018-04-13 05:44:39,363 WARN L151 SmtUtils]: Spent 536ms on a formula simplification. DAG size of input: 105 DAG size of output 58 [2018-04-13 05:44:40,029 WARN L151 SmtUtils]: Spent 431ms on a formula simplification. DAG size of input: 85 DAG size of output 49 [2018-04-13 05:44:41,464 WARN L151 SmtUtils]: Spent 758ms on a formula simplification. DAG size of input: 122 DAG size of output 71 [2018-04-13 05:44:42,266 WARN L151 SmtUtils]: Spent 741ms on a formula simplification. DAG size of input: 114 DAG size of output 64 [2018-04-13 05:44:43,618 WARN L151 SmtUtils]: Spent 732ms on a formula simplification. DAG size of input: 124 DAG size of output 66 [2018-04-13 05:44:44,361 WARN L151 SmtUtils]: Spent 658ms on a formula simplification. DAG size of input: 116 DAG size of output 59 [2018-04-13 05:44:45,234 WARN L151 SmtUtils]: Spent 708ms on a formula simplification. DAG size of input: 115 DAG size of output 65 [2018-04-13 05:44:45,977 WARN L151 SmtUtils]: Spent 633ms on a formula simplification. DAG size of input: 106 DAG size of output 57 [2018-04-13 05:44:46,386 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 47 DAG size of output 30 [2018-04-13 05:44:47,268 WARN L151 SmtUtils]: Spent 760ms on a formula simplification. DAG size of input: 120 DAG size of output 69 [2018-04-13 05:44:48,018 WARN L151 SmtUtils]: Spent 668ms on a formula simplification. DAG size of input: 111 DAG size of output 61 [2018-04-13 05:44:48,672 WARN L151 SmtUtils]: Spent 539ms on a formula simplification. DAG size of input: 108 DAG size of output 60 [2018-04-13 05:44:49,503 WARN L151 SmtUtils]: Spent 772ms on a formula simplification. DAG size of input: 120 DAG size of output 69 [2018-04-13 05:44:49,986 WARN L151 SmtUtils]: Spent 438ms on a formula simplification. DAG size of input: 88 DAG size of output 51 [2018-04-13 05:44:50,747 WARN L151 SmtUtils]: Spent 706ms on a formula simplification. DAG size of input: 112 DAG size of output 62 [2018-04-13 05:44:51,824 WARN L151 SmtUtils]: Spent 203ms on a formula simplification. DAG size of input: 58 DAG size of output 40 [2018-04-13 05:44:52,660 WARN L151 SmtUtils]: Spent 750ms on a formula simplification. DAG size of input: 125 DAG size of output 73 [2018-04-13 05:44:53,465 WARN L151 SmtUtils]: Spent 734ms on a formula simplification. DAG size of input: 117 DAG size of output 66 [2018-04-13 05:44:54,596 WARN L151 SmtUtils]: Spent 837ms on a formula simplification. DAG size of input: 135 DAG size of output 77 [2018-04-13 05:44:55,454 WARN L151 SmtUtils]: Spent 745ms on a formula simplification. DAG size of input: 127 DAG size of output 68 [2018-04-13 05:44:56,295 WARN L151 SmtUtils]: Spent 736ms on a formula simplification. DAG size of input: 126 DAG size of output 69 [2018-04-13 05:44:57,079 WARN L151 SmtUtils]: Spent 696ms on a formula simplification. DAG size of input: 119 DAG size of output 61 [2018-04-13 05:44:57,961 WARN L151 SmtUtils]: Spent 760ms on a formula simplification. DAG size of input: 117 DAG size of output 67 [2018-04-13 05:44:59,716 WARN L151 SmtUtils]: Spent 1677ms on a formula simplification. DAG size of input: 123 DAG size of output 68 [2018-04-13 05:44:59,910 WARN L151 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 128 DAG size of output 89 [2018-04-13 05:45:00,616 WARN L151 SmtUtils]: Spent 628ms on a formula simplification. DAG size of input: 108 DAG size of output 59 [2018-04-13 05:45:02,315 WARN L151 SmtUtils]: Spent 1641ms on a formula simplification. DAG size of input: 103 DAG size of output 59 [2018-04-13 05:45:03,054 WARN L151 SmtUtils]: Spent 206ms on a formula simplification. DAG size of input: 65 DAG size of output 47 [2018-04-13 05:45:04,210 WARN L151 SmtUtils]: Spent 839ms on a formula simplification. DAG size of input: 129 DAG size of output 81 [2018-04-13 05:45:05,072 WARN L151 SmtUtils]: Spent 806ms on a formula simplification. DAG size of input: 120 DAG size of output 73 [2018-04-13 05:45:05,692 WARN L151 SmtUtils]: Spent 364ms on a formula simplification. DAG size of input: 94 DAG size of output 62 [2018-04-13 05:45:06,684 WARN L151 SmtUtils]: Spent 891ms on a formula simplification. DAG size of input: 140 DAG size of output 81 [2018-04-13 05:45:07,616 WARN L151 SmtUtils]: Spent 817ms on a formula simplification. DAG size of input: 132 DAG size of output 74 [2018-04-13 05:45:08,933 WARN L151 SmtUtils]: Spent 1057ms on a formula simplification. DAG size of input: 122 DAG size of output 71 [2018-04-13 05:45:09,731 WARN L151 SmtUtils]: Spent 709ms on a formula simplification. DAG size of input: 114 DAG size of output 64 [2018-04-13 05:45:10,767 WARN L151 SmtUtils]: Spent 815ms on a formula simplification. DAG size of input: 142 DAG size of output 76 [2018-04-13 05:45:11,662 WARN L151 SmtUtils]: Spent 766ms on a formula simplification. DAG size of input: 134 DAG size of output 69 [2018-04-13 05:45:12,607 WARN L151 SmtUtils]: Spent 880ms on a formula simplification. DAG size of input: 133 DAG size of output 85 [2018-04-13 05:45:13,499 WARN L151 SmtUtils]: Spent 805ms on a formula simplification. DAG size of input: 124 DAG size of output 77 [2018-04-13 05:45:14,548 WARN L151 SmtUtils]: Spent 814ms on a formula simplification. DAG size of input: 116 DAG size of output 76 [2018-04-13 05:45:15,501 WARN L151 SmtUtils]: Spent 919ms on a formula simplification. DAG size of input: 134 DAG size of output 85 [2018-04-13 05:45:16,356 WARN L151 SmtUtils]: Spent 785ms on a formula simplification. DAG size of input: 96 DAG size of output 67 [2018-04-13 05:45:17,026 WARN L151 SmtUtils]: Spent 635ms on a formula simplification. DAG size of input: 126 DAG size of output 78 [2018-04-13 05:45:18,035 WARN L151 SmtUtils]: Spent 609ms on a formula simplification. DAG size of input: 100 DAG size of output 68 [2018-04-13 05:45:19,357 WARN L151 SmtUtils]: Spent 924ms on a formula simplification. DAG size of input: 138 DAG size of output 89 [2018-04-13 05:45:20,271 WARN L151 SmtUtils]: Spent 855ms on a formula simplification. DAG size of input: 130 DAG size of output 82 [2018-04-13 05:45:22,136 WARN L151 SmtUtils]: Spent 1668ms on a formula simplification. DAG size of input: 140 DAG size of output 92 [2018-04-13 05:45:23,108 WARN L151 SmtUtils]: Spent 851ms on a formula simplification. DAG size of input: 138 DAG size of output 88 [2018-04-13 05:45:24,746 WARN L151 SmtUtils]: Spent 1558ms on a formula simplification. DAG size of input: 132 DAG size of output 85 [2018-04-13 05:45:25,648 WARN L151 SmtUtils]: Spent 840ms on a formula simplification. DAG size of input: 130 DAG size of output 81 [2018-04-13 05:45:26,120 WARN L151 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 133 DAG size of output 86 [2018-04-13 05:45:27,176 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 126 DAG size of output 87 [2018-04-13 05:45:28,263 WARN L151 SmtUtils]: Spent 835ms on a formula simplification. DAG size of input: 125 DAG size of output 78 [2018-04-13 05:45:28,436 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 90 DAG size of output 55 [2018-04-13 05:45:29,751 WARN L151 SmtUtils]: Spent 966ms on a formula simplification. DAG size of input: 142 DAG size of output 94 [2018-04-13 05:45:30,669 WARN L151 SmtUtils]: Spent 842ms on a formula simplification. DAG size of input: 134 DAG size of output 87 [2018-04-13 05:45:30,856 WARN L151 SmtUtils]: Spent 117ms on a formula simplification. DAG size of input: 138 DAG size of output 90 [2018-04-13 05:45:31,780 WARN L151 SmtUtils]: Spent 839ms on a formula simplification. DAG size of input: 118 DAG size of output 81 [2018-04-13 05:45:32,372 WARN L151 SmtUtils]: Spent 313ms on a formula simplification. DAG size of input: 140 DAG size of output 85 [2018-04-13 05:45:32,554 WARN L151 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 129 DAG size of output 81 [2018-04-13 05:45:32,940 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 130 DAG size of output 82 [2018-04-13 05:45:33,467 WARN L151 SmtUtils]: Spent 130ms on a formula simplification. DAG size of input: 131 DAG size of output 91 [2018-04-13 05:45:33,634 WARN L151 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 123 DAG size of output 78 [2018-04-13 05:45:34,248 WARN L151 SmtUtils]: Spent 174ms on a formula simplification. DAG size of input: 145 DAG size of output 89 [2018-04-13 05:45:35,708 WARN L151 SmtUtils]: Spent 840ms on a formula simplification. DAG size of input: 147 DAG size of output 92 [2018-04-13 05:45:36,599 WARN L151 SmtUtils]: Spent 797ms on a formula simplification. DAG size of input: 126 DAG size of output 79 [2018-04-13 05:45:36,770 WARN L151 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 145 DAG size of output 88 [2018-04-13 05:45:37,429 WARN L151 SmtUtils]: Spent 314ms on a formula simplification. DAG size of input: 137 DAG size of output 83 [2018-04-13 05:45:38,385 WARN L151 SmtUtils]: Spent 815ms on a formula simplification. DAG size of input: 83 DAG size of output 61 [2018-04-13 05:45:39,243 WARN L151 SmtUtils]: Spent 359ms on a formula simplification. DAG size of input: 141 DAG size of output 86 [2018-04-13 05:45:39,652 WARN L151 SmtUtils]: Spent 297ms on a formula simplification. DAG size of input: 124 DAG size of output 77 [2018-04-13 05:45:40,287 WARN L151 SmtUtils]: Spent 570ms on a formula simplification. DAG size of input: 142 DAG size of output 87 [2018-04-13 05:45:41,278 WARN L151 SmtUtils]: Spent 877ms on a formula simplification. DAG size of input: 149 DAG size of output 94 [2018-04-13 05:45:41,981 WARN L151 SmtUtils]: Spent 324ms on a formula simplification. DAG size of input: 188 DAG size of output 152 [2018-04-13 05:45:42,315 WARN L151 SmtUtils]: Spent 112ms on a formula simplification. DAG size of input: 141 DAG size of output 99 [2018-04-13 05:45:42,498 WARN L151 SmtUtils]: Spent 124ms on a formula simplification. DAG size of input: 145 DAG size of output 104 [2018-04-13 05:45:42,671 WARN L151 SmtUtils]: Spent 103ms on a formula simplification. DAG size of input: 146 DAG size of output 90 [2018-04-13 05:45:42,987 WARN L151 SmtUtils]: Spent 179ms on a formula simplification. DAG size of input: 187 DAG size of output 137 [2018-04-13 05:45:43,616 WARN L151 SmtUtils]: Spent 528ms on a formula simplification. DAG size of input: 148 DAG size of output 93 [2018-04-13 05:45:43,820 WARN L151 SmtUtils]: Spent 111ms on a formula simplification. DAG size of input: 146 DAG size of output 89 [2018-04-13 05:45:44,297 WARN L151 SmtUtils]: Spent 317ms on a formula simplification. DAG size of input: 139 DAG size of output 85 [2018-04-13 05:45:44,695 WARN L151 SmtUtils]: Spent 253ms on a formula simplification. DAG size of input: 193 DAG size of output 156 [2018-04-13 05:45:45,004 WARN L151 SmtUtils]: Spent 122ms on a formula simplification. DAG size of input: 146 DAG size of output 103 [2018-04-13 05:45:45,236 WARN L151 SmtUtils]: Spent 134ms on a formula simplification. DAG size of input: 150 DAG size of output 108 [2018-04-13 05:45:45,395 WARN L151 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 114 DAG size of output 100 [2018-04-13 05:45:45,678 WARN L151 SmtUtils]: Spent 185ms on a formula simplification. DAG size of input: 192 DAG size of output 141 [2018-04-13 05:45:45,863 WARN L151 SmtUtils]: Spent 105ms on a formula simplification. DAG size of input: 144 DAG size of output 89 [2018-04-13 05:45:46,281 WARN L151 SmtUtils]: Spent 323ms on a formula simplification. DAG size of input: 150 DAG size of output 95 [2018-04-13 05:45:46,609 WARN L151 SmtUtils]: Spent 217ms on a formula simplification. DAG size of input: 194 DAG size of output 142 [2018-04-13 05:45:46,938 WARN L151 SmtUtils]: Spent 183ms on a formula simplification. DAG size of input: 192 DAG size of output 140 [2018-04-13 05:45:47,285 WARN L151 SmtUtils]: Spent 202ms on a formula simplification. DAG size of input: 184 DAG size of output 135 [2018-04-13 05:45:48,103 WARN L151 SmtUtils]: Spent 175ms on a formula simplification. DAG size of input: 189 DAG size of output 139 [2018-04-13 05:45:48,412 WARN L151 SmtUtils]: Spent 225ms on a formula simplification. DAG size of input: 196 DAG size of output 145 [2018-04-13 05:45:49,243 WARN L151 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 103 DAG size of output 91 [2018-04-13 05:45:49,501 WARN L151 SmtUtils]: Spent 167ms on a formula simplification. DAG size of input: 107 DAG size of output 65 [2018-04-13 05:45:54,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:45:54,108 INFO L93 Difference]: Finished difference Result 131332 states and 166158 transitions. [2018-04-13 05:45:54,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 466 states. [2018-04-13 05:45:54,108 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 240 [2018-04-13 05:45:54,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:45:54,312 INFO L225 Difference]: With dead ends: 131332 [2018-04-13 05:45:54,312 INFO L226 Difference]: Without dead ends: 130139 [2018-04-13 05:45:54,317 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 747 GetRequests, 245 SyntacticMatches, 3 SemanticMatches, 499 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107153 ImplicationChecksByTransitivity, 128.6s TimeCoverageRelationStatistics Valid=14560, Invalid=234964, Unknown=976, NotChecked=0, Total=250500 [2018-04-13 05:45:54,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130139 states. [2018-04-13 05:45:55,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130139 to 119646. [2018-04-13 05:45:55,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119646 states. [2018-04-13 05:45:55,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119646 states to 119646 states and 151749 transitions. [2018-04-13 05:45:55,885 INFO L78 Accepts]: Start accepts. Automaton has 119646 states and 151749 transitions. Word has length 240 [2018-04-13 05:45:55,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:45:55,885 INFO L459 AbstractCegarLoop]: Abstraction has 119646 states and 151749 transitions. [2018-04-13 05:45:55,885 INFO L460 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-04-13 05:45:55,885 INFO L276 IsEmpty]: Start isEmpty. Operand 119646 states and 151749 transitions. [2018-04-13 05:45:55,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2018-04-13 05:45:55,912 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:45:55,912 INFO L355 BasicCegarLoop]: trace histogram [18, 18, 18, 17, 10, 10, 10, 10, 10, 8, 8, 8, 8, 7, 7, 6, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:45:55,912 INFO L408 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:45:55,913 INFO L82 PathProgramCache]: Analyzing trace with hash 1439437336, now seen corresponding path program 1 times [2018-04-13 05:45:55,913 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:45:55,913 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:45:55,913 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:45:55,913 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:45:55,913 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:45:55,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:45:55,933 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:45:55,947 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:45:55,948 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:45:55,948 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:45:55,948 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:45:56,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:45:56,023 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:45:56,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 05:45:56,047 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,051 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,051 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:15 [2018-04-13 05:45:56,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:45:56,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:45:56,158 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,159 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:45:56,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:45:56,171 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,172 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,180 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,180 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:45, output treesize:37 [2018-04-13 05:45:56,379 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:45:56,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-13 05:45:56,380 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,397 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:45:56,398 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:45:56,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 15 [2018-04-13 05:45:56,398 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 24 [2018-04-13 05:45:56,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:45:56,416 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,419 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 24 [2018-04-13 05:45:56,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:45:56,435 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,438 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,448 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,448 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:72, output treesize:57 [2018-04-13 05:45:56,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 27 [2018-04-13 05:45:56,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 7 [2018-04-13 05:45:56,644 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,648 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 31 [2018-04-13 05:45:56,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 7 [2018-04-13 05:45:56,665 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,668 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,677 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,677 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:72, output treesize:54 [2018-04-13 05:45:56,713 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 45 [2018-04-13 05:45:56,715 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-04-13 05:45:56,715 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2018-04-13 05:45:56,720 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,724 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-04-13 05:45:56,736 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,743 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,743 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:76, output treesize:27 [2018-04-13 05:45:56,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 38 [2018-04-13 05:45:56,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-04-13 05:45:56,850 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:45:56,855 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,858 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-04-13 05:45:56,869 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2018-04-13 05:45:56,869 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:45:56,873 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,876 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,883 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,883 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:76, output treesize:27 [2018-04-13 05:45:56,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 38 [2018-04-13 05:45:56,952 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-04-13 05:45:56,952 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-13 05:45:56,957 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,960 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,971 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 26 [2018-04-13 05:45:56,972 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 10 [2018-04-13 05:45:56,972 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:45:56,977 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:56,979 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,986 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:56,986 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:76, output treesize:27 [2018-04-13 05:45:57,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 55 [2018-04-13 05:45:57,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-13 05:45:57,094 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:57,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2018-04-13 05:45:57,100 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:57,104 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:57,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 24 [2018-04-13 05:45:57,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-13 05:45:57,116 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:57,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 05:45:57,120 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 05:45:57,121 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:45:57,127 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-04-13 05:45:57,127 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:99, output treesize:38 [2018-04-13 05:45:57,775 INFO L134 CoverageAnalysis]: Checked inductivity of 1196 backedges. 223 proven. 947 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2018-04-13 05:45:57,775 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:45:57,775 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49] total 49 [2018-04-13 05:45:57,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-04-13 05:45:57,775 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-04-13 05:45:57,775 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=156, Invalid=2193, Unknown=3, NotChecked=0, Total=2352 [2018-04-13 05:45:57,776 INFO L87 Difference]: Start difference. First operand 119646 states and 151749 transitions. Second operand 49 states. [2018-04-13 05:46:42,924 WARN L151 SmtUtils]: Spent 173ms on a formula simplification. DAG size of input: 88 DAG size of output 64 [2018-04-13 05:46:48,277 WARN L151 SmtUtils]: Spent 165ms on a formula simplification. DAG size of input: 75 DAG size of output 62 [2018-04-13 05:46:49,807 WARN L151 SmtUtils]: Spent 112ms on a formula simplification. DAG size of input: 124 DAG size of output 97 [2018-04-13 05:47:25,853 WARN L151 SmtUtils]: Spent 214ms on a formula simplification. DAG size of input: 105 DAG size of output 74 [2018-04-13 05:47:30,340 WARN L151 SmtUtils]: Spent 211ms on a formula simplification. DAG size of input: 94 DAG size of output 71 [2018-04-13 05:47:45,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:47:45,882 INFO L93 Difference]: Finished difference Result 152736 states and 191143 transitions. [2018-04-13 05:47:45,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 299 states. [2018-04-13 05:47:45,883 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 240 [2018-04-13 05:47:45,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:47:46,152 INFO L225 Difference]: With dead ends: 152736 [2018-04-13 05:47:46,152 INFO L226 Difference]: Without dead ends: 151627 [2018-04-13 05:47:46,154 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 562 GetRequests, 223 SyntacticMatches, 4 SemanticMatches, 335 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44730 ImplicationChecksByTransitivity, 26.4s TimeCoverageRelationStatistics Valid=7562, Invalid=105640, Unknown=30, NotChecked=0, Total=113232 [2018-04-13 05:47:46,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151627 states. [2018-04-13 05:47:47,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151627 to 147165. [2018-04-13 05:47:47,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147165 states. [2018-04-13 05:47:47,920 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147165 states to 147165 states and 185079 transitions. [2018-04-13 05:47:47,921 INFO L78 Accepts]: Start accepts. Automaton has 147165 states and 185079 transitions. Word has length 240 [2018-04-13 05:47:47,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:47:47,921 INFO L459 AbstractCegarLoop]: Abstraction has 147165 states and 185079 transitions. [2018-04-13 05:47:47,921 INFO L460 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-04-13 05:47:47,921 INFO L276 IsEmpty]: Start isEmpty. Operand 147165 states and 185079 transitions. [2018-04-13 05:47:47,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2018-04-13 05:47:47,951 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:47:47,951 INFO L355 BasicCegarLoop]: trace histogram [18, 18, 18, 17, 10, 10, 10, 10, 10, 8, 8, 8, 8, 7, 7, 6, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:47:47,951 INFO L408 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:47:47,952 INFO L82 PathProgramCache]: Analyzing trace with hash 482954327, now seen corresponding path program 2 times [2018-04-13 05:47:47,952 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:47:47,952 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:47:47,952 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:47:47,952 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 05:47:47,952 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:47:47,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:47:47,968 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:47:47,981 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:47:47,981 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:47:47,981 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:47:47,981 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 05:47:48,054 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 05:47:48,055 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:47:48,065 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:47:48,078 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 05:47:48,078 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 05:47:48,083 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,087 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,087 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:20 [2018-04-13 05:47:48,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-13 05:47:48,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:47:48,102 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,103 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-04-13 05:47:48,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-04-13 05:47:48,111 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,112 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,117 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:39, output treesize:31 [2018-04-13 05:47:48,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-04-13 05:47:48,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 17 [2018-04-13 05:47:48,211 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,214 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-04-13 05:47:48,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 17 [2018-04-13 05:47:48,223 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,225 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,230 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:47:48,230 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:51, output treesize:43 [2018-04-13 05:47:48,354 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:47:48,355 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:47:48,355 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 12 [2018-04-13 05:47:48,355 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,364 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-04-13 05:47:48,365 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-04-13 05:47:48,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:47:48,377 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,380 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 22 [2018-04-13 05:47:48,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:47:48,392 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,395 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,401 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:47:48,401 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:62, output treesize:47 [2018-04-13 05:47:48,452 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2018-04-13 05:47:48,453 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:47:48,453 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,454 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2018-04-13 05:47:48,465 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:47:48,465 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,465 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,470 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:47:48,470 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:56, output treesize:24 [2018-04-13 05:47:48,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-13 05:47:48,567 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2018-04-13 05:47:48,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:47:48,578 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,579 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 17 [2018-04-13 05:47:48,587 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:47:48,587 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,588 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,591 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,591 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 5 variables, input treesize:59, output treesize:13 [2018-04-13 05:47:48,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2018-04-13 05:47:48,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 27 [2018-04-13 05:47:48,651 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 05:47:48,661 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:47:48,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2018-04-13 05:47:48,689 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 27 [2018-04-13 05:47:48,689 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-13 05:47:48,697 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:47:48,719 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 2 dim-2 vars, End of recursive call: 7 dim-0 vars, and 4 xjuncts. [2018-04-13 05:47:48,720 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 7 variables, input treesize:73, output treesize:153 [2018-04-13 05:47:48,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-04-13 05:47:48,769 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-04-13 05:47:48,776 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,781 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 05:47:48,781 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:24 [2018-04-13 05:47:48,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-04-13 05:47:48,835 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-04-13 05:47:48,842 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,847 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 05:47:48,847 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:24 [2018-04-13 05:47:48,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 2 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 12 [2018-04-13 05:47:48,937 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:47:48,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-04-13 05:47:48,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:47:48,951 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 05:47:48,953 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:47:48,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-04-13 05:47:48,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:47:48,964 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 05:47:48,966 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:47:48,971 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:47:48,971 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 7 variables, input treesize:68, output treesize:21 [2018-04-13 05:47:49,361 INFO L134 CoverageAnalysis]: Checked inductivity of 1196 backedges. 164 proven. 983 refuted. 0 times theorem prover too weak. 49 trivial. 0 not checked. [2018-04-13 05:47:49,361 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:47:49,361 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43] total 43 [2018-04-13 05:47:49,361 INFO L442 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-04-13 05:47:49,362 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-04-13 05:47:49,362 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=1677, Unknown=9, NotChecked=0, Total=1806 [2018-04-13 05:47:49,362 INFO L87 Difference]: Start difference. First operand 147165 states and 185079 transitions. Second operand 43 states. [2018-04-13 05:47:49,636 WARN L151 SmtUtils]: Spent 195ms on a formula simplification. DAG size of input: 25 DAG size of output 15 [2018-04-13 05:48:15,947 WARN L151 SmtUtils]: Spent 203ms on a formula simplification. DAG size of input: 104 DAG size of output 81 [2018-04-13 05:48:22,723 WARN L151 SmtUtils]: Spent 151ms on a formula simplification. DAG size of input: 39 DAG size of output 31 [2018-04-13 05:48:54,958 WARN L151 SmtUtils]: Spent 172ms on a formula simplification. DAG size of input: 54 DAG size of output 47 [2018-04-13 05:49:25,271 WARN L151 SmtUtils]: Spent 183ms on a formula simplification. DAG size of input: 81 DAG size of output 69 [2018-04-13 05:49:28,393 WARN L151 SmtUtils]: Spent 351ms on a formula simplification. DAG size of input: 86 DAG size of output 74 [2018-04-13 05:49:32,752 WARN L151 SmtUtils]: Spent 270ms on a formula simplification. DAG size of input: 98 DAG size of output 84 [2018-04-13 05:49:38,041 WARN L151 SmtUtils]: Spent 222ms on a formula simplification. DAG size of input: 79 DAG size of output 67 [2018-04-13 05:49:44,701 WARN L151 SmtUtils]: Spent 1203ms on a formula simplification. DAG size of input: 105 DAG size of output 78 [2018-04-13 05:49:44,963 WARN L151 SmtUtils]: Spent 152ms on a formula simplification. DAG size of input: 82 DAG size of output 70 [2018-04-13 05:50:06,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:50:06,101 INFO L93 Difference]: Finished difference Result 304717 states and 383656 transitions. [2018-04-13 05:50:06,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 319 states. [2018-04-13 05:50:06,101 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 240 [2018-04-13 05:50:06,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:50:06,628 INFO L225 Difference]: With dead ends: 304717 [2018-04-13 05:50:06,628 INFO L226 Difference]: Without dead ends: 301050 [2018-04-13 05:50:06,631 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 591 GetRequests, 239 SyntacticMatches, 2 SemanticMatches, 350 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50131 ImplicationChecksByTransitivity, 34.5s TimeCoverageRelationStatistics Valid=7592, Invalid=115281, Unknown=679, NotChecked=0, Total=123552 [2018-04-13 05:50:06,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301050 states. [2018-04-13 05:50:11,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301050 to 275657. [2018-04-13 05:50:11,919 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 275657 states. [2018-04-13 05:50:12,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 275657 states to 275657 states and 348925 transitions. [2018-04-13 05:50:12,341 INFO L78 Accepts]: Start accepts. Automaton has 275657 states and 348925 transitions. Word has length 240 [2018-04-13 05:50:12,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:50:12,341 INFO L459 AbstractCegarLoop]: Abstraction has 275657 states and 348925 transitions. [2018-04-13 05:50:12,341 INFO L460 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-04-13 05:50:12,341 INFO L276 IsEmpty]: Start isEmpty. Operand 275657 states and 348925 transitions. [2018-04-13 05:50:12,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 241 [2018-04-13 05:50:12,391 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:50:12,392 INFO L355 BasicCegarLoop]: trace histogram [18, 18, 18, 17, 10, 10, 10, 10, 10, 8, 8, 8, 8, 7, 7, 6, 6, 4, 4, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:50:12,392 INFO L408 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:50:12,392 INFO L82 PathProgramCache]: Analyzing trace with hash -974528489, now seen corresponding path program 3 times [2018-04-13 05:50:12,392 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:50:12,392 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:50:12,392 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:50:12,392 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:50:12,392 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:50:12,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:50:12,408 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:50:12,416 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:50:12,416 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:50:12,416 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:50:12,416 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:50:12,493 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 15 check-sat command(s) [2018-04-13 05:50:12,493 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:50:12,502 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:50:12,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:50:12,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:50:12,529 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,530 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:50:12,543 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:50:12,543 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,545 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,552 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,552 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:41, output treesize:33 [2018-04-13 05:50:12,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-04-13 05:50:12,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,632 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,633 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-04-13 05:50:12,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,641 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,641 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,645 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:50:12,646 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:39, output treesize:21 [2018-04-13 05:50:12,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 05:50:12,685 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-04-13 05:50:12,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,696 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,697 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,704 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-04-13 05:50:12,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,705 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,706 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,709 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,710 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:39, output treesize:16 [2018-04-13 05:50:12,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:50:12,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:50:12,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-13 05:50:12,764 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 24 [2018-04-13 05:50:12,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:50:12,775 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,778 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 24 [2018-04-13 05:50:12,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:50:12,788 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,791 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,796 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:50:12,796 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 4 variables, input treesize:58, output treesize:44 [2018-04-13 05:50:12,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-04-13 05:50:12,820 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,820 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,824 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,825 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,833 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-04-13 05:50:12,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,835 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,837 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,838 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,842 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,843 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:56, output treesize:16 [2018-04-13 05:50:12,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-04-13 05:50:12,863 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,863 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,866 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,867 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,876 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-04-13 05:50:12,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,877 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,881 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,882 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,886 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,886 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:56, output treesize:16 [2018-04-13 05:50:12,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-04-13 05:50:12,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,893 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,896 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,897 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 19 [2018-04-13 05:50:12,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,907 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,910 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:12,910 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,911 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,916 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:12,916 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:56, output treesize:16 [2018-04-13 05:50:12,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-04-13 05:50:12,951 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 27 [2018-04-13 05:50:12,951 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 05:50:12,961 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:50:12,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 31 [2018-04-13 05:50:12,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 18 treesize of output 27 [2018-04-13 05:50:12,990 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-13 05:50:12,998 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:50:13,018 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 2 dim-2 vars, End of recursive call: 6 dim-0 vars, and 4 xjuncts. [2018-04-13 05:50:13,018 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 7 variables, input treesize:70, output treesize:137 [2018-04-13 05:50:13,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 23 [2018-04-13 05:50:13,121 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-13 05:50:13,121 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:13,553 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 12 [2018-04-13 05:50:13,553 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:13,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-04-13 05:50:13,557 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:13,559 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:50:13,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 19 treesize of output 23 [2018-04-13 05:50:13,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 12 [2018-04-13 05:50:13,567 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:13,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 4 [2018-04-13 05:50:13,572 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:13,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-04-13 05:50:13,576 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:13,577 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:50:13,582 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:50:13,582 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 2 variables, input treesize:40, output treesize:19 [2018-04-13 05:50:13,964 INFO L134 CoverageAnalysis]: Checked inductivity of 1196 backedges. 181 proven. 893 refuted. 0 times theorem prover too weak. 122 trivial. 0 not checked. [2018-04-13 05:50:13,964 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:50:13,964 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37] total 37 [2018-04-13 05:50:13,964 INFO L442 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-04-13 05:50:13,965 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-04-13 05:50:13,965 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=1227, Unknown=3, NotChecked=0, Total=1332 [2018-04-13 05:50:13,965 INFO L87 Difference]: Start difference. First operand 275657 states and 348925 transitions. Second operand 37 states. [2018-04-13 05:50:17,925 WARN L151 SmtUtils]: Spent 327ms on a formula simplification. DAG size of input: 65 DAG size of output 61 [2018-04-13 05:50:28,811 WARN L148 SmtUtils]: Spent 1890ms on a formula simplification that was a NOOP. DAG size: 59 [2018-04-13 05:50:29,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:50:29,828 INFO L93 Difference]: Finished difference Result 309718 states and 391437 transitions. [2018-04-13 05:50:29,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 140 states. [2018-04-13 05:50:29,829 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 240 [2018-04-13 05:50:29,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:50:30,497 INFO L225 Difference]: With dead ends: 309718 [2018-04-13 05:50:30,497 INFO L226 Difference]: Without dead ends: 309523 [2018-04-13 05:50:30,498 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 370 GetRequests, 205 SyntacticMatches, 0 SemanticMatches, 165 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9152 ImplicationChecksByTransitivity, 10.3s TimeCoverageRelationStatistics Valid=2953, Invalid=24657, Unknown=112, NotChecked=0, Total=27722 [2018-04-13 05:50:30,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309523 states. [2018-04-13 05:50:33,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309523 to 301891. [2018-04-13 05:50:33,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 301891 states. [2018-04-13 05:50:34,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 301891 states to 301891 states and 382323 transitions. [2018-04-13 05:50:34,093 INFO L78 Accepts]: Start accepts. Automaton has 301891 states and 382323 transitions. Word has length 240 [2018-04-13 05:50:34,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:50:34,093 INFO L459 AbstractCegarLoop]: Abstraction has 301891 states and 382323 transitions. [2018-04-13 05:50:34,093 INFO L460 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-04-13 05:50:34,093 INFO L276 IsEmpty]: Start isEmpty. Operand 301891 states and 382323 transitions. [2018-04-13 05:50:34,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 251 [2018-04-13 05:50:34,175 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:50:34,175 INFO L355 BasicCegarLoop]: trace histogram [19, 19, 19, 18, 10, 10, 10, 10, 10, 9, 9, 9, 8, 8, 8, 6, 6, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:50:34,175 INFO L408 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:50:34,175 INFO L82 PathProgramCache]: Analyzing trace with hash 1447724457, now seen corresponding path program 4 times [2018-04-13 05:50:34,175 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:50:34,175 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:50:34,176 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:50:34,176 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:50:34,176 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:50:34,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:50:34,190 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:50:34,239 INFO L134 CoverageAnalysis]: Checked inductivity of 1324 backedges. 331 proven. 10 refuted. 0 times theorem prover too weak. 983 trivial. 0 not checked. [2018-04-13 05:50:34,239 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:50:34,239 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:50:34,239 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 05:50:34,264 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 05:50:34,264 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:50:34,273 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:50:36,655 INFO L134 CoverageAnalysis]: Checked inductivity of 1324 backedges. 448 proven. 12 refuted. 0 times theorem prover too weak. 864 trivial. 0 not checked. [2018-04-13 05:50:36,655 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:50:36,655 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 10] total 14 [2018-04-13 05:50:36,655 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-04-13 05:50:36,656 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-04-13 05:50:36,656 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=145, Unknown=0, NotChecked=0, Total=182 [2018-04-13 05:50:36,656 INFO L87 Difference]: Start difference. First operand 301891 states and 382323 transitions. Second operand 14 states. [2018-04-13 05:50:37,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:50:37,793 INFO L93 Difference]: Finished difference Result 336294 states and 411554 transitions. [2018-04-13 05:50:37,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 05:50:37,794 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 250 [2018-04-13 05:50:37,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:50:38,159 INFO L225 Difference]: With dead ends: 336294 [2018-04-13 05:50:38,159 INFO L226 Difference]: Without dead ends: 194225 [2018-04-13 05:50:38,159 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 281 GetRequests, 253 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 182 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=223, Invalid=647, Unknown=0, NotChecked=0, Total=870 [2018-04-13 05:50:38,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194225 states. [2018-04-13 05:50:40,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194225 to 154835. [2018-04-13 05:50:40,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154835 states. [2018-04-13 05:50:40,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154835 states to 154835 states and 185198 transitions. [2018-04-13 05:50:40,344 INFO L78 Accepts]: Start accepts. Automaton has 154835 states and 185198 transitions. Word has length 250 [2018-04-13 05:50:40,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:50:40,344 INFO L459 AbstractCegarLoop]: Abstraction has 154835 states and 185198 transitions. [2018-04-13 05:50:40,344 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-04-13 05:50:40,344 INFO L276 IsEmpty]: Start isEmpty. Operand 154835 states and 185198 transitions. [2018-04-13 05:50:40,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 254 [2018-04-13 05:50:40,373 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:50:40,373 INFO L355 BasicCegarLoop]: trace histogram [18, 18, 17, 16, 12, 12, 12, 12, 12, 10, 8, 6, 5, 5, 5, 5, 5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:50:40,373 INFO L408 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:50:40,374 INFO L82 PathProgramCache]: Analyzing trace with hash 21632717, now seen corresponding path program 3 times [2018-04-13 05:50:40,374 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:50:40,374 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:50:40,374 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:50:40,374 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:50:40,374 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:50:40,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:50:40,391 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:50:41,055 INFO L134 CoverageAnalysis]: Checked inductivity of 1242 backedges. 205 proven. 945 refuted. 0 times theorem prover too weak. 92 trivial. 0 not checked. [2018-04-13 05:50:41,056 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:50:41,056 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:50:41,056 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 05:50:41,095 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-04-13 05:50:41,095 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:50:41,102 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:50:41,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 05:50:41,184 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:41,187 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:41,187 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-13 05:50:41,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 05:50:41,414 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:41,418 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:41,418 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:15 [2018-04-13 05:50:41,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 3 [2018-04-13 05:50:41,513 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:41,517 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:41,517 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:25, output treesize:16 [2018-04-13 05:50:41,707 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:50:41,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:50:41,709 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:41,710 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:41,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:50:41,718 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:50:41,718 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:41,719 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:41,724 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:41,724 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:36, output treesize:28 [2018-04-13 05:50:42,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 61 [2018-04-13 05:50:42,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 9 [2018-04-13 05:50:42,464 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,472 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 61 [2018-04-13 05:50:42,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 9 [2018-04-13 05:50:42,499 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,506 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 46 [2018-04-13 05:50:42,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 26 treesize of output 43 [2018-04-13 05:50:42,539 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 3 xjuncts. [2018-04-13 05:50:42,552 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:50:42,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 46 [2018-04-13 05:50:42,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 3 case distinctions, treesize of input 26 treesize of output 43 [2018-04-13 05:50:42,591 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 3 xjuncts. [2018-04-13 05:50:42,604 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:50:42,639 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 4 dim-2 vars, End of recursive call: 2 dim-0 vars, and 4 xjuncts. [2018-04-13 05:50:42,639 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 10 variables, input treesize:133, output treesize:93 [2018-04-13 05:50:42,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-04-13 05:50:42,879 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 39 [2018-04-13 05:50:42,909 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,925 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-04-13 05:50:42,926 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:50:42,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-04-13 05:50:42,928 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,932 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 35 [2018-04-13 05:50:42,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 05:50:42,949 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-04-13 05:50:42,949 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,954 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,964 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-04-13 05:50:42,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:42,965 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,968 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 22 [2018-04-13 05:50:42,978 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 1 [2018-04-13 05:50:42,979 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,981 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:50:42,988 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-1 vars, 4 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-13 05:50:42,989 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 10 variables, input treesize:89, output treesize:9 [2018-04-13 05:50:43,561 INFO L134 CoverageAnalysis]: Checked inductivity of 1242 backedges. 94 proven. 932 refuted. 0 times theorem prover too weak. 216 trivial. 0 not checked. [2018-04-13 05:50:43,561 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 05:50:43,561 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 40] total 70 [2018-04-13 05:50:43,562 INFO L442 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-04-13 05:50:43,562 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-04-13 05:50:43,562 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=220, Invalid=4609, Unknown=1, NotChecked=0, Total=4830 [2018-04-13 05:50:43,562 INFO L87 Difference]: Start difference. First operand 154835 states and 185198 transitions. Second operand 70 states. [2018-04-13 05:51:30,587 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 102 DAG size of output 93 [2018-04-13 05:51:33,495 WARN L151 SmtUtils]: Spent 120ms on a formula simplification. DAG size of input: 88 DAG size of output 77 [2018-04-13 05:51:34,986 WARN L151 SmtUtils]: Spent 108ms on a formula simplification. DAG size of input: 100 DAG size of output 91 [2018-04-13 05:51:37,794 WARN L151 SmtUtils]: Spent 112ms on a formula simplification. DAG size of input: 113 DAG size of output 99 [2018-04-13 05:51:38,373 WARN L151 SmtUtils]: Spent 117ms on a formula simplification. DAG size of input: 114 DAG size of output 101 [2018-04-13 05:51:40,267 WARN L151 SmtUtils]: Spent 101ms on a formula simplification. DAG size of input: 109 DAG size of output 97 [2018-04-13 05:51:41,052 WARN L151 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 109 DAG size of output 95 [2018-04-13 05:51:41,968 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 108 DAG size of output 95 [2018-04-13 05:51:44,470 WARN L151 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 98 DAG size of output 89 [2018-04-13 05:51:44,702 WARN L151 SmtUtils]: Spent 130ms on a formula simplification. DAG size of input: 107 DAG size of output 76 [2018-04-13 05:51:47,597 WARN L151 SmtUtils]: Spent 115ms on a formula simplification. DAG size of input: 100 DAG size of output 92 [2018-04-13 05:51:49,375 WARN L151 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 100 DAG size of output 91 [2018-04-13 05:51:50,820 WARN L151 SmtUtils]: Spent 131ms on a formula simplification. DAG size of input: 106 DAG size of output 71 [2018-04-13 05:51:51,024 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 107 DAG size of output 93 [2018-04-13 05:51:56,743 WARN L151 SmtUtils]: Spent 112ms on a formula simplification. DAG size of input: 86 DAG size of output 58 [2018-04-13 05:51:58,194 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 111 DAG size of output 97 [2018-04-13 05:51:58,829 WARN L151 SmtUtils]: Spent 108ms on a formula simplification. DAG size of input: 94 DAG size of output 90 [2018-04-13 05:51:59,253 WARN L151 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 112 DAG size of output 99 [2018-04-13 05:51:59,631 WARN L151 SmtUtils]: Spent 114ms on a formula simplification. DAG size of input: 96 DAG size of output 92 [2018-04-13 05:51:59,859 WARN L151 SmtUtils]: Spent 185ms on a formula simplification. DAG size of input: 92 DAG size of output 88 [2018-04-13 05:52:00,429 WARN L151 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 87 DAG size of output 83 [2018-04-13 05:52:01,885 WARN L151 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 66 DAG size of output 62 [2018-04-13 05:52:03,578 WARN L151 SmtUtils]: Spent 187ms on a formula simplification. DAG size of input: 92 DAG size of output 88 [2018-04-13 05:52:05,337 WARN L151 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 94 DAG size of output 90 [2018-04-13 05:52:08,817 WARN L151 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 94 DAG size of output 86 [2018-04-13 05:52:09,319 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 90 DAG size of output 86 [2018-04-13 05:52:09,685 WARN L151 SmtUtils]: Spent 115ms on a formula simplification. DAG size of input: 106 DAG size of output 98 [2018-04-13 05:52:10,041 WARN L151 SmtUtils]: Spent 120ms on a formula simplification. DAG size of input: 107 DAG size of output 100 [2018-04-13 05:52:10,265 WARN L151 SmtUtils]: Spent 170ms on a formula simplification. DAG size of input: 99 DAG size of output 92 [2018-04-13 05:52:12,866 WARN L151 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 92 DAG size of output 84 [2018-04-13 05:52:13,558 WARN L151 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 102 DAG size of output 94 [2018-04-13 05:52:13,751 WARN L151 SmtUtils]: Spent 154ms on a formula simplification. DAG size of input: 77 DAG size of output 70 [2018-04-13 05:52:14,400 WARN L151 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 101 DAG size of output 93 [2018-04-13 05:52:14,547 WARN L151 SmtUtils]: Spent 101ms on a formula simplification. DAG size of input: 91 DAG size of output 87 [2018-04-13 05:52:17,160 WARN L151 SmtUtils]: Spent 163ms on a formula simplification. DAG size of input: 102 DAG size of output 69 [2018-04-13 05:52:28,019 WARN L151 SmtUtils]: Spent 325ms on a formula simplification. DAG size of input: 63 DAG size of output 53 [2018-04-13 05:52:31,808 WARN L151 SmtUtils]: Spent 227ms on a formula simplification. DAG size of input: 109 DAG size of output 85 [2018-04-13 05:52:35,877 WARN L151 SmtUtils]: Spent 371ms on a formula simplification. DAG size of input: 88 DAG size of output 59 [2018-04-13 05:52:42,825 WARN L151 SmtUtils]: Spent 108ms on a formula simplification. DAG size of input: 127 DAG size of output 97 [2018-04-13 05:52:52,086 WARN L151 SmtUtils]: Spent 230ms on a formula simplification. DAG size of input: 74 DAG size of output 66 [2018-04-13 05:52:59,165 WARN L151 SmtUtils]: Spent 113ms on a formula simplification. DAG size of input: 132 DAG size of output 81 [2018-04-13 05:52:59,810 WARN L151 SmtUtils]: Spent 254ms on a formula simplification. DAG size of input: 110 DAG size of output 77 [2018-04-13 05:53:02,337 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 73 DAG size of output 70 [2018-04-13 05:53:04,017 WARN L151 SmtUtils]: Spent 234ms on a formula simplification. DAG size of input: 65 DAG size of output 61 [2018-04-13 05:53:11,563 WARN L151 SmtUtils]: Spent 260ms on a formula simplification. DAG size of input: 89 DAG size of output 82 [2018-04-13 05:53:15,696 WARN L151 SmtUtils]: Spent 256ms on a formula simplification. DAG size of input: 97 DAG size of output 68 [2018-04-13 05:53:19,693 WARN L151 SmtUtils]: Spent 246ms on a formula simplification. DAG size of input: 66 DAG size of output 62 [2018-04-13 05:53:24,046 WARN L151 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 107 DAG size of output 93 [2018-04-13 05:53:33,772 WARN L151 SmtUtils]: Spent 112ms on a formula simplification. DAG size of input: 96 DAG size of output 92 [2018-04-13 05:53:33,942 WARN L151 SmtUtils]: Spent 114ms on a formula simplification. DAG size of input: 98 DAG size of output 94 [2018-04-13 05:53:34,107 WARN L151 SmtUtils]: Spent 114ms on a formula simplification. DAG size of input: 94 DAG size of output 90 [2018-04-13 05:53:34,270 WARN L151 SmtUtils]: Spent 104ms on a formula simplification. DAG size of input: 90 DAG size of output 86 [2018-04-13 05:53:34,424 WARN L151 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 89 DAG size of output 85 [2018-04-13 05:53:34,870 WARN L151 SmtUtils]: Spent 112ms on a formula simplification. DAG size of input: 94 DAG size of output 90 [2018-04-13 05:53:35,074 WARN L151 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 96 DAG size of output 92 [2018-04-13 05:53:35,959 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 97 DAG size of output 89 [2018-04-13 05:53:36,599 WARN L151 SmtUtils]: Spent 107ms on a formula simplification. DAG size of input: 92 DAG size of output 88 [2018-04-13 05:53:36,784 WARN L151 SmtUtils]: Spent 118ms on a formula simplification. DAG size of input: 109 DAG size of output 100 [2018-04-13 05:53:37,151 WARN L151 SmtUtils]: Spent 129ms on a formula simplification. DAG size of input: 110 DAG size of output 102 [2018-04-13 05:53:38,639 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 95 DAG size of output 87 [2018-04-13 05:53:39,026 WARN L151 SmtUtils]: Spent 123ms on a formula simplification. DAG size of input: 108 DAG size of output 101 [2018-04-13 05:53:39,207 WARN L151 SmtUtils]: Spent 117ms on a formula simplification. DAG size of input: 105 DAG size of output 96 [2018-04-13 05:53:39,531 WARN L151 SmtUtils]: Spent 121ms on a formula simplification. DAG size of input: 103 DAG size of output 95 [2018-04-13 05:53:39,700 WARN L151 SmtUtils]: Spent 117ms on a formula simplification. DAG size of input: 104 DAG size of output 96 [2018-04-13 05:53:40,103 WARN L151 SmtUtils]: Spent 108ms on a formula simplification. DAG size of input: 93 DAG size of output 89 [2018-04-13 05:53:40,289 WARN L151 SmtUtils]: Spent 118ms on a formula simplification. DAG size of input: 96 DAG size of output 92 [2018-04-13 05:53:41,720 WARN L151 SmtUtils]: Spent 111ms on a formula simplification. DAG size of input: 105 DAG size of output 98 [2018-04-13 05:53:42,056 WARN L151 SmtUtils]: Spent 116ms on a formula simplification. DAG size of input: 100 DAG size of output 92 [2018-04-13 05:53:42,223 WARN L151 SmtUtils]: Spent 100ms on a formula simplification. DAG size of input: 93 DAG size of output 89 [2018-04-13 05:53:42,657 WARN L151 SmtUtils]: Spent 150ms on a formula simplification. DAG size of input: 101 DAG size of output 98 [2018-04-13 05:53:43,565 WARN L151 SmtUtils]: Spent 134ms on a formula simplification. DAG size of input: 98 DAG size of output 95 [2018-04-13 05:53:44,202 WARN L151 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 106 DAG size of output 99 [2018-04-13 05:53:44,373 WARN L151 SmtUtils]: Spent 118ms on a formula simplification. DAG size of input: 101 DAG size of output 93 [2018-04-13 05:53:44,544 WARN L151 SmtUtils]: Spent 113ms on a formula simplification. DAG size of input: 94 DAG size of output 90 [2018-04-13 05:53:44,759 WARN L151 SmtUtils]: Spent 114ms on a formula simplification. DAG size of input: 103 DAG size of output 96 [2018-04-13 05:53:44,921 WARN L151 SmtUtils]: Spent 109ms on a formula simplification. DAG size of input: 98 DAG size of output 90 [2018-04-13 05:53:45,291 WARN L151 SmtUtils]: Spent 311ms on a formula simplification. DAG size of input: 91 DAG size of output 87 [2018-04-13 05:53:45,543 WARN L151 SmtUtils]: Spent 148ms on a formula simplification. DAG size of input: 99 DAG size of output 96 [2018-04-13 05:53:45,757 WARN L151 SmtUtils]: Spent 132ms on a formula simplification. DAG size of input: 96 DAG size of output 93 [2018-04-13 05:53:46,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 05:53:46,379 INFO L93 Difference]: Finished difference Result 442164 states and 531435 transitions. [2018-04-13 05:53:46,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 1601 states. [2018-04-13 05:53:46,379 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 253 [2018-04-13 05:53:46,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 05:53:47,064 INFO L225 Difference]: With dead ends: 442164 [2018-04-13 05:53:47,064 INFO L226 Difference]: Without dead ends: 431058 [2018-04-13 05:53:47,155 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2421 GetRequests, 756 SyntacticMatches, 0 SemanticMatches, 1665 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1300356 ImplicationChecksByTransitivity, 136.3s TimeCoverageRelationStatistics Valid=125478, Invalid=2650926, Unknown=818, NotChecked=0, Total=2777222 [2018-04-13 05:53:47,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 431058 states. [2018-04-13 05:53:54,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 431058 to 298239. [2018-04-13 05:53:54,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 298239 states. [2018-04-13 05:53:54,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 298239 states to 298239 states and 355994 transitions. [2018-04-13 05:53:54,642 INFO L78 Accepts]: Start accepts. Automaton has 298239 states and 355994 transitions. Word has length 253 [2018-04-13 05:53:54,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 05:53:54,642 INFO L459 AbstractCegarLoop]: Abstraction has 298239 states and 355994 transitions. [2018-04-13 05:53:54,642 INFO L460 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-04-13 05:53:54,642 INFO L276 IsEmpty]: Start isEmpty. Operand 298239 states and 355994 transitions. [2018-04-13 05:53:54,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 256 [2018-04-13 05:53:54,673 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 05:53:54,673 INFO L355 BasicCegarLoop]: trace histogram [19, 19, 19, 18, 11, 11, 11, 11, 11, 9, 8, 8, 8, 7, 7, 7, 6, 5, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 05:53:54,673 INFO L408 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_flockfree_____true_valid_memsafety_i__pushErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr6RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr7RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__pushErr4RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr3RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr1RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr5RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr0RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr2RequiresViolation, __U_MULTI_flockfree_____true_valid_memsafety_i__popErr4RequiresViolation, mainErr1RequiresViolation, mainErr4EnsuresViolationMEMORY_LEAK, mainErr2AssertViolationMEMORY_FREE, mainErr0RequiresViolation, mainErr3AssertViolationMEMORY_FREE]=== [2018-04-13 05:53:54,674 INFO L82 PathProgramCache]: Analyzing trace with hash 1058526466, now seen corresponding path program 5 times [2018-04-13 05:53:54,674 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 05:53:54,674 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 05:53:54,674 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:53:54,674 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 05:53:54,674 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 05:53:54,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 05:53:54,697 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 05:53:54,707 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 05:53:54,707 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 05:53:54,707 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 05:53:54,707 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 05:53:54,787 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 15 check-sat command(s) [2018-04-13 05:53:54,787 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 05:53:54,812 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 05:53:54,841 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 05:53:54,841 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:53:54,845 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:53:54,846 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:18 [2018-04-13 05:53:54,903 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 05:53:54,903 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:53:54,909 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:53:54,910 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:23, output treesize:22 [2018-04-13 05:53:55,017 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 05:53:55,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 05:53:55,018 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 05:53:55,019 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:53:55,025 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 05:53:55,025 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-04-13 05:53:55,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 9 [2018-04-13 05:53:55,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 5 [2018-04-13 05:53:55,132 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:53:55,133 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:53:55,140 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 05:53:55,140 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:34, output treesize:22 [2018-04-13 05:53:55,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 9 [2018-04-13 05:53:55,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 5 [2018-04-13 05:53:55,209 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:53:55,210 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:53:55,217 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 05:53:55,217 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:34, output treesize:22 [2018-04-13 05:53:55,262 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 9 [2018-04-13 05:53:55,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 5 [2018-04-13 05:53:55,264 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:53:55,265 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 05:53:55,271 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 05:53:55,272 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:34, output treesize:22 [2018-04-13 05:53:55,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 3 [2018-04-13 05:53:55,371 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 05:53:55,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-04-13 05:53:55,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 18 [2018-04-13 05:53:55,384 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:53:55,388 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 05:53:55,397 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-04-13 05:53:55,397 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 5 variables, input treesize:54, output treesize:48 [2018-04-13 05:53:55,785 INFO L134 CoverageAnalysis]: Checked inductivity of 1357 backedges. 565 proven. 706 refuted. 0 times theorem prover too weak. 86 trivial. 0 not checked. [2018-04-13 05:53:55,785 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 05:53:55,786 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38] total 38 [2018-04-13 05:53:55,786 INFO L442 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-04-13 05:53:55,786 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-04-13 05:53:55,786 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=1351, Unknown=0, NotChecked=0, Total=1482 [2018-04-13 05:53:55,786 INFO L87 Difference]: Start difference. First operand 298239 states and 355994 transitions. Second operand 39 states. [2018-04-13 05:54:00,050 WARN L151 SmtUtils]: Spent 293ms on a formula simplification. DAG size of input: 67 DAG size of output 47 [2018-04-13 05:54:02,159 WARN L151 SmtUtils]: Spent 137ms on a formula simplification. DAG size of input: 77 DAG size of output 48 [2018-04-13 05:54:03,292 WARN L151 SmtUtils]: Spent 300ms on a formula simplification. DAG size of input: 86 DAG size of output 53 [2018-04-13 05:54:06,233 WARN L151 SmtUtils]: Spent 307ms on a formula simplification. DAG size of input: 87 DAG size of output 67 [2018-04-13 05:54:11,339 WARN L151 SmtUtils]: Spent 310ms on a formula simplification. DAG size of input: 84 DAG size of output 53 [2018-04-13 05:54:13,591 WARN L151 SmtUtils]: Spent 293ms on a formula simplification. DAG size of input: 68 DAG size of output 46 [2018-04-13 05:54:15,917 WARN L151 SmtUtils]: Spent 324ms on a formula simplification. DAG size of input: 84 DAG size of output 54 Received shutdown request... [2018-04-13 05:54:20,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 279 states. [2018-04-13 05:54:20,631 WARN L519 AbstractCegarLoop]: Verification canceled [2018-04-13 05:54:20,633 WARN L197 ceAbstractionStarter]: Timeout [2018-04-13 05:54:20,634 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.04 05:54:20 BoogieIcfgContainer [2018-04-13 05:54:20,634 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-13 05:54:20,635 INFO L168 Benchmark]: Toolchain (without parser) took 725335.24 ms. Allocated memory was 400.0 MB in the beginning and 3.2 GB in the end (delta: 2.8 GB). Free memory was 337.6 MB in the beginning and 1.3 GB in the end (delta: -1.0 GB). Peak memory consumption was 1.8 GB. Max. memory is 5.3 GB. [2018-04-13 05:54:20,635 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 400.0 MB. Free memory is still 361.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-13 05:54:20,636 INFO L168 Benchmark]: CACSL2BoogieTranslator took 223.66 ms. Allocated memory is still 400.0 MB. Free memory was 336.2 MB in the beginning and 310.9 MB in the end (delta: 25.3 MB). Peak memory consumption was 25.3 MB. Max. memory is 5.3 GB. [2018-04-13 05:54:20,636 INFO L168 Benchmark]: Boogie Preprocessor took 44.92 ms. Allocated memory is still 400.0 MB. Free memory was 310.9 MB in the beginning and 308.3 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. [2018-04-13 05:54:20,636 INFO L168 Benchmark]: RCFGBuilder took 405.45 ms. Allocated memory was 400.0 MB in the beginning and 609.2 MB in the end (delta: 209.2 MB). Free memory was 308.3 MB in the beginning and 537.4 MB in the end (delta: -229.1 MB). Peak memory consumption was 24.4 MB. Max. memory is 5.3 GB. [2018-04-13 05:54:20,636 INFO L168 Benchmark]: TraceAbstraction took 724658.41 ms. Allocated memory was 609.2 MB in the beginning and 3.2 GB in the end (delta: 2.6 GB). Free memory was 537.4 MB in the beginning and 1.3 GB in the end (delta: -807.0 MB). Peak memory consumption was 1.8 GB. Max. memory is 5.3 GB. [2018-04-13 05:54:20,637 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 400.0 MB. Free memory is still 361.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 223.66 ms. Allocated memory is still 400.0 MB. Free memory was 336.2 MB in the beginning and 310.9 MB in the end (delta: 25.3 MB). Peak memory consumption was 25.3 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 44.92 ms. Allocated memory is still 400.0 MB. Free memory was 310.9 MB in the beginning and 308.3 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 405.45 ms. Allocated memory was 400.0 MB in the beginning and 609.2 MB in the end (delta: 209.2 MB). Free memory was 308.3 MB in the beginning and 537.4 MB in the end (delta: -229.1 MB). Peak memory consumption was 24.4 MB. Max. memory is 5.3 GB. * TraceAbstraction took 724658.41 ms. Allocated memory was 609.2 MB in the beginning and 3.2 GB in the end (delta: 2.6 GB). Free memory was 537.4 MB in the beginning and 1.3 GB in the end (delta: -807.0 MB). Peak memory consumption was 1.8 GB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 634]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 634). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 634]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 634). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 644]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 644). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 644]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 644). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 635]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 635). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 638]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 638). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 635]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 635). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 638]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 638). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 681]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 681). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 672]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 672). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 682]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 682). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 672]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 672). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 681]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 681). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 682]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 682). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 697]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 697). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 688]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 688). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 698]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 698). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 697]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 697). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - TimeoutResultAtElement [Line: 698]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 698). Cancelled while BasicCegarLoop was constructing difference of abstraction (298239states) and interpolant automaton (currently 279 states, 39 states before enhancement), while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 311 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 78 locations, 19 error locations. TIMEOUT Result, 724.6s OverallTime, 46 OverallIterations, 19 TraceHistogramMax, 667.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 8186 SDtfs, 46145 SDslu, 34183 SDs, 0 SdLazy, 226225 SolverSat, 20132 SolverUnsat, 3642 SolverUnknown, 0 SolverNotchecked, 271.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 10571 GetRequests, 5660 SyntacticMatches, 88 SemanticMatches, 4822 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 1600840 ImplicationChecksByTransitivity, 378.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=301891occurred in iteration=43, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 27.8s AutomataMinimizationTime, 45 MinimizatonAttempts, 272478 StatesRemovedByMinimization, 43 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 1.6s SatisfiabilityAnalysisTime, 25.4s InterpolantComputationTime, 10244 NumberOfCodeBlocks, 10171 NumberOfCodeBlocksAsserted, 123 NumberOfCheckSat, 8419 ConstructedInterpolants, 629 QuantifiedInterpolants, 12560327 SizeOfPredicates, 316 NumberOfNonLiveVariables, 30087 ConjunctsInSsa, 2532 ConjunctsInUnsatCore, 73 InterpolantComputations, 14 PerfectInterpolantSequences, 17938/27824 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/lockfree-3.0_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-13_05-54-20-642.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/lockfree-3.0_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-13_05-54-20-642.csv Completed graceful shutdown