java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv --cacsl2boogietranslator.bitprecise.bitfields false -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test17_1_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-408c70d-m [2018-04-13 10:07:48,622 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-04-13 10:07:48,624 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-04-13 10:07:48,636 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-04-13 10:07:48,637 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-04-13 10:07:48,638 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-04-13 10:07:48,639 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-04-13 10:07:48,640 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-04-13 10:07:48,642 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-04-13 10:07:48,642 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-04-13 10:07:48,643 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-04-13 10:07:48,643 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-04-13 10:07:48,644 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-04-13 10:07:48,645 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-04-13 10:07:48,646 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-04-13 10:07:48,647 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-04-13 10:07:48,648 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-04-13 10:07:48,650 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-04-13 10:07:48,650 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-04-13 10:07:48,651 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-04-13 10:07:48,653 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-04-13 10:07:48,653 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-04-13 10:07:48,653 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-04-13 10:07:48,654 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-04-13 10:07:48,655 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-04-13 10:07:48,656 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-04-13 10:07:48,656 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-04-13 10:07:48,656 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-04-13 10:07:48,657 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-04-13 10:07:48,657 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-04-13 10:07:48,658 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-04-13 10:07:48,658 INFO L98 SettingsManager]: Beginning loading settings from /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/cade18-smtinterpol/svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf [2018-04-13 10:07:48,667 INFO L110 SettingsManager]: Loading preferences was successful [2018-04-13 10:07:48,668 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-04-13 10:07:48,669 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-04-13 10:07:48,669 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-04-13 10:07:48,669 INFO L133 SettingsManager]: * Use SBE=true [2018-04-13 10:07:48,669 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-04-13 10:07:48,669 INFO L133 SettingsManager]: * sizeof long=4 [2018-04-13 10:07:48,669 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-04-13 10:07:48,670 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-04-13 10:07:48,670 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-04-13 10:07:48,670 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-04-13 10:07:48,670 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-04-13 10:07:48,670 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-04-13 10:07:48,670 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-04-13 10:07:48,670 INFO L133 SettingsManager]: * sizeof long double=12 [2018-04-13 10:07:48,671 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-04-13 10:07:48,671 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-04-13 10:07:48,671 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-04-13 10:07:48,671 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-04-13 10:07:48,671 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-13 10:07:48,671 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-04-13 10:07:48,671 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-04-13 10:07:48,671 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-04-13 10:07:48,671 INFO L133 SettingsManager]: * Trace refinement strategy=SMTINTERPOL Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Bitprecise bitfields -> false [2018-04-13 10:07:48,702 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-04-13 10:07:48,720 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully (re)initialized [2018-04-13 10:07:48,722 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-04-13 10:07:48,723 INFO L271 PluginConnector]: Initializing CDTParser... [2018-04-13 10:07:48,724 INFO L276 PluginConnector]: CDTParser initialized [2018-04-13 10:07:48,724 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,078 INFO L225 CDTParser]: Created temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGcfbafc978 [2018-04-13 10:07:49,226 INFO L287 CDTParser]: IsIndexed: true [2018-04-13 10:07:49,226 INFO L288 CDTParser]: Found 1 translation units. [2018-04-13 10:07:49,227 INFO L168 CDTParser]: Scanning memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,237 INFO L210 ultiparseSymbolTable]: Include resolver: [2018-04-13 10:07:49,237 INFO L215 ultiparseSymbolTable]: [2018-04-13 10:07:49,237 INFO L218 ultiparseSymbolTable]: Function table: [2018-04-13 10:07:49,237 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_positive ('ldv_positive') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,237 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_put ('ldv_kobject_put') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,237 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_submit_msg ('ldv_submit_msg') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,237 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_get ('ldv_kobject_get') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,237 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_del ('__ldv_list_del') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_zalloc ('ldv_zalloc') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_get ('ldv_kref_get') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEAD ('LDV_INIT_LIST_HEAD') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_del ('ldv_list_del') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdata ('ldv_dev_set_drvdata') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_put ('ldv_kref_put') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_release ('ldv_kobject_release') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_malloc ('ldv_malloc') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_free ('ldv_msg_free') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____bswap_64 ('__bswap_64') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdata ('ldv_dev_get_drvdata') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fill ('ldv_msg_fill') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_init ('ldv_kref_init') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgs ('ldv_destroy_msgs') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add ('ldv_list_add') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_nonpositive ('ldv_nonpositive') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_point ('entry_point') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,238 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_return ('ldv_atomic_sub_return') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanup ('ldv_kobject_cleanup') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17 ('free_17') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_sub ('ldv_kref_sub') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17 ('alloc_17') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_init ('ldv_kobject_init') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_add ('__ldv_list_add') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_alloc ('ldv_msg_alloc') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_init_internal ('ldv_kobject_init_internal') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_return ('ldv_atomic_add_return') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_del ('ldv_kobject_del') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tail ('ldv_list_add_tail') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_create ('ldv_kobject_create') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,239 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__f ('f') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,240 INFO L221 ultiparseSymbolTable]: Function definition of null ('main') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,240 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____bswap_32 ('__bswap_32') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,240 INFO L221 ultiparseSymbolTable]: Function definition of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__g ('g') in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,240 INFO L227 ultiparseSymbolTable]: Global variable table: [2018-04-13 10:07:49,240 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__u_int32_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,240 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__u_quad_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,240 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ulong in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,240 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____u_long in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,240 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____u_char in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,240 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____off64_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,240 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____blksize_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,240 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__blksize_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____qaddr_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__sigset_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__uid_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____uint32_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__pthread_rwlock_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____int16_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__div_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__pthread_barrier_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__time_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__pthread_key_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__u_char in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,241 INFO L230 ultiparseSymbolTable]: Global variable declaration of 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10:07:49,245 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__u_short in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,246 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__u_int64_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,246 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____fsfilcnt64_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,246 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ino_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,246 INFO L230 ultiparseSymbolTable]: Global variable declaration of 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memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,248 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__fsfilcnt_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,248 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__pthread_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,248 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____off_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,248 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__fsblkcnt_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,248 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____syscall_ulong_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,248 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____blkcnt64_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,248 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____id_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,248 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__pthread_rwlockattr_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,248 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__idtype_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,248 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____int32_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,248 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____nlink_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,248 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__clockid_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,249 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__timer_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,249 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____fd_mask in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,249 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__key_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,249 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____sig_atomic_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,249 INFO L230 ultiparseSymbolTable]: Global variable declaration of __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ssize_t in memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:49,263 INFO L330 CDTParser]: Deleted temporary CDT project at /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/data/FLAGcfbafc978 [2018-04-13 10:07:49,266 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-04-13 10:07:49,267 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-04-13 10:07:49,267 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-04-13 10:07:49,267 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-04-13 10:07:49,271 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-04-13 10:07:49,272 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.04 10:07:49" (1/1) ... [2018-04-13 10:07:49,273 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@33eafe8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:07:49, skipping insertion in model container [2018-04-13 10:07:49,274 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 13.04 10:07:49" (1/1) ... [2018-04-13 10:07:49,284 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-13 10:07:49,309 INFO L167 Dispatcher]: Using SV-COMP mode [2018-04-13 10:07:49,458 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-13 10:07:49,514 INFO L175 PostProcessor]: Settings: Checked method=main [2018-04-13 10:07:49,521 INFO L100 SccComputation]: Graph consists of 0 InCaSumBalls and 157 non ball SCCs. Number of states in SCCs 157. [2018-04-13 10:07:49,566 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:07:49 WrapperNode [2018-04-13 10:07:49,566 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-04-13 10:07:49,567 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-04-13 10:07:49,567 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-04-13 10:07:49,567 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-04-13 10:07:49,575 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:07:49" (1/1) ... [2018-04-13 10:07:49,575 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:07:49" (1/1) ... [2018-04-13 10:07:49,592 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:07:49" (1/1) ... [2018-04-13 10:07:49,592 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:07:49" (1/1) ... [2018-04-13 10:07:49,610 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:07:49" (1/1) ... [2018-04-13 10:07:49,615 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:07:49" (1/1) ... [2018-04-13 10:07:49,619 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:07:49" (1/1) ... [2018-04-13 10:07:49,624 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-04-13 10:07:49,624 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-04-13 10:07:49,625 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-04-13 10:07:49,625 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-04-13 10:07:49,625 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:07:49" (1/1) ... No working directory specified, using /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-04-13 10:07:49,715 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-04-13 10:07:49,715 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-04-13 10:07:49,715 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-04-13 10:07:49,715 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____bswap_32 [2018-04-13 10:07:49,715 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____bswap_64 [2018-04-13 10:07:49,715 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_nonpositive [2018-04-13 10:07:49,715 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_positive [2018-04-13 10:07:49,715 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_malloc [2018-04-13 10:07:49,715 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_zalloc [2018-04-13 10:07:49,715 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEAD [2018-04-13 10:07:49,716 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_add [2018-04-13 10:07:49,716 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_del [2018-04-13 10:07:49,716 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add [2018-04-13 10:07:49,716 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tail [2018-04-13 10:07:49,716 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_del [2018-04-13 10:07:49,716 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_alloc [2018-04-13 10:07:49,716 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fill [2018-04-13 10:07:49,716 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_free [2018-04-13 10:07:49,716 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_submit_msg [2018-04-13 10:07:49,716 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgs [2018-04-13 10:07:49,716 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdata [2018-04-13 10:07:49,717 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdata [2018-04-13 10:07:49,717 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_return [2018-04-13 10:07:49,717 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_return [2018-04-13 10:07:49,717 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_sub [2018-04-13 10:07:49,717 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_init [2018-04-13 10:07:49,717 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_get [2018-04-13 10:07:49,717 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_put [2018-04-13 10:07:49,717 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_del [2018-04-13 10:07:49,717 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanup [2018-04-13 10:07:49,717 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_release [2018-04-13 10:07:49,717 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_put [2018-04-13 10:07:49,718 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_get [2018-04-13 10:07:49,718 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_init_internal [2018-04-13 10:07:49,718 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_init [2018-04-13 10:07:49,718 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_create [2018-04-13 10:07:49,718 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__f [2018-04-13 10:07:49,718 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__g [2018-04-13 10:07:49,718 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17 [2018-04-13 10:07:49,718 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17 [2018-04-13 10:07:49,718 INFO L136 BoogieDeclarations]: Found implementation of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_point [2018-04-13 10:07:49,718 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-04-13 10:07:49,718 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-04-13 10:07:49,718 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.meminit [2018-04-13 10:07:49,719 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____bswap_32 [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____bswap_64 [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure __ctype_get_mb_cur_max [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure atof [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure atoi [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure atol [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure atoll [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure strtod [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure strtof [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure strtold [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure strtol [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure strtoul [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure strtoq [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure strtouq [2018-04-13 10:07:49,719 INFO L128 BoogieDeclarations]: Found specification of procedure strtoll [2018-04-13 10:07:49,720 INFO L128 BoogieDeclarations]: Found specification of procedure strtoull [2018-04-13 10:07:49,720 INFO L128 BoogieDeclarations]: Found specification of procedure l64a [2018-04-13 10:07:49,720 INFO L128 BoogieDeclarations]: Found specification of procedure a64l [2018-04-13 10:07:49,720 INFO L128 BoogieDeclarations]: Found specification of procedure select [2018-04-13 10:07:49,720 INFO L128 BoogieDeclarations]: Found specification of procedure pselect [2018-04-13 10:07:49,720 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_major [2018-04-13 10:07:49,720 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_minor [2018-04-13 10:07:49,720 INFO L128 BoogieDeclarations]: Found specification of procedure gnu_dev_makedev [2018-04-13 10:07:49,720 INFO L128 BoogieDeclarations]: Found specification of procedure random [2018-04-13 10:07:49,720 INFO L128 BoogieDeclarations]: Found specification of procedure srandom [2018-04-13 10:07:49,721 INFO L128 BoogieDeclarations]: Found specification of procedure initstate [2018-04-13 10:07:49,721 INFO L128 BoogieDeclarations]: Found specification of procedure setstate [2018-04-13 10:07:49,721 INFO L128 BoogieDeclarations]: Found specification of procedure random_r [2018-04-13 10:07:49,721 INFO L128 BoogieDeclarations]: Found specification of procedure srandom_r [2018-04-13 10:07:49,721 INFO L128 BoogieDeclarations]: Found specification of procedure initstate_r [2018-04-13 10:07:49,721 INFO L128 BoogieDeclarations]: Found specification of procedure setstate_r [2018-04-13 10:07:49,721 INFO L128 BoogieDeclarations]: Found specification of procedure rand [2018-04-13 10:07:49,721 INFO L128 BoogieDeclarations]: Found specification of procedure srand [2018-04-13 10:07:49,721 INFO L128 BoogieDeclarations]: Found specification of procedure rand_r [2018-04-13 10:07:49,721 INFO L128 BoogieDeclarations]: Found specification of procedure drand48 [2018-04-13 10:07:49,721 INFO L128 BoogieDeclarations]: Found specification of procedure erand48 [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48 [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48 [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48 [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48 [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure srand48 [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure seed48 [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48 [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure drand48_r [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure erand48_r [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure lrand48_r [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure nrand48_r [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure mrand48_r [2018-04-13 10:07:49,722 INFO L128 BoogieDeclarations]: Found specification of procedure jrand48_r [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure srand48_r [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure seed48_r [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure lcong48_r [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure calloc [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure realloc [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure cfree [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure alloca [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure valloc [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure posix_memalign [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure abort [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure atexit [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure on_exit [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure exit [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure _Exit [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure getenv [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure putenv [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure setenv [2018-04-13 10:07:49,723 INFO L128 BoogieDeclarations]: Found specification of procedure unsetenv [2018-04-13 10:07:49,724 INFO L128 BoogieDeclarations]: Found specification of procedure clearenv [2018-04-13 10:07:49,724 INFO L128 BoogieDeclarations]: Found specification of procedure mktemp [2018-04-13 10:07:49,724 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemp [2018-04-13 10:07:49,724 INFO L128 BoogieDeclarations]: Found specification of procedure mkstemps [2018-04-13 10:07:49,724 INFO L128 BoogieDeclarations]: Found specification of procedure mkdtemp [2018-04-13 10:07:49,724 INFO L128 BoogieDeclarations]: Found specification of procedure system [2018-04-13 10:07:49,724 INFO L128 BoogieDeclarations]: Found specification of procedure realpath [2018-04-13 10:07:49,724 INFO L128 BoogieDeclarations]: Found specification of procedure bsearch [2018-04-13 10:07:49,724 INFO L128 BoogieDeclarations]: Found specification of procedure qsort [2018-04-13 10:07:49,724 INFO L128 BoogieDeclarations]: Found specification of procedure abs [2018-04-13 10:07:49,724 INFO L128 BoogieDeclarations]: Found specification of procedure labs [2018-04-13 10:07:49,724 INFO L128 BoogieDeclarations]: Found specification of procedure llabs [2018-04-13 10:07:49,725 INFO L128 BoogieDeclarations]: Found specification of procedure div [2018-04-13 10:07:49,725 INFO L128 BoogieDeclarations]: Found specification of procedure ldiv [2018-04-13 10:07:49,725 INFO L128 BoogieDeclarations]: Found specification of procedure lldiv [2018-04-13 10:07:49,725 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt [2018-04-13 10:07:49,725 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt [2018-04-13 10:07:49,725 INFO L128 BoogieDeclarations]: Found specification of procedure gcvt [2018-04-13 10:07:49,725 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt [2018-04-13 10:07:49,725 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt [2018-04-13 10:07:49,725 INFO L128 BoogieDeclarations]: Found specification of procedure qgcvt [2018-04-13 10:07:49,725 INFO L128 BoogieDeclarations]: Found specification of procedure ecvt_r [2018-04-13 10:07:49,726 INFO L128 BoogieDeclarations]: Found specification of procedure fcvt_r [2018-04-13 10:07:49,726 INFO L128 BoogieDeclarations]: Found specification of procedure qecvt_r [2018-04-13 10:07:49,726 INFO L128 BoogieDeclarations]: Found specification of procedure qfcvt_r [2018-04-13 10:07:49,726 INFO L128 BoogieDeclarations]: Found specification of procedure mblen [2018-04-13 10:07:49,726 INFO L128 BoogieDeclarations]: Found specification of procedure mbtowc [2018-04-13 10:07:49,726 INFO L128 BoogieDeclarations]: Found specification of procedure wctomb [2018-04-13 10:07:49,726 INFO L128 BoogieDeclarations]: Found specification of procedure mbstowcs [2018-04-13 10:07:49,726 INFO L128 BoogieDeclarations]: Found specification of procedure wcstombs [2018-04-13 10:07:49,726 INFO L128 BoogieDeclarations]: Found specification of procedure rpmatch [2018-04-13 10:07:49,726 INFO L128 BoogieDeclarations]: Found specification of procedure getsubopt [2018-04-13 10:07:49,726 INFO L128 BoogieDeclarations]: Found specification of procedure getloadavg [2018-04-13 10:07:49,727 INFO L128 BoogieDeclarations]: Found specification of procedure kfree [2018-04-13 10:07:49,727 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-04-13 10:07:49,727 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_pointer [2018-04-13 10:07:49,727 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_nonpositive [2018-04-13 10:07:49,727 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_positive [2018-04-13 10:07:49,727 INFO L128 BoogieDeclarations]: Found specification of procedure memcpy [2018-04-13 10:07:49,727 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-04-13 10:07:49,727 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_malloc [2018-04-13 10:07:49,727 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-04-13 10:07:49,727 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_zalloc [2018-04-13 10:07:49,727 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.meminit [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEAD [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_add [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_del [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tail [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_del [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_alloc [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fill [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_free [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-04-13 10:07:49,728 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_submit_msg [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgs [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdata [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdata [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_return [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_return [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_sub [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_init [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_get [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_put [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_del [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanup [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_release [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_put [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_get [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_init_internal [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_init [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_create [2018-04-13 10:07:49,729 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-04-13 10:07:49,730 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__f [2018-04-13 10:07:49,730 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__g [2018-04-13 10:07:49,730 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17 [2018-04-13 10:07:49,730 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17 [2018-04-13 10:07:49,730 INFO L128 BoogieDeclarations]: Found specification of procedure __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_point [2018-04-13 10:07:49,730 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-04-13 10:07:49,730 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-04-13 10:07:49,730 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-04-13 10:07:49,730 INFO L128 BoogieDeclarations]: Found specification of procedure write~unchecked~int [2018-04-13 10:07:50,143 WARN L446 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-04-13 10:07:50,207 WARN L446 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-04-13 10:07:50,445 INFO L259 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-04-13 10:07:50,446 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.04 10:07:50 BoogieIcfgContainer [2018-04-13 10:07:50,446 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-04-13 10:07:50,446 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-04-13 10:07:50,447 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-04-13 10:07:50,449 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-04-13 10:07:50,449 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 13.04 10:07:49" (1/3) ... [2018-04-13 10:07:50,450 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@50fbb4d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.04 10:07:50, skipping insertion in model container [2018-04-13 10:07:50,450 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 13.04 10:07:49" (2/3) ... [2018-04-13 10:07:50,450 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@50fbb4d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 13.04 10:07:50, skipping insertion in model container [2018-04-13 10:07:50,450 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 13.04 10:07:50" (3/3) ... [2018-04-13 10:07:50,451 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test17_1_true-valid-memsafety_true-termination.i [2018-04-13 10:07:50,457 INFO L131 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-04-13 10:07:50,463 INFO L143 ceAbstractionStarter]: Appying trace abstraction to program that has 87 error locations. [2018-04-13 10:07:50,485 INFO L128 ementStrategyFactory]: Using default assertion order modulation [2018-04-13 10:07:50,485 INFO L369 AbstractCegarLoop]: Interprodecural is true [2018-04-13 10:07:50,486 INFO L370 AbstractCegarLoop]: Hoare is false [2018-04-13 10:07:50,486 INFO L371 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-04-13 10:07:50,486 INFO L372 AbstractCegarLoop]: Backedges is TWOTRACK [2018-04-13 10:07:50,486 INFO L373 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-04-13 10:07:50,486 INFO L374 AbstractCegarLoop]: Difference is false [2018-04-13 10:07:50,486 INFO L375 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-04-13 10:07:50,486 INFO L380 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-04-13 10:07:50,486 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-04-13 10:07:50,497 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states. [2018-04-13 10:07:50,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-04-13 10:07:50,503 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:50,503 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-04-13 10:07:50,504 INFO L408 AbstractCegarLoop]: === Iteration 1 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:50,507 INFO L82 PathProgramCache]: Analyzing trace with hash 17087150, now seen corresponding path program 1 times [2018-04-13 10:07:50,508 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:50,508 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:50,541 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:50,541 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:50,541 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:50,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:50,566 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:50,595 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:50,596 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:07:50,596 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-13 10:07:50,598 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-13 10:07:50,605 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-13 10:07:50,605 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 10:07:50,607 INFO L87 Difference]: Start difference. First operand 158 states. Second operand 3 states. [2018-04-13 10:07:50,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:50,700 INFO L93 Difference]: Finished difference Result 127 states and 136 transitions. [2018-04-13 10:07:50,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-13 10:07:50,704 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-04-13 10:07:50,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:50,713 INFO L225 Difference]: With dead ends: 127 [2018-04-13 10:07:50,713 INFO L226 Difference]: Without dead ends: 121 [2018-04-13 10:07:50,715 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 10:07:50,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-04-13 10:07:50,749 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 84. [2018-04-13 10:07:50,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-04-13 10:07:50,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 91 transitions. [2018-04-13 10:07:50,753 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 91 transitions. Word has length 4 [2018-04-13 10:07:50,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:50,753 INFO L459 AbstractCegarLoop]: Abstraction has 84 states and 91 transitions. [2018-04-13 10:07:50,753 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-13 10:07:50,753 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 91 transitions. [2018-04-13 10:07:50,753 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-04-13 10:07:50,753 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:50,754 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-04-13 10:07:50,754 INFO L408 AbstractCegarLoop]: === Iteration 2 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:50,754 INFO L82 PathProgramCache]: Analyzing trace with hash 17087151, now seen corresponding path program 1 times [2018-04-13 10:07:50,754 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:50,754 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:50,756 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:50,756 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:50,756 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:50,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:50,767 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:50,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:50,783 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:07:50,783 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-13 10:07:50,784 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-13 10:07:50,785 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-13 10:07:50,785 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 10:07:50,785 INFO L87 Difference]: Start difference. First operand 84 states and 91 transitions. Second operand 3 states. [2018-04-13 10:07:50,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:50,830 INFO L93 Difference]: Finished difference Result 152 states and 168 transitions. [2018-04-13 10:07:50,831 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-13 10:07:50,831 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-04-13 10:07:50,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:50,832 INFO L225 Difference]: With dead ends: 152 [2018-04-13 10:07:50,832 INFO L226 Difference]: Without dead ends: 152 [2018-04-13 10:07:50,832 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 10:07:50,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-04-13 10:07:50,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 82. [2018-04-13 10:07:50,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-04-13 10:07:50,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 89 transitions. [2018-04-13 10:07:50,837 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 89 transitions. Word has length 4 [2018-04-13 10:07:50,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:50,838 INFO L459 AbstractCegarLoop]: Abstraction has 82 states and 89 transitions. [2018-04-13 10:07:50,838 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-13 10:07:50,838 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 89 transitions. [2018-04-13 10:07:50,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-13 10:07:50,838 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:50,838 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:50,838 INFO L408 AbstractCegarLoop]: === Iteration 3 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:50,838 INFO L82 PathProgramCache]: Analyzing trace with hash 434438555, now seen corresponding path program 1 times [2018-04-13 10:07:50,838 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:50,839 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:50,840 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:50,840 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:50,840 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:50,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:50,854 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:50,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:50,883 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:07:50,883 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-04-13 10:07:50,883 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-04-13 10:07:50,884 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-04-13 10:07:50,884 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 10:07:50,884 INFO L87 Difference]: Start difference. First operand 82 states and 89 transitions. Second operand 3 states. [2018-04-13 10:07:50,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:50,975 INFO L93 Difference]: Finished difference Result 139 states and 158 transitions. [2018-04-13 10:07:50,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-04-13 10:07:50,976 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2018-04-13 10:07:50,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:50,977 INFO L225 Difference]: With dead ends: 139 [2018-04-13 10:07:50,977 INFO L226 Difference]: Without dead ends: 136 [2018-04-13 10:07:50,978 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-04-13 10:07:50,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-04-13 10:07:50,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 86. [2018-04-13 10:07:50,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-04-13 10:07:50,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 94 transitions. [2018-04-13 10:07:50,985 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 94 transitions. Word has length 20 [2018-04-13 10:07:50,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:50,986 INFO L459 AbstractCegarLoop]: Abstraction has 86 states and 94 transitions. [2018-04-13 10:07:50,986 INFO L460 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-04-13 10:07:50,986 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 94 transitions. [2018-04-13 10:07:50,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-04-13 10:07:50,986 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:50,986 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:50,986 INFO L408 AbstractCegarLoop]: === Iteration 4 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:50,987 INFO L82 PathProgramCache]: Analyzing trace with hash 433602795, now seen corresponding path program 1 times [2018-04-13 10:07:50,987 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:50,987 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:50,988 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:50,988 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:50,988 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:51,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:51,003 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:51,041 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:51,041 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:07:51,041 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 10:07:51,041 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-13 10:07:51,042 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-13 10:07:51,042 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-13 10:07:51,042 INFO L87 Difference]: Start difference. First operand 86 states and 94 transitions. Second operand 5 states. [2018-04-13 10:07:51,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:51,054 INFO L93 Difference]: Finished difference Result 88 states and 95 transitions. [2018-04-13 10:07:51,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 10:07:51,054 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2018-04-13 10:07:51,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:51,055 INFO L225 Difference]: With dead ends: 88 [2018-04-13 10:07:51,055 INFO L226 Difference]: Without dead ends: 86 [2018-04-13 10:07:51,055 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-13 10:07:51,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-04-13 10:07:51,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 84. [2018-04-13 10:07:51,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-04-13 10:07:51,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 91 transitions. [2018-04-13 10:07:51,058 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 91 transitions. Word has length 20 [2018-04-13 10:07:51,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:51,059 INFO L459 AbstractCegarLoop]: Abstraction has 84 states and 91 transitions. [2018-04-13 10:07:51,059 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-13 10:07:51,059 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 91 transitions. [2018-04-13 10:07:51,059 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-13 10:07:51,059 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:51,059 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:51,059 INFO L408 AbstractCegarLoop]: === Iteration 5 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:51,059 INFO L82 PathProgramCache]: Analyzing trace with hash -1273791971, now seen corresponding path program 1 times [2018-04-13 10:07:51,059 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:51,059 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:51,060 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:51,061 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:51,061 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:51,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:51,076 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:51,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:51,099 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:07:51,099 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-13 10:07:51,099 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 10:07:51,099 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 10:07:51,099 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-13 10:07:51,100 INFO L87 Difference]: Start difference. First operand 84 states and 91 transitions. Second operand 6 states. [2018-04-13 10:07:51,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:51,121 INFO L93 Difference]: Finished difference Result 84 states and 90 transitions. [2018-04-13 10:07:51,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-13 10:07:51,121 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2018-04-13 10:07:51,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:51,122 INFO L225 Difference]: With dead ends: 84 [2018-04-13 10:07:51,122 INFO L226 Difference]: Without dead ends: 84 [2018-04-13 10:07:51,122 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-13 10:07:51,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-04-13 10:07:51,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 84. [2018-04-13 10:07:51,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-04-13 10:07:51,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 90 transitions. [2018-04-13 10:07:51,125 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 90 transitions. Word has length 22 [2018-04-13 10:07:51,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:51,125 INFO L459 AbstractCegarLoop]: Abstraction has 84 states and 90 transitions. [2018-04-13 10:07:51,125 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 10:07:51,126 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 90 transitions. [2018-04-13 10:07:51,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-13 10:07:51,126 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:51,126 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:51,126 INFO L408 AbstractCegarLoop]: === Iteration 6 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:51,126 INFO L82 PathProgramCache]: Analyzing trace with hash -1274627731, now seen corresponding path program 1 times [2018-04-13 10:07:51,126 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:51,126 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:51,127 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:51,127 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:51,127 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:51,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:51,135 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:51,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:51,185 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:07:51,185 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 10:07:51,185 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 10:07:51,186 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 10:07:51,186 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-13 10:07:51,186 INFO L87 Difference]: Start difference. First operand 84 states and 90 transitions. Second operand 6 states. [2018-04-13 10:07:51,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:51,246 INFO L93 Difference]: Finished difference Result 83 states and 89 transitions. [2018-04-13 10:07:51,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-13 10:07:51,247 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2018-04-13 10:07:51,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:51,247 INFO L225 Difference]: With dead ends: 83 [2018-04-13 10:07:51,248 INFO L226 Difference]: Without dead ends: 83 [2018-04-13 10:07:51,248 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-04-13 10:07:51,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-04-13 10:07:51,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2018-04-13 10:07:51,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-04-13 10:07:51,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 89 transitions. [2018-04-13 10:07:51,252 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 89 transitions. Word has length 22 [2018-04-13 10:07:51,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:51,253 INFO L459 AbstractCegarLoop]: Abstraction has 83 states and 89 transitions. [2018-04-13 10:07:51,253 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 10:07:51,253 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 89 transitions. [2018-04-13 10:07:51,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-04-13 10:07:51,253 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:51,253 INFO L355 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:51,254 INFO L408 AbstractCegarLoop]: === Iteration 7 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:51,254 INFO L82 PathProgramCache]: Analyzing trace with hash -1274627730, now seen corresponding path program 1 times [2018-04-13 10:07:51,254 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:51,254 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:51,255 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:51,256 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:51,256 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:51,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:51,272 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:51,385 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:51,385 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:07:51,385 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-04-13 10:07:51,386 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-13 10:07:51,386 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-13 10:07:51,386 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2018-04-13 10:07:51,386 INFO L87 Difference]: Start difference. First operand 83 states and 89 transitions. Second operand 9 states. [2018-04-13 10:07:51,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:51,547 INFO L93 Difference]: Finished difference Result 87 states and 93 transitions. [2018-04-13 10:07:51,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-13 10:07:51,548 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 22 [2018-04-13 10:07:51,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:51,549 INFO L225 Difference]: With dead ends: 87 [2018-04-13 10:07:51,549 INFO L226 Difference]: Without dead ends: 87 [2018-04-13 10:07:51,549 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=142, Unknown=0, NotChecked=0, Total=182 [2018-04-13 10:07:51,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-04-13 10:07:51,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 86. [2018-04-13 10:07:51,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-04-13 10:07:51,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 92 transitions. [2018-04-13 10:07:51,553 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 92 transitions. Word has length 22 [2018-04-13 10:07:51,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:51,553 INFO L459 AbstractCegarLoop]: Abstraction has 86 states and 92 transitions. [2018-04-13 10:07:51,554 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-13 10:07:51,554 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 92 transitions. [2018-04-13 10:07:51,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-04-13 10:07:51,554 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:51,554 INFO L355 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:51,555 INFO L408 AbstractCegarLoop]: === Iteration 8 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:51,555 INFO L82 PathProgramCache]: Analyzing trace with hash 1987697797, now seen corresponding path program 1 times [2018-04-13 10:07:51,555 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:51,555 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:51,556 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:51,556 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:51,556 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:51,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:51,568 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:51,696 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:51,696 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:07:51,696 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:07:51,697 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:51,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:51,733 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:07:51,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:07:51,767 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:51,784 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:07:51,785 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:51,803 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:07:51,804 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:50, output treesize:48 [2018-04-13 10:07:52,081 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:52,082 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:07:52,082 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 16 [2018-04-13 10:07:52,082 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-04-13 10:07:52,082 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-04-13 10:07:52,083 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2018-04-13 10:07:52,083 INFO L87 Difference]: Start difference. First operand 86 states and 92 transitions. Second operand 17 states. [2018-04-13 10:07:52,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:52,450 INFO L93 Difference]: Finished difference Result 91 states and 97 transitions. [2018-04-13 10:07:52,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-13 10:07:52,451 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 26 [2018-04-13 10:07:52,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:52,451 INFO L225 Difference]: With dead ends: 91 [2018-04-13 10:07:52,452 INFO L226 Difference]: Without dead ends: 91 [2018-04-13 10:07:52,452 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 17 SyntacticMatches, 3 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=86, Invalid=420, Unknown=0, NotChecked=0, Total=506 [2018-04-13 10:07:52,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-04-13 10:07:52,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 90. [2018-04-13 10:07:52,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-04-13 10:07:52,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 96 transitions. [2018-04-13 10:07:52,456 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 96 transitions. Word has length 26 [2018-04-13 10:07:52,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:52,456 INFO L459 AbstractCegarLoop]: Abstraction has 90 states and 96 transitions. [2018-04-13 10:07:52,456 INFO L460 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-04-13 10:07:52,456 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 96 transitions. [2018-04-13 10:07:52,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-04-13 10:07:52,457 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:52,457 INFO L355 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:52,457 INFO L408 AbstractCegarLoop]: === Iteration 9 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:52,457 INFO L82 PathProgramCache]: Analyzing trace with hash -1243112420, now seen corresponding path program 2 times [2018-04-13 10:07:52,457 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:52,457 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:52,459 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:52,459 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:52,459 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:52,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:52,471 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:52,632 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 5 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:52,632 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:07:52,632 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:07:52,633 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:07:52,653 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:07:52,653 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:07:52,656 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:07:52,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:07:52,677 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:52,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:07:52,694 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:52,709 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:07:52,709 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:50, output treesize:48 [2018-04-13 10:07:53,015 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 8 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:53,015 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:07:53,015 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11] total 21 [2018-04-13 10:07:53,015 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-13 10:07:53,016 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-13 10:07:53,016 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=375, Unknown=0, NotChecked=0, Total=462 [2018-04-13 10:07:53,016 INFO L87 Difference]: Start difference. First operand 90 states and 96 transitions. Second operand 22 states. [2018-04-13 10:07:53,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:53,363 INFO L93 Difference]: Finished difference Result 90 states and 96 transitions. [2018-04-13 10:07:53,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-13 10:07:53,363 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 30 [2018-04-13 10:07:53,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:53,364 INFO L225 Difference]: With dead ends: 90 [2018-04-13 10:07:53,364 INFO L226 Difference]: Without dead ends: 90 [2018-04-13 10:07:53,365 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 20 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 76 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=129, Invalid=521, Unknown=0, NotChecked=0, Total=650 [2018-04-13 10:07:53,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-04-13 10:07:53,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 88. [2018-04-13 10:07:53,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-04-13 10:07:53,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 94 transitions. [2018-04-13 10:07:53,369 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 94 transitions. Word has length 30 [2018-04-13 10:07:53,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:53,369 INFO L459 AbstractCegarLoop]: Abstraction has 88 states and 94 transitions. [2018-04-13 10:07:53,369 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-13 10:07:53,369 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 94 transitions. [2018-04-13 10:07:53,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-04-13 10:07:53,370 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:53,370 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:53,370 INFO L408 AbstractCegarLoop]: === Iteration 10 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:53,370 INFO L82 PathProgramCache]: Analyzing trace with hash -219155563, now seen corresponding path program 1 times [2018-04-13 10:07:53,371 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:53,371 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:53,372 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:53,372 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:07:53,372 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:53,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:53,380 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:53,405 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-04-13 10:07:53,406 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:07:53,406 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 10:07:53,406 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-13 10:07:53,406 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-13 10:07:53,406 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-13 10:07:53,406 INFO L87 Difference]: Start difference. First operand 88 states and 94 transitions. Second operand 5 states. [2018-04-13 10:07:53,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:53,416 INFO L93 Difference]: Finished difference Result 92 states and 98 transitions. [2018-04-13 10:07:53,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 10:07:53,416 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2018-04-13 10:07:53,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:53,417 INFO L225 Difference]: With dead ends: 92 [2018-04-13 10:07:53,417 INFO L226 Difference]: Without dead ends: 92 [2018-04-13 10:07:53,417 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-13 10:07:53,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-04-13 10:07:53,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 90. [2018-04-13 10:07:53,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-04-13 10:07:53,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 96 transitions. [2018-04-13 10:07:53,421 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 96 transitions. Word has length 41 [2018-04-13 10:07:53,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:53,421 INFO L459 AbstractCegarLoop]: Abstraction has 90 states and 96 transitions. [2018-04-13 10:07:53,421 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-13 10:07:53,421 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 96 transitions. [2018-04-13 10:07:53,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-04-13 10:07:53,422 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:53,422 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:53,422 INFO L408 AbstractCegarLoop]: === Iteration 11 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:53,422 INFO L82 PathProgramCache]: Analyzing trace with hash -868742158, now seen corresponding path program 1 times [2018-04-13 10:07:53,423 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:53,423 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:53,424 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:53,424 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:53,424 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:53,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:53,431 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:53,456 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-04-13 10:07:53,456 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:07:53,456 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 10:07:53,456 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 10:07:53,456 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 10:07:53,457 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-13 10:07:53,457 INFO L87 Difference]: Start difference. First operand 90 states and 96 transitions. Second operand 6 states. [2018-04-13 10:07:53,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:53,548 INFO L93 Difference]: Finished difference Result 140 states and 153 transitions. [2018-04-13 10:07:53,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-13 10:07:53,549 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2018-04-13 10:07:53,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:53,550 INFO L225 Difference]: With dead ends: 140 [2018-04-13 10:07:53,550 INFO L226 Difference]: Without dead ends: 140 [2018-04-13 10:07:53,550 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-04-13 10:07:53,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-04-13 10:07:53,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 116. [2018-04-13 10:07:53,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-04-13 10:07:53,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 131 transitions. [2018-04-13 10:07:53,552 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 131 transitions. Word has length 42 [2018-04-13 10:07:53,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:53,553 INFO L459 AbstractCegarLoop]: Abstraction has 116 states and 131 transitions. [2018-04-13 10:07:53,553 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 10:07:53,553 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 131 transitions. [2018-04-13 10:07:53,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-04-13 10:07:53,553 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:53,553 INFO L355 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:53,553 INFO L408 AbstractCegarLoop]: === Iteration 12 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:53,554 INFO L82 PathProgramCache]: Analyzing trace with hash -868742157, now seen corresponding path program 1 times [2018-04-13 10:07:53,554 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:53,554 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:53,554 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:53,554 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:53,554 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:53,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:53,564 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:53,603 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:53,603 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:07:53,603 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:07:53,604 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:53,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:53,618 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:07:53,642 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:53,642 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:07:53,643 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 9 [2018-04-13 10:07:53,643 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-13 10:07:53,643 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-13 10:07:53,643 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=39, Unknown=0, NotChecked=0, Total=72 [2018-04-13 10:07:53,643 INFO L87 Difference]: Start difference. First operand 116 states and 131 transitions. Second operand 9 states. [2018-04-13 10:07:53,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:53,669 INFO L93 Difference]: Finished difference Result 122 states and 137 transitions. [2018-04-13 10:07:53,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-13 10:07:53,671 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 42 [2018-04-13 10:07:53,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:53,672 INFO L225 Difference]: With dead ends: 122 [2018-04-13 10:07:53,672 INFO L226 Difference]: Without dead ends: 122 [2018-04-13 10:07:53,673 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 47 GetRequests, 40 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=39, Unknown=0, NotChecked=0, Total=72 [2018-04-13 10:07:53,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-04-13 10:07:53,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 120. [2018-04-13 10:07:53,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-04-13 10:07:53,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 135 transitions. [2018-04-13 10:07:53,676 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 135 transitions. Word has length 42 [2018-04-13 10:07:53,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:53,676 INFO L459 AbstractCegarLoop]: Abstraction has 120 states and 135 transitions. [2018-04-13 10:07:53,676 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-13 10:07:53,677 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 135 transitions. [2018-04-13 10:07:53,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-04-13 10:07:53,677 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:53,677 INFO L355 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:53,678 INFO L408 AbstractCegarLoop]: === Iteration 13 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:53,678 INFO L82 PathProgramCache]: Analyzing trace with hash -495338102, now seen corresponding path program 2 times [2018-04-13 10:07:53,678 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:53,678 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:53,679 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:53,679 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:53,679 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:53,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:53,688 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:53,723 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:53,723 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:07:53,723 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:07:53,724 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:07:53,734 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2018-04-13 10:07:53,734 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:07:53,736 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:07:53,761 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-04-13 10:07:53,761 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:07:53,761 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [7] total 9 [2018-04-13 10:07:53,761 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-13 10:07:53,762 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-13 10:07:53,762 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-04-13 10:07:53,762 INFO L87 Difference]: Start difference. First operand 120 states and 135 transitions. Second operand 9 states. [2018-04-13 10:07:53,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:53,867 INFO L93 Difference]: Finished difference Result 153 states and 169 transitions. [2018-04-13 10:07:53,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-13 10:07:53,867 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 46 [2018-04-13 10:07:53,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:53,868 INFO L225 Difference]: With dead ends: 153 [2018-04-13 10:07:53,868 INFO L226 Difference]: Without dead ends: 150 [2018-04-13 10:07:53,869 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 45 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2018-04-13 10:07:53,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-04-13 10:07:53,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 123. [2018-04-13 10:07:53,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-04-13 10:07:53,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 137 transitions. [2018-04-13 10:07:53,873 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 137 transitions. Word has length 46 [2018-04-13 10:07:53,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:53,873 INFO L459 AbstractCegarLoop]: Abstraction has 123 states and 137 transitions. [2018-04-13 10:07:53,873 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-13 10:07:53,873 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 137 transitions. [2018-04-13 10:07:53,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-04-13 10:07:53,874 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:53,874 INFO L355 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:53,874 INFO L408 AbstractCegarLoop]: === Iteration 14 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:53,874 INFO L82 PathProgramCache]: Analyzing trace with hash -1919435927, now seen corresponding path program 1 times [2018-04-13 10:07:53,875 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:53,875 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:53,875 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:53,876 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:07:53,876 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:53,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:53,888 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:53,963 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-13 10:07:53,964 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:07:53,964 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:07:53,965 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:53,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:53,980 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:07:54,028 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 6 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:54,028 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:07:54,028 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 13 [2018-04-13 10:07:54,028 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-04-13 10:07:54,028 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-04-13 10:07:54,029 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-04-13 10:07:54,029 INFO L87 Difference]: Start difference. First operand 123 states and 137 transitions. Second operand 13 states. [2018-04-13 10:07:54,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:54,057 INFO L93 Difference]: Finished difference Result 129 states and 143 transitions. [2018-04-13 10:07:54,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-13 10:07:54,059 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 51 [2018-04-13 10:07:54,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:54,060 INFO L225 Difference]: With dead ends: 129 [2018-04-13 10:07:54,060 INFO L226 Difference]: Without dead ends: 129 [2018-04-13 10:07:54,060 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-04-13 10:07:54,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-04-13 10:07:54,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 127. [2018-04-13 10:07:54,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-04-13 10:07:54,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 141 transitions. [2018-04-13 10:07:54,064 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 141 transitions. Word has length 51 [2018-04-13 10:07:54,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:54,064 INFO L459 AbstractCegarLoop]: Abstraction has 127 states and 141 transitions. [2018-04-13 10:07:54,064 INFO L460 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-04-13 10:07:54,064 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 141 transitions. [2018-04-13 10:07:54,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-04-13 10:07:54,065 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:54,065 INFO L355 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:54,066 INFO L408 AbstractCegarLoop]: === Iteration 15 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:54,066 INFO L82 PathProgramCache]: Analyzing trace with hash -822156366, now seen corresponding path program 2 times [2018-04-13 10:07:54,066 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:54,066 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:54,067 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:54,067 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:54,067 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:54,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:54,077 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:54,118 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-13 10:07:54,118 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:07:54,118 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:07:54,119 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:07:54,134 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:07:54,134 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:07:54,136 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:07:54,196 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 6 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:54,196 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:07:54,196 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 15 [2018-04-13 10:07:54,196 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-13 10:07:54,196 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-13 10:07:54,197 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=120, Unknown=0, NotChecked=0, Total=210 [2018-04-13 10:07:54,197 INFO L87 Difference]: Start difference. First operand 127 states and 141 transitions. Second operand 15 states. [2018-04-13 10:07:54,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:54,267 INFO L93 Difference]: Finished difference Result 133 states and 147 transitions. [2018-04-13 10:07:54,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-13 10:07:54,267 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 55 [2018-04-13 10:07:54,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:54,268 INFO L225 Difference]: With dead ends: 133 [2018-04-13 10:07:54,268 INFO L226 Difference]: Without dead ends: 133 [2018-04-13 10:07:54,268 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 50 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=120, Unknown=0, NotChecked=0, Total=210 [2018-04-13 10:07:54,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-04-13 10:07:54,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 131. [2018-04-13 10:07:54,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-04-13 10:07:54,283 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 145 transitions. [2018-04-13 10:07:54,283 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 145 transitions. Word has length 55 [2018-04-13 10:07:54,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:54,283 INFO L459 AbstractCegarLoop]: Abstraction has 131 states and 145 transitions. [2018-04-13 10:07:54,283 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-13 10:07:54,283 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 145 transitions. [2018-04-13 10:07:54,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-04-13 10:07:54,284 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:54,284 INFO L355 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:54,284 INFO L408 AbstractCegarLoop]: === Iteration 16 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:54,284 INFO L82 PathProgramCache]: Analyzing trace with hash 1016512379, now seen corresponding path program 3 times [2018-04-13 10:07:54,284 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:54,284 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:54,285 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:54,285 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:07:54,285 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:54,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:54,292 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:54,345 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-13 10:07:54,345 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:07:54,345 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:07:54,346 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:07:54,361 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-04-13 10:07:54,361 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:07:54,363 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:07:54,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:07:54,368 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:54,369 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:07:54,369 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:07:54,439 WARN L1033 $PredicateComparison]: unable to prove that (exists ((|__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_malloc_#t~malloc12.base| Int)) (= |c_#valid| (store |c_old(#valid)| |__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_malloc_#t~malloc12.base| 1))) is different from true [2018-04-13 10:07:54,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:07:54,444 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:54,446 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:07:54,446 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:11 [2018-04-13 10:07:54,457 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 3 not checked. [2018-04-13 10:07:54,457 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:07:54,457 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 18 [2018-04-13 10:07:54,457 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-13 10:07:54,457 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-13 10:07:54,457 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=220, Unknown=1, NotChecked=30, Total=306 [2018-04-13 10:07:54,458 INFO L87 Difference]: Start difference. First operand 131 states and 145 transitions. Second operand 18 states. [2018-04-13 10:07:54,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:54,816 INFO L93 Difference]: Finished difference Result 168 states and 185 transitions. [2018-04-13 10:07:54,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 10:07:54,816 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 59 [2018-04-13 10:07:54,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:54,817 INFO L225 Difference]: With dead ends: 168 [2018-04-13 10:07:54,817 INFO L226 Difference]: Without dead ends: 168 [2018-04-13 10:07:54,817 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 51 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 163 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=174, Invalid=820, Unknown=2, NotChecked=60, Total=1056 [2018-04-13 10:07:54,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-04-13 10:07:54,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 140. [2018-04-13 10:07:54,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-04-13 10:07:54,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 157 transitions. [2018-04-13 10:07:54,822 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 157 transitions. Word has length 59 [2018-04-13 10:07:54,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:54,822 INFO L459 AbstractCegarLoop]: Abstraction has 140 states and 157 transitions. [2018-04-13 10:07:54,822 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-13 10:07:54,822 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 157 transitions. [2018-04-13 10:07:54,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-04-13 10:07:54,823 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:54,823 INFO L355 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:54,823 INFO L408 AbstractCegarLoop]: === Iteration 17 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:54,823 INFO L82 PathProgramCache]: Analyzing trace with hash 534351557, now seen corresponding path program 1 times [2018-04-13 10:07:54,823 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:54,823 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:54,824 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:54,824 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:07:54,824 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:54,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:54,835 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:54,882 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-13 10:07:54,882 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:07:54,882 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:07:54,882 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:54,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:54,896 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:07:54,961 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 6 proven. 98 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:54,961 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:07:54,961 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 19 [2018-04-13 10:07:54,962 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-13 10:07:54,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-13 10:07:54,962 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=143, Invalid=199, Unknown=0, NotChecked=0, Total=342 [2018-04-13 10:07:54,962 INFO L87 Difference]: Start difference. First operand 140 states and 157 transitions. Second operand 19 states. [2018-04-13 10:07:55,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:55,024 INFO L93 Difference]: Finished difference Result 146 states and 163 transitions. [2018-04-13 10:07:55,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-13 10:07:55,024 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 63 [2018-04-13 10:07:55,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:55,025 INFO L225 Difference]: With dead ends: 146 [2018-04-13 10:07:55,025 INFO L226 Difference]: Without dead ends: 146 [2018-04-13 10:07:55,025 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 109 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=143, Invalid=199, Unknown=0, NotChecked=0, Total=342 [2018-04-13 10:07:55,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-04-13 10:07:55,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 144. [2018-04-13 10:07:55,028 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-04-13 10:07:55,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 161 transitions. [2018-04-13 10:07:55,028 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 161 transitions. Word has length 63 [2018-04-13 10:07:55,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:55,029 INFO L459 AbstractCegarLoop]: Abstraction has 144 states and 161 transitions. [2018-04-13 10:07:55,029 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-13 10:07:55,029 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 161 transitions. [2018-04-13 10:07:55,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-04-13 10:07:55,029 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:55,029 INFO L355 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:55,029 INFO L408 AbstractCegarLoop]: === Iteration 18 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:55,029 INFO L82 PathProgramCache]: Analyzing trace with hash -81686130, now seen corresponding path program 2 times [2018-04-13 10:07:55,029 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:55,030 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:55,030 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:55,030 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:07:55,031 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:55,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:55,038 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:55,092 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-13 10:07:55,093 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:07:55,093 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:07:55,094 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:07:55,112 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:07:55,112 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:07:55,115 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:07:55,198 INFO L134 CoverageAnalysis]: Checked inductivity of 134 backedges. 6 proven. 128 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:07:55,199 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:07:55,199 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 21 [2018-04-13 10:07:55,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-13 10:07:55,199 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-13 10:07:55,199 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=246, Unknown=0, NotChecked=0, Total=420 [2018-04-13 10:07:55,200 INFO L87 Difference]: Start difference. First operand 144 states and 161 transitions. Second operand 21 states. [2018-04-13 10:07:55,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:07:55,270 INFO L93 Difference]: Finished difference Result 150 states and 167 transitions. [2018-04-13 10:07:55,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-13 10:07:55,270 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 67 [2018-04-13 10:07:55,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:07:55,271 INFO L225 Difference]: With dead ends: 150 [2018-04-13 10:07:55,271 INFO L226 Difference]: Without dead ends: 150 [2018-04-13 10:07:55,271 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 59 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=174, Invalid=246, Unknown=0, NotChecked=0, Total=420 [2018-04-13 10:07:55,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-04-13 10:07:55,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 148. [2018-04-13 10:07:55,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-04-13 10:07:55,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 165 transitions. [2018-04-13 10:07:55,274 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 165 transitions. Word has length 67 [2018-04-13 10:07:55,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:07:55,274 INFO L459 AbstractCegarLoop]: Abstraction has 148 states and 165 transitions. [2018-04-13 10:07:55,274 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-13 10:07:55,274 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 165 transitions. [2018-04-13 10:07:55,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-04-13 10:07:55,275 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:07:55,275 INFO L355 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:07:55,275 INFO L408 AbstractCegarLoop]: === Iteration 19 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:07:55,275 INFO L82 PathProgramCache]: Analyzing trace with hash 430507991, now seen corresponding path program 3 times [2018-04-13 10:07:55,275 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:07:55,275 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:07:55,276 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:55,276 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:07:55,276 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:07:55,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:07:55,283 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:07:55,371 INFO L134 CoverageAnalysis]: Checked inductivity of 168 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-13 10:07:55,372 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:07:55,372 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:07:55,372 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:07:55,388 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 2 check-sat command(s) [2018-04-13 10:07:55,389 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:07:55,391 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:07:55,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:07:55,409 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:55,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:07:55,423 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:55,437 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-04-13 10:07:55,437 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:55,438 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-13 10:07:55,439 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:55,450 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:07:55,451 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-04-13 10:07:55,665 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:07:55,667 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 38 [2018-04-13 10:07:55,667 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:55,698 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:07:55,698 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:07:55,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 50 [2018-04-13 10:07:55,700 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:55,731 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:07:55,732 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:07:55,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-04-13 10:07:55,733 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:55,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:07:55,764 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:07:55,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 35 [2018-04-13 10:07:55,765 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:07:55,787 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:07:55,787 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:73, output treesize:55 [2018-04-13 10:07:55,867 INFO L134 CoverageAnalysis]: Checked inductivity of 168 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-04-13 10:07:55,867 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:07:55,867 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 12] total 24 [2018-04-13 10:07:55,868 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-13 10:07:55,868 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-13 10:07:55,868 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=458, Unknown=2, NotChecked=0, Total=552 [2018-04-13 10:07:55,868 INFO L87 Difference]: Start difference. First operand 148 states and 165 transitions. Second operand 24 states. [2018-04-13 10:08:18,646 WARN L148 SmtUtils]: Spent 14085ms on a formula simplification that was a NOOP. DAG size: 52 [2018-04-13 10:08:40,999 WARN L151 SmtUtils]: Spent 22307ms on a formula simplification. DAG size of input: 56 DAG size of output 54 [2018-04-13 10:08:41,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:08:41,270 INFO L93 Difference]: Finished difference Result 237 states and 261 transitions. [2018-04-13 10:08:41,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-13 10:08:41,270 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 71 [2018-04-13 10:08:41,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:08:41,271 INFO L225 Difference]: With dead ends: 237 [2018-04-13 10:08:41,271 INFO L226 Difference]: Without dead ends: 237 [2018-04-13 10:08:41,272 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 349 ImplicationChecksByTransitivity, 37.6s TimeCoverageRelationStatistics Valid=332, Invalid=1644, Unknown=4, NotChecked=0, Total=1980 [2018-04-13 10:08:41,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-04-13 10:08:41,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 156. [2018-04-13 10:08:41,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-04-13 10:08:41,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 174 transitions. [2018-04-13 10:08:41,276 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 174 transitions. Word has length 71 [2018-04-13 10:08:41,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:08:41,276 INFO L459 AbstractCegarLoop]: Abstraction has 156 states and 174 transitions. [2018-04-13 10:08:41,276 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-13 10:08:41,277 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 174 transitions. [2018-04-13 10:08:41,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2018-04-13 10:08:41,277 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:08:41,277 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:08:41,278 INFO L408 AbstractCegarLoop]: === Iteration 20 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:08:41,278 INFO L82 PathProgramCache]: Analyzing trace with hash 513203346, now seen corresponding path program 1 times [2018-04-13 10:08:41,278 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:08:41,278 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:08:41,279 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:08:41,279 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:08:41,279 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:08:41,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:08:41,293 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:08:41,328 INFO L134 CoverageAnalysis]: Checked inductivity of 204 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:08:41,328 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:08:41,328 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-04-13 10:08:41,328 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-04-13 10:08:41,329 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-04-13 10:08:41,329 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-04-13 10:08:41,329 INFO L87 Difference]: Start difference. First operand 156 states and 174 transitions. Second operand 4 states. [2018-04-13 10:08:41,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:08:41,355 INFO L93 Difference]: Finished difference Result 165 states and 182 transitions. [2018-04-13 10:08:41,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 10:08:41,355 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 76 [2018-04-13 10:08:41,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:08:41,356 INFO L225 Difference]: With dead ends: 165 [2018-04-13 10:08:41,356 INFO L226 Difference]: Without dead ends: 165 [2018-04-13 10:08:41,356 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-04-13 10:08:41,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-04-13 10:08:41,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 159. [2018-04-13 10:08:41,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-04-13 10:08:41,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 176 transitions. [2018-04-13 10:08:41,360 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 176 transitions. Word has length 76 [2018-04-13 10:08:41,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:08:41,361 INFO L459 AbstractCegarLoop]: Abstraction has 159 states and 176 transitions. [2018-04-13 10:08:41,361 INFO L460 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-04-13 10:08:41,361 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 176 transitions. [2018-04-13 10:08:41,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-04-13 10:08:41,361 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:08:41,361 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:08:41,362 INFO L408 AbstractCegarLoop]: === Iteration 21 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:08:41,362 INFO L82 PathProgramCache]: Analyzing trace with hash -746527459, now seen corresponding path program 1 times [2018-04-13 10:08:41,362 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:08:41,362 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:08:41,363 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:08:41,363 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:08:41,363 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:08:41,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:08:41,375 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:08:41,516 INFO L134 CoverageAnalysis]: Checked inductivity of 204 backedges. 31 proven. 2 refuted. 0 times theorem prover too weak. 171 trivial. 0 not checked. [2018-04-13 10:08:41,517 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:08:41,517 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:08:41,517 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:08:41,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:08:41,541 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:08:41,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-04-13 10:08:41,566 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:08:41,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-13 10:08:41,582 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:08:41,595 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:08:41,595 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-04-13 10:08:41,843 INFO L134 CoverageAnalysis]: Checked inductivity of 204 backedges. 1 proven. 32 refuted. 0 times theorem prover too weak. 171 trivial. 0 not checked. [2018-04-13 10:08:41,843 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:08:41,843 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 22 [2018-04-13 10:08:41,843 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-13 10:08:41,843 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-13 10:08:41,843 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-04-13 10:08:41,843 INFO L87 Difference]: Start difference. First operand 159 states and 176 transitions. Second operand 23 states. [2018-04-13 10:08:42,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:08:42,430 INFO L93 Difference]: Finished difference Result 186 states and 201 transitions. [2018-04-13 10:08:42,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-04-13 10:08:42,430 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 84 [2018-04-13 10:08:42,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:08:42,431 INFO L225 Difference]: With dead ends: 186 [2018-04-13 10:08:42,431 INFO L226 Difference]: Without dead ends: 186 [2018-04-13 10:08:42,431 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 77 SyntacticMatches, 1 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 187 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=145, Invalid=1115, Unknown=0, NotChecked=0, Total=1260 [2018-04-13 10:08:42,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-04-13 10:08:42,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 167. [2018-04-13 10:08:42,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-04-13 10:08:42,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 186 transitions. [2018-04-13 10:08:42,434 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 186 transitions. Word has length 84 [2018-04-13 10:08:42,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:08:42,434 INFO L459 AbstractCegarLoop]: Abstraction has 167 states and 186 transitions. [2018-04-13 10:08:42,434 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-13 10:08:42,434 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 186 transitions. [2018-04-13 10:08:42,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-04-13 10:08:42,434 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:08:42,434 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:08:42,435 INFO L408 AbstractCegarLoop]: === Iteration 22 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:08:42,435 INFO L82 PathProgramCache]: Analyzing trace with hash -1667514707, now seen corresponding path program 1 times [2018-04-13 10:08:42,435 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:08:42,435 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:08:42,435 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:08:42,435 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:08:42,436 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:08:42,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:08:42,452 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:08:42,462 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:08:42,462 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:08:42,462 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:08:42,463 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:08:42,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:08:42,500 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:08:42,543 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:08:42,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:08:42,545 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:08:42,547 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:08:42,553 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:08:42,553 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:21 [2018-04-13 10:08:42,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-04-13 10:08:42,588 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:08:42,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-04-13 10:08:42,589 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:08:42,594 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:08:42,602 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:08:42,602 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:28 [2018-04-13 10:08:42,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-04-13 10:08:42,636 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:08:42,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 41 [2018-04-13 10:08:42,643 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:08:42,649 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:08:42,655 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:08:42,655 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:43, output treesize:39 [2018-04-13 10:08:46,402 WARN L148 SmtUtils]: Spent 1883ms on a formula simplification that was a NOOP. DAG size: 32 [2018-04-13 10:08:46,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:08:46,423 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:08:46,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:08:46,428 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:08:46,433 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:08:46,442 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:08:46,442 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:08:48,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:08:48,135 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:08:48,139 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:08:48,139 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:08:48,145 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:08:48,152 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:08:48,153 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:08:49,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:08:49,892 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:08:49,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:08:49,898 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:08:49,904 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:08:49,913 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:08:49,914 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:08:51,592 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:08:51,594 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:08:51,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:08:51,598 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:08:51,603 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:08:51,611 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:08:51,611 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:08:53,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:08:53,535 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:08:53,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:08:53,538 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:08:53,545 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:08:53,553 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:08:53,553 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:08:55,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:08:55,211 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:08:55,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:08:55,216 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:08:55,224 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:08:55,234 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:08:55,234 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:08:56,984 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:08:56,986 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:08:56,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:08:56,990 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:08:56,995 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:08:57,004 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:08:57,004 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:09:05,804 WARN L151 SmtUtils]: Spent 1031ms on a formula simplification. DAG size of input: 28 DAG size of output 19 [2018-04-13 10:09:05,844 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-04-13 10:09:05,846 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:09:05,846 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:09:05,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 25 [2018-04-13 10:09:05,847 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:09:05,850 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:05,854 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:09:05,854 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:44, output treesize:12 [2018-04-13 10:09:05,897 INFO L134 CoverageAnalysis]: Checked inductivity of 204 backedges. 31 proven. 66 refuted. 0 times theorem prover too weak. 107 trivial. 0 not checked. [2018-04-13 10:09:05,897 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:09:05,897 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-04-13 10:09:05,897 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-13 10:09:05,897 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-13 10:09:05,898 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=251, Unknown=4, NotChecked=0, Total=306 [2018-04-13 10:09:05,898 INFO L87 Difference]: Start difference. First operand 167 states and 186 transitions. Second operand 18 states. [2018-04-13 10:09:12,390 WARN L148 SmtUtils]: Spent 1663ms on a formula simplification that was a NOOP. DAG size: 33 [2018-04-13 10:09:25,571 WARN L151 SmtUtils]: Spent 8020ms on a formula simplification. DAG size of input: 37 DAG size of output 29 [2018-04-13 10:09:25,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:09:25,961 INFO L93 Difference]: Finished difference Result 213 states and 235 transitions. [2018-04-13 10:09:25,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-04-13 10:09:25,961 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 85 [2018-04-13 10:09:25,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:09:25,962 INFO L225 Difference]: With dead ends: 213 [2018-04-13 10:09:25,962 INFO L226 Difference]: Without dead ends: 213 [2018-04-13 10:09:25,963 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 55 SyntacticMatches, 14 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 39.1s TimeCoverageRelationStatistics Valid=146, Invalid=902, Unknown=8, NotChecked=0, Total=1056 [2018-04-13 10:09:25,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-04-13 10:09:25,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 190. [2018-04-13 10:09:25,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-04-13 10:09:25,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 217 transitions. [2018-04-13 10:09:25,966 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 217 transitions. Word has length 85 [2018-04-13 10:09:25,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:09:25,967 INFO L459 AbstractCegarLoop]: Abstraction has 190 states and 217 transitions. [2018-04-13 10:09:25,967 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-13 10:09:25,967 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 217 transitions. [2018-04-13 10:09:25,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-04-13 10:09:25,967 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:09:25,967 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:09:25,967 INFO L408 AbstractCegarLoop]: === Iteration 23 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:09:25,968 INFO L82 PathProgramCache]: Analyzing trace with hash -455952358, now seen corresponding path program 1 times [2018-04-13 10:09:25,968 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:09:25,968 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:09:25,968 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:09:25,969 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:09:25,969 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:09:25,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:09:25,978 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:09:26,025 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 203 trivial. 0 not checked. [2018-04-13 10:09:26,026 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:09:26,026 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-04-13 10:09:26,026 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-04-13 10:09:26,026 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-04-13 10:09:26,026 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-04-13 10:09:26,026 INFO L87 Difference]: Start difference. First operand 190 states and 217 transitions. Second operand 6 states. [2018-04-13 10:09:26,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:09:26,054 INFO L93 Difference]: Finished difference Result 167 states and 184 transitions. [2018-04-13 10:09:26,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-13 10:09:26,055 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 86 [2018-04-13 10:09:26,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:09:26,056 INFO L225 Difference]: With dead ends: 167 [2018-04-13 10:09:26,056 INFO L226 Difference]: Without dead ends: 167 [2018-04-13 10:09:26,056 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-04-13 10:09:26,056 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-04-13 10:09:26,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 165. [2018-04-13 10:09:26,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-04-13 10:09:26,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 182 transitions. [2018-04-13 10:09:26,060 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 182 transitions. Word has length 86 [2018-04-13 10:09:26,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:09:26,060 INFO L459 AbstractCegarLoop]: Abstraction has 165 states and 182 transitions. [2018-04-13 10:09:26,060 INFO L460 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-04-13 10:09:26,060 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 182 transitions. [2018-04-13 10:09:26,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-04-13 10:09:26,061 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:09:26,061 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:09:26,061 INFO L408 AbstractCegarLoop]: === Iteration 24 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:09:26,061 INFO L82 PathProgramCache]: Analyzing trace with hash -153348228, now seen corresponding path program 1 times [2018-04-13 10:09:26,061 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:09:26,061 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:09:26,062 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:09:26,062 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:09:26,062 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:09:26,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:09:26,078 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:09:26,084 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:09:26,084 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:09:26,084 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:09:26,085 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:09:26,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:09:26,109 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:09:26,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:09:26,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:09:26,137 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:09:26,138 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:26,143 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:26,143 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:21 [2018-04-13 10:09:26,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 18 [2018-04-13 10:09:26,175 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:09:26,175 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 27 [2018-04-13 10:09:26,176 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:09:26,181 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:26,194 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:09:26,194 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:28 [2018-04-13 10:09:26,295 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-04-13 10:09:26,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:09:26,302 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 41 [2018-04-13 10:09:26,303 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:09:26,311 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:26,321 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:09:26,321 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:43, output treesize:39 [2018-04-13 10:09:28,376 WARN L148 SmtUtils]: Spent 2008ms on a formula simplification that was a NOOP. DAG size: 27 [2018-04-13 10:09:34,478 WARN L148 SmtUtils]: Spent 4007ms on a formula simplification that was a NOOP. DAG size: 32 [2018-04-13 10:09:34,483 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:09:34,485 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:09:34,488 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:09:34,488 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:09:34,495 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:34,503 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:09:34,504 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:09:36,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:09:36,603 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:09:36,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:09:36,606 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:09:36,612 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:36,620 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:09:36,620 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:09:38,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:09:38,719 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:09:38,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:09:38,722 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:09:38,728 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:38,736 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:09:38,736 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:09:40,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:09:40,874 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:09:40,878 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:09:40,878 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:09:40,886 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:40,896 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:09:40,896 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:09:43,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:09:43,007 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:09:43,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:09:43,011 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:09:43,023 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:43,032 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:09:43,032 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:09:45,144 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:09:45,147 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:09:45,150 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:09:45,150 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:09:45,156 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:45,164 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:09:45,164 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:09:47,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:09:47,268 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:09:47,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:09:47,271 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:09:47,277 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:47,285 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:09:47,285 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:09:55,888 WARN L151 SmtUtils]: Spent 443ms on a formula simplification. DAG size of input: 28 DAG size of output 19 [2018-04-13 10:09:55,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-04-13 10:09:55,957 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:09:55,958 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:09:55,958 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:09:55,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 31 [2018-04-13 10:09:55,959 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:09:55,962 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:09:55,967 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:09:55,967 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:44, output treesize:12 [2018-04-13 10:09:56,005 INFO L134 CoverageAnalysis]: Checked inductivity of 204 backedges. 31 proven. 66 refuted. 0 times theorem prover too weak. 107 trivial. 0 not checked. [2018-04-13 10:09:56,005 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:09:56,005 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-04-13 10:09:56,005 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-13 10:09:56,006 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-13 10:09:56,006 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=251, Unknown=4, NotChecked=0, Total=306 [2018-04-13 10:09:56,006 INFO L87 Difference]: Start difference. First operand 165 states and 182 transitions. Second operand 18 states. [2018-04-13 10:10:06,270 WARN L148 SmtUtils]: Spent 4029ms on a formula simplification that was a NOOP. DAG size: 33 [2018-04-13 10:10:22,357 WARN L151 SmtUtils]: Spent 8021ms on a formula simplification. DAG size of input: 37 DAG size of output 29 [2018-04-13 10:10:22,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:22,653 INFO L93 Difference]: Finished difference Result 181 states and 194 transitions. [2018-04-13 10:10:22,653 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-13 10:10:22,654 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 86 [2018-04-13 10:10:22,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:22,655 INFO L225 Difference]: With dead ends: 181 [2018-04-13 10:10:22,655 INFO L226 Difference]: Without dead ends: 181 [2018-04-13 10:10:22,655 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 56 SyntacticMatches, 14 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 205 ImplicationChecksByTransitivity, 49.8s TimeCoverageRelationStatistics Valid=133, Invalid=789, Unknown=8, NotChecked=0, Total=930 [2018-04-13 10:10:22,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-04-13 10:10:22,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 166. [2018-04-13 10:10:22,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-04-13 10:10:22,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 183 transitions. [2018-04-13 10:10:22,659 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 183 transitions. Word has length 86 [2018-04-13 10:10:22,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:22,659 INFO L459 AbstractCegarLoop]: Abstraction has 166 states and 183 transitions. [2018-04-13 10:10:22,659 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-13 10:10:22,659 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 183 transitions. [2018-04-13 10:10:22,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-04-13 10:10:22,660 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:22,660 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:22,660 INFO L408 AbstractCegarLoop]: === Iteration 25 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:22,661 INFO L82 PathProgramCache]: Analyzing trace with hash 1044758808, now seen corresponding path program 1 times [2018-04-13 10:10:22,661 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:22,661 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:22,661 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:22,662 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:22,662 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:22,672 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:22,673 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:22,711 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 206 trivial. 0 not checked. [2018-04-13 10:10:22,711 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:22,711 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:22,712 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:22,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:22,731 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:22,777 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 206 trivial. 0 not checked. [2018-04-13 10:10:22,777 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:10:22,778 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 11 [2018-04-13 10:10:22,778 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-13 10:10:22,778 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-13 10:10:22,778 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-04-13 10:10:22,779 INFO L87 Difference]: Start difference. First operand 166 states and 183 transitions. Second operand 11 states. [2018-04-13 10:10:22,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:22,955 INFO L93 Difference]: Finished difference Result 228 states and 251 transitions. [2018-04-13 10:10:22,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-13 10:10:22,955 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 87 [2018-04-13 10:10:22,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:22,956 INFO L225 Difference]: With dead ends: 228 [2018-04-13 10:10:22,956 INFO L226 Difference]: Without dead ends: 225 [2018-04-13 10:10:22,956 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 84 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=68, Invalid=274, Unknown=0, NotChecked=0, Total=342 [2018-04-13 10:10:22,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-04-13 10:10:22,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 175. [2018-04-13 10:10:22,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-04-13 10:10:22,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 193 transitions. [2018-04-13 10:10:22,961 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 193 transitions. Word has length 87 [2018-04-13 10:10:22,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:22,961 INFO L459 AbstractCegarLoop]: Abstraction has 175 states and 193 transitions. [2018-04-13 10:10:22,961 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-13 10:10:22,961 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 193 transitions. [2018-04-13 10:10:22,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-04-13 10:10:22,962 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:22,962 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:22,962 INFO L408 AbstractCegarLoop]: === Iteration 26 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:22,962 INFO L82 PathProgramCache]: Analyzing trace with hash -176458510, now seen corresponding path program 1 times [2018-04-13 10:10:22,962 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:22,963 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:22,963 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:22,963 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:22,964 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:22,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:22,978 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:22,983 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:10:22,983 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:22,983 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:22,984 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:23,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:23,014 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:23,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:10:23,028 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:23,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:10:23,047 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:23,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-04-13 10:10:23,066 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:23,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-13 10:10:23,076 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:23,093 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:10:23,093 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-04-13 10:10:23,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,215 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 50 [2018-04-13 10:10:23,215 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:23,248 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,248 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 37 [2018-04-13 10:10:23,249 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:23,266 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,267 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 38 [2018-04-13 10:10:23,267 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:23,284 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,284 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 35 [2018-04-13 10:10:23,285 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:23,315 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:10:23,315 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:73, output treesize:55 [2018-04-13 10:10:23,503 WARN L148 SmtUtils]: Spent 126ms on a formula simplification that was a NOOP. DAG size: 34 [2018-04-13 10:10:23,644 WARN L148 SmtUtils]: Spent 106ms on a formula simplification that was a NOOP. DAG size: 42 [2018-04-13 10:10:23,795 WARN L148 SmtUtils]: Spent 117ms on a formula simplification that was a NOOP. DAG size: 42 [2018-04-13 10:10:23,821 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,823 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,823 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 60 treesize of output 87 [2018-04-13 10:10:23,829 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:10:23,934 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,935 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 55 [2018-04-13 10:10:23,936 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:23,937 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,938 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:23,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 63 [2018-04-13 10:10:23,939 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:24,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,022 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 62 [2018-04-13 10:10:24,022 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:24,107 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 65 [2018-04-13 10:10:24,113 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:10:24,212 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 79 [2018-04-13 10:10:24,221 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:10:24,349 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,350 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,351 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 61 [2018-04-13 10:10:24,351 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:24,354 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,355 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,355 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 53 [2018-04-13 10:10:24,356 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:24,459 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,461 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,467 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 87 [2018-04-13 10:10:24,467 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-04-13 10:10:24,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 59 [2018-04-13 10:10:24,606 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:24,608 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,608 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:24,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 53 [2018-04-13 10:10:24,609 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:24,728 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 24 dim-0 vars, and 8 xjuncts. [2018-04-13 10:10:24,729 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 24 variables, input treesize:233, output treesize:333 [2018-04-13 10:10:25,151 WARN L151 SmtUtils]: Spent 351ms on a formula simplification. DAG size of input: 140 DAG size of output 39 [2018-04-13 10:10:25,170 INFO L134 CoverageAnalysis]: Checked inductivity of 224 backedges. 2 proven. 16 refuted. 0 times theorem prover too weak. 206 trivial. 0 not checked. [2018-04-13 10:10:25,170 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:10:25,170 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-04-13 10:10:25,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-13 10:10:25,170 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-13 10:10:25,170 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=204, Unknown=5, NotChecked=0, Total=240 [2018-04-13 10:10:25,171 INFO L87 Difference]: Start difference. First operand 175 states and 193 transitions. Second operand 16 states. [2018-04-13 10:10:30,064 WARN L148 SmtUtils]: Spent 156ms on a formula simplification that was a NOOP. DAG size: 52 [2018-04-13 10:10:30,433 WARN L151 SmtUtils]: Spent 343ms on a formula simplification. DAG size of input: 61 DAG size of output 60 [2018-04-13 10:10:30,670 WARN L148 SmtUtils]: Spent 199ms on a formula simplification that was a NOOP. DAG size: 60 [2018-04-13 10:10:30,975 WARN L148 SmtUtils]: Spent 159ms on a formula simplification that was a NOOP. DAG size: 65 [2018-04-13 10:10:31,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:31,164 INFO L93 Difference]: Finished difference Result 225 states and 246 transitions. [2018-04-13 10:10:31,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 10:10:31,164 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 88 [2018-04-13 10:10:31,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:31,165 INFO L225 Difference]: With dead ends: 225 [2018-04-13 10:10:31,165 INFO L226 Difference]: Without dead ends: 225 [2018-04-13 10:10:31,165 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 72 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=98, Invalid=708, Unknown=6, NotChecked=0, Total=812 [2018-04-13 10:10:31,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2018-04-13 10:10:31,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 179. [2018-04-13 10:10:31,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-04-13 10:10:31,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 199 transitions. [2018-04-13 10:10:31,168 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 199 transitions. Word has length 88 [2018-04-13 10:10:31,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:31,168 INFO L459 AbstractCegarLoop]: Abstraction has 179 states and 199 transitions. [2018-04-13 10:10:31,169 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-13 10:10:31,169 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 199 transitions. [2018-04-13 10:10:31,169 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-04-13 10:10:31,169 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:31,169 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:31,169 INFO L408 AbstractCegarLoop]: === Iteration 27 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:31,169 INFO L82 PathProgramCache]: Analyzing trace with hash 114164608, now seen corresponding path program 1 times [2018-04-13 10:10:31,169 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:31,170 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:31,170 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:31,170 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:31,170 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:31,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:31,179 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:31,279 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 11 proven. 5 refuted. 0 times theorem prover too weak. 203 trivial. 0 not checked. [2018-04-13 10:10:31,279 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:31,279 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:31,280 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:31,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:31,297 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:31,402 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 206 trivial. 0 not checked. [2018-04-13 10:10:31,402 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:10:31,402 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 7] total 17 [2018-04-13 10:10:31,402 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-13 10:10:31,403 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-13 10:10:31,403 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=264, Unknown=0, NotChecked=0, Total=306 [2018-04-13 10:10:31,403 INFO L87 Difference]: Start difference. First operand 179 states and 199 transitions. Second operand 18 states. [2018-04-13 10:10:31,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:31,871 INFO L93 Difference]: Finished difference Result 202 states and 224 transitions. [2018-04-13 10:10:31,871 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 10:10:31,871 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 89 [2018-04-13 10:10:31,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:31,872 INFO L225 Difference]: With dead ends: 202 [2018-04-13 10:10:31,872 INFO L226 Difference]: Without dead ends: 202 [2018-04-13 10:10:31,872 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 162 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=155, Invalid=837, Unknown=0, NotChecked=0, Total=992 [2018-04-13 10:10:31,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-04-13 10:10:31,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 177. [2018-04-13 10:10:31,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-04-13 10:10:31,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 197 transitions. [2018-04-13 10:10:31,876 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 197 transitions. Word has length 89 [2018-04-13 10:10:31,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:31,876 INFO L459 AbstractCegarLoop]: Abstraction has 177 states and 197 transitions. [2018-04-13 10:10:31,877 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-13 10:10:31,877 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 197 transitions. [2018-04-13 10:10:31,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-04-13 10:10:31,877 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:31,877 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:31,877 INFO L408 AbstractCegarLoop]: === Iteration 28 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:31,878 INFO L82 PathProgramCache]: Analyzing trace with hash -755864063, now seen corresponding path program 1 times [2018-04-13 10:10:31,878 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:31,878 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:31,879 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:31,879 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:31,879 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:31,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:31,894 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:32,097 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 210 trivial. 0 not checked. [2018-04-13 10:10:32,097 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:32,097 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:32,098 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:32,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:32,130 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:32,243 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:10:32,244 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:10:32,244 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:32,245 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:32,249 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:32,249 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-04-13 10:10:32,322 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-04-13 10:10:32,323 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:10:32,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 9 [2018-04-13 10:10:32,324 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:32,326 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:32,330 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:32,330 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:27, output treesize:3 [2018-04-13 10:10:32,338 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 7 proven. 9 refuted. 0 times theorem prover too weak. 203 trivial. 0 not checked. [2018-04-13 10:10:32,338 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:10:32,339 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 16] total 23 [2018-04-13 10:10:32,339 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-13 10:10:32,339 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-13 10:10:32,339 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=485, Unknown=0, NotChecked=0, Total=552 [2018-04-13 10:10:32,340 INFO L87 Difference]: Start difference. First operand 177 states and 197 transitions. Second operand 24 states. [2018-04-13 10:10:32,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:32,638 INFO L93 Difference]: Finished difference Result 246 states and 271 transitions. [2018-04-13 10:10:32,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-04-13 10:10:32,638 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 90 [2018-04-13 10:10:32,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:32,639 INFO L225 Difference]: With dead ends: 246 [2018-04-13 10:10:32,639 INFO L226 Difference]: Without dead ends: 246 [2018-04-13 10:10:32,639 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 80 SyntacticMatches, 5 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 290 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=178, Invalid=1228, Unknown=0, NotChecked=0, Total=1406 [2018-04-13 10:10:32,640 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-04-13 10:10:32,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 199. [2018-04-13 10:10:32,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-04-13 10:10:32,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 222 transitions. [2018-04-13 10:10:32,642 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 222 transitions. Word has length 90 [2018-04-13 10:10:32,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:32,642 INFO L459 AbstractCegarLoop]: Abstraction has 199 states and 222 transitions. [2018-04-13 10:10:32,642 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-13 10:10:32,642 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 222 transitions. [2018-04-13 10:10:32,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-04-13 10:10:32,643 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:32,643 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:32,643 INFO L408 AbstractCegarLoop]: === Iteration 29 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:32,643 INFO L82 PathProgramCache]: Analyzing trace with hash -1956948993, now seen corresponding path program 1 times [2018-04-13 10:10:32,643 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:32,643 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:32,644 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:32,644 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:32,644 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:32,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:32,653 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:32,914 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 203 trivial. 0 not checked. [2018-04-13 10:10:32,914 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:32,915 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:32,915 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:32,933 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:32,937 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:33,022 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:10:33,045 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,046 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,047 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:10:33,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:10:33,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:10:33,093 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,094 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,101 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,101 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:27 [2018-04-13 10:10:33,155 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-04-13 10:10:33,155 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,156 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,156 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:3 [2018-04-13 10:10:33,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-13 10:10:33,186 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:10:33,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-13 10:10:33,187 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,188 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,191 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,191 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:5 [2018-04-13 10:10:33,203 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 4 proven. 12 refuted. 0 times theorem prover too weak. 203 trivial. 0 not checked. [2018-04-13 10:10:33,203 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:10:33,203 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16] total 25 [2018-04-13 10:10:33,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-04-13 10:10:33,203 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-04-13 10:10:33,203 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=583, Unknown=0, NotChecked=0, Total=650 [2018-04-13 10:10:33,204 INFO L87 Difference]: Start difference. First operand 199 states and 222 transitions. Second operand 26 states. [2018-04-13 10:10:33,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:33,552 INFO L93 Difference]: Finished difference Result 215 states and 238 transitions. [2018-04-13 10:10:33,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-13 10:10:33,553 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 91 [2018-04-13 10:10:33,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:33,554 INFO L225 Difference]: With dead ends: 215 [2018-04-13 10:10:33,554 INFO L226 Difference]: Without dead ends: 215 [2018-04-13 10:10:33,555 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 79 SyntacticMatches, 5 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 254 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=159, Invalid=1247, Unknown=0, NotChecked=0, Total=1406 [2018-04-13 10:10:33,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2018-04-13 10:10:33,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 202. [2018-04-13 10:10:33,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202 states. [2018-04-13 10:10:33,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202 states to 202 states and 225 transitions. [2018-04-13 10:10:33,558 INFO L78 Accepts]: Start accepts. Automaton has 202 states and 225 transitions. Word has length 91 [2018-04-13 10:10:33,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:33,559 INFO L459 AbstractCegarLoop]: Abstraction has 202 states and 225 transitions. [2018-04-13 10:10:33,559 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-04-13 10:10:33,559 INFO L276 IsEmpty]: Start isEmpty. Operand 202 states and 225 transitions. [2018-04-13 10:10:33,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-04-13 10:10:33,559 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:33,560 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:33,560 INFO L408 AbstractCegarLoop]: === Iteration 30 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:33,560 INFO L82 PathProgramCache]: Analyzing trace with hash -1810352142, now seen corresponding path program 1 times [2018-04-13 10:10:33,560 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:33,560 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:33,561 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:33,561 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:33,561 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:33,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:33,570 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:33,610 INFO L134 CoverageAnalysis]: Checked inductivity of 204 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:10:33,610 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-04-13 10:10:33,610 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-04-13 10:10:33,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-04-13 10:10:33,611 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-04-13 10:10:33,611 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-04-13 10:10:33,611 INFO L87 Difference]: Start difference. First operand 202 states and 225 transitions. Second operand 5 states. [2018-04-13 10:10:33,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:33,637 INFO L93 Difference]: Finished difference Result 213 states and 233 transitions. [2018-04-13 10:10:33,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-04-13 10:10:33,637 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 91 [2018-04-13 10:10:33,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:33,638 INFO L225 Difference]: With dead ends: 213 [2018-04-13 10:10:33,638 INFO L226 Difference]: Without dead ends: 207 [2018-04-13 10:10:33,639 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-04-13 10:10:33,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-04-13 10:10:33,642 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 194. [2018-04-13 10:10:33,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-04-13 10:10:33,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 214 transitions. [2018-04-13 10:10:33,642 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 214 transitions. Word has length 91 [2018-04-13 10:10:33,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:33,644 INFO L459 AbstractCegarLoop]: Abstraction has 194 states and 214 transitions. [2018-04-13 10:10:33,644 INFO L460 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-04-13 10:10:33,644 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 214 transitions. [2018-04-13 10:10:33,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-04-13 10:10:33,645 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:33,645 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:33,645 INFO L408 AbstractCegarLoop]: === Iteration 31 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:33,645 INFO L82 PathProgramCache]: Analyzing trace with hash -1541861104, now seen corresponding path program 1 times [2018-04-13 10:10:33,645 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:33,646 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:33,646 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:33,646 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:33,647 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:33,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:33,668 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:33,675 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:10:33,675 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:33,675 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:33,675 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:33,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:33,703 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:33,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 33 [2018-04-13 10:10:33,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:10:33,743 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,751 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,753 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-13 10:10:33,753 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,762 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,762 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 1 variables, input treesize:73, output treesize:32 [2018-04-13 10:10:33,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:10:33,807 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:33,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:10:33,808 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,813 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,825 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,825 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:48, output treesize:44 [2018-04-13 10:10:33,869 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:10:33,879 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:33,880 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:33,880 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:33,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:10:33,881 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,888 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,895 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,895 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-04-13 10:10:33,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-04-13 10:10:33,936 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:33,937 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:33,937 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:33,938 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:33,938 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:33,939 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:33,939 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-04-13 10:10:33,939 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,948 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,957 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:33,957 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:68 [2018-04-13 10:10:34,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 53 [2018-04-13 10:10:34,008 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,009 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,009 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,010 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,010 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,011 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 196 [2018-04-13 10:10:34,014 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,029 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,040 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,041 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:84, output treesize:80 [2018-04-13 10:10:34,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 63 [2018-04-13 10:10:34,101 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,102 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,102 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,103 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,103 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,104 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,104 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,106 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,107 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,107 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,108 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,108 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,109 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 277 [2018-04-13 10:10:34,110 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,134 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,146 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,146 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:96, output treesize:92 [2018-04-13 10:10:34,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 73 [2018-04-13 10:10:34,230 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,233 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,233 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,234 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,235 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,235 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,236 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,237 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,237 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,238 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,238 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,239 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,239 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,240 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,240 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,241 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,241 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,242 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,243 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 372 [2018-04-13 10:10:34,243 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,276 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,292 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,293 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:108, output treesize:104 [2018-04-13 10:10:34,374 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 83 [2018-04-13 10:10:34,377 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,377 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,378 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,379 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,379 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,380 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,381 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,381 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,382 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,383 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,383 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,384 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,384 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,385 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,386 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,387 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,387 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,388 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,391 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,391 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 481 [2018-04-13 10:10:34,397 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,443 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,459 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,459 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:120, output treesize:116 [2018-04-13 10:10:34,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 112 treesize of output 93 [2018-04-13 10:10:34,553 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,554 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,555 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,555 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,556 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,556 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,557 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,557 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,558 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,559 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,559 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,560 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,560 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,561 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,561 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,562 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,563 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,563 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,564 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,564 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,565 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,565 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,566 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,566 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,567 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,567 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,568 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,569 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,569 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,570 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,570 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,571 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,571 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,572 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,572 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,573 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 604 [2018-04-13 10:10:34,575 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,627 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,646 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,646 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:132, output treesize:128 [2018-04-13 10:10:34,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 103 [2018-04-13 10:10:34,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,757 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,758 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,758 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,761 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,762 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,762 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,764 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,765 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,765 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,768 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,769 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,769 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,770 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,772 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,772 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,773 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,773 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,774 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,775 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,775 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,776 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,776 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,778 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,779 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,779 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,780 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,780 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,781 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,781 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:34,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 741 [2018-04-13 10:10:34,783 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,867 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,886 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:34,886 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:144, output treesize:140 [2018-04-13 10:10:35,287 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 131 treesize of output 109 [2018-04-13 10:10:35,290 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,290 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,292 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,292 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,293 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,293 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,313 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,314 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,316 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,316 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:10:35,317 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,318 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,318 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,319 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,320 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,320 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,322 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,323 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,323 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,324 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,324 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,325 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,325 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,326 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,326 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,327 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,327 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,328 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 11 select indices, 11 select index equivalence classes, 45 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 109 treesize of output 670 [2018-04-13 10:10:35,329 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:35,386 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:35,396 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:35,396 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:169, output treesize:13 [2018-04-13 10:10:35,423 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:35,423 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:10:35,424 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:35,427 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:35,427 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:10:35,492 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 205 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:10:35,493 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:10:35,493 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33] total 33 [2018-04-13 10:10:35,493 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-13 10:10:35,493 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-13 10:10:35,493 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=1000, Unknown=0, NotChecked=0, Total=1122 [2018-04-13 10:10:35,493 INFO L87 Difference]: Start difference. First operand 194 states and 214 transitions. Second operand 34 states. [2018-04-13 10:10:37,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:37,286 INFO L93 Difference]: Finished difference Result 219 states and 240 transitions. [2018-04-13 10:10:37,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-04-13 10:10:37,287 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 92 [2018-04-13 10:10:37,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:37,287 INFO L225 Difference]: With dead ends: 219 [2018-04-13 10:10:37,287 INFO L226 Difference]: Without dead ends: 219 [2018-04-13 10:10:37,288 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 60 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 602 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=213, Invalid=2043, Unknown=0, NotChecked=0, Total=2256 [2018-04-13 10:10:37,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2018-04-13 10:10:37,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 200. [2018-04-13 10:10:37,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-04-13 10:10:37,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 222 transitions. [2018-04-13 10:10:37,290 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 222 transitions. Word has length 92 [2018-04-13 10:10:37,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:37,290 INFO L459 AbstractCegarLoop]: Abstraction has 200 states and 222 transitions. [2018-04-13 10:10:37,290 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-13 10:10:37,290 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 222 transitions. [2018-04-13 10:10:37,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-04-13 10:10:37,291 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:37,291 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:37,291 INFO L408 AbstractCegarLoop]: === Iteration 32 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:37,291 INFO L82 PathProgramCache]: Analyzing trace with hash -1541861103, now seen corresponding path program 1 times [2018-04-13 10:10:37,291 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:37,291 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:37,292 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:37,292 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:37,292 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:37,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:37,298 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:37,453 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 33 proven. 3 refuted. 0 times theorem prover too weak. 171 trivial. 0 not checked. [2018-04-13 10:10:37,453 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:37,453 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:37,454 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:37,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:37,476 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:37,506 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-13 10:10:37,506 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:37,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-04-13 10:10:37,520 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:37,532 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:10:37,532 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-04-13 10:10:37,713 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 1 proven. 6 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-04-13 10:10:37,713 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:10:37,713 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 12] total 24 [2018-04-13 10:10:37,713 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-13 10:10:37,713 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-13 10:10:37,714 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=544, Unknown=0, NotChecked=0, Total=600 [2018-04-13 10:10:37,714 INFO L87 Difference]: Start difference. First operand 200 states and 222 transitions. Second operand 25 states. [2018-04-13 10:10:38,322 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:38,323 INFO L93 Difference]: Finished difference Result 222 states and 240 transitions. [2018-04-13 10:10:38,323 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-13 10:10:38,323 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 92 [2018-04-13 10:10:38,323 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:38,323 INFO L225 Difference]: With dead ends: 222 [2018-04-13 10:10:38,323 INFO L226 Difference]: Without dead ends: 222 [2018-04-13 10:10:38,324 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 85 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 269 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=167, Invalid=1393, Unknown=0, NotChecked=0, Total=1560 [2018-04-13 10:10:38,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-04-13 10:10:38,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 200. [2018-04-13 10:10:38,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-04-13 10:10:38,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 220 transitions. [2018-04-13 10:10:38,327 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 220 transitions. Word has length 92 [2018-04-13 10:10:38,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:38,327 INFO L459 AbstractCegarLoop]: Abstraction has 200 states and 220 transitions. [2018-04-13 10:10:38,327 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-13 10:10:38,327 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 220 transitions. [2018-04-13 10:10:38,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-04-13 10:10:38,328 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:38,328 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:38,328 INFO L408 AbstractCegarLoop]: === Iteration 33 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, 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ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:38,328 INFO L82 PathProgramCache]: Analyzing trace with hash -553053895, now seen corresponding path program 1 times [2018-04-13 10:10:38,328 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:38,328 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:38,329 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:38,329 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:38,329 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:38,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:38,349 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:38,354 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:10:38,354 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:38,354 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:38,355 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:38,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:38,393 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:38,430 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:10:38,431 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:10:38,432 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,433 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,437 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,437 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:10:38,462 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:10:38,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:10:38,465 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,469 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,475 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,475 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:10:38,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:10:38,519 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,520 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,520 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:10:38,521 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,529 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,536 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,536 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:10:38,570 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:10:38,572 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,573 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,573 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,574 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,574 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,575 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:10:38,576 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,586 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,592 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,593 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:55, output treesize:51 [2018-04-13 10:10:38,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 50 [2018-04-13 10:10:38,633 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,634 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,634 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,635 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,635 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,636 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,636 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,637 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,637 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,638 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,638 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 181 [2018-04-13 10:10:38,639 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,652 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,659 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,659 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:67, output treesize:63 [2018-04-13 10:10:38,707 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 59 [2018-04-13 10:10:38,709 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,711 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,711 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,712 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,712 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,714 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,714 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,715 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,715 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,716 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,716 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,717 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 253 [2018-04-13 10:10:38,718 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,737 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,748 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:10:38,748 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:83, output treesize:79 [2018-04-13 10:10:38,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 68 [2018-04-13 10:10:38,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,809 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,809 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,810 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,811 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,811 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,812 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,813 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,813 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,814 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,815 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,815 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,816 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,817 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,818 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,818 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,819 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,820 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,820 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,821 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,822 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 337 [2018-04-13 10:10:38,823 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,854 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:38,866 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:10:38,867 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:99, output treesize:95 [2018-04-13 10:10:38,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 77 [2018-04-13 10:10:38,944 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,945 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,946 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,946 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,947 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,947 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,949 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,950 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,950 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,951 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,951 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,952 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,953 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,953 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,954 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,954 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,955 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,956 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,956 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,957 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,957 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,958 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,958 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,959 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,959 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,960 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:38,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 433 [2018-04-13 10:10:38,961 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:39,005 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:39,021 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:10:39,021 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:115, output treesize:111 [2018-04-13 10:10:39,124 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 86 [2018-04-13 10:10:39,127 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,127 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,128 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,129 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,129 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,130 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,130 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,131 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,131 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,132 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,133 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,133 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,134 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,134 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,135 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,135 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,136 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,137 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,137 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,138 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,139 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,139 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,140 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,140 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,141 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,142 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,142 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,143 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,143 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,144 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,145 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,145 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,146 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,146 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,147 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,148 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 541 [2018-04-13 10:10:39,149 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:39,209 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:39,228 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-04-13 10:10:39,229 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:131, output treesize:127 [2018-04-13 10:10:39,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 77 [2018-04-13 10:10:39,581 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,582 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,583 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,584 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,584 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,585 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,586 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,587 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,587 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,588 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,589 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,590 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,591 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,591 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,592 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,592 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,593 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,593 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,594 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,594 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,595 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,596 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,596 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,597 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,597 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,598 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,598 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,599 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,599 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,600 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,600 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,601 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,601 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,602 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,602 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,603 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,603 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,606 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,606 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:10:39,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:39,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 36 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 411 [2018-04-13 10:10:39,608 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:39,651 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:39,659 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:39,659 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 9 variables, input treesize:133, output treesize:3 [2018-04-13 10:10:39,715 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 60 proven. 146 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:10:39,715 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:10:39,715 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30] total 30 [2018-04-13 10:10:39,715 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-04-13 10:10:39,715 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-04-13 10:10:39,716 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=803, Unknown=0, NotChecked=0, Total=930 [2018-04-13 10:10:39,716 INFO L87 Difference]: Start difference. First operand 200 states and 220 transitions. Second operand 31 states. [2018-04-13 10:10:41,414 WARN L151 SmtUtils]: Spent 229ms on a formula simplification. DAG size of input: 76 DAG size of output 75 [2018-04-13 10:10:49,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:49,772 INFO L93 Difference]: Finished difference Result 218 states and 235 transitions. [2018-04-13 10:10:49,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-04-13 10:10:49,772 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 93 [2018-04-13 10:10:49,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:49,773 INFO L225 Difference]: With dead ends: 218 [2018-04-13 10:10:49,773 INFO L226 Difference]: Without dead ends: 218 [2018-04-13 10:10:49,774 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 64 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 730 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=353, Invalid=2508, Unknown=1, NotChecked=0, Total=2862 [2018-04-13 10:10:49,774 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 218 states. [2018-04-13 10:10:49,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 218 to 201. [2018-04-13 10:10:49,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-04-13 10:10:49,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 221 transitions. [2018-04-13 10:10:49,776 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 221 transitions. Word has length 93 [2018-04-13 10:10:49,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:49,776 INFO L459 AbstractCegarLoop]: Abstraction has 201 states and 221 transitions. [2018-04-13 10:10:49,776 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-04-13 10:10:49,776 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 221 transitions. [2018-04-13 10:10:49,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-04-13 10:10:49,777 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:49,777 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:49,777 INFO L408 AbstractCegarLoop]: === Iteration 34 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:49,777 INFO L82 PathProgramCache]: Analyzing trace with hash 419103109, now seen corresponding path program 1 times [2018-04-13 10:10:49,777 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:49,777 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:49,778 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:49,778 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:49,778 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:49,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:49,786 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:49,789 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:10:49,790 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:49,790 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:49,790 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:49,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:49,811 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:49,820 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:10:49,821 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:49,828 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:49,828 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-13 10:10:49,892 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:49,893 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:49,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-13 10:10:49,893 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:49,895 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:49,895 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:11 [2018-04-13 10:10:49,916 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:10:49,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:10:49,918 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:49,919 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:49,926 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:49,926 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:31 [2018-04-13 10:10:49,967 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:10:49,967 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:49,972 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:10:49,972 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:34, output treesize:29 [2018-04-13 10:10:50,050 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-04-13 10:10:50,051 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:10:50,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-04-13 10:10:50,052 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,054 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,060 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,061 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:52, output treesize:10 [2018-04-13 10:10:50,075 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:50,075 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:10:50,075 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,079 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:10:50,080 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-13 10:10:50,107 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 7 proven. 12 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-04-13 10:10:50,107 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:10:50,107 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-04-13 10:10:50,107 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-13 10:10:50,107 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-13 10:10:50,108 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=304, Unknown=0, NotChecked=0, Total=342 [2018-04-13 10:10:50,108 INFO L87 Difference]: Start difference. First operand 201 states and 221 transitions. Second operand 19 states. [2018-04-13 10:10:50,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:50,674 INFO L93 Difference]: Finished difference Result 226 states and 247 transitions. [2018-04-13 10:10:50,675 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 10:10:50,675 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 94 [2018-04-13 10:10:50,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:50,675 INFO L225 Difference]: With dead ends: 226 [2018-04-13 10:10:50,676 INFO L226 Difference]: Without dead ends: 226 [2018-04-13 10:10:50,676 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 75 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=95, Invalid=717, Unknown=0, NotChecked=0, Total=812 [2018-04-13 10:10:50,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2018-04-13 10:10:50,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 204. [2018-04-13 10:10:50,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-04-13 10:10:50,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 224 transitions. [2018-04-13 10:10:50,678 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 224 transitions. Word has length 94 [2018-04-13 10:10:50,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:50,678 INFO L459 AbstractCegarLoop]: Abstraction has 204 states and 224 transitions. [2018-04-13 10:10:50,678 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-13 10:10:50,678 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 224 transitions. [2018-04-13 10:10:50,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-04-13 10:10:50,679 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:50,679 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:50,679 INFO L408 AbstractCegarLoop]: === Iteration 35 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:50,679 INFO L82 PathProgramCache]: Analyzing trace with hash 35198576, now seen corresponding path program 1 times [2018-04-13 10:10:50,679 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:50,679 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:50,680 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:50,680 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:50,680 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:50,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:50,695 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:50,702 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:10:50,702 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:50,702 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:50,702 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:50,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:50,727 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:50,762 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:10:50,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:10:50,763 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,772 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,796 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,796 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:10:50,825 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:10:50,827 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:50,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:10:50,828 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,833 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,840 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,840 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:10:50,877 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:10:50,881 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:50,882 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:50,882 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:50,883 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:10:50,883 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,909 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,918 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,918 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:10:50,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:10:50,968 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:50,969 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:50,970 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:50,971 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:50,972 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:50,973 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:50,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:10:50,974 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,989 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,998 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:50,999 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:55, output treesize:51 [2018-04-13 10:10:51,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 50 [2018-04-13 10:10:51,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,066 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,068 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,069 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,069 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,070 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,071 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,072 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,073 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 181 [2018-04-13 10:10:51,074 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,097 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,109 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,109 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:67, output treesize:63 [2018-04-13 10:10:51,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 60 [2018-04-13 10:10:51,179 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,179 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,180 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,180 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,181 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,181 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,182 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,183 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,183 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 259 [2018-04-13 10:10:51,187 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,208 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,216 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,216 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:79, output treesize:75 [2018-04-13 10:10:51,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 70 [2018-04-13 10:10:51,271 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,272 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,273 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,273 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,274 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,274 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,275 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,276 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,276 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,278 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,279 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,279 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,282 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,282 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 351 [2018-04-13 10:10:51,284 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,313 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,324 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,324 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:91, output treesize:87 [2018-04-13 10:10:51,388 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 80 [2018-04-13 10:10:51,390 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,391 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,391 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,396 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,396 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,397 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,397 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,403 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,403 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,404 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,405 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,405 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,406 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,406 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,407 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,407 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,407 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,408 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,408 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,409 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 457 [2018-04-13 10:10:51,410 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,450 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,467 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,467 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:103, output treesize:99 [2018-04-13 10:10:51,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 89 [2018-04-13 10:10:51,545 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,546 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,547 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,548 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,548 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,549 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,550 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,551 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,552 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,552 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,553 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,553 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,554 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,555 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,555 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,556 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,557 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,557 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,558 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,558 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,559 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,560 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,560 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,561 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,562 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,562 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,563 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,564 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,564 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,565 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,565 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,566 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,567 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,568 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,568 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,569 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,570 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 568 [2018-04-13 10:10:51,571 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,654 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:51,671 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:10:51,672 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:119, output treesize:115 [2018-04-13 10:10:51,984 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 83 [2018-04-13 10:10:51,987 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,988 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,989 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,990 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,991 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,991 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,992 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,993 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,993 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,994 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,994 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,995 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,996 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,996 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,997 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,998 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,999 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:51,999 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,000 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,000 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,001 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,001 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,003 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,003 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,004 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,005 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,005 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,006 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,006 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,007 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,007 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,008 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,008 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,009 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,010 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,010 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,011 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,011 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:10:52,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:52,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 36 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 457 [2018-04-13 10:10:52,014 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:52,064 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:52,069 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:10:52,070 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:124, output treesize:3 [2018-04-13 10:10:52,129 INFO L134 CoverageAnalysis]: Checked inductivity of 209 backedges. 87 proven. 120 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:10:52,129 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:10:52,129 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30] total 30 [2018-04-13 10:10:52,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-04-13 10:10:52,130 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-04-13 10:10:52,130 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=151, Invalid=779, Unknown=0, NotChecked=0, Total=930 [2018-04-13 10:10:52,130 INFO L87 Difference]: Start difference. First operand 204 states and 224 transitions. Second operand 31 states. [2018-04-13 10:10:53,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:53,368 INFO L93 Difference]: Finished difference Result 220 states and 237 transitions. [2018-04-13 10:10:53,368 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-13 10:10:53,368 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 94 [2018-04-13 10:10:53,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:53,369 INFO L225 Difference]: With dead ends: 220 [2018-04-13 10:10:53,369 INFO L226 Difference]: Without dead ends: 220 [2018-04-13 10:10:53,370 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 480 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=257, Invalid=1723, Unknown=0, NotChecked=0, Total=1980 [2018-04-13 10:10:53,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 220 states. [2018-04-13 10:10:53,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 220 to 205. [2018-04-13 10:10:53,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2018-04-13 10:10:53,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 225 transitions. [2018-04-13 10:10:53,373 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 225 transitions. Word has length 94 [2018-04-13 10:10:53,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:53,373 INFO L459 AbstractCegarLoop]: Abstraction has 205 states and 225 transitions. [2018-04-13 10:10:53,373 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-04-13 10:10:53,373 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 225 transitions. [2018-04-13 10:10:53,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-04-13 10:10:53,374 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:53,374 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:53,374 INFO L408 AbstractCegarLoop]: === Iteration 36 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:53,374 INFO L82 PathProgramCache]: Analyzing trace with hash 1090125989, now seen corresponding path program 1 times [2018-04-13 10:10:53,375 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:53,375 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:53,375 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:53,375 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:53,375 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:53,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:53,386 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:53,427 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:10:53,427 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:53,427 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:53,428 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:53,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:53,442 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:53,460 INFO L134 CoverageAnalysis]: Checked inductivity of 206 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:10:53,460 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:10:53,460 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 8 [2018-04-13 10:10:53,460 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-04-13 10:10:53,461 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-04-13 10:10:53,461 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-04-13 10:10:53,461 INFO L87 Difference]: Start difference. First operand 205 states and 225 transitions. Second operand 8 states. [2018-04-13 10:10:53,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:53,487 INFO L93 Difference]: Finished difference Result 234 states and 253 transitions. [2018-04-13 10:10:53,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-04-13 10:10:53,488 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 95 [2018-04-13 10:10:53,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:53,488 INFO L225 Difference]: With dead ends: 234 [2018-04-13 10:10:53,488 INFO L226 Difference]: Without dead ends: 230 [2018-04-13 10:10:53,489 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-04-13 10:10:53,489 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230 states. [2018-04-13 10:10:53,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230 to 213. [2018-04-13 10:10:53,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2018-04-13 10:10:53,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 236 transitions. [2018-04-13 10:10:53,491 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 236 transitions. Word has length 95 [2018-04-13 10:10:53,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:53,491 INFO L459 AbstractCegarLoop]: Abstraction has 213 states and 236 transitions. [2018-04-13 10:10:53,491 INFO L460 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-04-13 10:10:53,491 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 236 transitions. [2018-04-13 10:10:53,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-04-13 10:10:53,492 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:53,492 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:53,492 INFO L408 AbstractCegarLoop]: === Iteration 37 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:53,492 INFO L82 PathProgramCache]: Analyzing trace with hash -1798226422, now seen corresponding path program 1 times [2018-04-13 10:10:53,492 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:53,492 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:53,493 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:53,493 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:53,493 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:53,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:53,501 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:53,550 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 8 proven. 5 refuted. 0 times theorem prover too weak. 206 trivial. 0 not checked. [2018-04-13 10:10:53,550 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:53,550 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:53,551 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:53,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:53,566 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:53,609 INFO L134 CoverageAnalysis]: Checked inductivity of 219 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 214 trivial. 0 not checked. [2018-04-13 10:10:53,610 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:10:53,610 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [7] total 11 [2018-04-13 10:10:53,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-04-13 10:10:53,610 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-04-13 10:10:53,610 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2018-04-13 10:10:53,611 INFO L87 Difference]: Start difference. First operand 213 states and 236 transitions. Second operand 11 states. [2018-04-13 10:10:53,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:53,814 INFO L93 Difference]: Finished difference Result 207 states and 222 transitions. [2018-04-13 10:10:53,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-04-13 10:10:53,814 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 97 [2018-04-13 10:10:53,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:53,815 INFO L225 Difference]: With dead ends: 207 [2018-04-13 10:10:53,815 INFO L226 Difference]: Without dead ends: 207 [2018-04-13 10:10:53,815 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=88, Invalid=332, Unknown=0, NotChecked=0, Total=420 [2018-04-13 10:10:53,815 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-04-13 10:10:53,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 204. [2018-04-13 10:10:53,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 204 states. [2018-04-13 10:10:53,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 204 states to 204 states and 222 transitions. [2018-04-13 10:10:53,817 INFO L78 Accepts]: Start accepts. Automaton has 204 states and 222 transitions. Word has length 97 [2018-04-13 10:10:53,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:53,817 INFO L459 AbstractCegarLoop]: Abstraction has 204 states and 222 transitions. [2018-04-13 10:10:53,817 INFO L460 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-04-13 10:10:53,817 INFO L276 IsEmpty]: Start isEmpty. Operand 204 states and 222 transitions. [2018-04-13 10:10:53,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-04-13 10:10:53,817 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:53,817 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:53,817 INFO L408 AbstractCegarLoop]: === Iteration 38 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:53,818 INFO L82 PathProgramCache]: Analyzing trace with hash 1667406187, now seen corresponding path program 1 times [2018-04-13 10:10:53,818 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:53,818 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:53,818 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:53,818 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:53,818 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:53,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:53,835 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:53,878 INFO L134 CoverageAnalysis]: Checked inductivity of 229 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 218 trivial. 0 not checked. [2018-04-13 10:10:53,878 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:53,878 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:53,879 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:53,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:53,895 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:53,939 INFO L134 CoverageAnalysis]: Checked inductivity of 229 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 218 trivial. 0 not checked. [2018-04-13 10:10:53,939 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:10:53,939 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 10 [2018-04-13 10:10:53,940 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-13 10:10:53,940 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-13 10:10:53,940 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2018-04-13 10:10:53,940 INFO L87 Difference]: Start difference. First operand 204 states and 222 transitions. Second operand 10 states. [2018-04-13 10:10:54,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:10:54,003 INFO L93 Difference]: Finished difference Result 241 states and 260 transitions. [2018-04-13 10:10:54,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-13 10:10:54,003 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 100 [2018-04-13 10:10:54,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:10:54,004 INFO L225 Difference]: With dead ends: 241 [2018-04-13 10:10:54,004 INFO L226 Difference]: Without dead ends: 238 [2018-04-13 10:10:54,004 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 98 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-04-13 10:10:54,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 238 states. [2018-04-13 10:10:54,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 238 to 207. [2018-04-13 10:10:54,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2018-04-13 10:10:54,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 225 transitions. [2018-04-13 10:10:54,006 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 225 transitions. Word has length 100 [2018-04-13 10:10:54,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:10:54,006 INFO L459 AbstractCegarLoop]: Abstraction has 207 states and 225 transitions. [2018-04-13 10:10:54,006 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-13 10:10:54,006 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 225 transitions. [2018-04-13 10:10:54,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-04-13 10:10:54,007 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:10:54,007 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:10:54,007 INFO L408 AbstractCegarLoop]: === Iteration 39 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:10:54,007 INFO L82 PathProgramCache]: Analyzing trace with hash 1945741024, now seen corresponding path program 2 times [2018-04-13 10:10:54,007 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:10:54,007 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:10:54,008 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:54,008 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:10:54,008 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:10:54,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:10:54,023 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:10:54,028 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:10:54,028 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:10:54,028 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:10:54,029 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:10:54,058 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:10:54,058 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:10:54,063 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:10:54,078 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:10:54,078 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:54,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:10:54,098 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:54,117 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-13 10:10:54,117 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:54,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-04-13 10:10:54,119 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:54,136 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:10:54,137 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-04-13 10:10:54,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 38 [2018-04-13 10:10:54,296 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:54,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,316 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-04-13 10:10:54,317 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:54,332 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,333 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 35 [2018-04-13 10:10:54,360 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:54,376 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 40 [2018-04-13 10:10:54,377 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:54,392 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:10:54,392 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:73, output treesize:55 [2018-04-13 10:10:54,762 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 71 [2018-04-13 10:10:54,764 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:54,871 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,871 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,872 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 71 [2018-04-13 10:10:54,872 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:54,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,949 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,950 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,951 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:54,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 62 treesize of output 93 [2018-04-13 10:10:54,957 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:10:55,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,063 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 62 [2018-04-13 10:10:55,063 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:55,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 68 [2018-04-13 10:10:55,066 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:55,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 62 treesize of output 65 [2018-04-13 10:10:55,177 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:10:55,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,303 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 62 treesize of output 89 [2018-04-13 10:10:55,304 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-04-13 10:10:55,453 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,455 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,455 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 66 treesize of output 93 [2018-04-13 10:10:55,460 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-04-13 10:10:55,625 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 64 [2018-04-13 10:10:55,627 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:55,629 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,629 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:55,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 72 [2018-04-13 10:10:55,630 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:55,774 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 24 dim-0 vars, and 8 xjuncts. [2018-04-13 10:10:55,774 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 24 variables, input treesize:257, output treesize:413 [2018-04-13 10:10:56,246 WARN L151 SmtUtils]: Spent 399ms on a formula simplification. DAG size of input: 159 DAG size of output 46 [2018-04-13 10:10:56,377 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,378 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,378 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,379 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 67 [2018-04-13 10:10:56,379 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:56,446 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,447 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,448 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,448 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 77 [2018-04-13 10:10:56,448 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:56,525 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,526 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,526 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 65 [2018-04-13 10:10:56,527 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:56,591 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,592 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,592 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 77 [2018-04-13 10:10:56,592 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:56,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,662 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,662 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 65 [2018-04-13 10:10:56,662 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:56,724 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,725 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,725 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,726 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 73 [2018-04-13 10:10:56,727 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:56,790 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,790 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,791 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:10:56,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 63 [2018-04-13 10:10:56,792 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:56,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 55 [2018-04-13 10:10:56,854 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:10:56,918 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 16 dim-0 vars, and 4 xjuncts. [2018-04-13 10:10:56,919 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 24 variables, input treesize:253, output treesize:205 [2018-04-13 10:10:57,893 WARN L151 SmtUtils]: Spent 886ms on a formula simplification. DAG size of input: 99 DAG size of output 79 [2018-04-13 10:10:57,926 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 6 proven. 37 refuted. 0 times theorem prover too weak. 212 trivial. 0 not checked. [2018-04-13 10:10:57,926 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:10:57,926 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18] total 18 [2018-04-13 10:10:57,926 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-13 10:10:57,926 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-13 10:10:57,926 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-04-13 10:10:57,927 INFO L87 Difference]: Start difference. First operand 207 states and 225 transitions. Second operand 19 states. [2018-04-13 10:10:59,012 WARN L151 SmtUtils]: Spent 260ms on a formula simplification. DAG size of input: 71 DAG size of output 71 [2018-04-13 10:10:59,239 WARN L148 SmtUtils]: Spent 191ms on a formula simplification that was a NOOP. DAG size: 75 [2018-04-13 10:10:59,491 WARN L148 SmtUtils]: Spent 212ms on a formula simplification that was a NOOP. DAG size: 75 [2018-04-13 10:10:59,729 WARN L148 SmtUtils]: Spent 101ms on a formula simplification that was a NOOP. DAG size: 54 [2018-04-13 10:10:59,936 WARN L148 SmtUtils]: Spent 100ms on a formula simplification that was a NOOP. DAG size: 56 [2018-04-13 10:11:01,427 WARN L151 SmtUtils]: Spent 905ms on a formula simplification. DAG size of input: 103 DAG size of output 101 [2018-04-13 10:11:01,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:01,558 INFO L93 Difference]: Finished difference Result 249 states and 264 transitions. [2018-04-13 10:11:01,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-04-13 10:11:01,558 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 101 [2018-04-13 10:11:01,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:01,559 INFO L225 Difference]: With dead ends: 249 [2018-04-13 10:11:01,559 INFO L226 Difference]: Without dead ends: 249 [2018-04-13 10:11:01,559 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 82 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 4.3s TimeCoverageRelationStatistics Valid=131, Invalid=1059, Unknown=0, NotChecked=0, Total=1190 [2018-04-13 10:11:01,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2018-04-13 10:11:01,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 211. [2018-04-13 10:11:01,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2018-04-13 10:11:01,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 231 transitions. [2018-04-13 10:11:01,562 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 231 transitions. Word has length 101 [2018-04-13 10:11:01,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:01,562 INFO L459 AbstractCegarLoop]: Abstraction has 211 states and 231 transitions. [2018-04-13 10:11:01,562 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-13 10:11:01,562 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 231 transitions. [2018-04-13 10:11:01,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-04-13 10:11:01,563 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:01,563 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:01,563 INFO L408 AbstractCegarLoop]: === Iteration 40 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:01,563 INFO L82 PathProgramCache]: Analyzing trace with hash -2106600397, now seen corresponding path program 1 times [2018-04-13 10:11:01,563 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:01,563 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:01,563 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:01,564 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:01,564 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:01,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:01,570 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:01,609 INFO L134 CoverageAnalysis]: Checked inductivity of 224 backedges. 5 proven. 5 refuted. 0 times theorem prover too weak. 214 trivial. 0 not checked. [2018-04-13 10:11:01,609 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:01,609 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:01,610 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:01,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:01,626 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:01,638 INFO L134 CoverageAnalysis]: Checked inductivity of 224 backedges. 5 proven. 5 refuted. 0 times theorem prover too weak. 214 trivial. 0 not checked. [2018-04-13 10:11:01,638 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:11:01,639 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 7 [2018-04-13 10:11:01,639 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-04-13 10:11:01,639 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-04-13 10:11:01,639 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-04-13 10:11:01,639 INFO L87 Difference]: Start difference. First operand 211 states and 231 transitions. Second operand 7 states. [2018-04-13 10:11:01,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:01,692 INFO L93 Difference]: Finished difference Result 210 states and 227 transitions. [2018-04-13 10:11:01,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-13 10:11:01,693 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 100 [2018-04-13 10:11:01,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:01,694 INFO L225 Difference]: With dead ends: 210 [2018-04-13 10:11:01,694 INFO L226 Difference]: Without dead ends: 210 [2018-04-13 10:11:01,694 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 100 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=56, Unknown=0, NotChecked=0, Total=90 [2018-04-13 10:11:01,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-04-13 10:11:01,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 205. [2018-04-13 10:11:01,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2018-04-13 10:11:01,697 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 222 transitions. [2018-04-13 10:11:01,697 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 222 transitions. Word has length 100 [2018-04-13 10:11:01,698 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:01,698 INFO L459 AbstractCegarLoop]: Abstraction has 205 states and 222 transitions. [2018-04-13 10:11:01,698 INFO L460 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-04-13 10:11:01,698 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 222 transitions. [2018-04-13 10:11:01,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-04-13 10:11:01,699 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:01,699 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:01,699 INFO L408 AbstractCegarLoop]: === Iteration 41 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:01,699 INFO L82 PathProgramCache]: Analyzing trace with hash 747636996, now seen corresponding path program 2 times [2018-04-13 10:11:01,699 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:01,699 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:01,700 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:01,700 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:01,700 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:01,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:01,721 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:01,727 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:01,727 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:01,727 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:01,728 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:11:01,748 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:11:01,748 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:01,751 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:01,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:11:01,753 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:01,754 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:01,754 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:11:01,757 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:01,757 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:11:01,757 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:01,761 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:01,761 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-13 10:11:01,804 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:01,806 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:01,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-04-13 10:11:01,807 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:01,817 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:01,817 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:24, output treesize:19 [2018-04-13 10:11:01,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:01,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:01,901 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:01,911 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:01,997 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:01,997 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:28 [2018-04-13 10:11:02,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:11:02,106 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:11:02,106 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,110 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,117 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:02,117 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:37 [2018-04-13 10:11:02,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:11:02,201 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,202 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,202 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:11:02,203 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,210 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,220 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:02,220 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:53, output treesize:49 [2018-04-13 10:11:02,290 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:11:02,292 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,293 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:11:02,296 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,308 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,321 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:02,321 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:65, output treesize:61 [2018-04-13 10:11:02,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 50 [2018-04-13 10:11:02,390 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,391 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,391 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 181 [2018-04-13 10:11:02,396 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,410 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,421 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:02,421 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:77, output treesize:73 [2018-04-13 10:11:02,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 60 [2018-04-13 10:11:02,493 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,498 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,498 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,500 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,500 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 259 [2018-04-13 10:11:02,502 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,524 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,535 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:02,535 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:89, output treesize:85 [2018-04-13 10:11:02,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 70 [2018-04-13 10:11:02,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,616 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,617 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,617 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,618 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,618 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,619 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,619 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,620 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,620 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,621 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,622 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,622 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,623 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 351 [2018-04-13 10:11:02,624 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,654 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,667 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:02,667 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:101, output treesize:97 [2018-04-13 10:11:02,762 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 80 [2018-04-13 10:11:02,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,768 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,768 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,769 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,770 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,770 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,775 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,776 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,778 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,778 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,779 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,779 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,780 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,780 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,781 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,781 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,782 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,783 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,783 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,784 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,784 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,785 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,785 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,786 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 457 [2018-04-13 10:11:02,786 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,825 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:02,838 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:02,838 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:113, output treesize:109 [2018-04-13 10:11:02,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 89 [2018-04-13 10:11:02,929 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,929 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,930 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,931 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,931 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,932 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,932 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,933 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,933 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,934 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,934 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,935 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,935 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,936 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,936 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,937 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,937 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,938 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,938 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,939 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,940 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,940 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,941 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,941 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,942 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,942 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,943 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,943 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,944 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,944 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,945 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,945 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,946 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,947 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,947 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:02,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 568 [2018-04-13 10:11:02,949 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:03,007 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:03,023 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:03,023 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:129, output treesize:125 [2018-04-13 10:11:03,289 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,294 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 24 [2018-04-13 10:11:03,295 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:11:03,319 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-04-13 10:11:03,319 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:134, output treesize:266 [2018-04-13 10:11:03,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 117 treesize of output 97 [2018-04-13 10:11:03,521 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,522 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,523 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,523 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,524 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,524 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,525 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,525 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,526 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,526 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,527 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,527 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,527 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,528 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,528 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,529 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,529 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,530 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,530 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,531 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,531 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,532 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,533 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,533 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,534 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,534 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,535 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,535 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,536 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,536 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,537 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,537 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,538 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,538 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,539 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,539 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 36 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 372 [2018-04-13 10:11:03,540 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:03,578 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:03,589 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:03,589 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:244, output treesize:14 [2018-04-13 10:11:03,618 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,619 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:03,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-13 10:11:03,619 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:03,622 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:03,622 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:11 [2018-04-13 10:11:03,708 INFO L134 CoverageAnalysis]: Checked inductivity of 218 backedges. 87 proven. 129 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:11:03,708 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:03,708 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35] total 35 [2018-04-13 10:11:03,708 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-13 10:11:03,708 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-13 10:11:03,708 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=220, Invalid=1040, Unknown=0, NotChecked=0, Total=1260 [2018-04-13 10:11:03,708 INFO L87 Difference]: Start difference. First operand 205 states and 222 transitions. Second operand 36 states. [2018-04-13 10:11:05,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:05,519 INFO L93 Difference]: Finished difference Result 221 states and 236 transitions. [2018-04-13 10:11:05,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-04-13 10:11:05,519 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 100 [2018-04-13 10:11:05,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:05,520 INFO L225 Difference]: With dead ends: 221 [2018-04-13 10:11:05,520 INFO L226 Difference]: Without dead ends: 221 [2018-04-13 10:11:05,521 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 494 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=344, Invalid=1912, Unknown=0, NotChecked=0, Total=2256 [2018-04-13 10:11:05,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-04-13 10:11:05,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 211. [2018-04-13 10:11:05,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211 states. [2018-04-13 10:11:05,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211 states to 211 states and 229 transitions. [2018-04-13 10:11:05,523 INFO L78 Accepts]: Start accepts. Automaton has 211 states and 229 transitions. Word has length 100 [2018-04-13 10:11:05,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:05,523 INFO L459 AbstractCegarLoop]: Abstraction has 211 states and 229 transitions. [2018-04-13 10:11:05,523 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-13 10:11:05,523 INFO L276 IsEmpty]: Start isEmpty. Operand 211 states and 229 transitions. [2018-04-13 10:11:05,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2018-04-13 10:11:05,524 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:05,524 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:05,524 INFO L408 AbstractCegarLoop]: === Iteration 42 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:05,525 INFO L82 PathProgramCache]: Analyzing trace with hash 1701910469, now seen corresponding path program 2 times [2018-04-13 10:11:05,525 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:05,525 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:05,525 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:05,526 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:05,526 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:05,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:05,539 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:05,544 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:05,544 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:05,544 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:05,544 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:11:05,569 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:11:05,569 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:05,573 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:05,631 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:05,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:05,633 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,635 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,641 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,641 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-04-13 10:11:05,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:11:05,676 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:11:05,676 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,684 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,689 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,689 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:37, output treesize:33 [2018-04-13 10:11:05,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:11:05,719 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,719 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,720 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:11:05,720 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,726 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,731 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,731 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:49, output treesize:45 [2018-04-13 10:11:05,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-04-13 10:11:05,769 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,769 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,770 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,772 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-04-13 10:11:05,772 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,781 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,788 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,788 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-04-13 10:11:05,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 53 [2018-04-13 10:11:05,833 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,834 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,835 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,835 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,836 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,836 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,837 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,838 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,838 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,839 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 196 [2018-04-13 10:11:05,840 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,854 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,862 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,862 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:73, output treesize:69 [2018-04-13 10:11:05,915 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 63 [2018-04-13 10:11:05,917 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,918 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,919 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,919 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,920 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,921 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,921 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,922 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,922 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,923 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,924 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,924 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,925 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,925 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,926 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:05,926 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 277 [2018-04-13 10:11:05,927 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,949 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,958 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:05,958 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:85, output treesize:81 [2018-04-13 10:11:06,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 73 [2018-04-13 10:11:06,020 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,028 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,028 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,031 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,031 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,032 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,033 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,033 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,034 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 372 [2018-04-13 10:11:06,034 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:06,062 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:06,073 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:06,073 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:97, output treesize:93 [2018-04-13 10:11:06,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 83 [2018-04-13 10:11:06,151 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,152 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,153 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,153 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,154 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,154 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,156 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,156 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,157 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,157 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,158 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,158 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,159 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,163 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,163 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,164 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,164 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,165 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,166 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,166 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,167 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,167 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 481 [2018-04-13 10:11:06,168 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:06,205 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:06,217 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:06,217 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:109, output treesize:105 [2018-04-13 10:11:06,665 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 107 treesize of output 89 [2018-04-13 10:11:06,667 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,668 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,669 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,669 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,670 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,671 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,671 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,672 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,672 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,673 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,673 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,674 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,674 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,675 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,676 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,676 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,677 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,677 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,678 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,678 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,679 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,680 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,680 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,681 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,681 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,682 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,682 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:06,683 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,683 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,684 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,685 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,685 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,686 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:06,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 28 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 450 [2018-04-13 10:11:06,687 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:06,725 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:06,731 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:06,731 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:129, output treesize:3 [2018-04-13 10:11:06,787 INFO L134 CoverageAnalysis]: Checked inductivity of 220 backedges. 0 proven. 218 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:11:06,788 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:06,788 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33] total 33 [2018-04-13 10:11:06,788 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-13 10:11:06,788 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-13 10:11:06,788 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=1004, Unknown=0, NotChecked=0, Total=1122 [2018-04-13 10:11:06,789 INFO L87 Difference]: Start difference. First operand 211 states and 229 transitions. Second operand 34 states. [2018-04-13 10:11:09,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:09,200 INFO L93 Difference]: Finished difference Result 248 states and 271 transitions. [2018-04-13 10:11:09,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-04-13 10:11:09,200 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 101 [2018-04-13 10:11:09,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:09,201 INFO L225 Difference]: With dead ends: 248 [2018-04-13 10:11:09,201 INFO L226 Difference]: Without dead ends: 248 [2018-04-13 10:11:09,202 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 69 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1349 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=393, Invalid=4437, Unknown=0, NotChecked=0, Total=4830 [2018-04-13 10:11:09,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-04-13 10:11:09,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 241. [2018-04-13 10:11:09,203 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 241 states. [2018-04-13 10:11:09,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 241 states to 241 states and 264 transitions. [2018-04-13 10:11:09,204 INFO L78 Accepts]: Start accepts. Automaton has 241 states and 264 transitions. Word has length 101 [2018-04-13 10:11:09,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:09,204 INFO L459 AbstractCegarLoop]: Abstraction has 241 states and 264 transitions. [2018-04-13 10:11:09,204 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-13 10:11:09,205 INFO L276 IsEmpty]: Start isEmpty. Operand 241 states and 264 transitions. [2018-04-13 10:11:09,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-04-13 10:11:09,205 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:09,205 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:09,206 INFO L408 AbstractCegarLoop]: === Iteration 43 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:09,206 INFO L82 PathProgramCache]: Analyzing trace with hash -1431577489, now seen corresponding path program 2 times [2018-04-13 10:11:09,206 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:09,206 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:09,207 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:09,207 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:09,207 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:09,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:09,221 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:09,416 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 6 proven. 21 refuted. 0 times theorem prover too weak. 220 trivial. 0 not checked. [2018-04-13 10:11:09,416 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:09,416 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:09,417 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:11:09,438 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:11:09,438 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:09,442 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:09,583 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:09,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:09,585 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:09,586 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:09,589 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:09,589 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:11:09,679 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-13 10:11:09,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-04-13 10:11:09,680 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:09,681 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:09,681 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:09,682 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:15, output treesize:3 [2018-04-13 10:11:09,693 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 14 proven. 24 refuted. 0 times theorem prover too weak. 209 trivial. 0 not checked. [2018-04-13 10:11:09,694 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:11:09,694 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 18] total 28 [2018-04-13 10:11:09,694 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-04-13 10:11:09,694 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-04-13 10:11:09,695 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=728, Unknown=0, NotChecked=0, Total=812 [2018-04-13 10:11:09,695 INFO L87 Difference]: Start difference. First operand 241 states and 264 transitions. Second operand 29 states. [2018-04-13 10:11:10,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:10,576 INFO L93 Difference]: Finished difference Result 327 states and 356 transitions. [2018-04-13 10:11:10,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-04-13 10:11:10,576 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 103 [2018-04-13 10:11:10,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:10,577 INFO L225 Difference]: With dead ends: 327 [2018-04-13 10:11:10,577 INFO L226 Difference]: Without dead ends: 327 [2018-04-13 10:11:10,578 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 91 SyntacticMatches, 4 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 914 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=517, Invalid=3515, Unknown=0, NotChecked=0, Total=4032 [2018-04-13 10:11:10,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2018-04-13 10:11:10,580 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 251. [2018-04-13 10:11:10,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 251 states. [2018-04-13 10:11:10,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 251 states to 251 states and 273 transitions. [2018-04-13 10:11:10,581 INFO L78 Accepts]: Start accepts. Automaton has 251 states and 273 transitions. Word has length 103 [2018-04-13 10:11:10,581 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:10,582 INFO L459 AbstractCegarLoop]: Abstraction has 251 states and 273 transitions. [2018-04-13 10:11:10,582 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-04-13 10:11:10,582 INFO L276 IsEmpty]: Start isEmpty. Operand 251 states and 273 transitions. [2018-04-13 10:11:10,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-04-13 10:11:10,583 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:10,583 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:10,583 INFO L408 AbstractCegarLoop]: === Iteration 44 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:10,583 INFO L82 PathProgramCache]: Analyzing trace with hash 1219617124, now seen corresponding path program 2 times [2018-04-13 10:11:10,583 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:10,583 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:10,584 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:10,584 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:10,584 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:10,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:10,598 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:10,605 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:10,605 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:10,605 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:10,606 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:11:10,650 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:11:10,650 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:10,654 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:10,709 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:10,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:10,710 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:10,711 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:10,715 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:10,716 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-04-13 10:11:10,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:11:10,787 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:10,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:11:10,788 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:10,793 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:10,801 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:10,801 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:37, output treesize:33 [2018-04-13 10:11:10,845 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:11:10,847 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:10,848 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:10,849 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:10,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:11:10,850 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:10,859 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:10,868 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:10,868 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:49, output treesize:45 [2018-04-13 10:11:10,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-04-13 10:11:10,913 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:10,914 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:10,914 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:10,915 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:10,915 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:10,916 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:10,916 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-04-13 10:11:10,917 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:10,927 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:10,935 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:10,935 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-04-13 10:11:11,007 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 53 [2018-04-13 10:11:11,010 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,011 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,014 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 196 [2018-04-13 10:11:11,026 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:11,047 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:11,060 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:11,060 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:73, output treesize:69 [2018-04-13 10:11:11,149 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 63 [2018-04-13 10:11:11,152 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,153 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,153 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,154 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,156 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,156 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,157 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,158 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,158 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,159 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,163 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 277 [2018-04-13 10:11:11,163 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:11,203 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:11,216 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:11,217 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:85, output treesize:81 [2018-04-13 10:11:11,309 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 73 [2018-04-13 10:11:11,312 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,313 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,314 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,316 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,317 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,318 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,318 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,319 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,320 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,320 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,322 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,323 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,323 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,324 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,325 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,325 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,326 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,327 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,328 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 372 [2018-04-13 10:11:11,328 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:11,379 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:11,395 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:11,395 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:97, output treesize:93 [2018-04-13 10:11:11,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 83 [2018-04-13 10:11:11,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,506 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,507 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,507 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,508 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,508 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,509 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,509 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,510 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,510 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,511 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,513 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,513 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,514 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,514 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,515 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,515 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,517 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,517 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,518 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,519 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:11,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 481 [2018-04-13 10:11:11,520 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:11,574 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:11,587 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:11,587 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:109, output treesize:105 [2018-04-13 10:11:12,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 107 treesize of output 89 [2018-04-13 10:11:12,088 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,089 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,090 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,090 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,091 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,091 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,092 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,093 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,094 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,094 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,095 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,095 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,096 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,097 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,097 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,098 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,099 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,099 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,100 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,100 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:12,101 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,102 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,102 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,103 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,104 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,104 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,106 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,107 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,107 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:12,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 28 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 427 [2018-04-13 10:11:12,109 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:12,155 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:12,161 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:12,161 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:129, output treesize:3 [2018-04-13 10:11:12,218 INFO L134 CoverageAnalysis]: Checked inductivity of 222 backedges. 0 proven. 220 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:11:12,218 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:12,218 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33] total 33 [2018-04-13 10:11:12,218 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-13 10:11:12,218 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-13 10:11:12,219 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=1004, Unknown=0, NotChecked=0, Total=1122 [2018-04-13 10:11:12,219 INFO L87 Difference]: Start difference. First operand 251 states and 273 transitions. Second operand 34 states. [2018-04-13 10:11:14,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:14,591 INFO L93 Difference]: Finished difference Result 257 states and 279 transitions. [2018-04-13 10:11:14,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-04-13 10:11:14,592 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 102 [2018-04-13 10:11:14,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:14,592 INFO L225 Difference]: With dead ends: 257 [2018-04-13 10:11:14,592 INFO L226 Difference]: Without dead ends: 257 [2018-04-13 10:11:14,593 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 70 SyntacticMatches, 0 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1190 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=366, Invalid=4056, Unknown=0, NotChecked=0, Total=4422 [2018-04-13 10:11:14,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-04-13 10:11:14,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 252. [2018-04-13 10:11:14,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 252 states. [2018-04-13 10:11:14,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 252 states and 274 transitions. [2018-04-13 10:11:14,596 INFO L78 Accepts]: Start accepts. Automaton has 252 states and 274 transitions. Word has length 102 [2018-04-13 10:11:14,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:14,597 INFO L459 AbstractCegarLoop]: Abstraction has 252 states and 274 transitions. [2018-04-13 10:11:14,597 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-13 10:11:14,597 INFO L276 IsEmpty]: Start isEmpty. Operand 252 states and 274 transitions. [2018-04-13 10:11:14,598 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-04-13 10:11:14,598 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:14,598 INFO L355 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:14,598 INFO L408 AbstractCegarLoop]: === Iteration 45 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:14,598 INFO L82 PathProgramCache]: Analyzing trace with hash 1583987662, now seen corresponding path program 3 times [2018-04-13 10:11:14,598 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:14,598 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:14,599 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:14,599 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:14,599 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:14,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:14,609 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:14,809 INFO L134 CoverageAnalysis]: Checked inductivity of 262 backedges. 213 proven. 31 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-04-13 10:11:14,809 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:14,809 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:14,810 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:11:14,839 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-04-13 10:11:14,839 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:14,843 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:14,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:14,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:14,894 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:14,895 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:14,900 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:14,900 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:11:14,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:11:14,939 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:14,939 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:11:14,940 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:14,957 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:14,961 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:14,962 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-04-13 10:11:14,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:11:15,001 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:11:15,003 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,008 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,013 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,013 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:42 [2018-04-13 10:11:15,058 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-04-13 10:11:15,059 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,060 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,061 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,061 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-04-13 10:11:15,063 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,071 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,077 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,078 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:58, output treesize:54 [2018-04-13 10:11:15,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 53 [2018-04-13 10:11:15,131 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,132 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,133 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,133 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,134 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,135 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,135 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,136 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,136 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,137 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,138 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 196 [2018-04-13 10:11:15,138 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,152 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,159 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,159 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:70, output treesize:66 [2018-04-13 10:11:15,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 63 [2018-04-13 10:11:15,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,224 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,224 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,226 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,226 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,227 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,228 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,228 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,229 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,229 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,230 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,230 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,231 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 277 [2018-04-13 10:11:15,232 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,252 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,261 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,261 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:82, output treesize:78 [2018-04-13 10:11:15,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 73 [2018-04-13 10:11:15,328 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,328 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,329 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,329 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,330 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,330 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,331 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,331 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,332 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,332 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,333 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,333 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,334 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,334 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,334 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,335 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,335 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,336 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,336 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,337 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,337 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 372 [2018-04-13 10:11:15,338 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,365 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,375 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,376 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-04-13 10:11:15,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 83 [2018-04-13 10:11:15,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,498 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,498 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,500 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,500 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,503 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,503 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,506 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,506 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,507 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,507 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,508 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 481 [2018-04-13 10:11:15,509 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,549 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,561 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,561 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:109, output treesize:105 [2018-04-13 10:11:15,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 94 treesize of output 76 [2018-04-13 10:11:15,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,949 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,949 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,950 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,950 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,951 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,951 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,951 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,952 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,960 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,961 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,962 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,962 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,963 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,963 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,964 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,964 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,965 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,965 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,965 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,966 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,966 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,967 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,967 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,968 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,968 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,968 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,969 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,969 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:15,970 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,970 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,970 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:15,971 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 28 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 365 [2018-04-13 10:11:15,972 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:15,999 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:16,002 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:16,002 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:100, output treesize:3 [2018-04-13 10:11:16,062 INFO L134 CoverageAnalysis]: Checked inductivity of 262 backedges. 207 proven. 32 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2018-04-13 10:11:16,062 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:11:16,062 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 30] total 45 [2018-04-13 10:11:16,063 INFO L442 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-04-13 10:11:16,063 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-04-13 10:11:16,063 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=305, Invalid=1675, Unknown=0, NotChecked=0, Total=1980 [2018-04-13 10:11:16,063 INFO L87 Difference]: Start difference. First operand 252 states and 274 transitions. Second operand 45 states. [2018-04-13 10:11:18,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:18,102 INFO L93 Difference]: Finished difference Result 237 states and 250 transitions. [2018-04-13 10:11:18,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-13 10:11:18,102 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 105 [2018-04-13 10:11:18,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:18,103 INFO L225 Difference]: With dead ends: 237 [2018-04-13 10:11:18,103 INFO L226 Difference]: Without dead ends: 237 [2018-04-13 10:11:18,104 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 79 SyntacticMatches, 3 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1890 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=1065, Invalid=6075, Unknown=0, NotChecked=0, Total=7140 [2018-04-13 10:11:18,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-04-13 10:11:18,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 223. [2018-04-13 10:11:18,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2018-04-13 10:11:18,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 239 transitions. [2018-04-13 10:11:18,106 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 239 transitions. Word has length 105 [2018-04-13 10:11:18,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:18,106 INFO L459 AbstractCegarLoop]: Abstraction has 223 states and 239 transitions. [2018-04-13 10:11:18,106 INFO L460 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-04-13 10:11:18,106 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 239 transitions. [2018-04-13 10:11:18,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-04-13 10:11:18,106 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:18,107 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:18,107 INFO L408 AbstractCegarLoop]: === Iteration 46 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:18,107 INFO L82 PathProgramCache]: Analyzing trace with hash -1429228719, now seen corresponding path program 2 times [2018-04-13 10:11:18,107 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:18,107 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:18,107 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:18,107 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:18,107 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:18,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:18,120 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:18,370 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 14 proven. 24 refuted. 0 times theorem prover too weak. 209 trivial. 0 not checked. [2018-04-13 10:11:18,370 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:18,371 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:18,371 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:11:18,396 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:11:18,396 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:18,400 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:18,523 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:11:18,523 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:18,524 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:18,524 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:11:18,575 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:18,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:18,576 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:18,577 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:18,581 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:18,581 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:20 [2018-04-13 10:11:18,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-04-13 10:11:18,633 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:18,633 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:18,633 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:3 [2018-04-13 10:11:18,654 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-04-13 10:11:18,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-04-13 10:11:18,655 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:18,656 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:18,656 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:18,656 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-04-13 10:11:18,671 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 11 proven. 27 refuted. 0 times theorem prover too weak. 209 trivial. 0 not checked. [2018-04-13 10:11:18,671 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:11:18,671 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 30 [2018-04-13 10:11:18,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-04-13 10:11:18,671 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-04-13 10:11:18,671 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=845, Unknown=0, NotChecked=0, Total=930 [2018-04-13 10:11:18,672 INFO L87 Difference]: Start difference. First operand 223 states and 239 transitions. Second operand 31 states. [2018-04-13 10:11:19,373 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:19,373 INFO L93 Difference]: Finished difference Result 242 states and 255 transitions. [2018-04-13 10:11:19,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-13 10:11:19,374 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 104 [2018-04-13 10:11:19,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:19,374 INFO L225 Difference]: With dead ends: 242 [2018-04-13 10:11:19,374 INFO L226 Difference]: Without dead ends: 242 [2018-04-13 10:11:19,375 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 94 SyntacticMatches, 3 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 776 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=412, Invalid=3370, Unknown=0, NotChecked=0, Total=3782 [2018-04-13 10:11:19,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-04-13 10:11:19,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 224. [2018-04-13 10:11:19,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-04-13 10:11:19,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 240 transitions. [2018-04-13 10:11:19,377 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 240 transitions. Word has length 104 [2018-04-13 10:11:19,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:19,377 INFO L459 AbstractCegarLoop]: Abstraction has 224 states and 240 transitions. [2018-04-13 10:11:19,377 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-04-13 10:11:19,377 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 240 transitions. [2018-04-13 10:11:19,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-04-13 10:11:19,377 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:19,377 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:19,377 INFO L408 AbstractCegarLoop]: === Iteration 47 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:19,378 INFO L82 PathProgramCache]: Analyzing trace with hash -847604687, now seen corresponding path program 2 times [2018-04-13 10:11:19,378 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:19,378 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:19,378 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:19,378 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:19,378 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:19,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:19,388 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:19,436 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:11:19,436 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:19,436 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:19,437 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:11:19,449 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:11:19,449 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:19,452 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:19,498 INFO L134 CoverageAnalysis]: Checked inductivity of 216 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:11:19,498 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:11:19,498 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 10 [2018-04-13 10:11:19,498 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-04-13 10:11:19,499 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-04-13 10:11:19,499 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=59, Unknown=0, NotChecked=0, Total=90 [2018-04-13 10:11:19,499 INFO L87 Difference]: Start difference. First operand 224 states and 240 transitions. Second operand 10 states. [2018-04-13 10:11:19,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:19,543 INFO L93 Difference]: Finished difference Result 256 states and 268 transitions. [2018-04-13 10:11:19,544 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-04-13 10:11:19,544 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 103 [2018-04-13 10:11:19,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:19,544 INFO L225 Difference]: With dead ends: 256 [2018-04-13 10:11:19,544 INFO L226 Difference]: Without dead ends: 252 [2018-04-13 10:11:19,544 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-04-13 10:11:19,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2018-04-13 10:11:19,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 232. [2018-04-13 10:11:19,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-04-13 10:11:19,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 251 transitions. [2018-04-13 10:11:19,547 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 251 transitions. Word has length 103 [2018-04-13 10:11:19,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:19,547 INFO L459 AbstractCegarLoop]: Abstraction has 232 states and 251 transitions. [2018-04-13 10:11:19,547 INFO L460 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-04-13 10:11:19,547 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 251 transitions. [2018-04-13 10:11:19,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-04-13 10:11:19,548 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:19,548 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:19,548 INFO L408 AbstractCegarLoop]: === Iteration 48 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:19,548 INFO L82 PathProgramCache]: Analyzing trace with hash -917911745, now seen corresponding path program 1 times [2018-04-13 10:11:19,548 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:19,548 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:19,549 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:19,549 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:19,549 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:19,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:19,559 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:19,709 INFO L134 CoverageAnalysis]: Checked inductivity of 221 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 214 trivial. 0 not checked. [2018-04-13 10:11:19,709 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:19,709 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:19,710 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:19,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:19,730 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:20,138 INFO L134 CoverageAnalysis]: Checked inductivity of 221 backedges. 0 proven. 41 refuted. 0 times theorem prover too weak. 180 trivial. 0 not checked. [2018-04-13 10:11:20,138 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:11:20,138 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 14] total 25 [2018-04-13 10:11:20,138 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-04-13 10:11:20,139 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-04-13 10:11:20,139 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=581, Unknown=0, NotChecked=0, Total=650 [2018-04-13 10:11:20,139 INFO L87 Difference]: Start difference. First operand 232 states and 251 transitions. Second operand 26 states. [2018-04-13 10:11:21,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:21,015 INFO L93 Difference]: Finished difference Result 288 states and 306 transitions. [2018-04-13 10:11:21,059 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-13 10:11:21,059 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 106 [2018-04-13 10:11:21,059 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:21,060 INFO L225 Difference]: With dead ends: 288 [2018-04-13 10:11:21,060 INFO L226 Difference]: Without dead ends: 288 [2018-04-13 10:11:21,060 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 313 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=169, Invalid=1391, Unknown=0, NotChecked=0, Total=1560 [2018-04-13 10:11:21,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2018-04-13 10:11:21,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 232. [2018-04-13 10:11:21,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 232 states. [2018-04-13 10:11:21,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 232 states to 232 states and 250 transitions. [2018-04-13 10:11:21,063 INFO L78 Accepts]: Start accepts. Automaton has 232 states and 250 transitions. Word has length 106 [2018-04-13 10:11:21,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:21,063 INFO L459 AbstractCegarLoop]: Abstraction has 232 states and 250 transitions. [2018-04-13 10:11:21,063 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-04-13 10:11:21,064 INFO L276 IsEmpty]: Start isEmpty. Operand 232 states and 250 transitions. [2018-04-13 10:11:21,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-04-13 10:11:21,064 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:21,064 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:21,064 INFO L408 AbstractCegarLoop]: === Iteration 49 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:21,064 INFO L82 PathProgramCache]: Analyzing trace with hash -2141484813, now seen corresponding path program 2 times [2018-04-13 10:11:21,064 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:21,064 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:21,065 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:21,065 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:21,065 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:21,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:21,075 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:21,083 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:21,083 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:21,083 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:21,084 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:11:21,097 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:11:21,098 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:21,100 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:21,206 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:21,207 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:21,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 12 [2018-04-13 10:11:21,208 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:21,214 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:21,214 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:24, output treesize:18 [2018-04-13 10:11:21,247 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:21,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:21,249 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:21,250 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:21,257 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:21,257 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:31 [2018-04-13 10:11:21,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:11:21,299 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:21,305 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:21,305 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:35, output treesize:30 [2018-04-13 10:11:21,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 37 treesize of output 39 [2018-04-13 10:11:21,458 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:21,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 31 [2018-04-13 10:11:21,458 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:21,469 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:21,470 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:21,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 44 [2018-04-13 10:11:21,470 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:21,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 9 [2018-04-13 10:11:21,481 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:21,485 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:21,501 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:21,502 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:68, output treesize:10 [2018-04-13 10:11:21,519 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:21,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:11:21,520 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:21,523 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:21,524 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-13 10:11:21,553 INFO L134 CoverageAnalysis]: Checked inductivity of 247 backedges. 17 proven. 27 refuted. 0 times theorem prover too weak. 203 trivial. 0 not checked. [2018-04-13 10:11:21,553 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:21,553 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-04-13 10:11:21,553 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-13 10:11:21,553 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-13 10:11:21,553 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=417, Unknown=0, NotChecked=0, Total=462 [2018-04-13 10:11:21,554 INFO L87 Difference]: Start difference. First operand 232 states and 250 transitions. Second operand 22 states. [2018-04-13 10:11:22,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:22,449 INFO L93 Difference]: Finished difference Result 262 states and 279 transitions. [2018-04-13 10:11:22,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-13 10:11:22,450 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 107 [2018-04-13 10:11:22,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:22,450 INFO L225 Difference]: With dead ends: 262 [2018-04-13 10:11:22,450 INFO L226 Difference]: Without dead ends: 262 [2018-04-13 10:11:22,451 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 261 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=171, Invalid=1551, Unknown=0, NotChecked=0, Total=1722 [2018-04-13 10:11:22,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2018-04-13 10:11:22,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 247. [2018-04-13 10:11:22,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247 states. [2018-04-13 10:11:22,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247 states to 247 states and 265 transitions. [2018-04-13 10:11:22,453 INFO L78 Accepts]: Start accepts. Automaton has 247 states and 265 transitions. Word has length 107 [2018-04-13 10:11:22,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:22,453 INFO L459 AbstractCegarLoop]: Abstraction has 247 states and 265 transitions. [2018-04-13 10:11:22,454 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-13 10:11:22,454 INFO L276 IsEmpty]: Start isEmpty. Operand 247 states and 265 transitions. [2018-04-13 10:11:22,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-04-13 10:11:22,454 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:22,454 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:22,455 INFO L408 AbstractCegarLoop]: === Iteration 50 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:22,455 INFO L82 PathProgramCache]: Analyzing trace with hash 1609507019, now seen corresponding path program 1 times [2018-04-13 10:11:22,455 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:22,455 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:22,456 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:22,456 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:22,456 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:22,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:22,469 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:22,473 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:22,473 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:22,474 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:22,474 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:22,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:22,499 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:22,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:22,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:22,584 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:22,586 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:22,592 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:22,592 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:25 [2018-04-13 10:11:22,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-13 10:11:22,663 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:22,663 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-13 10:11:22,663 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:22,665 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:22,671 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:22,671 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:49, output treesize:3 [2018-04-13 10:11:22,689 INFO L134 CoverageAnalysis]: Checked inductivity of 221 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 209 trivial. 0 not checked. [2018-04-13 10:11:22,689 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:22,689 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14] total 14 [2018-04-13 10:11:22,689 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-13 10:11:22,689 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-13 10:11:22,689 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2018-04-13 10:11:22,689 INFO L87 Difference]: Start difference. First operand 247 states and 265 transitions. Second operand 15 states. [2018-04-13 10:11:23,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:23,016 INFO L93 Difference]: Finished difference Result 292 states and 315 transitions. [2018-04-13 10:11:23,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 10:11:23,016 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 107 [2018-04-13 10:11:23,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:23,018 INFO L225 Difference]: With dead ends: 292 [2018-04-13 10:11:23,018 INFO L226 Difference]: Without dead ends: 292 [2018-04-13 10:11:23,018 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=80, Invalid=472, Unknown=0, NotChecked=0, Total=552 [2018-04-13 10:11:23,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2018-04-13 10:11:23,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 281. [2018-04-13 10:11:23,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 281 states. [2018-04-13 10:11:23,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281 states to 281 states and 309 transitions. [2018-04-13 10:11:23,021 INFO L78 Accepts]: Start accepts. Automaton has 281 states and 309 transitions. Word has length 107 [2018-04-13 10:11:23,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:23,022 INFO L459 AbstractCegarLoop]: Abstraction has 281 states and 309 transitions. [2018-04-13 10:11:23,022 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-13 10:11:23,022 INFO L276 IsEmpty]: Start isEmpty. Operand 281 states and 309 transitions. [2018-04-13 10:11:23,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-04-13 10:11:23,022 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:23,023 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:23,023 INFO L408 AbstractCegarLoop]: === Iteration 51 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:23,023 INFO L82 PathProgramCache]: Analyzing trace with hash -1644889826, now seen corresponding path program 1 times [2018-04-13 10:11:23,023 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:23,023 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:23,024 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:23,024 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:23,024 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:23,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:23,038 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:23,225 INFO L134 CoverageAnalysis]: Checked inductivity of 221 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 214 trivial. 0 not checked. [2018-04-13 10:11:23,225 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:23,225 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:23,226 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:23,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:23,247 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:23,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:23,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:23,395 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:23,396 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:23,400 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:23,400 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:25 [2018-04-13 10:11:23,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-13 10:11:23,517 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:23,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-13 10:11:23,518 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:23,520 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:23,526 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:23,526 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:49, output treesize:3 [2018-04-13 10:11:23,552 INFO L134 CoverageAnalysis]: Checked inductivity of 221 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 209 trivial. 0 not checked. [2018-04-13 10:11:23,552 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:11:23,553 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14] total 27 [2018-04-13 10:11:23,553 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-13 10:11:23,553 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-13 10:11:23,553 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=680, Unknown=0, NotChecked=0, Total=756 [2018-04-13 10:11:23,553 INFO L87 Difference]: Start difference. First operand 281 states and 309 transitions. Second operand 28 states. [2018-04-13 10:11:24,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:24,258 INFO L93 Difference]: Finished difference Result 335 states and 363 transitions. [2018-04-13 10:11:24,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-13 10:11:24,258 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 108 [2018-04-13 10:11:24,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:24,259 INFO L225 Difference]: With dead ends: 335 [2018-04-13 10:11:24,259 INFO L226 Difference]: Without dead ends: 335 [2018-04-13 10:11:24,259 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 139 GetRequests, 95 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 371 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=217, Invalid=1763, Unknown=0, NotChecked=0, Total=1980 [2018-04-13 10:11:24,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335 states. [2018-04-13 10:11:24,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335 to 314. [2018-04-13 10:11:24,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314 states. [2018-04-13 10:11:24,262 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 351 transitions. [2018-04-13 10:11:24,262 INFO L78 Accepts]: Start accepts. Automaton has 314 states and 351 transitions. Word has length 108 [2018-04-13 10:11:24,262 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:24,262 INFO L459 AbstractCegarLoop]: Abstraction has 314 states and 351 transitions. [2018-04-13 10:11:24,262 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-13 10:11:24,262 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 351 transitions. [2018-04-13 10:11:24,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-04-13 10:11:24,263 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:24,263 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:24,263 INFO L408 AbstractCegarLoop]: === Iteration 52 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:24,263 INFO L82 PathProgramCache]: Analyzing trace with hash 928632056, now seen corresponding path program 3 times [2018-04-13 10:11:24,263 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:24,263 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:24,264 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:24,264 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:24,264 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:24,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:24,276 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:24,279 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:24,279 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:24,279 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:24,280 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:11:24,301 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-04-13 10:11:24,301 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:24,304 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:24,351 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:24,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:24,353 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,354 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,376 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,377 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-04-13 10:11:24,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:11:24,406 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:24,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:11:24,406 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,410 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,416 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:24,416 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:34 [2018-04-13 10:11:24,447 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-04-13 10:11:24,449 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:24,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 42 [2018-04-13 10:11:24,451 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,455 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,463 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:24,463 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:49, output treesize:45 [2018-04-13 10:11:24,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:11:24,563 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:24,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-13 10:11:24,568 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,576 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,590 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:24,590 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:65, output treesize:61 [2018-04-13 10:11:24,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:11:24,674 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:24,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-13 10:11:24,677 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,683 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,694 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:24,694 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:65, output treesize:61 [2018-04-13 10:11:24,744 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:11:24,746 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:24,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-13 10:11:24,750 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,756 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,766 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:24,766 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:65, output treesize:61 [2018-04-13 10:11:24,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:11:24,836 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:24,840 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-13 10:11:24,840 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,846 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,858 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:24,858 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:65, output treesize:61 [2018-04-13 10:11:24,925 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:11:24,927 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:24,930 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-13 10:11:24,930 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,935 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:24,943 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:24,944 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:65, output treesize:61 [2018-04-13 10:11:25,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 18 [2018-04-13 10:11:25,120 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:25,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 10 [2018-04-13 10:11:25,121 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:25,122 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:25,126 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:25,126 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:36, output treesize:13 [2018-04-13 10:11:25,141 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:25,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:11:25,142 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:25,145 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:25,145 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:11:25,200 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 23 proven. 157 refuted. 0 times theorem prover too weak. 57 trivial. 0 not checked. [2018-04-13 10:11:25,200 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:25,201 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22] total 22 [2018-04-13 10:11:25,201 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-13 10:11:25,201 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-13 10:11:25,201 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=441, Unknown=0, NotChecked=0, Total=506 [2018-04-13 10:11:25,201 INFO L87 Difference]: Start difference. First operand 314 states and 351 transitions. Second operand 23 states. [2018-04-13 10:11:26,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:26,304 INFO L93 Difference]: Finished difference Result 336 states and 371 transitions. [2018-04-13 10:11:26,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-13 10:11:26,341 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 108 [2018-04-13 10:11:26,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:26,342 INFO L225 Difference]: With dead ends: 336 [2018-04-13 10:11:26,342 INFO L226 Difference]: Without dead ends: 336 [2018-04-13 10:11:26,342 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 78 SyntacticMatches, 10 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 393 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=195, Invalid=1527, Unknown=0, NotChecked=0, Total=1722 [2018-04-13 10:11:26,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states. [2018-04-13 10:11:26,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 320. [2018-04-13 10:11:26,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 320 states. [2018-04-13 10:11:26,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 320 states to 320 states and 358 transitions. [2018-04-13 10:11:26,346 INFO L78 Accepts]: Start accepts. Automaton has 320 states and 358 transitions. Word has length 108 [2018-04-13 10:11:26,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:26,347 INFO L459 AbstractCegarLoop]: Abstraction has 320 states and 358 transitions. [2018-04-13 10:11:26,347 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-13 10:11:26,347 INFO L276 IsEmpty]: Start isEmpty. Operand 320 states and 358 transitions. [2018-04-13 10:11:26,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-04-13 10:11:26,347 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:26,348 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 4, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:26,348 INFO L408 AbstractCegarLoop]: === Iteration 53 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:26,348 INFO L82 PathProgramCache]: Analyzing trace with hash -1277177263, now seen corresponding path program 4 times [2018-04-13 10:11:26,348 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:26,348 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:26,349 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:26,349 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:26,349 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:26,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:26,373 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:26,381 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:26,381 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:26,381 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:26,382 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:11:26,404 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:11:26,404 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:26,407 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:26,431 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:26,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:26,432 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,434 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,437 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,437 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:11:26,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:11:26,458 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:11:26,459 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,479 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,485 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,486 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-04-13 10:11:26,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:11:26,520 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,521 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,522 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:11:26,523 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,529 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,535 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,535 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:42 [2018-04-13 10:11:26,566 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-04-13 10:11:26,568 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,568 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,569 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,570 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,570 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,571 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-04-13 10:11:26,572 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,610 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,620 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,620 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:58, output treesize:54 [2018-04-13 10:11:26,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 53 [2018-04-13 10:11:26,676 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,677 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,678 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,679 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,679 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,680 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,681 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,682 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,683 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,684 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,684 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 196 [2018-04-13 10:11:26,685 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,705 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,712 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,712 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:70, output treesize:66 [2018-04-13 10:11:26,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 63 [2018-04-13 10:11:26,753 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,753 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,754 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,755 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,755 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,757 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,757 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,758 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,758 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 277 [2018-04-13 10:11:26,761 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,782 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,791 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,791 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:82, output treesize:78 [2018-04-13 10:11:26,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 73 [2018-04-13 10:11:26,841 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,842 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,842 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,843 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,844 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,844 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,845 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,846 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,846 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,847 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,847 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,848 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,849 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,849 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,850 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,850 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,851 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,852 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,852 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,853 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,854 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:26,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 372 [2018-04-13 10:11:26,854 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,884 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,894 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:26,894 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-04-13 10:11:27,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 77 [2018-04-13 10:11:27,262 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,263 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,263 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,264 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,264 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,265 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,265 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,266 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,266 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:27,267 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,267 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,268 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,268 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,269 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,269 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,270 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,270 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,271 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,271 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,272 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,272 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,273 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,273 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:27,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 21 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 297 [2018-04-13 10:11:27,274 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:27,290 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:27,293 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:27,293 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:99, output treesize:3 [2018-04-13 10:11:27,346 INFO L134 CoverageAnalysis]: Checked inductivity of 240 backedges. 0 proven. 236 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-13 10:11:27,347 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:27,347 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28] total 28 [2018-04-13 10:11:27,347 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-04-13 10:11:27,347 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-04-13 10:11:27,347 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=725, Unknown=0, NotChecked=0, Total=812 [2018-04-13 10:11:27,347 INFO L87 Difference]: Start difference. First operand 320 states and 358 transitions. Second operand 29 states. [2018-04-13 10:11:29,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:29,914 INFO L93 Difference]: Finished difference Result 328 states and 366 transitions. [2018-04-13 10:11:29,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-04-13 10:11:29,914 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 109 [2018-04-13 10:11:29,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:29,915 INFO L225 Difference]: With dead ends: 328 [2018-04-13 10:11:29,915 INFO L226 Difference]: Without dead ends: 328 [2018-04-13 10:11:29,916 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 81 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1030 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=337, Invalid=3323, Unknown=0, NotChecked=0, Total=3660 [2018-04-13 10:11:29,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 328 states. [2018-04-13 10:11:29,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 328 to 321. [2018-04-13 10:11:29,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2018-04-13 10:11:29,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 359 transitions. [2018-04-13 10:11:29,918 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 359 transitions. Word has length 109 [2018-04-13 10:11:29,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:29,918 INFO L459 AbstractCegarLoop]: Abstraction has 321 states and 359 transitions. [2018-04-13 10:11:29,918 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-04-13 10:11:29,918 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 359 transitions. [2018-04-13 10:11:29,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-04-13 10:11:29,918 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:29,918 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 4, 4, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:29,919 INFO L408 AbstractCegarLoop]: === Iteration 54 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:29,919 INFO L82 PathProgramCache]: Analyzing trace with hash -937789352, now seen corresponding path program 3 times [2018-04-13 10:11:29,919 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:29,919 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:29,919 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:29,919 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:29,919 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:29,932 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:29,933 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:29,936 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:29,936 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:29,936 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:29,937 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:11:29,956 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2018-04-13 10:11:29,957 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:29,961 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:29,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:29,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:29,990 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:29,991 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:29,993 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:29,993 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:15 [2018-04-13 10:11:30,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:11:30,003 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:11:30,004 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,007 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,009 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,010 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:11:30,024 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:11:30,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:11:30,027 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,032 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,037 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,037 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:11:30,057 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-04-13 10:11:30,058 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,058 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,059 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,059 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,060 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,060 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-04-13 10:11:30,061 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,069 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,074 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,074 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:55, output treesize:51 [2018-04-13 10:11:30,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 53 [2018-04-13 10:11:30,102 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,102 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,103 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,103 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,104 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,104 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,106 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,106 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 196 [2018-04-13 10:11:30,107 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,121 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,126 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,127 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:67, output treesize:63 [2018-04-13 10:11:30,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 63 [2018-04-13 10:11:30,159 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,163 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,163 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,164 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,164 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,165 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,165 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,166 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,166 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,167 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 277 [2018-04-13 10:11:30,167 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,189 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,196 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,196 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:79, output treesize:75 [2018-04-13 10:11:30,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 73 [2018-04-13 10:11:30,272 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,273 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,273 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,274 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,275 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,275 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,276 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,276 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,276 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,278 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,278 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,279 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,279 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,282 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,282 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 372 [2018-04-13 10:11:30,283 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,310 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,320 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,320 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-04-13 10:11:30,725 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 77 [2018-04-13 10:11:30,727 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,727 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,728 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,729 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,729 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,730 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,730 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,731 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,731 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,732 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,732 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,733 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,733 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,734 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,735 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,735 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:30,736 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,736 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,737 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,737 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,738 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,738 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,739 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,740 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:30,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 21 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 311 [2018-04-13 10:11:30,740 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,762 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,765 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:30,765 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:99, output treesize:3 [2018-04-13 10:11:30,819 INFO L134 CoverageAnalysis]: Checked inductivity of 243 backedges. 167 proven. 51 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2018-04-13 10:11:30,819 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:30,820 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25] total 25 [2018-04-13 10:11:30,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-04-13 10:11:30,820 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-04-13 10:11:30,820 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=129, Invalid=521, Unknown=0, NotChecked=0, Total=650 [2018-04-13 10:11:30,820 INFO L87 Difference]: Start difference. First operand 321 states and 359 transitions. Second operand 26 states. [2018-04-13 10:11:32,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:32,304 INFO L93 Difference]: Finished difference Result 333 states and 371 transitions. [2018-04-13 10:11:32,304 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-13 10:11:32,304 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 110 [2018-04-13 10:11:32,305 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:32,305 INFO L225 Difference]: With dead ends: 333 [2018-04-13 10:11:32,305 INFO L226 Difference]: Without dead ends: 333 [2018-04-13 10:11:32,305 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 85 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 337 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=208, Invalid=1124, Unknown=0, NotChecked=0, Total=1332 [2018-04-13 10:11:32,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-04-13 10:11:32,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 322. [2018-04-13 10:11:32,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 322 states. [2018-04-13 10:11:32,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 322 states to 322 states and 360 transitions. [2018-04-13 10:11:32,308 INFO L78 Accepts]: Start accepts. Automaton has 322 states and 360 transitions. Word has length 110 [2018-04-13 10:11:32,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:32,308 INFO L459 AbstractCegarLoop]: Abstraction has 322 states and 360 transitions. [2018-04-13 10:11:32,308 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-04-13 10:11:32,308 INFO L276 IsEmpty]: Start isEmpty. Operand 322 states and 360 transitions. [2018-04-13 10:11:32,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-04-13 10:11:32,309 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:32,309 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:32,309 INFO L408 AbstractCegarLoop]: === Iteration 55 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:32,309 INFO L82 PathProgramCache]: Analyzing trace with hash 1250165919, now seen corresponding path program 1 times [2018-04-13 10:11:32,309 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:32,309 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:32,309 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:32,310 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:32,310 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:32,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:32,328 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:32,348 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:32,348 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:32,348 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:32,349 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:32,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:32,373 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:32,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:32,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:32,420 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,421 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,425 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,425 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-04-13 10:11:32,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:11:32,480 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:32,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:11:32,481 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,484 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,489 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,489 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:26 [2018-04-13 10:11:32,614 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 40 treesize of output 50 [2018-04-13 10:11:32,617 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:32,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 53 [2018-04-13 10:11:32,618 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,634 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,643 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:32,644 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:66, output treesize:62 [2018-04-13 10:11:32,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 47 treesize of output 47 [2018-04-13 10:11:32,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 33 [2018-04-13 10:11:32,754 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:32,767 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:32,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 32 [2018-04-13 10:11:32,768 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:32,777 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:32,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 28 [2018-04-13 10:11:32,778 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,783 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,791 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:32,791 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:88, output treesize:3 [2018-04-13 10:11:32,821 INFO L134 CoverageAnalysis]: Checked inductivity of 251 backedges. 13 proven. 35 refuted. 0 times theorem prover too weak. 203 trivial. 0 not checked. [2018-04-13 10:11:32,822 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:32,822 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22] total 22 [2018-04-13 10:11:32,822 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-13 10:11:32,822 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-13 10:11:32,822 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=447, Unknown=0, NotChecked=0, Total=506 [2018-04-13 10:11:32,822 INFO L87 Difference]: Start difference. First operand 322 states and 360 transitions. Second operand 23 states. [2018-04-13 10:11:33,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:33,887 INFO L93 Difference]: Finished difference Result 395 states and 441 transitions. [2018-04-13 10:11:33,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-04-13 10:11:33,887 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 112 [2018-04-13 10:11:33,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:33,888 INFO L225 Difference]: With dead ends: 395 [2018-04-13 10:11:33,888 INFO L226 Difference]: Without dead ends: 395 [2018-04-13 10:11:33,889 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 91 SyntacticMatches, 1 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 532 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=270, Invalid=1986, Unknown=0, NotChecked=0, Total=2256 [2018-04-13 10:11:33,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states. [2018-04-13 10:11:33,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 335. [2018-04-13 10:11:33,891 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 335 states. [2018-04-13 10:11:33,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 335 states to 335 states and 375 transitions. [2018-04-13 10:11:33,892 INFO L78 Accepts]: Start accepts. Automaton has 335 states and 375 transitions. Word has length 112 [2018-04-13 10:11:33,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:33,892 INFO L459 AbstractCegarLoop]: Abstraction has 335 states and 375 transitions. [2018-04-13 10:11:33,892 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-13 10:11:33,892 INFO L276 IsEmpty]: Start isEmpty. Operand 335 states and 375 transitions. [2018-04-13 10:11:33,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-04-13 10:11:33,892 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:33,892 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:33,892 INFO L408 AbstractCegarLoop]: === Iteration 56 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:33,892 INFO L82 PathProgramCache]: Analyzing trace with hash 992271293, now seen corresponding path program 3 times [2018-04-13 10:11:33,893 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:33,893 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:33,893 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:33,893 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:33,893 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:33,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:33,899 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:33,953 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 0 proven. 30 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:11:33,953 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:33,953 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:33,954 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:11:33,962 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-04-13 10:11:33,962 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:33,964 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:33,971 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:33,972 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:33,973 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:33,974 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:33,976 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:33,976 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:15 [2018-04-13 10:11:34,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:34,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:11:34,191 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:11:34,205 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 6 dim-0 vars, and 2 xjuncts. [2018-04-13 10:11:34,205 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:37, output treesize:79 [2018-04-13 10:11:34,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 53 treesize of output 53 [2018-04-13 10:11:34,400 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:34,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 39 [2018-04-13 10:11:34,401 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:34,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 19 [2018-04-13 10:11:34,424 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:34,446 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:34,446 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 26 [2018-04-13 10:11:34,446 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:34,465 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:34,487 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 47 treesize of output 49 [2018-04-13 10:11:34,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-04-13 10:11:34,490 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:34,514 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:34,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 28 [2018-04-13 10:11:34,515 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:34,527 INFO L267 ElimStorePlain]: Start of recursive call 6: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:34,546 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 2 dim-2 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:11:34,546 INFO L202 ElimStorePlain]: Needed 8 recursive calls to eliminate 14 variables, input treesize:101, output treesize:21 [2018-04-13 10:11:34,604 INFO L134 CoverageAnalysis]: Checked inductivity of 234 backedges. 40 proven. 16 refuted. 0 times theorem prover too weak. 178 trivial. 0 not checked. [2018-04-13 10:11:34,604 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:11:34,604 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 14] total 21 [2018-04-13 10:11:34,604 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-13 10:11:34,605 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-13 10:11:34,605 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=363, Unknown=0, NotChecked=0, Total=420 [2018-04-13 10:11:34,605 INFO L87 Difference]: Start difference. First operand 335 states and 375 transitions. Second operand 21 states. [2018-04-13 10:11:36,646 WARN L151 SmtUtils]: Spent 102ms on a formula simplification. DAG size of input: 81 DAG size of output 77 [2018-04-13 10:11:37,463 WARN L151 SmtUtils]: Spent 229ms on a formula simplification. DAG size of input: 76 DAG size of output 66 [2018-04-13 10:11:38,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:38,069 INFO L93 Difference]: Finished difference Result 410 states and 456 transitions. [2018-04-13 10:11:38,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-13 10:11:38,069 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 111 [2018-04-13 10:11:38,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:38,070 INFO L225 Difference]: With dead ends: 410 [2018-04-13 10:11:38,070 INFO L226 Difference]: Without dead ends: 402 [2018-04-13 10:11:38,070 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 924 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=501, Invalid=3035, Unknown=4, NotChecked=0, Total=3540 [2018-04-13 10:11:38,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 402 states. [2018-04-13 10:11:38,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 402 to 361. [2018-04-13 10:11:38,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 361 states. [2018-04-13 10:11:38,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 412 transitions. [2018-04-13 10:11:38,073 INFO L78 Accepts]: Start accepts. Automaton has 361 states and 412 transitions. Word has length 111 [2018-04-13 10:11:38,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:38,073 INFO L459 AbstractCegarLoop]: Abstraction has 361 states and 412 transitions. [2018-04-13 10:11:38,073 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-13 10:11:38,073 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 412 transitions. [2018-04-13 10:11:38,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-04-13 10:11:38,074 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:38,074 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:38,074 INFO L408 AbstractCegarLoop]: === Iteration 57 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:38,074 INFO L82 PathProgramCache]: Analyzing trace with hash 1644464050, now seen corresponding path program 3 times [2018-04-13 10:11:38,074 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:38,074 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:38,074 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:38,074 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:38,075 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:38,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:38,085 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:38,088 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:38,088 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:38,088 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:38,088 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:11:38,122 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-04-13 10:11:38,122 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:38,124 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:38,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:11:38,130 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:38,143 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:11:38,144 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:38,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-04-13 10:11:38,157 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:38,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-13 10:11:38,158 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:38,169 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:11:38,170 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-04-13 10:11:38,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 29 [2018-04-13 10:11:38,284 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:38,300 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 28 [2018-04-13 10:11:38,300 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:38,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,316 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 50 [2018-04-13 10:11:38,316 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:38,334 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,334 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-04-13 10:11:38,335 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:38,348 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:11:38,348 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:73, output treesize:55 [2018-04-13 10:11:38,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 45 [2018-04-13 10:11:38,605 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:38,658 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,659 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 45 treesize of output 72 [2018-04-13 10:11:38,667 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:11:38,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,778 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 43 [2018-04-13 10:11:38,779 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:38,856 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,857 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,857 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,862 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 43 treesize of output 70 [2018-04-13 10:11:38,863 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-13 10:11:38,953 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,955 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,955 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:38,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 53 treesize of output 80 [2018-04-13 10:11:38,961 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:11:39,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 46 [2018-04-13 10:11:39,080 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:39,082 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,082 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-04-13 10:11:39,082 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:39,172 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,178 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 51 treesize of output 58 [2018-04-13 10:11:39,178 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-04-13 10:11:39,288 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,289 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2018-04-13 10:11:39,289 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:39,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,291 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 36 [2018-04-13 10:11:39,291 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:39,388 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 24 dim-0 vars, and 8 xjuncts. [2018-04-13 10:11:39,388 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 24 variables, input treesize:205, output treesize:277 [2018-04-13 10:11:39,577 WARN L151 SmtUtils]: Spent 128ms on a formula simplification. DAG size of input: 136 DAG size of output 35 [2018-04-13 10:11:39,770 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,772 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,773 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 88 [2018-04-13 10:11:39,779 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:11:39,906 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,907 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 60 [2018-04-13 10:11:39,907 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:39,909 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,909 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:39,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 54 [2018-04-13 10:11:39,910 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:40,000 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,007 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 59 treesize of output 86 [2018-04-13 10:11:40,007 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-13 10:11:40,125 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,125 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 54 [2018-04-13 10:11:40,126 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:40,127 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,128 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 62 [2018-04-13 10:11:40,128 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:40,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 59 [2018-04-13 10:11:40,226 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:40,314 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 61 [2018-04-13 10:11:40,315 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:40,406 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,407 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,408 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:40,413 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 53 treesize of output 80 [2018-04-13 10:11:40,413 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-04-13 10:11:40,539 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 55 treesize of output 58 [2018-04-13 10:11:40,539 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-04-13 10:11:40,667 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 24 dim-0 vars, and 8 xjuncts. [2018-04-13 10:11:40,667 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 24 variables, input treesize:229, output treesize:357 [2018-04-13 10:11:40,890 WARN L151 SmtUtils]: Spent 145ms on a formula simplification. DAG size of input: 156 DAG size of output 43 [2018-04-13 10:11:41,111 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,111 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,113 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,113 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 92 [2018-04-13 10:11:41,114 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:41,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,194 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 60 [2018-04-13 10:11:41,194 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:41,266 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,267 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,268 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 77 [2018-04-13 10:11:41,269 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:41,343 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,343 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,344 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,344 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 58 [2018-04-13 10:11:41,345 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:41,418 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,419 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,419 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 56 [2018-04-13 10:11:41,420 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:41,479 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,480 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,481 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 73 [2018-04-13 10:11:41,482 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:41,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 55 [2018-04-13 10:11:41,545 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:41,601 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,602 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,602 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:41,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 57 [2018-04-13 10:11:41,603 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:41,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 16 dim-0 vars, and 4 xjuncts. [2018-04-13 10:11:41,653 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 24 variables, input treesize:253, output treesize:205 [2018-04-13 10:11:42,494 WARN L151 SmtUtils]: Spent 784ms on a formula simplification. DAG size of input: 98 DAG size of output 78 [2018-04-13 10:11:42,539 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 10 proven. 62 refuted. 0 times theorem prover too weak. 227 trivial. 0 not checked. [2018-04-13 10:11:42,539 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:42,539 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-04-13 10:11:42,539 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-13 10:11:42,539 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-13 10:11:42,539 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=409, Unknown=0, NotChecked=0, Total=462 [2018-04-13 10:11:42,539 INFO L87 Difference]: Start difference. First operand 361 states and 412 transitions. Second operand 22 states. [2018-04-13 10:11:43,283 WARN L151 SmtUtils]: Spent 225ms on a formula simplification. DAG size of input: 100 DAG size of output 79 [2018-04-13 10:11:43,616 WARN L151 SmtUtils]: Spent 278ms on a formula simplification. DAG size of input: 104 DAG size of output 83 [2018-04-13 10:11:43,980 WARN L151 SmtUtils]: Spent 262ms on a formula simplification. DAG size of input: 110 DAG size of output 82 [2018-04-13 10:11:45,252 WARN L151 SmtUtils]: Spent 1013ms on a formula simplification. DAG size of input: 130 DAG size of output 106 [2018-04-13 10:11:46,287 WARN L151 SmtUtils]: Spent 901ms on a formula simplification. DAG size of input: 114 DAG size of output 108 [2018-04-13 10:11:46,637 WARN L148 SmtUtils]: Spent 142ms on a formula simplification that was a NOOP. DAG size: 61 [2018-04-13 10:11:46,880 WARN L148 SmtUtils]: Spent 158ms on a formula simplification that was a NOOP. DAG size: 56 [2018-04-13 10:11:48,386 WARN L151 SmtUtils]: Spent 1309ms on a formula simplification. DAG size of input: 108 DAG size of output 108 [2018-04-13 10:11:48,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:48,825 INFO L93 Difference]: Finished difference Result 404 states and 456 transitions. [2018-04-13 10:11:48,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-13 10:11:48,825 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 114 [2018-04-13 10:11:48,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:48,826 INFO L225 Difference]: With dead ends: 404 [2018-04-13 10:11:48,826 INFO L226 Difference]: Without dead ends: 404 [2018-04-13 10:11:48,826 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 90 SyntacticMatches, 3 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 239 ImplicationChecksByTransitivity, 6.9s TimeCoverageRelationStatistics Valid=188, Invalid=1372, Unknown=0, NotChecked=0, Total=1560 [2018-04-13 10:11:48,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 404 states. [2018-04-13 10:11:48,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 404 to 368. [2018-04-13 10:11:48,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 368 states. [2018-04-13 10:11:48,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 368 states to 368 states and 422 transitions. [2018-04-13 10:11:48,829 INFO L78 Accepts]: Start accepts. Automaton has 368 states and 422 transitions. Word has length 114 [2018-04-13 10:11:48,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:48,829 INFO L459 AbstractCegarLoop]: Abstraction has 368 states and 422 transitions. [2018-04-13 10:11:48,829 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-13 10:11:48,829 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 422 transitions. [2018-04-13 10:11:48,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-04-13 10:11:48,829 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:48,829 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:48,829 INFO L408 AbstractCegarLoop]: === Iteration 58 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:48,830 INFO L82 PathProgramCache]: Analyzing trace with hash -151292687, now seen corresponding path program 1 times [2018-04-13 10:11:48,830 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:48,830 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:48,830 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:48,830 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:48,830 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:48,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:48,840 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:48,898 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 236 trivial. 0 not checked. [2018-04-13 10:11:48,898 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:48,898 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:48,899 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:48,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:48,908 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:48,935 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 0 proven. 27 refuted. 0 times theorem prover too weak. 236 trivial. 0 not checked. [2018-04-13 10:11:48,936 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:11:48,936 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 12 [2018-04-13 10:11:48,936 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-04-13 10:11:48,936 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-04-13 10:11:48,936 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-04-13 10:11:48,936 INFO L87 Difference]: Start difference. First operand 368 states and 422 transitions. Second operand 12 states. [2018-04-13 10:11:48,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:48,978 INFO L93 Difference]: Finished difference Result 400 states and 452 transitions. [2018-04-13 10:11:48,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-04-13 10:11:48,979 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 114 [2018-04-13 10:11:48,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:48,980 INFO L225 Difference]: With dead ends: 400 [2018-04-13 10:11:48,980 INFO L226 Difference]: Without dead ends: 397 [2018-04-13 10:11:48,980 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=51, Invalid=105, Unknown=0, NotChecked=0, Total=156 [2018-04-13 10:11:48,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states. [2018-04-13 10:11:48,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 368. [2018-04-13 10:11:48,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 368 states. [2018-04-13 10:11:48,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 368 states to 368 states and 421 transitions. [2018-04-13 10:11:48,984 INFO L78 Accepts]: Start accepts. Automaton has 368 states and 421 transitions. Word has length 114 [2018-04-13 10:11:48,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:48,984 INFO L459 AbstractCegarLoop]: Abstraction has 368 states and 421 transitions. [2018-04-13 10:11:48,984 INFO L460 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-04-13 10:11:48,984 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 421 transitions. [2018-04-13 10:11:48,984 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-04-13 10:11:48,984 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:48,984 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:48,984 INFO L408 AbstractCegarLoop]: === Iteration 59 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:48,984 INFO L82 PathProgramCache]: Analyzing trace with hash 100438305, now seen corresponding path program 2 times [2018-04-13 10:11:48,985 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:48,985 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:48,985 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:48,985 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:48,985 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:49,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:49,004 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:49,008 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:49,008 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:49,008 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:49,008 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:11:49,038 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:11:49,038 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:11:49,041 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:49,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:11:49,060 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,061 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,061 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:11:49,101 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:49,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:49,102 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,103 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,107 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,107 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:20 [2018-04-13 10:11:49,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-04-13 10:11:49,128 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,129 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,129 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:13, output treesize:3 [2018-04-13 10:11:49,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:49,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:49,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 33 [2018-04-13 10:11:49,161 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,167 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,167 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:30, output treesize:32 [2018-04-13 10:11:49,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 26 [2018-04-13 10:11:49,221 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:49,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 37 [2018-04-13 10:11:49,222 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,226 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,232 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,232 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:48, output treesize:57 [2018-04-13 10:11:49,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 12 [2018-04-13 10:11:49,279 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,282 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:49,282 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:42, output treesize:24 [2018-04-13 10:11:49,388 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:49,388 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:49,389 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:49,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 66 [2018-04-13 10:11:49,389 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,397 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,398 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:65, output treesize:39 [2018-04-13 10:11:49,422 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:49,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 49 [2018-04-13 10:11:49,423 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:49,424 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:49,424 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:49,425 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:49,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 75 [2018-04-13 10:11:49,426 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:49,434 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:49,439 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:49,439 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:54, output treesize:36 [2018-04-13 10:11:49,492 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 20 [2018-04-13 10:11:49,493 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:49,494 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:49,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 17 [2018-04-13 10:11:49,495 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,497 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:49,501 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:49,501 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:43, output treesize:15 [2018-04-13 10:11:49,536 INFO L134 CoverageAnalysis]: Checked inductivity of 252 backedges. 17 proven. 34 refuted. 0 times theorem prover too weak. 201 trivial. 0 not checked. [2018-04-13 10:11:49,537 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:49,537 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-04-13 10:11:49,537 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-13 10:11:49,537 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-13 10:11:49,537 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=800, Unknown=0, NotChecked=0, Total=870 [2018-04-13 10:11:49,537 INFO L87 Difference]: Start difference. First operand 368 states and 421 transitions. Second operand 30 states. [2018-04-13 10:11:50,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:50,341 INFO L93 Difference]: Finished difference Result 380 states and 432 transitions. [2018-04-13 10:11:50,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-04-13 10:11:50,341 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 113 [2018-04-13 10:11:50,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:50,342 INFO L225 Difference]: With dead ends: 380 [2018-04-13 10:11:50,342 INFO L226 Difference]: Without dead ends: 380 [2018-04-13 10:11:50,342 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 579 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=208, Invalid=2548, Unknown=0, NotChecked=0, Total=2756 [2018-04-13 10:11:50,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380 states. [2018-04-13 10:11:50,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380 to 374. [2018-04-13 10:11:50,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 374 states. [2018-04-13 10:11:50,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 428 transitions. [2018-04-13 10:11:50,345 INFO L78 Accepts]: Start accepts. Automaton has 374 states and 428 transitions. Word has length 113 [2018-04-13 10:11:50,345 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:50,345 INFO L459 AbstractCegarLoop]: Abstraction has 374 states and 428 transitions. [2018-04-13 10:11:50,345 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-13 10:11:50,345 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states and 428 transitions. [2018-04-13 10:11:50,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-04-13 10:11:50,346 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:50,346 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:50,346 INFO L408 AbstractCegarLoop]: === Iteration 60 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:50,346 INFO L82 PathProgramCache]: Analyzing trace with hash 1828106546, now seen corresponding path program 1 times [2018-04-13 10:11:50,346 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:50,346 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:50,346 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:50,347 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:11:50,347 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:50,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:50,354 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:50,356 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:50,357 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:50,357 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:50,357 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:50,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:50,371 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:50,439 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:50,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:50,440 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:50,442 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:50,446 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:50,446 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:25 [2018-04-13 10:11:50,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-04-13 10:11:50,519 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:50,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-13 10:11:50,520 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:50,522 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:50,531 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:50,531 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:58, output treesize:13 [2018-04-13 10:11:50,546 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:50,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:11:50,546 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:50,549 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:50,550 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:11:50,603 INFO L134 CoverageAnalysis]: Checked inductivity of 224 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 209 trivial. 0 not checked. [2018-04-13 10:11:50,603 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:50,603 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-04-13 10:11:50,603 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-13 10:11:50,603 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-13 10:11:50,603 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=208, Unknown=0, NotChecked=0, Total=240 [2018-04-13 10:11:50,603 INFO L87 Difference]: Start difference. First operand 374 states and 428 transitions. Second operand 16 states. [2018-04-13 10:11:51,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:51,173 INFO L93 Difference]: Finished difference Result 383 states and 433 transitions. [2018-04-13 10:11:51,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 10:11:51,173 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 114 [2018-04-13 10:11:51,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:51,174 INFO L225 Difference]: With dead ends: 383 [2018-04-13 10:11:51,174 INFO L226 Difference]: Without dead ends: 383 [2018-04-13 10:11:51,174 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 99 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=98, Invalid=604, Unknown=0, NotChecked=0, Total=702 [2018-04-13 10:11:51,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 383 states. [2018-04-13 10:11:51,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 383 to 374. [2018-04-13 10:11:51,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 374 states. [2018-04-13 10:11:51,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 427 transitions. [2018-04-13 10:11:51,176 INFO L78 Accepts]: Start accepts. Automaton has 374 states and 427 transitions. Word has length 114 [2018-04-13 10:11:51,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:51,177 INFO L459 AbstractCegarLoop]: Abstraction has 374 states and 427 transitions. [2018-04-13 10:11:51,177 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-13 10:11:51,177 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states and 427 transitions. [2018-04-13 10:11:51,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-04-13 10:11:51,177 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:51,177 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:51,177 INFO L408 AbstractCegarLoop]: === Iteration 61 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:51,177 INFO L82 PathProgramCache]: Analyzing trace with hash 1828106547, now seen corresponding path program 1 times [2018-04-13 10:11:51,177 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:51,177 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:51,178 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:51,178 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:51,178 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:51,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:51,184 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:51,186 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:51,186 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:51,186 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:51,186 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:51,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:51,202 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:51,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:11:51,223 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:51,224 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:51,224 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:11:51,458 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:51,459 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:51,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 31 [2018-04-13 10:11:51,459 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:51,476 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:51,477 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:51,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 33 [2018-04-13 10:11:51,477 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:51,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 32 [2018-04-13 10:11:51,493 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:51,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 30 [2018-04-13 10:11:51,540 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:51,559 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 4 dim-1 vars, End of recursive call: 6 dim-0 vars, and 2 xjuncts. [2018-04-13 10:11:51,559 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 10 variables, input treesize:77, output treesize:63 [2018-04-13 10:11:52,060 INFO L134 CoverageAnalysis]: Checked inductivity of 224 backedges. 176 proven. 44 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-13 10:11:52,060 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:52,060 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24] total 24 [2018-04-13 10:11:52,060 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-13 10:11:52,060 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-13 10:11:52,061 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=495, Unknown=0, NotChecked=0, Total=600 [2018-04-13 10:11:52,061 INFO L87 Difference]: Start difference. First operand 374 states and 427 transitions. Second operand 25 states. [2018-04-13 10:11:53,881 WARN L148 SmtUtils]: Spent 152ms on a formula simplification that was a NOOP. DAG size: 77 [2018-04-13 10:11:54,134 WARN L148 SmtUtils]: Spent 175ms on a formula simplification that was a NOOP. DAG size: 80 [2018-04-13 10:11:54,416 WARN L148 SmtUtils]: Spent 168ms on a formula simplification that was a NOOP. DAG size: 77 [2018-04-13 10:11:54,666 WARN L148 SmtUtils]: Spent 172ms on a formula simplification that was a NOOP. DAG size: 77 [2018-04-13 10:11:55,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:55,299 INFO L93 Difference]: Finished difference Result 393 states and 436 transitions. [2018-04-13 10:11:55,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-04-13 10:11:55,299 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 114 [2018-04-13 10:11:55,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:55,300 INFO L225 Difference]: With dead ends: 393 [2018-04-13 10:11:55,300 INFO L226 Difference]: Without dead ends: 393 [2018-04-13 10:11:55,300 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 89 SyntacticMatches, 1 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 418 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=341, Invalid=1728, Unknown=1, NotChecked=0, Total=2070 [2018-04-13 10:11:55,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 393 states. [2018-04-13 10:11:55,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 393 to 374. [2018-04-13 10:11:55,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 374 states. [2018-04-13 10:11:55,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 426 transitions. [2018-04-13 10:11:55,303 INFO L78 Accepts]: Start accepts. Automaton has 374 states and 426 transitions. Word has length 114 [2018-04-13 10:11:55,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:55,303 INFO L459 AbstractCegarLoop]: Abstraction has 374 states and 426 transitions. [2018-04-13 10:11:55,303 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-13 10:11:55,303 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states and 426 transitions. [2018-04-13 10:11:55,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-04-13 10:11:55,304 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:55,304 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:55,304 INFO L408 AbstractCegarLoop]: === Iteration 62 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:55,304 INFO L82 PathProgramCache]: Analyzing trace with hash 836728151, now seen corresponding path program 1 times [2018-04-13 10:11:55,304 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:55,304 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:55,304 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:55,305 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:55,305 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:55,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:55,327 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:55,332 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:55,332 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:55,332 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:55,333 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:55,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:55,368 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:55,401 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:55,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:55,403 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,404 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,409 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,409 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-04-13 10:11:55,434 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:11:55,435 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:11:55,436 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,439 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,445 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,445 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-04-13 10:11:55,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:11:55,477 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,477 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,478 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,478 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:11:55,479 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,486 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,492 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,492 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:42 [2018-04-13 10:11:55,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:11:55,535 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,535 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,536 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,536 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,537 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,538 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:11:55,538 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,550 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,557 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,557 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:58, output treesize:54 [2018-04-13 10:11:55,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 49 [2018-04-13 10:11:55,634 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,635 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,635 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,636 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,637 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,638 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 128 [2018-04-13 10:11:55,640 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,651 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,661 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:55,661 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:74, output treesize:70 [2018-04-13 10:11:55,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 49 [2018-04-13 10:11:55,740 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,741 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,741 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,743 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,743 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,745 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 128 [2018-04-13 10:11:55,747 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,769 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,777 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:55,777 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:74, output treesize:70 [2018-04-13 10:11:55,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 49 [2018-04-13 10:11:55,823 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,823 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,824 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,826 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,826 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,828 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 128 [2018-04-13 10:11:55,830 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,840 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,849 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:55,849 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:74, output treesize:70 [2018-04-13 10:11:55,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 49 [2018-04-13 10:11:55,897 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,898 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,899 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,900 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,901 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,902 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,904 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 128 [2018-04-13 10:11:55,904 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,914 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,923 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:55,923 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:74, output treesize:70 [2018-04-13 10:11:55,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 49 [2018-04-13 10:11:55,965 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,965 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,966 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,967 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,968 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,969 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:55,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 128 [2018-04-13 10:11:55,970 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,981 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:55,991 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:55,991 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:74, output treesize:70 [2018-04-13 10:11:56,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:56,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:56,142 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:56,142 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:56,144 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:56,144 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:19, output treesize:1 [2018-04-13 10:11:56,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 56 [2018-04-13 10:11:56,275 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,276 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,279 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,282 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,284 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,291 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 178 [2018-04-13 10:11:56,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,302 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,304 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,314 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 14 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 247 [2018-04-13 10:11:56,314 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:11:56,387 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:11:56,404 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:11:56,429 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:56,429 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 6 variables, input treesize:85, output treesize:68 [2018-04-13 10:11:56,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 49 [2018-04-13 10:11:56,686 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,687 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,688 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,688 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,689 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,689 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,690 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,690 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,691 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,691 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,692 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,692 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,693 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:56,693 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:56,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 10 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 145 [2018-04-13 10:11:56,694 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:56,705 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:56,711 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:56,711 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:83, output treesize:3 [2018-04-13 10:11:56,777 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 14 proven. 155 refuted. 0 times theorem prover too weak. 56 trivial. 0 not checked. [2018-04-13 10:11:56,777 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:11:56,777 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-04-13 10:11:56,777 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-13 10:11:56,777 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-13 10:11:56,777 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=887, Unknown=0, NotChecked=0, Total=992 [2018-04-13 10:11:56,777 INFO L87 Difference]: Start difference. First operand 374 states and 426 transitions. Second operand 32 states. [2018-04-13 10:11:58,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:11:58,767 INFO L93 Difference]: Finished difference Result 381 states and 431 transitions. [2018-04-13 10:11:58,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-13 10:11:58,767 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 115 [2018-04-13 10:11:58,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:11:58,768 INFO L225 Difference]: With dead ends: 381 [2018-04-13 10:11:58,768 INFO L226 Difference]: Without dead ends: 381 [2018-04-13 10:11:58,768 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 79 SyntacticMatches, 5 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 678 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=233, Invalid=2317, Unknown=0, NotChecked=0, Total=2550 [2018-04-13 10:11:58,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states. [2018-04-13 10:11:58,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 374. [2018-04-13 10:11:58,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 374 states. [2018-04-13 10:11:58,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 374 states to 374 states and 425 transitions. [2018-04-13 10:11:58,772 INFO L78 Accepts]: Start accepts. Automaton has 374 states and 425 transitions. Word has length 115 [2018-04-13 10:11:58,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:11:58,772 INFO L459 AbstractCegarLoop]: Abstraction has 374 states and 425 transitions. [2018-04-13 10:11:58,772 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-13 10:11:58,773 INFO L276 IsEmpty]: Start isEmpty. Operand 374 states and 425 transitions. [2018-04-13 10:11:58,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-04-13 10:11:58,773 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:11:58,773 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:11:58,773 INFO L408 AbstractCegarLoop]: === Iteration 63 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:11:58,774 INFO L82 PathProgramCache]: Analyzing trace with hash -1434183389, now seen corresponding path program 1 times [2018-04-13 10:11:58,774 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:11:58,774 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:11:58,774 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:58,774 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:58,775 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:11:58,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:58,791 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:11:58,795 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:11:58,795 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:11:58,795 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:11:58,795 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:11:58,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:11:58,810 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:11:58,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:11:58,812 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:58,814 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:58,814 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-13 10:11:58,880 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:58,880 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:58,881 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-13 10:11:58,881 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:58,884 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:58,884 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:11 [2018-04-13 10:11:58,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:11:58,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:11:58,906 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:58,908 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:58,912 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:58,912 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:33, output treesize:26 [2018-04-13 10:11:59,054 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 42 treesize of output 52 [2018-04-13 10:11:59,057 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:59,058 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 55 [2018-04-13 10:11:59,058 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:59,074 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:59,084 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:59,084 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:68, output treesize:53 [2018-04-13 10:11:59,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:11:59,315 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:59,348 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-1 vars, End of recursive call: 6 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:59,348 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 7 variables, input treesize:84, output treesize:79 [2018-04-13 10:11:59,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 7 case distinctions, treesize of input 55 treesize of output 80 [2018-04-13 10:11:59,386 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:59,388 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 72 [2018-04-13 10:11:59,388 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:59,466 INFO L267 ElimStorePlain]: Start of recursive call 2: 4 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:11:59,486 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 1 xjuncts. [2018-04-13 10:11:59,486 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:99, output treesize:95 [2018-04-13 10:11:59,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 62 treesize of output 76 [2018-04-13 10:11:59,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 57 [2018-04-13 10:11:59,635 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:59,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 46 [2018-04-13 10:11:59,716 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:59,801 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:59,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 59 [2018-04-13 10:11:59,801 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:11:59,896 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:11:59,897 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:11:59,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 37 [2018-04-13 10:11:59,899 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:00,010 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:00,011 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:00,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 44 [2018-04-13 10:12:00,012 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:00,062 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:00,063 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:00,064 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:00,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 62 [2018-04-13 10:12:00,066 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:00,114 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:00,114 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:00,115 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:00,115 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:00,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 4 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 87 [2018-04-13 10:12:00,119 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:00,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 13 [2018-04-13 10:12:00,168 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:00,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:00,194 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:00,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 40 [2018-04-13 10:12:00,196 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:00,206 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 9 [2018-04-13 10:12:00,207 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:00,210 INFO L267 ElimStorePlain]: Start of recursive call 2: 13 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:00,222 INFO L267 ElimStorePlain]: Start of recursive call 1: 9 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:00,222 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 10 variables, input treesize:118, output treesize:10 [2018-04-13 10:12:00,243 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:00,243 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:12:00,243 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:00,246 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:00,247 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-13 10:12:00,304 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 12 proven. 43 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-04-13 10:12:00,304 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:12:00,305 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24] total 24 [2018-04-13 10:12:00,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-04-13 10:12:00,305 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-04-13 10:12:00,305 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=539, Unknown=0, NotChecked=0, Total=600 [2018-04-13 10:12:00,305 INFO L87 Difference]: Start difference. First operand 374 states and 425 transitions. Second operand 25 states. [2018-04-13 10:12:02,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:12:02,019 INFO L93 Difference]: Finished difference Result 410 states and 459 transitions. [2018-04-13 10:12:02,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-04-13 10:12:02,020 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 116 [2018-04-13 10:12:02,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:12:02,021 INFO L225 Difference]: With dead ends: 410 [2018-04-13 10:12:02,021 INFO L226 Difference]: Without dead ends: 410 [2018-04-13 10:12:02,021 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 200 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=170, Invalid=1470, Unknown=0, NotChecked=0, Total=1640 [2018-04-13 10:12:02,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 410 states. [2018-04-13 10:12:02,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 410 to 385. [2018-04-13 10:12:02,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 385 states. [2018-04-13 10:12:02,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 385 states to 385 states and 435 transitions. [2018-04-13 10:12:02,024 INFO L78 Accepts]: Start accepts. Automaton has 385 states and 435 transitions. Word has length 116 [2018-04-13 10:12:02,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:12:02,024 INFO L459 AbstractCegarLoop]: Abstraction has 385 states and 435 transitions. [2018-04-13 10:12:02,024 INFO L460 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-04-13 10:12:02,024 INFO L276 IsEmpty]: Start isEmpty. Operand 385 states and 435 transitions. [2018-04-13 10:12:02,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-04-13 10:12:02,024 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:12:02,025 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:12:02,025 INFO L408 AbstractCegarLoop]: === Iteration 64 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:12:02,025 INFO L82 PathProgramCache]: Analyzing trace with hash 168769042, now seen corresponding path program 1 times [2018-04-13 10:12:02,025 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:12:02,025 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:12:02,025 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:02,025 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:12:02,026 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:02,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:12:02,040 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:12:02,043 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:12:02,043 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:12:02,043 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:12:02,044 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:12:02,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:12:02,082 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:12:02,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:12:02,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:12:02,110 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,111 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,115 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,115 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:12:02,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:12:02,136 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:12:02,136 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,140 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,144 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,144 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:12:02,194 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:12:02,197 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,198 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,199 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:12:02,200 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,210 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,217 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,218 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:12:02,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:12:02,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:12:02,298 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,309 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,315 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,316 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:55, output treesize:51 [2018-04-13 10:12:02,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 50 [2018-04-13 10:12:02,362 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,362 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,363 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,363 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,364 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,364 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,366 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,366 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 181 [2018-04-13 10:12:02,367 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,381 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,388 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,388 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:67, output treesize:63 [2018-04-13 10:12:02,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 60 [2018-04-13 10:12:02,434 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,435 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,436 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,437 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,437 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,438 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,438 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,439 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,439 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,440 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,440 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,441 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,441 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,442 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,442 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,443 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 259 [2018-04-13 10:12:02,443 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,476 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,483 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,483 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:79, output treesize:75 [2018-04-13 10:12:02,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 70 [2018-04-13 10:12:02,536 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,537 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,537 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,538 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,538 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,539 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,539 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,540 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,540 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,541 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,541 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,542 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,542 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,543 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,543 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,544 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,544 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,544 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,545 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,545 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,546 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 351 [2018-04-13 10:12:02,547 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,576 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,585 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,585 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:91, output treesize:87 [2018-04-13 10:12:02,646 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 80 [2018-04-13 10:12:02,648 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,648 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,649 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,649 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,650 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,650 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,651 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,651 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,652 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,652 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,653 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,653 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,654 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,654 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,655 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,655 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,656 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,656 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,658 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,658 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,659 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,659 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 457 [2018-04-13 10:12:02,662 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,701 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,711 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,711 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:103, output treesize:99 [2018-04-13 10:12:02,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 108 treesize of output 89 [2018-04-13 10:12:02,785 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,785 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,786 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,787 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,787 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,788 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,789 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,789 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,790 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,791 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,791 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,792 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,792 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,793 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,794 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,794 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,797 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,798 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,798 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,799 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,799 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,800 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,801 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,801 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,802 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,803 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,803 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,804 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,804 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,805 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,805 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,806 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:02,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 568 [2018-04-13 10:12:02,807 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,860 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:02,875 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:02,875 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:119, output treesize:115 [2018-04-13 10:12:03,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:12:03,032 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:12:03,032 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:03,033 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:03,035 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:03,035 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:19, output treesize:1 [2018-04-13 10:12:03,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 126 treesize of output 105 [2018-04-13 10:12:03,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,163 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,164 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,164 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,165 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,174 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,175 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,175 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,176 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,176 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,177 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,177 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,178 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,178 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,179 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,179 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,180 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,180 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,181 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,181 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,182 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,182 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,183 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 683 [2018-04-13 10:12:03,205 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,206 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,206 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,207 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,208 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,208 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,210 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,211 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,212 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,215 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,216 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,217 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,218 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,218 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,219 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,219 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,220 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,221 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,222 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,224 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,224 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,227 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,228 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,228 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,229 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,230 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,233 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,234 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,235 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,235 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,237 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,238 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,239 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:03,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 107 treesize of output 714 [2018-04-13 10:12:03,256 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:12:03,590 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:12:03,628 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:12:03,672 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 8 dim-0 vars, and 2 xjuncts. [2018-04-13 10:12:03,672 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:143, output treesize:262 [2018-04-13 10:12:04,010 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 83 [2018-04-13 10:12:04,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,014 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,014 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,015 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,016 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,016 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,017 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,017 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,018 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,018 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,019 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,019 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,020 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,020 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,028 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,031 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,031 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,032 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,032 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,033 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:04,033 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,034 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,035 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:04,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 36 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 455 [2018-04-13 10:12:04,036 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:04,075 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:04,080 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:04,080 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:124, output treesize:3 [2018-04-13 10:12:04,151 INFO L134 CoverageAnalysis]: Checked inductivity of 226 backedges. 89 proven. 131 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-04-13 10:12:04,151 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:12:04,151 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34] total 34 [2018-04-13 10:12:04,151 INFO L442 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-04-13 10:12:04,152 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-04-13 10:12:04,152 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=160, Invalid=1030, Unknown=0, NotChecked=0, Total=1190 [2018-04-13 10:12:04,152 INFO L87 Difference]: Start difference. First operand 385 states and 435 transitions. Second operand 35 states. [2018-04-13 10:12:06,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:12:06,101 INFO L93 Difference]: Finished difference Result 395 states and 440 transitions. [2018-04-13 10:12:06,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-04-13 10:12:06,102 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 116 [2018-04-13 10:12:06,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:12:06,102 INFO L225 Difference]: With dead ends: 395 [2018-04-13 10:12:06,103 INFO L226 Difference]: Without dead ends: 395 [2018-04-13 10:12:06,103 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 81 SyntacticMatches, 1 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 613 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=276, Invalid=2174, Unknown=0, NotChecked=0, Total=2450 [2018-04-13 10:12:06,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states. [2018-04-13 10:12:06,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 385. [2018-04-13 10:12:06,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 385 states. [2018-04-13 10:12:06,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 385 states to 385 states and 434 transitions. [2018-04-13 10:12:06,106 INFO L78 Accepts]: Start accepts. Automaton has 385 states and 434 transitions. Word has length 116 [2018-04-13 10:12:06,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:12:06,106 INFO L459 AbstractCegarLoop]: Abstraction has 385 states and 434 transitions. [2018-04-13 10:12:06,106 INFO L460 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-04-13 10:12:06,106 INFO L276 IsEmpty]: Start isEmpty. Operand 385 states and 434 transitions. [2018-04-13 10:12:06,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-04-13 10:12:06,106 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:12:06,107 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 4, 4, 4, 4, 4, 4, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:12:06,107 INFO L408 AbstractCegarLoop]: === Iteration 65 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:12:06,107 INFO L82 PathProgramCache]: Analyzing trace with hash -622174996, now seen corresponding path program 4 times [2018-04-13 10:12:06,107 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:12:06,107 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:12:06,107 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:06,107 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:12:06,107 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:06,118 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:12:06,119 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:12:06,123 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:12:06,123 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:12:06,123 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:12:06,124 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:12:06,145 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:12:06,145 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:12:06,148 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:12:06,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:12:06,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:12:06,170 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,171 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,174 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,175 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:12:06,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:12:06,196 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:12:06,197 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,200 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,205 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,205 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-04-13 10:12:06,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:12:06,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:12:06,233 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,239 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,245 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,245 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:42 [2018-04-13 10:12:06,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-04-13 10:12:06,276 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,278 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,278 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,279 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-04-13 10:12:06,280 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,289 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,295 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,296 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:58, output treesize:54 [2018-04-13 10:12:06,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 53 [2018-04-13 10:12:06,328 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,329 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,329 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,330 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,330 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,331 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,331 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,332 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,332 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,333 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,333 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 196 [2018-04-13 10:12:06,333 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,348 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,355 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,355 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:70, output treesize:66 [2018-04-13 10:12:06,407 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 63 [2018-04-13 10:12:06,409 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,409 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,410 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,410 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,411 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,411 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,412 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,412 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,413 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,413 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,414 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,414 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,415 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,415 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,416 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 277 [2018-04-13 10:12:06,416 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,438 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,446 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,446 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:82, output treesize:78 [2018-04-13 10:12:06,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 73 [2018-04-13 10:12:06,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,498 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,498 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,500 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,500 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,503 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,506 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,506 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,506 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 372 [2018-04-13 10:12:06,507 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,535 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,545 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,545 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-04-13 10:12:06,599 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 83 [2018-04-13 10:12:06,601 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,601 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,602 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,602 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,603 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,603 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,606 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,606 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,608 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,608 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,609 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,609 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,610 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,610 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:06,614 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 481 [2018-04-13 10:12:06,614 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,656 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,671 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:06,671 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:106, output treesize:102 [2018-04-13 10:12:07,109 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:12:07,113 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:12:07,133 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:12:07,133 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:124, output treesize:253 [2018-04-13 10:12:07,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 127 treesize of output 107 [2018-04-13 10:12:07,285 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,287 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,287 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,288 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,288 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,289 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,289 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,290 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,290 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,292 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,292 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,293 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,293 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,299 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:07,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,302 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,302 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,304 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,304 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:07,305 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,307 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 28 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 96 treesize of output 479 [2018-04-13 10:12:07,307 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:07,348 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:07,367 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:07,367 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:264, output treesize:14 [2018-04-13 10:12:07,399 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,399 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:07,400 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-13 10:12:07,400 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:07,402 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:07,403 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:11 [2018-04-13 10:12:07,498 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 0 proven. 260 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-13 10:12:07,498 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:12:07,499 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32] total 32 [2018-04-13 10:12:07,499 INFO L442 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-04-13 10:12:07,499 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-04-13 10:12:07,499 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=959, Unknown=0, NotChecked=0, Total=1056 [2018-04-13 10:12:07,499 INFO L87 Difference]: Start difference. First operand 385 states and 434 transitions. Second operand 33 states. [2018-04-13 10:12:10,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:12:10,500 INFO L93 Difference]: Finished difference Result 398 states and 448 transitions. [2018-04-13 10:12:10,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-04-13 10:12:10,500 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 116 [2018-04-13 10:12:10,500 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:12:10,501 INFO L225 Difference]: With dead ends: 398 [2018-04-13 10:12:10,501 INFO L226 Difference]: Without dead ends: 398 [2018-04-13 10:12:10,501 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 84 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1205 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=318, Invalid=3842, Unknown=0, NotChecked=0, Total=4160 [2018-04-13 10:12:10,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 398 states. [2018-04-13 10:12:10,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 398 to 391. [2018-04-13 10:12:10,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 391 states. [2018-04-13 10:12:10,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391 states to 391 states and 441 transitions. [2018-04-13 10:12:10,505 INFO L78 Accepts]: Start accepts. Automaton has 391 states and 441 transitions. Word has length 116 [2018-04-13 10:12:10,505 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:12:10,505 INFO L459 AbstractCegarLoop]: Abstraction has 391 states and 441 transitions. [2018-04-13 10:12:10,505 INFO L460 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-04-13 10:12:10,505 INFO L276 IsEmpty]: Start isEmpty. Operand 391 states and 441 transitions. [2018-04-13 10:12:10,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-04-13 10:12:10,506 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:12:10,506 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 5, 4, 4, 4, 4, 4, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:12:10,506 INFO L408 AbstractCegarLoop]: === Iteration 66 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:12:10,506 INFO L82 PathProgramCache]: Analyzing trace with hash -2107555619, now seen corresponding path program 5 times [2018-04-13 10:12:10,507 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:12:10,507 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:12:10,507 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:10,507 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:12:10,507 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:10,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:12:10,520 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:12:10,523 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:12:10,523 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:12:10,523 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:12:10,524 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:12:10,568 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-04-13 10:12:10,568 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:12:10,572 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:12:10,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:12:10,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:12:10,644 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,645 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,649 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,649 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:12:10,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:12:10,680 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,681 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:12:10,681 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,685 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,691 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,691 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:12:10,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:12:10,736 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,737 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,738 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:12:10,739 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,747 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,755 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,755 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:12:10,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:12:10,812 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,813 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,814 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,815 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,816 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,817 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,817 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:12:10,818 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,832 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,841 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,841 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:55, output treesize:51 [2018-04-13 10:12:10,915 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 50 [2018-04-13 10:12:10,918 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,919 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,920 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,921 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,922 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,923 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,923 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,924 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,925 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,926 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:10,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 181 [2018-04-13 10:12:10,927 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,948 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,959 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:10,959 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:67, output treesize:63 [2018-04-13 10:12:11,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 59 [2018-04-13 10:12:11,041 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,042 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,043 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,044 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,045 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,046 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,047 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,048 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,049 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,050 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,051 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,052 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,053 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,054 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,055 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,055 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 253 [2018-04-13 10:12:11,056 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:11,089 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:11,116 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:11,117 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:83, output treesize:79 [2018-04-13 10:12:11,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 56 [2018-04-13 10:12:11,458 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,459 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,459 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,461 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,461 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,462 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,462 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,463 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,463 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,466 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,467 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:11,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:11,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 15 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 191 [2018-04-13 10:12:11,468 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:11,484 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:11,489 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:11,489 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:91, output treesize:3 [2018-04-13 10:12:11,552 INFO L134 CoverageAnalysis]: Checked inductivity of 268 backedges. 27 proven. 239 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:12:11,552 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:12:11,552 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30] total 30 [2018-04-13 10:12:11,552 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-04-13 10:12:11,552 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-04-13 10:12:11,552 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=100, Invalid=830, Unknown=0, NotChecked=0, Total=930 [2018-04-13 10:12:11,552 INFO L87 Difference]: Start difference. First operand 391 states and 441 transitions. Second operand 31 states. [2018-04-13 10:12:13,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:12:13,299 INFO L93 Difference]: Finished difference Result 405 states and 452 transitions. [2018-04-13 10:12:13,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-13 10:12:13,299 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 117 [2018-04-13 10:12:13,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:12:13,300 INFO L225 Difference]: With dead ends: 405 [2018-04-13 10:12:13,300 INFO L226 Difference]: Without dead ends: 405 [2018-04-13 10:12:13,301 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 736 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=267, Invalid=2595, Unknown=0, NotChecked=0, Total=2862 [2018-04-13 10:12:13,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 405 states. [2018-04-13 10:12:13,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 405 to 392. [2018-04-13 10:12:13,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 392 states. [2018-04-13 10:12:13,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 392 states to 392 states and 442 transitions. [2018-04-13 10:12:13,303 INFO L78 Accepts]: Start accepts. Automaton has 392 states and 442 transitions. Word has length 117 [2018-04-13 10:12:13,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:12:13,303 INFO L459 AbstractCegarLoop]: Abstraction has 392 states and 442 transitions. [2018-04-13 10:12:13,303 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-04-13 10:12:13,303 INFO L276 IsEmpty]: Start isEmpty. Operand 392 states and 442 transitions. [2018-04-13 10:12:13,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-04-13 10:12:13,304 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:12:13,304 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:12:13,304 INFO L408 AbstractCegarLoop]: === Iteration 67 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:12:13,304 INFO L82 PathProgramCache]: Analyzing trace with hash 396035141, now seen corresponding path program 3 times [2018-04-13 10:12:13,304 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:12:13,304 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:12:13,305 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:13,305 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:12:13,305 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:13,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:12:13,314 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:12:13,318 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:12:13,318 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:12:13,318 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:12:13,318 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:12:13,326 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-04-13 10:12:13,326 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:12:13,328 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:12:13,369 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:13,370 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:13,371 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:13,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-13 10:12:13,372 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:13,375 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:13,376 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-04-13 10:12:13,392 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:12:13,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:12:13,394 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:13,395 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:13,400 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:13,400 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:35, output treesize:31 [2018-04-13 10:12:13,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 13 [2018-04-13 10:12:13,422 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:13,425 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:13,425 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:36, output treesize:17 [2018-04-13 10:12:13,467 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 31 [2018-04-13 10:12:13,468 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:13,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 21 [2018-04-13 10:12:13,468 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:13,471 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:13,474 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:13,474 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:42, output treesize:15 [2018-04-13 10:12:13,487 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:13,488 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-13 10:12:13,488 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:13,491 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:13,491 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:21, output treesize:11 [2018-04-13 10:12:13,512 INFO L134 CoverageAnalysis]: Checked inductivity of 288 backedges. 60 proven. 4 refuted. 0 times theorem prover too weak. 224 trivial. 0 not checked. [2018-04-13 10:12:13,513 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:12:13,513 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13] total 13 [2018-04-13 10:12:13,513 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-04-13 10:12:13,513 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-04-13 10:12:13,513 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-04-13 10:12:13,513 INFO L87 Difference]: Start difference. First operand 392 states and 442 transitions. Second operand 14 states. [2018-04-13 10:12:13,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:12:13,996 INFO L93 Difference]: Finished difference Result 414 states and 463 transitions. [2018-04-13 10:12:13,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-04-13 10:12:13,997 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 120 [2018-04-13 10:12:13,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:12:13,998 INFO L225 Difference]: With dead ends: 414 [2018-04-13 10:12:13,998 INFO L226 Difference]: Without dead ends: 412 [2018-04-13 10:12:13,998 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 127 GetRequests, 107 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=74, Invalid=346, Unknown=0, NotChecked=0, Total=420 [2018-04-13 10:12:13,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 412 states. [2018-04-13 10:12:14,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 412 to 397. [2018-04-13 10:12:14,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 397 states. [2018-04-13 10:12:14,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 397 states to 397 states and 447 transitions. [2018-04-13 10:12:14,001 INFO L78 Accepts]: Start accepts. Automaton has 397 states and 447 transitions. Word has length 120 [2018-04-13 10:12:14,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:12:14,001 INFO L459 AbstractCegarLoop]: Abstraction has 397 states and 447 transitions. [2018-04-13 10:12:14,001 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-04-13 10:12:14,001 INFO L276 IsEmpty]: Start isEmpty. Operand 397 states and 447 transitions. [2018-04-13 10:12:14,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2018-04-13 10:12:14,001 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:12:14,001 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:12:14,001 INFO L408 AbstractCegarLoop]: === Iteration 68 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:12:14,001 INFO L82 PathProgramCache]: Analyzing trace with hash -147940323, now seen corresponding path program 2 times [2018-04-13 10:12:14,002 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:12:14,002 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:12:14,002 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:14,002 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:12:14,002 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:14,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:12:14,022 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:12:14,171 INFO L134 CoverageAnalysis]: Checked inductivity of 249 backedges. 17 proven. 10 refuted. 0 times theorem prover too weak. 222 trivial. 0 not checked. [2018-04-13 10:12:14,171 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:12:14,171 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:12:14,171 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:12:14,179 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:12:14,179 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:12:14,181 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:12:14,223 INFO L134 CoverageAnalysis]: Checked inductivity of 249 backedges. 17 proven. 2 refuted. 0 times theorem prover too weak. 230 trivial. 0 not checked. [2018-04-13 10:12:14,224 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:12:14,224 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 7] total 19 [2018-04-13 10:12:14,224 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-04-13 10:12:14,224 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-04-13 10:12:14,224 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=288, Unknown=0, NotChecked=0, Total=342 [2018-04-13 10:12:14,224 INFO L87 Difference]: Start difference. First operand 397 states and 447 transitions. Second operand 19 states. [2018-04-13 10:12:14,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:12:14,428 INFO L93 Difference]: Finished difference Result 400 states and 449 transitions. [2018-04-13 10:12:14,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-04-13 10:12:14,428 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 120 [2018-04-13 10:12:14,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:12:14,429 INFO L225 Difference]: With dead ends: 400 [2018-04-13 10:12:14,429 INFO L226 Difference]: Without dead ends: 400 [2018-04-13 10:12:14,429 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 116 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 89 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=127, Invalid=523, Unknown=0, NotChecked=0, Total=650 [2018-04-13 10:12:14,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 400 states. [2018-04-13 10:12:14,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 400 to 400. [2018-04-13 10:12:14,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 400 states. [2018-04-13 10:12:14,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 400 states to 400 states and 449 transitions. [2018-04-13 10:12:14,431 INFO L78 Accepts]: Start accepts. Automaton has 400 states and 449 transitions. Word has length 120 [2018-04-13 10:12:14,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:12:14,432 INFO L459 AbstractCegarLoop]: Abstraction has 400 states and 449 transitions. [2018-04-13 10:12:14,432 INFO L460 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-04-13 10:12:14,432 INFO L276 IsEmpty]: Start isEmpty. Operand 400 states and 449 transitions. [2018-04-13 10:12:14,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-04-13 10:12:14,432 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:12:14,432 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 5, 5, 4, 4, 4, 4, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:12:14,432 INFO L408 AbstractCegarLoop]: === Iteration 69 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, 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ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:12:14,432 INFO L82 PathProgramCache]: Analyzing trace with hash -909714612, now seen corresponding path program 4 times [2018-04-13 10:12:14,432 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:12:14,432 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:12:14,433 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:14,433 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:12:14,433 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:14,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:12:14,441 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:12:14,443 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:12:14,444 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:12:14,444 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:12:14,444 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:12:14,469 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:12:14,469 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:12:14,472 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:12:14,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:12:14,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:12:14,505 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,506 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,509 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,509 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:12:14,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:12:14,527 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:12:14,528 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,531 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,535 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,535 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-04-13 10:12:14,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:12:14,559 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,560 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,560 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:12:14,561 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,567 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,573 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,573 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:42 [2018-04-13 10:12:14,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-04-13 10:12:14,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,606 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,606 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-04-13 10:12:14,607 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,618 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,624 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,625 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:58, output treesize:54 [2018-04-13 10:12:14,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 53 [2018-04-13 10:12:14,712 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,714 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,714 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,715 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,716 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,716 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,717 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,717 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 196 [2018-04-13 10:12:14,718 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,734 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,743 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,743 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:70, output treesize:66 [2018-04-13 10:12:14,787 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 63 [2018-04-13 10:12:14,789 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,790 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,790 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,791 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,791 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,792 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,792 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,793 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,793 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,794 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,797 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:14,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 277 [2018-04-13 10:12:14,797 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,822 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,832 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:14,832 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:82, output treesize:78 [2018-04-13 10:12:15,206 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 67 [2018-04-13 10:12:15,208 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,208 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,210 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,210 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,211 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:15,211 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,212 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,212 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,215 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,215 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,216 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:15,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 15 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 218 [2018-04-13 10:12:15,216 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:15,229 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:15,232 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:15,232 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:87, output treesize:3 [2018-04-13 10:12:15,290 INFO L134 CoverageAnalysis]: Checked inductivity of 272 backedges. 0 proven. 268 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-04-13 10:12:15,290 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:12:15,290 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28] total 28 [2018-04-13 10:12:15,290 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-04-13 10:12:15,290 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-04-13 10:12:15,290 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=723, Unknown=0, NotChecked=0, Total=812 [2018-04-13 10:12:15,290 INFO L87 Difference]: Start difference. First operand 400 states and 449 transitions. Second operand 29 states. [2018-04-13 10:12:17,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:12:17,419 INFO L93 Difference]: Finished difference Result 411 states and 460 transitions. [2018-04-13 10:12:17,419 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-13 10:12:17,419 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 118 [2018-04-13 10:12:17,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:12:17,420 INFO L225 Difference]: With dead ends: 411 [2018-04-13 10:12:17,420 INFO L226 Difference]: Without dead ends: 411 [2018-04-13 10:12:17,420 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 90 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 876 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=341, Invalid=2965, Unknown=0, NotChecked=0, Total=3306 [2018-04-13 10:12:17,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 411 states. [2018-04-13 10:12:17,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 411 to 401. [2018-04-13 10:12:17,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 401 states. [2018-04-13 10:12:17,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 401 states to 401 states and 450 transitions. [2018-04-13 10:12:17,423 INFO L78 Accepts]: Start accepts. Automaton has 401 states and 450 transitions. Word has length 118 [2018-04-13 10:12:17,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:12:17,424 INFO L459 AbstractCegarLoop]: Abstraction has 401 states and 450 transitions. [2018-04-13 10:12:17,424 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-04-13 10:12:17,424 INFO L276 IsEmpty]: Start isEmpty. Operand 401 states and 450 transitions. [2018-04-13 10:12:17,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-04-13 10:12:17,425 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:12:17,425 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:12:17,425 INFO L408 AbstractCegarLoop]: === Iteration 70 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:12:17,425 INFO L82 PathProgramCache]: Analyzing trace with hash 1587821905, now seen corresponding path program 3 times [2018-04-13 10:12:17,425 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:12:17,425 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:12:17,426 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:17,426 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:12:17,426 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:17,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:12:17,436 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:12:17,464 INFO L134 CoverageAnalysis]: Checked inductivity of 266 backedges. 19 proven. 17 refuted. 0 times theorem prover too weak. 230 trivial. 0 not checked. [2018-04-13 10:12:17,465 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:12:17,465 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:12:17,465 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:12:17,484 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-04-13 10:12:17,484 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:12:17,486 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:12:17,508 INFO L134 CoverageAnalysis]: Checked inductivity of 266 backedges. 19 proven. 17 refuted. 0 times theorem prover too weak. 230 trivial. 0 not checked. [2018-04-13 10:12:17,509 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:12:17,509 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 9 [2018-04-13 10:12:17,509 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-04-13 10:12:17,509 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-04-13 10:12:17,509 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2018-04-13 10:12:17,509 INFO L87 Difference]: Start difference. First operand 401 states and 450 transitions. Second operand 9 states. [2018-04-13 10:12:17,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:12:17,574 INFO L93 Difference]: Finished difference Result 398 states and 444 transitions. [2018-04-13 10:12:17,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-13 10:12:17,575 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 122 [2018-04-13 10:12:17,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:12:17,575 INFO L225 Difference]: With dead ends: 398 [2018-04-13 10:12:17,576 INFO L226 Difference]: Without dead ends: 398 [2018-04-13 10:12:17,576 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=75, Invalid=135, Unknown=0, NotChecked=0, Total=210 [2018-04-13 10:12:17,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 398 states. [2018-04-13 10:12:17,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 398 to 395. [2018-04-13 10:12:17,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 395 states. [2018-04-13 10:12:17,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 441 transitions. [2018-04-13 10:12:17,578 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 441 transitions. Word has length 122 [2018-04-13 10:12:17,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:12:17,578 INFO L459 AbstractCegarLoop]: Abstraction has 395 states and 441 transitions. [2018-04-13 10:12:17,578 INFO L460 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-04-13 10:12:17,578 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 441 transitions. [2018-04-13 10:12:17,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-04-13 10:12:17,579 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:12:17,579 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:12:17,579 INFO L408 AbstractCegarLoop]: === Iteration 71 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:12:17,579 INFO L82 PathProgramCache]: Analyzing trace with hash 1055156006, now seen corresponding path program 2 times [2018-04-13 10:12:17,579 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:12:17,579 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:12:17,580 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:17,580 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:12:17,580 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:12:17,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:12:17,595 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:12:17,598 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:12:17,598 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:12:17,598 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:12:17,598 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:12:17,619 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:12:17,619 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:12:17,622 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:12:17,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:12:17,623 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,624 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,624 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:12:17,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:12:17,628 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,631 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:17,631 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-13 10:12:17,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-04-13 10:12:17,661 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,668 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:17,668 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:24, output treesize:19 [2018-04-13 10:12:17,721 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:12:17,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:12:17,722 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,723 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,728 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:17,729 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:32, output treesize:28 [2018-04-13 10:12:17,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:12:17,762 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:12:17,763 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,767 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,773 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:17,773 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:37 [2018-04-13 10:12:17,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:12:17,816 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,817 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,817 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,818 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:12:17,818 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,824 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,832 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:17,832 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:53, output treesize:49 [2018-04-13 10:12:17,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:12:17,886 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,887 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,888 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,888 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,889 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,889 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:12:17,890 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,900 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,908 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:17,908 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:65, output treesize:61 [2018-04-13 10:12:17,962 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 49 [2018-04-13 10:12:17,964 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,964 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,965 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,966 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,966 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,967 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,967 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,968 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,968 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,969 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:17,969 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 176 [2018-04-13 10:12:17,969 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,984 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:17,995 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:17,995 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:81, output treesize:77 [2018-04-13 10:12:18,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 58 [2018-04-13 10:12:18,082 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,083 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,083 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,084 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,085 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,085 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,086 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,086 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,087 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,087 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,088 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,088 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,089 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,090 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,090 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 247 [2018-04-13 10:12:18,091 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:18,113 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:18,126 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:18,127 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:97, output treesize:93 [2018-04-13 10:12:18,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 67 [2018-04-13 10:12:18,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,215 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,216 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,216 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,217 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,217 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,218 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,218 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,219 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,220 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,220 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,221 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,221 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,222 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,222 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,224 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,224 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 330 [2018-04-13 10:12:18,225 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:18,256 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:18,273 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:18,273 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:113, output treesize:109 [2018-04-13 10:12:18,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 76 [2018-04-13 10:12:18,381 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,382 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,382 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,383 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,384 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,384 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,385 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,385 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,386 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,387 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,387 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,388 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,388 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,389 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,389 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,390 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,390 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,391 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,396 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,396 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,397 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,397 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 425 [2018-04-13 10:12:18,398 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:18,441 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:18,461 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:18,461 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:129, output treesize:125 [2018-04-13 10:12:18,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 85 [2018-04-13 10:12:18,642 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,642 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,643 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,644 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,645 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,645 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,646 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,647 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,647 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,648 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,648 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,649 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,650 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,650 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,651 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,652 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,652 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,653 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,653 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,654 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,655 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,655 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,656 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,656 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,658 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,659 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,659 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,662 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,662 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,663 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,664 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:18,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 532 [2018-04-13 10:12:18,665 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:18,729 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:18,752 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: 7 dim-0 vars, and 1 xjuncts. [2018-04-13 10:12:18,752 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:145, output treesize:141 [2018-04-13 10:12:19,465 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:12:19,466 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:12:19,467 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:19,468 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:19,471 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:19,471 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:29, output treesize:3 [2018-04-13 10:12:20,042 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,047 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 36 [2018-04-13 10:12:20,069 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 28 treesize of output 37 [2018-04-13 10:12:20,069 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 4 xjuncts. [2018-04-13 10:12:20,132 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-04-13 10:12:20,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 122 treesize of output 101 [2018-04-13 10:12:20,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,282 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,284 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,285 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,285 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,287 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,287 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,288 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,288 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,289 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,289 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,290 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,292 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,292 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,293 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,302 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,304 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,304 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,305 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,306 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,306 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,307 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,308 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,309 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,309 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 643 [2018-04-13 10:12:20,325 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,325 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,326 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,327 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,328 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,328 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,329 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,329 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,330 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,331 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,331 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,332 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,332 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,333 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,334 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,334 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,335 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,335 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,336 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,337 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,337 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,338 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,338 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,339 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,340 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,340 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,341 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,342 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,342 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,343 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,343 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,344 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,345 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,345 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:12:20,346 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,346 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,347 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,347 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,348 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,349 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,349 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,350 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,350 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,351 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,351 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,352 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,353 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,353 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,354 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:20,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 103 treesize of output 770 [2018-04-13 10:12:20,363 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:20,467 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:20,482 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:20,545 INFO L267 ElimStorePlain]: Start of recursive call 1: 13 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 44 dim-0 vars, and 4 xjuncts. [2018-04-13 10:12:20,545 INFO L202 ElimStorePlain]: Needed 6 recursive calls to eliminate 15 variables, input treesize:199, output treesize:741 [2018-04-13 10:12:28,054 WARN L151 SmtUtils]: Spent 6083ms on a formula simplification. DAG size of input: 329 DAG size of output 241 [2018-04-13 10:12:28,443 WARN L148 SmtUtils]: Spent 219ms on a formula simplification that was a NOOP. DAG size: 241 [2018-04-13 10:12:28,854 WARN L148 SmtUtils]: Spent 247ms on a formula simplification that was a NOOP. DAG size: 243 [2018-04-13 10:12:31,120 WARN L151 SmtUtils]: Spent 485ms on a formula simplification. DAG size of input: 245 DAG size of output 234 [2018-04-13 10:12:31,142 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:31,144 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:31,150 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 184 treesize of output 191 [2018-04-13 10:12:31,150 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:12:31,372 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:31,374 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:31,383 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:31,388 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 193 treesize of output 208 [2018-04-13 10:12:31,389 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:12:31,719 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:31,720 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:31,722 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:31,728 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 193 treesize of output 208 [2018-04-13 10:12:31,728 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:12:32,162 INFO L267 ElimStorePlain]: Start of recursive call 1: 32 dim-0 vars, 3 dim-1 vars, End of recursive call: 61 dim-0 vars, and 6 xjuncts. [2018-04-13 10:12:32,163 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 35 variables, input treesize:571, output treesize:1140 [2018-04-13 10:12:36,647 WARN L151 SmtUtils]: Spent 1297ms on a formula simplification. DAG size of input: 465 DAG size of output 453 [2018-04-13 10:12:37,576 WARN L148 SmtUtils]: Spent 623ms on a formula simplification that was a NOOP. DAG size: 453 [2018-04-13 10:12:37,608 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 172 treesize of output 150 [2018-04-13 10:12:37,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,616 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,616 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,617 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,617 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,618 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,618 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,619 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,620 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,620 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,621 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,621 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,622 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,628 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,629 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,629 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,630 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,631 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,631 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,632 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,632 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,633 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,633 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,634 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,635 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,635 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,636 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,636 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,637 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,637 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,638 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,639 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,639 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 400 [2018-04-13 10:12:37,640 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:37,722 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:37,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 172 treesize of output 150 [2018-04-13 10:12:37,932 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,933 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,934 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,935 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,935 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,936 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,937 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,937 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,938 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,939 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,939 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,940 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,941 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,941 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,942 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,943 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,944 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,944 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,945 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,945 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,946 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,947 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,947 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,949 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,949 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,950 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,951 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,951 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,952 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,952 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,953 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,953 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,954 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,954 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,955 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,955 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,956 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,957 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,957 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,958 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,958 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,959 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,959 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,960 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:37,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 400 [2018-04-13 10:12:37,961 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:38,045 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:38,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 163 treesize of output 141 [2018-04-13 10:12:38,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,282 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,282 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,284 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,284 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,285 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,285 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,287 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,287 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,288 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,288 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,289 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,289 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,290 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,292 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,292 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,293 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,293 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,302 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,302 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,303 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 400 [2018-04-13 10:12:38,304 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:38,388 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:38,438 INFO L267 ElimStorePlain]: Start of recursive call 1: 58 dim-0 vars, 6 dim-2 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-04-13 10:12:38,438 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 64 variables, input treesize:1050, output treesize:61 [2018-04-13 10:12:38,529 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,529 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:12:38,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-13 10:12:38,530 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:12:38,532 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:12:38,532 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:11 [2018-04-13 10:12:38,801 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 67 proven. 161 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-13 10:12:38,801 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:12:38,801 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45] total 45 [2018-04-13 10:12:38,802 INFO L442 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-04-13 10:12:38,802 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-04-13 10:12:38,802 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=226, Invalid=1844, Unknown=0, NotChecked=0, Total=2070 [2018-04-13 10:12:38,802 INFO L87 Difference]: Start difference. First operand 395 states and 441 transitions. Second operand 46 states. [2018-04-13 10:12:53,769 WARN L151 SmtUtils]: Spent 4300ms on a formula simplification. DAG size of input: 90 DAG size of output 85 [2018-04-13 10:13:01,710 WARN L151 SmtUtils]: Spent 358ms on a formula simplification. DAG size of input: 87 DAG size of output 82 [2018-04-13 10:14:51,502 WARN L151 SmtUtils]: Spent 82075ms on a formula simplification. DAG size of input: 292 DAG size of output 280 [2018-04-13 10:14:55,523 WARN L151 SmtUtils]: Spent 491ms on a formula simplification. DAG size of input: 250 DAG size of output 239 [2018-04-13 10:14:56,907 WARN L151 SmtUtils]: Spent 1212ms on a formula simplification. DAG size of input: 356 DAG size of output 345 [2018-04-13 10:15:02,014 WARN L151 SmtUtils]: Spent 2837ms on a formula simplification. DAG size of input: 581 DAG size of output 414 [2018-04-13 10:15:11,425 WARN L151 SmtUtils]: Spent 604ms on a formula simplification. DAG size of input: 460 DAG size of output 241 [2018-04-13 10:15:21,804 WARN L151 SmtUtils]: Spent 1949ms on a formula simplification. DAG size of input: 477 DAG size of output 315 [2018-04-13 10:15:22,566 WARN L151 SmtUtils]: Spent 627ms on a formula simplification. DAG size of input: 458 DAG size of output 239 [2018-04-13 10:15:25,334 WARN L151 SmtUtils]: Spent 643ms on a formula simplification. DAG size of input: 460 DAG size of output 241 [2018-04-13 10:15:28,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:15:28,738 INFO L93 Difference]: Finished difference Result 398 states and 440 transitions. [2018-04-13 10:15:28,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-04-13 10:15:28,739 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 122 [2018-04-13 10:15:28,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:15:28,740 INFO L225 Difference]: With dead ends: 398 [2018-04-13 10:15:28,740 INFO L226 Difference]: Without dead ends: 398 [2018-04-13 10:15:28,740 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 77 SyntacticMatches, 0 SemanticMatches, 87 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2073 ImplicationChecksByTransitivity, 148.4s TimeCoverageRelationStatistics Valid=781, Invalid=7040, Unknown=11, NotChecked=0, Total=7832 [2018-04-13 10:15:28,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 398 states. [2018-04-13 10:15:28,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 398 to 395. [2018-04-13 10:15:28,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 395 states. [2018-04-13 10:15:28,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 440 transitions. [2018-04-13 10:15:28,744 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 440 transitions. Word has length 122 [2018-04-13 10:15:28,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:15:28,745 INFO L459 AbstractCegarLoop]: Abstraction has 395 states and 440 transitions. [2018-04-13 10:15:28,745 INFO L460 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-04-13 10:15:28,745 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 440 transitions. [2018-04-13 10:15:28,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-04-13 10:15:28,745 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:15:28,745 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:15:28,746 INFO L408 AbstractCegarLoop]: === Iteration 72 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:15:28,746 INFO L82 PathProgramCache]: Analyzing trace with hash 1055156007, now seen corresponding path program 2 times [2018-04-13 10:15:28,746 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:15:28,746 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:15:28,747 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:28,747 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:15:28,747 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:28,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:15:28,757 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:15:28,761 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:15:28,761 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:15:28,762 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:15:28,762 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:15:28,789 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:15:28,789 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:15:28,793 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:15:28,799 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:15:28,799 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:28,820 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:15:28,821 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:28,842 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-13 10:15:28,842 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:28,843 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-04-13 10:15:28,843 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:28,855 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:15:28,855 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-04-13 10:15:28,992 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:28,992 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:28,993 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-04-13 10:15:28,993 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:29,007 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:29,008 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:29,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 26 [2018-04-13 10:15:29,008 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:29,022 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:15:29,023 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:29,048 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:29,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 37 [2018-04-13 10:15:29,049 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:29,065 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:15:29,065 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:67, output treesize:49 [2018-04-13 10:15:29,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 33 [2018-04-13 10:15:29,249 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:29,250 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 35 [2018-04-13 10:15:29,250 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:29,267 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:15:29,268 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:79, output treesize:55 [2018-04-13 10:15:29,341 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 38 [2018-04-13 10:15:29,341 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:29,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 36 [2018-04-13 10:15:29,342 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:29,361 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:15:29,361 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:85, output treesize:55 [2018-04-13 10:15:29,487 INFO L134 CoverageAnalysis]: Checked inductivity of 235 backedges. 2 proven. 29 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:15:29,487 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:15:29,487 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-04-13 10:15:29,488 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-13 10:15:29,488 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-13 10:15:29,488 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=210, Unknown=0, NotChecked=0, Total=240 [2018-04-13 10:15:29,488 INFO L87 Difference]: Start difference. First operand 395 states and 440 transitions. Second operand 16 states. [2018-04-13 10:15:30,493 WARN L151 SmtUtils]: Spent 266ms on a formula simplification. DAG size of input: 52 DAG size of output 46 [2018-04-13 10:15:30,742 WARN L151 SmtUtils]: Spent 192ms on a formula simplification. DAG size of input: 49 DAG size of output 43 [2018-04-13 10:15:30,965 WARN L151 SmtUtils]: Spent 196ms on a formula simplification. DAG size of input: 50 DAG size of output 44 [2018-04-13 10:15:31,313 WARN L151 SmtUtils]: Spent 194ms on a formula simplification. DAG size of input: 50 DAG size of output 44 [2018-04-13 10:15:31,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:15:31,628 INFO L93 Difference]: Finished difference Result 414 states and 449 transitions. [2018-04-13 10:15:31,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-04-13 10:15:31,628 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 122 [2018-04-13 10:15:31,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:15:31,629 INFO L225 Difference]: With dead ends: 414 [2018-04-13 10:15:31,629 INFO L226 Difference]: Without dead ends: 414 [2018-04-13 10:15:31,629 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 95 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=109, Invalid=761, Unknown=0, NotChecked=0, Total=870 [2018-04-13 10:15:31,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 414 states. [2018-04-13 10:15:31,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 414 to 395. [2018-04-13 10:15:31,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 395 states. [2018-04-13 10:15:31,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 439 transitions. [2018-04-13 10:15:31,632 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 439 transitions. Word has length 122 [2018-04-13 10:15:31,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:15:31,632 INFO L459 AbstractCegarLoop]: Abstraction has 395 states and 439 transitions. [2018-04-13 10:15:31,632 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-13 10:15:31,632 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 439 transitions. [2018-04-13 10:15:31,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-04-13 10:15:31,633 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:15:31,633 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:15:31,633 INFO L408 AbstractCegarLoop]: === Iteration 73 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:15:31,633 INFO L82 PathProgramCache]: Analyzing trace with hash -1649902109, now seen corresponding path program 2 times [2018-04-13 10:15:31,633 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:15:31,633 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:15:31,633 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:31,634 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:15:31,634 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:31,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:15:31,644 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:15:31,646 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:15:31,646 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:15:31,646 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:15:31,647 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:15:31,679 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:15:31,679 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:15:31,682 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:15:31,714 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:15:31,715 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:15:31,716 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,716 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,720 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,720 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-04-13 10:15:31,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:15:31,743 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,743 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:15:31,744 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,746 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,751 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,751 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-04-13 10:15:31,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-04-13 10:15:31,781 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,782 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,782 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 58 [2018-04-13 10:15:31,783 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,788 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,793 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,793 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:15:31,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-04-13 10:15:31,831 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,831 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,832 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,832 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,832 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,833 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,833 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 93 [2018-04-13 10:15:31,833 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,841 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,847 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,847 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:52, output treesize:48 [2018-04-13 10:15:31,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 41 [2018-04-13 10:15:31,887 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,887 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,888 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,888 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,889 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,889 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,890 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,890 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,890 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,891 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 136 [2018-04-13 10:15:31,891 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,903 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,911 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,911 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-04-13 10:15:31,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 48 [2018-04-13 10:15:31,962 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,962 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,963 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,963 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,964 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,964 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,965 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,965 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,966 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,967 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,967 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,968 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,968 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,969 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,969 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:31,970 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 187 [2018-04-13 10:15:31,970 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:31,995 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:32,004 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:32,005 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:70, output treesize:66 [2018-04-13 10:15:32,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 55 [2018-04-13 10:15:32,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,063 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,063 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,064 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,064 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,066 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,066 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,068 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,069 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,069 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,070 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,070 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,071 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,071 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,072 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,073 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,073 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,074 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,074 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 246 [2018-04-13 10:15:32,075 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:32,102 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:32,113 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:32,113 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:79, output treesize:75 [2018-04-13 10:15:32,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 62 [2018-04-13 10:15:32,181 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,181 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,182 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,183 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,183 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,196 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,196 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,197 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 313 [2018-04-13 10:15:32,198 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:32,234 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:32,246 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:32,247 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:88, output treesize:84 [2018-04-13 10:15:32,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:15:32,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:15:32,441 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:32,442 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:32,445 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:32,445 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:26, output treesize:1 [2018-04-13 10:15:32,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 76 [2018-04-13 10:15:32,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,606 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,606 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,608 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,608 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,609 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,609 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,610 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,616 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,616 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,618 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,623 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,623 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,625 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,625 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,628 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,628 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,629 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,629 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 382 [2018-04-13 10:15:32,641 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,642 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,643 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,645 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,646 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,647 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,649 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,650 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,651 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,653 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,654 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,655 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,656 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,658 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,659 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,662 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,663 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,664 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,665 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,665 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,666 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,667 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,668 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,668 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,669 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,670 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,671 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,672 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,673 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,673 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,674 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,675 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,676 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,678 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,679 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,679 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,680 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,681 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,682 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:32,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 44 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 78 treesize of output 491 [2018-04-13 10:15:32,700 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:32,971 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:15:33,003 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:15:33,040 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-04-13 10:15:33,040 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 5 variables, input treesize:114, output treesize:204 [2018-04-13 10:15:33,445 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 75 [2018-04-13 10:15:33,448 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,448 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,449 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,449 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,450 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,450 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,451 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,451 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,452 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,452 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,453 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,453 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,454 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,454 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,455 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,455 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,456 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,456 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:15:33,457 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,458 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,458 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,459 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,461 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,462 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,462 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,463 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,463 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,466 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,466 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,468 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,468 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,469 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:33,469 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 36 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 349 [2018-04-13 10:15:33,470 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:33,509 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:33,517 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:33,517 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:127, output treesize:3 [2018-04-13 10:15:33,609 INFO L134 CoverageAnalysis]: Checked inductivity of 237 backedges. 0 proven. 228 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-04-13 10:15:33,609 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:15:33,609 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39] total 39 [2018-04-13 10:15:33,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-04-13 10:15:33,609 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-04-13 10:15:33,609 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=132, Invalid=1428, Unknown=0, NotChecked=0, Total=1560 [2018-04-13 10:15:33,609 INFO L87 Difference]: Start difference. First operand 395 states and 439 transitions. Second operand 40 states. [2018-04-13 10:15:36,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:15:36,291 INFO L93 Difference]: Finished difference Result 405 states and 447 transitions. [2018-04-13 10:15:36,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-04-13 10:15:36,291 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 123 [2018-04-13 10:15:36,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:15:36,292 INFO L225 Difference]: With dead ends: 405 [2018-04-13 10:15:36,292 INFO L226 Difference]: Without dead ends: 405 [2018-04-13 10:15:36,293 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 84 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 919 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=237, Invalid=3069, Unknown=0, NotChecked=0, Total=3306 [2018-04-13 10:15:36,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 405 states. [2018-04-13 10:15:36,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 405 to 395. [2018-04-13 10:15:36,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 395 states. [2018-04-13 10:15:36,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 395 states to 395 states and 438 transitions. [2018-04-13 10:15:36,295 INFO L78 Accepts]: Start accepts. Automaton has 395 states and 438 transitions. Word has length 123 [2018-04-13 10:15:36,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:15:36,295 INFO L459 AbstractCegarLoop]: Abstraction has 395 states and 438 transitions. [2018-04-13 10:15:36,295 INFO L460 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-04-13 10:15:36,295 INFO L276 IsEmpty]: Start isEmpty. Operand 395 states and 438 transitions. [2018-04-13 10:15:36,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-04-13 10:15:36,296 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:15:36,296 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:15:36,296 INFO L408 AbstractCegarLoop]: === Iteration 74 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:15:36,296 INFO L82 PathProgramCache]: Analyzing trace with hash -760820595, now seen corresponding path program 2 times [2018-04-13 10:15:36,296 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:15:36,296 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:15:36,296 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:36,297 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:15:36,297 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:36,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:15:36,315 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:15:36,319 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:15:36,319 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:15:36,319 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:15:36,320 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:15:36,343 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:15:36,343 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:15:36,347 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:15:36,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:15:36,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:15:36,396 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:36,397 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:36,400 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:36,400 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:15:36,443 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:15:36,444 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:36,445 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:15:36,445 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:36,448 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:36,452 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:36,452 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:16 [2018-04-13 10:15:36,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:15:36,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:36,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:15:36,494 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:36,497 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:36,501 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:36,501 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:15:36,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2018-04-13 10:15:36,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 3 [2018-04-13 10:15:36,531 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:36,531 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:36,532 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:36,532 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:3 [2018-04-13 10:15:36,552 INFO L134 CoverageAnalysis]: Checked inductivity of 292 backedges. 24 proven. 56 refuted. 0 times theorem prover too weak. 212 trivial. 0 not checked. [2018-04-13 10:15:36,552 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:15:36,552 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19] total 19 [2018-04-13 10:15:36,552 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-13 10:15:36,552 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-13 10:15:36,553 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2018-04-13 10:15:36,553 INFO L87 Difference]: Start difference. First operand 395 states and 438 transitions. Second operand 20 states. [2018-04-13 10:15:37,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:15:37,154 INFO L93 Difference]: Finished difference Result 556 states and 626 transitions. [2018-04-13 10:15:37,154 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-04-13 10:15:37,154 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 125 [2018-04-13 10:15:37,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:15:37,156 INFO L225 Difference]: With dead ends: 556 [2018-04-13 10:15:37,156 INFO L226 Difference]: Without dead ends: 556 [2018-04-13 10:15:37,156 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 105 SyntacticMatches, 3 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 457 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=234, Invalid=1836, Unknown=0, NotChecked=0, Total=2070 [2018-04-13 10:15:37,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 556 states. [2018-04-13 10:15:37,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 556 to 423. [2018-04-13 10:15:37,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 423 states. [2018-04-13 10:15:37,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 468 transitions. [2018-04-13 10:15:37,160 INFO L78 Accepts]: Start accepts. Automaton has 423 states and 468 transitions. Word has length 125 [2018-04-13 10:15:37,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:15:37,160 INFO L459 AbstractCegarLoop]: Abstraction has 423 states and 468 transitions. [2018-04-13 10:15:37,160 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-13 10:15:37,160 INFO L276 IsEmpty]: Start isEmpty. Operand 423 states and 468 transitions. [2018-04-13 10:15:37,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-04-13 10:15:37,161 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:15:37,161 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:15:37,161 INFO L408 AbstractCegarLoop]: === Iteration 75 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:15:37,161 INFO L82 PathProgramCache]: Analyzing trace with hash 392642310, now seen corresponding path program 2 times [2018-04-13 10:15:37,161 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:15:37,162 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:15:37,162 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:37,162 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:15:37,162 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:37,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:15:37,171 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:15:37,176 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:15:37,176 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:15:37,176 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:15:37,176 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:15:37,206 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:15:37,206 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:15:37,209 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:15:37,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:15:37,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:15:37,250 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,250 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,254 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,254 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-04-13 10:15:37,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:15:37,275 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,276 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:15:37,276 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,279 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,284 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,284 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:37, output treesize:33 [2018-04-13 10:15:37,312 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:15:37,313 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,314 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,314 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:15:37,315 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,320 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,326 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,327 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:49, output treesize:45 [2018-04-13 10:15:37,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-04-13 10:15:37,372 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,373 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,373 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,374 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,374 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,375 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-04-13 10:15:37,375 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,384 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,391 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,391 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-04-13 10:15:37,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 53 [2018-04-13 10:15:37,433 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,434 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,434 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,435 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,435 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,436 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,436 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,437 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,437 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,438 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,438 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 196 [2018-04-13 10:15:37,438 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,452 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,460 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,460 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:73, output treesize:69 [2018-04-13 10:15:37,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 63 [2018-04-13 10:15:37,511 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,513 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,513 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,514 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,514 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,515 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,515 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,517 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,517 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,518 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,518 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 277 [2018-04-13 10:15:37,519 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,544 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,553 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,553 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:85, output treesize:81 [2018-04-13 10:15:37,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 73 [2018-04-13 10:15:37,618 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,619 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,620 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,620 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,621 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,621 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,622 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,622 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,623 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,623 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,625 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,625 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,628 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,628 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,629 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 372 [2018-04-13 10:15:37,629 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,657 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,669 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,669 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:97, output treesize:93 [2018-04-13 10:15:37,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 83 [2018-04-13 10:15:37,742 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,742 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,743 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,743 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,744 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,744 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,745 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,745 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,746 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,746 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,747 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,747 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,748 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,748 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,749 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,749 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,750 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,750 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,751 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,751 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,752 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,752 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,753 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,753 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,754 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,755 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,755 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:37,756 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 481 [2018-04-13 10:15:37,756 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,801 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,814 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:37,815 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:109, output treesize:105 [2018-04-13 10:15:38,087 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:15:38,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:15:38,088 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:38,089 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:38,092 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:38,092 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:26, output treesize:1 [2018-04-13 10:15:38,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 99 [2018-04-13 10:15:38,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,396 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,396 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,397 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,398 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,398 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,399 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,399 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,400 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,401 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,401 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,402 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,402 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,403 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,403 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,404 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,404 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,405 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,405 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,406 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,406 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,407 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,407 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,408 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,409 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,409 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,410 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,410 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,411 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,411 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,412 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,417 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 99 treesize of output 589 [2018-04-13 10:15:38,423 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,423 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,424 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,425 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,425 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,426 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,426 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,427 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,428 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,428 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,429 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,430 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,430 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,431 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,431 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,432 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,432 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:15:38,433 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,433 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,434 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,434 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,435 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,435 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,436 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,437 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,437 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,438 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,438 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,439 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,439 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,440 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,440 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,441 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,441 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,442 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,443 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,443 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,470 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:38,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 36 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 619 [2018-04-13 10:15:38,477 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:38,545 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:38,556 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:38,577 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:38,577 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 6 variables, input treesize:150, output treesize:139 [2018-04-13 10:15:39,054 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 98 [2018-04-13 10:15:39,057 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,057 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,058 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,059 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,059 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:15:39,059 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,060 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,061 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,061 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,063 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,064 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,064 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,066 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,068 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,068 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,069 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,070 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,070 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,071 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,071 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,072 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,073 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,074 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,074 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,075 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,076 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,076 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,077 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:39,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 36 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 504 [2018-04-13 10:15:39,080 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:39,116 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:39,127 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:39,127 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 9 variables, input treesize:163, output treesize:3 [2018-04-13 10:15:39,232 INFO L134 CoverageAnalysis]: Checked inductivity of 239 backedges. 0 proven. 230 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-04-13 10:15:39,232 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:15:39,232 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40] total 40 [2018-04-13 10:15:39,232 INFO L442 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-04-13 10:15:39,232 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-04-13 10:15:39,233 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=135, Invalid=1505, Unknown=0, NotChecked=0, Total=1640 [2018-04-13 10:15:39,233 INFO L87 Difference]: Start difference. First operand 423 states and 468 transitions. Second operand 41 states. [2018-04-13 10:15:44,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:15:44,202 INFO L93 Difference]: Finished difference Result 423 states and 467 transitions. [2018-04-13 10:15:44,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-04-13 10:15:44,202 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 124 [2018-04-13 10:15:44,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:15:44,203 INFO L225 Difference]: With dead ends: 423 [2018-04-13 10:15:44,203 INFO L226 Difference]: Without dead ends: 423 [2018-04-13 10:15:44,203 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 85 SyntacticMatches, 0 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1584 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=397, Invalid=5303, Unknown=0, NotChecked=0, Total=5700 [2018-04-13 10:15:44,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 423 states. [2018-04-13 10:15:44,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 423 to 423. [2018-04-13 10:15:44,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 423 states. [2018-04-13 10:15:44,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 467 transitions. [2018-04-13 10:15:44,206 INFO L78 Accepts]: Start accepts. Automaton has 423 states and 467 transitions. Word has length 124 [2018-04-13 10:15:44,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:15:44,206 INFO L459 AbstractCegarLoop]: Abstraction has 423 states and 467 transitions. [2018-04-13 10:15:44,206 INFO L460 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-04-13 10:15:44,206 INFO L276 IsEmpty]: Start isEmpty. Operand 423 states and 467 transitions. [2018-04-13 10:15:44,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-04-13 10:15:44,206 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:15:44,206 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 4, 4, 4, 4, 4, 4, 4, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:15:44,206 INFO L408 AbstractCegarLoop]: === Iteration 76 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:15:44,206 INFO L82 PathProgramCache]: Analyzing trace with hash 660559394, now seen corresponding path program 1 times [2018-04-13 10:15:44,207 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:15:44,207 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:15:44,207 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:44,207 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:15:44,207 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:44,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:15:44,219 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:15:44,257 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:15:44,257 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:15:44,257 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:15:44,258 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:15:44,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:15:44,272 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:15:44,320 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 56 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:15:44,320 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:15:44,320 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 14 [2018-04-13 10:15:44,321 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-04-13 10:15:44,321 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-04-13 10:15:44,321 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2018-04-13 10:15:44,321 INFO L87 Difference]: Start difference. First operand 423 states and 467 transitions. Second operand 14 states. [2018-04-13 10:15:44,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:15:44,362 INFO L93 Difference]: Finished difference Result 494 states and 543 transitions. [2018-04-13 10:15:44,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-13 10:15:44,362 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 123 [2018-04-13 10:15:44,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:15:44,363 INFO L225 Difference]: With dead ends: 494 [2018-04-13 10:15:44,363 INFO L226 Difference]: Without dead ends: 486 [2018-04-13 10:15:44,363 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 119 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=69, Invalid=141, Unknown=0, NotChecked=0, Total=210 [2018-04-13 10:15:44,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 486 states. [2018-04-13 10:15:44,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 486 to 447. [2018-04-13 10:15:44,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 447 states. [2018-04-13 10:15:44,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 447 states to 447 states and 502 transitions. [2018-04-13 10:15:44,366 INFO L78 Accepts]: Start accepts. Automaton has 447 states and 502 transitions. Word has length 123 [2018-04-13 10:15:44,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:15:44,367 INFO L459 AbstractCegarLoop]: Abstraction has 447 states and 502 transitions. [2018-04-13 10:15:44,367 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-04-13 10:15:44,367 INFO L276 IsEmpty]: Start isEmpty. Operand 447 states and 502 transitions. [2018-04-13 10:15:44,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-04-13 10:15:44,367 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:15:44,367 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:15:44,367 INFO L408 AbstractCegarLoop]: === Iteration 77 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:15:44,367 INFO L82 PathProgramCache]: Analyzing trace with hash 1821707296, now seen corresponding path program 4 times [2018-04-13 10:15:44,367 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:15:44,367 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:15:44,368 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:44,368 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:15:44,368 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:44,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:15:44,378 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:15:44,382 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:15:44,383 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:15:44,383 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:15:44,383 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:15:44,401 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:15:44,402 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:15:44,404 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:15:44,483 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:44,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 45 [2018-04-13 10:15:44,484 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:44,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:44,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:44,505 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-13 10:15:44,505 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:44,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-04-13 10:15:44,522 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:44,538 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:44,539 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:44,539 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 42 [2018-04-13 10:15:44,539 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:44,553 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 4 dim-1 vars, End of recursive call: 6 dim-0 vars, and 2 xjuncts. [2018-04-13 10:15:44,554 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 10 variables, input treesize:83, output treesize:69 [2018-04-13 10:15:44,739 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:44,740 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:44,745 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 75 [2018-04-13 10:15:44,745 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:44,841 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:44,842 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:44,847 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 75 [2018-04-13 10:15:44,848 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:44,961 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:44,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 63 [2018-04-13 10:15:44,968 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:45,097 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,098 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 58 [2018-04-13 10:15:45,098 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:45,100 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,100 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,100 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-04-13 10:15:45,101 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:45,222 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,228 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 60 treesize of output 67 [2018-04-13 10:15:45,229 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:45,366 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,367 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 50 [2018-04-13 10:15:45,368 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:45,369 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,369 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 58 [2018-04-13 10:15:45,370 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:45,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 56 [2018-04-13 10:15:45,513 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:45,514 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,515 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-04-13 10:15:45,515 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:45,639 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,640 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 50 [2018-04-13 10:15:45,641 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:45,642 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,642 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:45,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 60 [2018-04-13 10:15:45,643 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:45,772 INFO L267 ElimStorePlain]: Start of recursive call 1: 20 dim-0 vars, 8 dim-1 vars, End of recursive call: 32 dim-0 vars, and 8 xjuncts. [2018-04-13 10:15:45,772 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 28 variables, input treesize:233, output treesize:341 [2018-04-13 10:15:46,018 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,018 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,019 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 59 [2018-04-13 10:15:46,019 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:46,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 57 [2018-04-13 10:15:46,079 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:46,135 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,136 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 59 [2018-04-13 10:15:46,137 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:46,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,198 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 65 [2018-04-13 10:15:46,199 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:46,284 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,291 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 60 treesize of output 67 [2018-04-13 10:15:46,291 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:46,397 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,403 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 65 [2018-04-13 10:15:46,403 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:46,538 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,538 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,539 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 60 [2018-04-13 10:15:46,539 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:46,541 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,541 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:46,541 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 50 [2018-04-13 10:15:46,542 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:46,672 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 53 [2018-04-13 10:15:46,672 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:46,803 INFO L267 ElimStorePlain]: Start of recursive call 1: 20 dim-0 vars, 8 dim-1 vars, End of recursive call: 32 dim-0 vars, and 8 xjuncts. [2018-04-13 10:15:46,803 INFO L202 ElimStorePlain]: Needed 10 recursive calls to eliminate 28 variables, input treesize:233, output treesize:341 [2018-04-13 10:15:47,088 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,088 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 59 [2018-04-13 10:15:47,089 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:47,147 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,147 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 59 [2018-04-13 10:15:47,148 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:47,212 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,219 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 60 treesize of output 67 [2018-04-13 10:15:47,219 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:47,306 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,307 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,307 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 50 [2018-04-13 10:15:47,307 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:47,309 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,309 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 60 [2018-04-13 10:15:47,310 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:47,386 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 63 [2018-04-13 10:15:47,393 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:47,489 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 65 [2018-04-13 10:15:47,494 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:47,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 65 [2018-04-13 10:15:47,616 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:47,751 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,752 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-04-13 10:15:47,753 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:47,754 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,755 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:47,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 56 [2018-04-13 10:15:47,755 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:47,880 INFO L267 ElimStorePlain]: Start of recursive call 1: 20 dim-0 vars, 8 dim-1 vars, End of recursive call: 32 dim-0 vars, and 8 xjuncts. [2018-04-13 10:15:47,881 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 28 variables, input treesize:233, output treesize:341 [2018-04-13 10:15:48,180 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,180 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 66 [2018-04-13 10:15:48,181 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:48,248 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,249 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,254 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 59 treesize of output 82 [2018-04-13 10:15:48,254 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:48,351 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,352 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 64 [2018-04-13 10:15:48,352 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:48,441 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,442 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,442 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 64 [2018-04-13 10:15:48,443 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:48,530 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 60 [2018-04-13 10:15:48,530 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:48,641 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,642 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,644 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 84 [2018-04-13 10:15:48,649 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:48,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,778 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 62 [2018-04-13 10:15:48,778 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:48,890 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,891 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,892 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:48,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 55 treesize of output 82 [2018-04-13 10:15:48,897 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-04-13 10:15:49,037 INFO L267 ElimStorePlain]: Start of recursive call 1: 20 dim-0 vars, 8 dim-1 vars, End of recursive call: 32 dim-0 vars, and 8 xjuncts. [2018-04-13 10:15:49,037 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 28 variables, input treesize:261, output treesize:373 [2018-04-13 10:15:49,326 WARN L151 SmtUtils]: Spent 217ms on a formula simplification. DAG size of input: 192 DAG size of output 49 [2018-04-13 10:15:49,388 INFO L134 CoverageAnalysis]: Checked inductivity of 356 backedges. 86 proven. 66 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:15:49,389 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:15:49,389 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-04-13 10:15:49,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-13 10:15:49,389 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-13 10:15:49,389 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=389, Unknown=0, NotChecked=0, Total=462 [2018-04-13 10:15:49,389 INFO L87 Difference]: Start difference. First operand 447 states and 502 transitions. Second operand 22 states. [2018-04-13 10:15:50,031 WARN L148 SmtUtils]: Spent 119ms on a formula simplification that was a NOOP. DAG size: 67 [2018-04-13 10:15:50,401 WARN L151 SmtUtils]: Spent 318ms on a formula simplification. DAG size of input: 114 DAG size of output 74 [2018-04-13 10:15:50,746 WARN L151 SmtUtils]: Spent 316ms on a formula simplification. DAG size of input: 119 DAG size of output 82 [2018-04-13 10:15:51,063 WARN L151 SmtUtils]: Spent 112ms on a formula simplification. DAG size of input: 90 DAG size of output 51 [2018-04-13 10:15:51,768 WARN L151 SmtUtils]: Spent 367ms on a formula simplification. DAG size of input: 112 DAG size of output 73 [2018-04-13 10:15:52,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:15:52,530 INFO L93 Difference]: Finished difference Result 508 states and 562 transitions. [2018-04-13 10:15:52,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-13 10:15:52,530 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 127 [2018-04-13 10:15:52,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:15:52,531 INFO L225 Difference]: With dead ends: 508 [2018-04-13 10:15:52,531 INFO L226 Difference]: Without dead ends: 508 [2018-04-13 10:15:52,531 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 100 SyntacticMatches, 6 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 354 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=229, Invalid=1331, Unknown=0, NotChecked=0, Total=1560 [2018-04-13 10:15:52,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 508 states. [2018-04-13 10:15:52,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 508 to 450. [2018-04-13 10:15:52,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 450 states. [2018-04-13 10:15:52,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 450 states to 450 states and 505 transitions. [2018-04-13 10:15:52,534 INFO L78 Accepts]: Start accepts. Automaton has 450 states and 505 transitions. Word has length 127 [2018-04-13 10:15:52,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:15:52,534 INFO L459 AbstractCegarLoop]: Abstraction has 450 states and 505 transitions. [2018-04-13 10:15:52,534 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-13 10:15:52,534 INFO L276 IsEmpty]: Start isEmpty. Operand 450 states and 505 transitions. [2018-04-13 10:15:52,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-04-13 10:15:52,535 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:15:52,535 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:15:52,535 INFO L408 AbstractCegarLoop]: === Iteration 78 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:15:52,535 INFO L82 PathProgramCache]: Analyzing trace with hash 25950559, now seen corresponding path program 2 times [2018-04-13 10:15:52,535 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:15:52,535 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:15:52,536 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:52,536 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:15:52,536 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:52,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:15:52,542 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:15:52,583 INFO L134 CoverageAnalysis]: Checked inductivity of 310 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 260 trivial. 0 not checked. [2018-04-13 10:15:52,583 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:15:52,583 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:15:52,584 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:15:52,599 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:15:52,599 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:15:52,602 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:15:52,668 INFO L134 CoverageAnalysis]: Checked inductivity of 310 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 260 trivial. 0 not checked. [2018-04-13 10:15:52,668 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:15:52,668 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 14 [2018-04-13 10:15:52,669 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-04-13 10:15:52,669 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-04-13 10:15:52,669 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2018-04-13 10:15:52,669 INFO L87 Difference]: Start difference. First operand 450 states and 505 transitions. Second operand 14 states. [2018-04-13 10:15:52,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:15:52,737 INFO L93 Difference]: Finished difference Result 501 states and 557 transitions. [2018-04-13 10:15:52,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-04-13 10:15:52,737 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 127 [2018-04-13 10:15:52,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:15:52,738 INFO L225 Difference]: With dead ends: 501 [2018-04-13 10:15:52,738 INFO L226 Difference]: Without dead ends: 498 [2018-04-13 10:15:52,738 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=69, Invalid=141, Unknown=0, NotChecked=0, Total=210 [2018-04-13 10:15:52,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 498 states. [2018-04-13 10:15:52,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 498 to 450. [2018-04-13 10:15:52,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 450 states. [2018-04-13 10:15:52,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 450 states to 450 states and 504 transitions. [2018-04-13 10:15:52,742 INFO L78 Accepts]: Start accepts. Automaton has 450 states and 504 transitions. Word has length 127 [2018-04-13 10:15:52,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:15:52,742 INFO L459 AbstractCegarLoop]: Abstraction has 450 states and 504 transitions. [2018-04-13 10:15:52,742 INFO L460 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-04-13 10:15:52,742 INFO L276 IsEmpty]: Start isEmpty. Operand 450 states and 504 transitions. [2018-04-13 10:15:52,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-04-13 10:15:52,743 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:15:52,743 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:15:52,743 INFO L408 AbstractCegarLoop]: === Iteration 79 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:15:52,743 INFO L82 PathProgramCache]: Analyzing trace with hash -2110601485, now seen corresponding path program 4 times [2018-04-13 10:15:52,743 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:15:52,743 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:15:52,744 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:52,744 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:15:52,744 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:52,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:15:52,761 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:15:52,765 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:15:52,766 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:15:52,766 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:15:52,766 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:15:52,811 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:15:52,811 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:15:52,814 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:15:52,872 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:15:52,872 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:52,873 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:52,873 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:15:52,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:15:52,902 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:15:52,903 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:52,903 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:52,906 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:52,906 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:24, output treesize:17 [2018-04-13 10:15:52,922 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-04-13 10:15:52,922 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:52,923 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:52,923 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:15, output treesize:3 [2018-04-13 10:15:52,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:52,949 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:52,949 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 39 [2018-04-13 10:15:52,950 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:52,954 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:52,954 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:26, output treesize:30 [2018-04-13 10:15:52,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:15:52,983 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:52,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 43 [2018-04-13 10:15:52,983 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:52,987 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:52,991 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:52,991 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:45, output treesize:46 [2018-04-13 10:15:53,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 16 [2018-04-13 10:15:53,021 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:53,023 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:53,023 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:42, output treesize:20 [2018-04-13 10:15:53,085 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:15:53,086 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:53,086 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 60 [2018-04-13 10:15:53,087 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:53,092 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:53,092 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:56, output treesize:28 [2018-04-13 10:15:53,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:15:53,111 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:53,112 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:15:53,112 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:53,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 59 [2018-04-13 10:15:53,114 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:53,119 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:53,123 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:53,123 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:31 [2018-04-13 10:15:53,166 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-04-13 10:15:53,168 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:53,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 14 [2018-04-13 10:15:53,169 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:53,170 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:53,172 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:53,172 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:35, output treesize:11 [2018-04-13 10:15:53,208 INFO L134 CoverageAnalysis]: Checked inductivity of 293 backedges. 36 proven. 245 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-04-13 10:15:53,208 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:15:53,209 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35] total 35 [2018-04-13 10:15:53,209 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-13 10:15:53,209 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-13 10:15:53,209 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=144, Invalid=1116, Unknown=0, NotChecked=0, Total=1260 [2018-04-13 10:15:53,209 INFO L87 Difference]: Start difference. First operand 450 states and 504 transitions. Second operand 36 states. [2018-04-13 10:15:53,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:15:53,939 INFO L93 Difference]: Finished difference Result 454 states and 506 transitions. [2018-04-13 10:15:53,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-13 10:15:53,939 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 126 [2018-04-13 10:15:53,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:15:53,940 INFO L225 Difference]: With dead ends: 454 [2018-04-13 10:15:53,940 INFO L226 Difference]: Without dead ends: 454 [2018-04-13 10:15:53,940 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 90 SyntacticMatches, 1 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 743 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=182, Invalid=1710, Unknown=0, NotChecked=0, Total=1892 [2018-04-13 10:15:53,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 454 states. [2018-04-13 10:15:53,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 454 to 451. [2018-04-13 10:15:53,943 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 451 states. [2018-04-13 10:15:53,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 451 states to 451 states and 505 transitions. [2018-04-13 10:15:53,943 INFO L78 Accepts]: Start accepts. Automaton has 451 states and 505 transitions. Word has length 126 [2018-04-13 10:15:53,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:15:53,943 INFO L459 AbstractCegarLoop]: Abstraction has 451 states and 505 transitions. [2018-04-13 10:15:53,943 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-13 10:15:53,943 INFO L276 IsEmpty]: Start isEmpty. Operand 451 states and 505 transitions. [2018-04-13 10:15:53,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-04-13 10:15:53,944 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:15:53,944 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 5, 5, 5, 5, 5, 5, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:15:53,944 INFO L408 AbstractCegarLoop]: === Iteration 80 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:15:53,944 INFO L82 PathProgramCache]: Analyzing trace with hash 2041952480, now seen corresponding path program 5 times [2018-04-13 10:15:53,944 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:15:53,944 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:15:53,945 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:53,945 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:15:53,945 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:53,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:15:53,961 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:15:53,963 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:15:53,963 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:15:53,963 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:15:53,964 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:15:54,006 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-04-13 10:15:54,006 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:15:54,010 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:15:54,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:15:54,048 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,050 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,050 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:15:54,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:15:54,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:15:54,078 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,079 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,082 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,083 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:26, output treesize:22 [2018-04-13 10:15:54,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:15:54,110 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:15:54,111 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,114 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,119 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,119 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:31 [2018-04-13 10:15:54,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:15:54,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,156 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:15:54,156 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,162 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,168 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,169 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:43 [2018-04-13 10:15:54,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:15:54,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,215 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,215 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,216 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:15:54,217 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,227 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,234 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,234 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:59, output treesize:55 [2018-04-13 10:15:54,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 50 [2018-04-13 10:15:54,279 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,282 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,282 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 181 [2018-04-13 10:15:54,284 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,297 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,304 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,304 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:71, output treesize:67 [2018-04-13 10:15:54,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 59 [2018-04-13 10:15:54,362 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,362 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,363 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,363 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,364 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,364 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,366 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,366 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,367 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,367 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,368 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,368 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,369 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 253 [2018-04-13 10:15:54,369 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,390 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,401 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:54,401 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:87, output treesize:83 [2018-04-13 10:15:54,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:15:54,562 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,577 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:54,577 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:101, output treesize:96 [2018-04-13 10:15:54,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 65 [2018-04-13 10:15:54,798 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,799 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,800 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,801 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,801 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,802 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,802 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,803 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,804 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,804 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,805 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,805 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,806 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,806 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,807 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,809 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:15:54,809 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 15 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 239 [2018-04-13 10:15:54,810 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,828 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,836 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,836 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:112, output treesize:13 [2018-04-13 10:15:54,861 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:54,861 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:15:54,861 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,864 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:54,864 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:15:54,955 INFO L134 CoverageAnalysis]: Checked inductivity of 299 backedges. 27 proven. 270 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:15:54,956 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:15:54,956 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-04-13 10:15:54,956 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-13 10:15:54,956 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-13 10:15:54,956 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=890, Unknown=0, NotChecked=0, Total=992 [2018-04-13 10:15:54,956 INFO L87 Difference]: Start difference. First operand 451 states and 505 transitions. Second operand 32 states. [2018-04-13 10:15:56,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:15:56,706 INFO L93 Difference]: Finished difference Result 467 states and 522 transitions. [2018-04-13 10:15:56,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-04-13 10:15:56,706 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 124 [2018-04-13 10:15:56,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:15:56,707 INFO L225 Difference]: With dead ends: 467 [2018-04-13 10:15:56,707 INFO L226 Difference]: Without dead ends: 467 [2018-04-13 10:15:56,708 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 94 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 611 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=219, Invalid=2331, Unknown=0, NotChecked=0, Total=2550 [2018-04-13 10:15:56,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 467 states. [2018-04-13 10:15:56,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 467 to 457. [2018-04-13 10:15:56,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 457 states. [2018-04-13 10:15:56,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 457 states to 457 states and 512 transitions. [2018-04-13 10:15:56,710 INFO L78 Accepts]: Start accepts. Automaton has 457 states and 512 transitions. Word has length 124 [2018-04-13 10:15:56,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:15:56,710 INFO L459 AbstractCegarLoop]: Abstraction has 457 states and 512 transitions. [2018-04-13 10:15:56,710 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-13 10:15:56,710 INFO L276 IsEmpty]: Start isEmpty. Operand 457 states and 512 transitions. [2018-04-13 10:15:56,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-04-13 10:15:56,711 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:15:56,711 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 6, 5, 5, 5, 5, 5, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:15:56,711 INFO L408 AbstractCegarLoop]: === Iteration 81 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:15:56,711 INFO L82 PathProgramCache]: Analyzing trace with hash -1123982487, now seen corresponding path program 6 times [2018-04-13 10:15:56,711 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:15:56,711 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:15:56,712 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:56,712 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:15:56,712 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:56,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:15:56,723 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:15:56,726 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:15:56,726 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:15:56,727 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:15:56,727 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 10:15:56,753 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2018-04-13 10:15:56,753 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:15:56,756 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:15:56,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:15:56,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:15:56,782 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:56,783 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:56,786 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:56,786 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:15:56,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:15:56,804 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:56,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:15:56,804 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:56,807 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:56,811 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:56,811 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:31, output treesize:27 [2018-04-13 10:15:56,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-04-13 10:15:56,836 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:56,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 42 [2018-04-13 10:15:56,837 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:56,842 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:56,847 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:56,847 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:38 [2018-04-13 10:15:56,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:15:56,909 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:56,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-13 10:15:56,911 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:56,916 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:56,923 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:56,923 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:58, output treesize:54 [2018-04-13 10:15:56,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:15:56,969 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:56,971 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-13 10:15:56,971 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:56,976 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:56,983 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:56,984 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:58, output treesize:54 [2018-04-13 10:15:57,202 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-04-13 10:15:57,204 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:57,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 14 [2018-04-13 10:15:57,204 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:57,206 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:57,208 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:57,208 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:33, output treesize:3 [2018-04-13 10:15:57,260 INFO L134 CoverageAnalysis]: Checked inductivity of 304 backedges. 11 proven. 279 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-04-13 10:15:57,261 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:15:57,261 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23] total 23 [2018-04-13 10:15:57,261 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-13 10:15:57,261 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-13 10:15:57,261 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=60, Invalid=492, Unknown=0, NotChecked=0, Total=552 [2018-04-13 10:15:57,261 INFO L87 Difference]: Start difference. First operand 457 states and 512 transitions. Second operand 24 states. [2018-04-13 10:15:58,421 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:15:58,421 INFO L93 Difference]: Finished difference Result 468 states and 523 transitions. [2018-04-13 10:15:58,421 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-13 10:15:58,421 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 125 [2018-04-13 10:15:58,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:15:58,422 INFO L225 Difference]: With dead ends: 468 [2018-04-13 10:15:58,422 INFO L226 Difference]: Without dead ends: 468 [2018-04-13 10:15:58,423 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 98 SyntacticMatches, 5 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 477 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=177, Invalid=1715, Unknown=0, NotChecked=0, Total=1892 [2018-04-13 10:15:58,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 468 states. [2018-04-13 10:15:58,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 468 to 458. [2018-04-13 10:15:58,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 458 states. [2018-04-13 10:15:58,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 458 states to 458 states and 513 transitions. [2018-04-13 10:15:58,427 INFO L78 Accepts]: Start accepts. Automaton has 458 states and 513 transitions. Word has length 125 [2018-04-13 10:15:58,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:15:58,427 INFO L459 AbstractCegarLoop]: Abstraction has 458 states and 513 transitions. [2018-04-13 10:15:58,427 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-13 10:15:58,427 INFO L276 IsEmpty]: Start isEmpty. Operand 458 states and 513 transitions. [2018-04-13 10:15:58,428 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-04-13 10:15:58,428 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:15:58,428 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 6, 6, 5, 5, 5, 5, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:15:58,428 INFO L408 AbstractCegarLoop]: === Iteration 82 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:15:58,428 INFO L82 PathProgramCache]: Analyzing trace with hash -483718592, now seen corresponding path program 5 times [2018-04-13 10:15:58,428 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:15:58,429 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:15:58,429 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:58,429 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:15:58,429 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:15:58,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:15:58,443 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:15:58,445 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:15:58,446 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:15:58,446 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:15:58,446 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:15:58,491 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 12 check-sat command(s) [2018-04-13 10:15:58,491 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:15:58,495 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:15:58,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:15:58,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:15:58,584 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,585 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,588 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,588 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:15:58,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:15:58,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,615 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:15:58,615 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,618 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,623 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,623 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:15:58,688 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:15:58,690 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,691 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,692 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,693 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:15:58,693 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,700 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,705 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,706 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:15:58,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:15:58,765 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,768 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,768 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:15:58,769 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,778 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,784 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,784 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:55, output treesize:51 [2018-04-13 10:15:58,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 49 [2018-04-13 10:15:58,833 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,834 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,835 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,835 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,836 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,836 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,837 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,837 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,838 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,838 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:58,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 176 [2018-04-13 10:15:58,839 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,854 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:58,862 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:15:58,863 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:71, output treesize:67 [2018-04-13 10:15:59,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 55 [2018-04-13 10:15:59,205 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:59,206 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:59,206 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:59,207 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:59,208 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:59,208 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:59,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:59,215 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:59,216 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:59,216 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:15:59,217 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:59,217 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:59,218 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:15:59,218 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 10 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 162 [2018-04-13 10:15:59,218 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:15:59,230 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:59,236 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:15:59,236 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:91, output treesize:3 [2018-04-13 10:15:59,316 INFO L134 CoverageAnalysis]: Checked inductivity of 309 backedges. 15 proven. 292 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:15:59,316 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:15:59,316 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30] total 30 [2018-04-13 10:15:59,316 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-04-13 10:15:59,316 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-04-13 10:15:59,316 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=841, Unknown=0, NotChecked=0, Total=930 [2018-04-13 10:15:59,316 INFO L87 Difference]: Start difference. First operand 458 states and 513 transitions. Second operand 31 states. [2018-04-13 10:16:00,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:00,917 INFO L93 Difference]: Finished difference Result 467 states and 522 transitions. [2018-04-13 10:16:00,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-13 10:16:00,917 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 126 [2018-04-13 10:16:00,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:00,918 INFO L225 Difference]: With dead ends: 467 [2018-04-13 10:16:00,918 INFO L226 Difference]: Without dead ends: 467 [2018-04-13 10:16:00,918 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 97 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 573 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=200, Invalid=2250, Unknown=0, NotChecked=0, Total=2450 [2018-04-13 10:16:00,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 467 states. [2018-04-13 10:16:00,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 467 to 459. [2018-04-13 10:16:00,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 459 states. [2018-04-13 10:16:00,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 459 states to 459 states and 514 transitions. [2018-04-13 10:16:00,921 INFO L78 Accepts]: Start accepts. Automaton has 459 states and 514 transitions. Word has length 126 [2018-04-13 10:16:00,921 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:00,921 INFO L459 AbstractCegarLoop]: Abstraction has 459 states and 514 transitions. [2018-04-13 10:16:00,921 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-04-13 10:16:00,921 INFO L276 IsEmpty]: Start isEmpty. Operand 459 states and 514 transitions. [2018-04-13 10:16:00,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-04-13 10:16:00,922 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:00,922 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:00,922 INFO L408 AbstractCegarLoop]: === Iteration 83 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:00,922 INFO L82 PathProgramCache]: Analyzing trace with hash 1392851473, now seen corresponding path program 2 times [2018-04-13 10:16:00,922 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:00,922 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:00,923 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:00,923 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:00,923 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:00,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:00,935 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:00,940 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:00,940 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:00,940 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:00,941 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:16:00,971 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:16:00,972 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:00,974 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:01,071 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:01,072 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:01,072 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-13 10:16:01,072 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,076 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,076 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:21, output treesize:15 [2018-04-13 10:16:01,103 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:16:01,103 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:01,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:01,111 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,112 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,117 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,117 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:35, output treesize:23 [2018-04-13 10:16:01,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-04-13 10:16:01,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:01,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-04-13 10:16:01,232 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,235 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,239 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,239 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:36, output treesize:21 [2018-04-13 10:16:01,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:16:01,345 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,348 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,349 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:26, output treesize:21 [2018-04-13 10:16:01,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-04-13 10:16:01,352 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:01,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-04-13 10:16:01,353 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,356 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,360 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,360 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:36, output treesize:32 [2018-04-13 10:16:01,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-04-13 10:16:01,403 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 4 [2018-04-13 10:16:01,403 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,404 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,406 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,407 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:14 [2018-04-13 10:16:01,448 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:01,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 21 [2018-04-13 10:16:01,449 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,458 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:01,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 25 [2018-04-13 10:16:01,459 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:01,465 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:16:01,465 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:42, output treesize:27 [2018-04-13 10:16:01,513 INFO L134 CoverageAnalysis]: Checked inductivity of 296 backedges. 24 proven. 103 refuted. 0 times theorem prover too weak. 169 trivial. 0 not checked. [2018-04-13 10:16:01,514 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:01,514 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25] total 25 [2018-04-13 10:16:01,514 INFO L442 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-04-13 10:16:01,514 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-04-13 10:16:01,514 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=591, Unknown=0, NotChecked=0, Total=650 [2018-04-13 10:16:01,514 INFO L87 Difference]: Start difference. First operand 459 states and 514 transitions. Second operand 26 states. [2018-04-13 10:16:03,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:03,076 INFO L93 Difference]: Finished difference Result 565 states and 632 transitions. [2018-04-13 10:16:03,076 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-04-13 10:16:03,076 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 129 [2018-04-13 10:16:03,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:03,077 INFO L225 Difference]: With dead ends: 565 [2018-04-13 10:16:03,077 INFO L226 Difference]: Without dead ends: 565 [2018-04-13 10:16:03,078 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 102 SyntacticMatches, 3 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 519 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=253, Invalid=2503, Unknown=0, NotChecked=0, Total=2756 [2018-04-13 10:16:03,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 565 states. [2018-04-13 10:16:03,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 565 to 462. [2018-04-13 10:16:03,081 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 462 states. [2018-04-13 10:16:03,081 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 462 states to 462 states and 517 transitions. [2018-04-13 10:16:03,081 INFO L78 Accepts]: Start accepts. Automaton has 462 states and 517 transitions. Word has length 129 [2018-04-13 10:16:03,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:03,081 INFO L459 AbstractCegarLoop]: Abstraction has 462 states and 517 transitions. [2018-04-13 10:16:03,081 INFO L460 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-04-13 10:16:03,081 INFO L276 IsEmpty]: Start isEmpty. Operand 462 states and 517 transitions. [2018-04-13 10:16:03,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 130 [2018-04-13 10:16:03,082 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:03,082 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:03,082 INFO L408 AbstractCegarLoop]: === Iteration 84 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:03,082 INFO L82 PathProgramCache]: Analyzing trace with hash -1459234323, now seen corresponding path program 3 times [2018-04-13 10:16:03,082 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:03,082 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:03,083 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:03,083 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:03,083 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:03,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:03,093 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:03,256 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 239 trivial. 0 not checked. [2018-04-13 10:16:03,256 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:03,256 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:03,257 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:16:03,270 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 4 check-sat command(s) [2018-04-13 10:16:03,270 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:03,272 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:03,352 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:03,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 31 [2018-04-13 10:16:03,353 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:03,353 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 23 [2018-04-13 10:16:03,354 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:03,355 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:03,358 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:03,359 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:22 [2018-04-13 10:16:03,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-13 10:16:03,529 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:03,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-13 10:16:03,530 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:03,532 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:03,536 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:03,536 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:38, output treesize:3 [2018-04-13 10:16:03,549 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 5 proven. 13 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-04-13 10:16:03,549 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:16:03,549 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 28 [2018-04-13 10:16:03,549 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-04-13 10:16:03,549 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-04-13 10:16:03,549 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=82, Invalid=730, Unknown=0, NotChecked=0, Total=812 [2018-04-13 10:16:03,550 INFO L87 Difference]: Start difference. First operand 462 states and 517 transitions. Second operand 29 states. [2018-04-13 10:16:04,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:04,079 INFO L93 Difference]: Finished difference Result 472 states and 522 transitions. [2018-04-13 10:16:04,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-04-13 10:16:04,079 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 129 [2018-04-13 10:16:04,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:04,080 INFO L225 Difference]: With dead ends: 472 [2018-04-13 10:16:04,080 INFO L226 Difference]: Without dead ends: 472 [2018-04-13 10:16:04,081 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 116 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 310 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=225, Invalid=1581, Unknown=0, NotChecked=0, Total=1806 [2018-04-13 10:16:04,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 472 states. [2018-04-13 10:16:04,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 472 to 462. [2018-04-13 10:16:04,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 462 states. [2018-04-13 10:16:04,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 462 states to 462 states and 516 transitions. [2018-04-13 10:16:04,084 INFO L78 Accepts]: Start accepts. Automaton has 462 states and 516 transitions. Word has length 129 [2018-04-13 10:16:04,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:04,084 INFO L459 AbstractCegarLoop]: Abstraction has 462 states and 516 transitions. [2018-04-13 10:16:04,084 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-04-13 10:16:04,084 INFO L276 IsEmpty]: Start isEmpty. Operand 462 states and 516 transitions. [2018-04-13 10:16:04,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-04-13 10:16:04,084 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:04,084 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:04,084 INFO L408 AbstractCegarLoop]: === Iteration 85 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:04,085 INFO L82 PathProgramCache]: Analyzing trace with hash -2021201638, now seen corresponding path program 3 times [2018-04-13 10:16:04,085 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:04,085 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:04,085 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:04,085 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:04,085 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:04,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:04,095 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:04,097 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:04,098 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:04,098 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:04,098 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:16:04,132 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 13 check-sat command(s) [2018-04-13 10:16:04,132 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:04,135 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:04,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:04,205 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:04,205 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,207 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,214 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,214 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-04-13 10:16:04,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:16:04,256 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:04,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:16:04,256 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,261 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:04,270 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:34 [2018-04-13 10:16:04,300 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-04-13 10:16:04,302 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:04,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 42 [2018-04-13 10:16:04,304 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,308 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,316 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:04,316 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:49, output treesize:45 [2018-04-13 10:16:04,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:16:04,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:04,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-13 10:16:04,395 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,400 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,409 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:04,409 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:65, output treesize:61 [2018-04-13 10:16:04,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:16:04,461 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:04,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-13 10:16:04,465 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,469 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,477 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:04,478 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:65, output treesize:61 [2018-04-13 10:16:04,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:16:04,542 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:04,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-13 10:16:04,545 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,550 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,559 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:04,559 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:65, output treesize:61 [2018-04-13 10:16:04,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:16:04,610 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:04,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-13 10:16:04,612 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,618 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,627 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:04,627 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:65, output treesize:61 [2018-04-13 10:16:04,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:16:04,677 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:04,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 53 [2018-04-13 10:16:04,680 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,685 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,694 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:04,694 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:65, output treesize:61 [2018-04-13 10:16:04,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:04,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:04,838 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,839 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,841 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:04,842 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:26, output treesize:1 [2018-04-13 10:16:04,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 36 [2018-04-13 10:16:04,992 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:04,992 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:04,993 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:04,994 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 70 [2018-04-13 10:16:04,996 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:04,997 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:04,997 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:04,998 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:05,000 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 75 [2018-04-13 10:16:05,000 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:05,007 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:05,010 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:05,022 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:05,022 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 6 variables, input treesize:76, output treesize:58 [2018-04-13 10:16:05,312 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 27 [2018-04-13 10:16:05,313 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:05,314 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:05,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:05,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 28 [2018-04-13 10:16:05,315 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:05,319 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:05,326 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:05,326 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:63, output treesize:13 [2018-04-13 10:16:05,352 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:05,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:16:05,352 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:05,355 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:05,355 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:16:05,445 INFO L134 CoverageAnalysis]: Checked inductivity of 254 backedges. 23 proven. 167 refuted. 0 times theorem prover too weak. 64 trivial. 0 not checked. [2018-04-13 10:16:05,446 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:05,446 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-04-13 10:16:05,446 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-13 10:16:05,446 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-13 10:16:05,446 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=787, Unknown=0, NotChecked=0, Total=870 [2018-04-13 10:16:05,446 INFO L87 Difference]: Start difference. First operand 462 states and 516 transitions. Second operand 30 states. [2018-04-13 10:16:07,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:07,874 INFO L93 Difference]: Finished difference Result 471 states and 521 transitions. [2018-04-13 10:16:07,875 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-04-13 10:16:07,875 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 130 [2018-04-13 10:16:07,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:07,876 INFO L225 Difference]: With dead ends: 471 [2018-04-13 10:16:07,876 INFO L226 Difference]: Without dead ends: 471 [2018-04-13 10:16:07,876 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 153 GetRequests, 90 SyntacticMatches, 11 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 730 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=237, Invalid=2625, Unknown=0, NotChecked=0, Total=2862 [2018-04-13 10:16:07,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 471 states. [2018-04-13 10:16:07,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 471 to 462. [2018-04-13 10:16:07,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 462 states. [2018-04-13 10:16:07,879 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 462 states to 462 states and 515 transitions. [2018-04-13 10:16:07,879 INFO L78 Accepts]: Start accepts. Automaton has 462 states and 515 transitions. Word has length 130 [2018-04-13 10:16:07,879 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:07,879 INFO L459 AbstractCegarLoop]: Abstraction has 462 states and 515 transitions. [2018-04-13 10:16:07,879 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-13 10:16:07,879 INFO L276 IsEmpty]: Start isEmpty. Operand 462 states and 515 transitions. [2018-04-13 10:16:07,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-04-13 10:16:07,880 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:07,880 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:07,880 INFO L408 AbstractCegarLoop]: === Iteration 86 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:07,880 INFO L82 PathProgramCache]: Analyzing trace with hash -2021201637, now seen corresponding path program 3 times [2018-04-13 10:16:07,880 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:07,881 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:07,881 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:07,881 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:07,881 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:07,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:07,888 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:07,890 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:07,891 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:07,891 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:07,891 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:16:07,902 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2018-04-13 10:16:07,902 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:07,904 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:07,908 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:16:07,908 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:07,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:16:07,919 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:07,930 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-13 10:16:07,930 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:07,931 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-04-13 10:16:07,931 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:07,941 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:16:07,941 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-04-13 10:16:08,423 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:08,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 55 [2018-04-13 10:16:08,424 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:08,453 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:08,454 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:08,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 64 [2018-04-13 10:16:08,454 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:08,483 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:08,484 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:08,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 44 [2018-04-13 10:16:08,484 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:08,508 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:08,509 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:08,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 42 [2018-04-13 10:16:08,509 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:08,529 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 4 dim-1 vars, End of recursive call: 6 dim-0 vars, and 2 xjuncts. [2018-04-13 10:16:08,529 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 10 variables, input treesize:107, output treesize:83 [2018-04-13 10:16:09,112 INFO L134 CoverageAnalysis]: Checked inductivity of 254 backedges. 18 proven. 20 refuted. 0 times theorem prover too weak. 216 trivial. 0 not checked. [2018-04-13 10:16:09,112 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:09,112 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22] total 22 [2018-04-13 10:16:09,112 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-13 10:16:09,112 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-13 10:16:09,112 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=447, Unknown=0, NotChecked=0, Total=506 [2018-04-13 10:16:09,112 INFO L87 Difference]: Start difference. First operand 462 states and 515 transitions. Second operand 23 states. [2018-04-13 10:16:10,493 WARN L151 SmtUtils]: Spent 131ms on a formula simplification. DAG size of input: 67 DAG size of output 58 [2018-04-13 10:16:10,831 WARN L151 SmtUtils]: Spent 176ms on a formula simplification. DAG size of input: 55 DAG size of output 49 [2018-04-13 10:16:11,104 WARN L151 SmtUtils]: Spent 209ms on a formula simplification. DAG size of input: 60 DAG size of output 54 [2018-04-13 10:16:11,382 WARN L151 SmtUtils]: Spent 221ms on a formula simplification. DAG size of input: 57 DAG size of output 51 [2018-04-13 10:16:11,644 WARN L151 SmtUtils]: Spent 219ms on a formula simplification. DAG size of input: 57 DAG size of output 51 [2018-04-13 10:16:11,958 WARN L151 SmtUtils]: Spent 263ms on a formula simplification. DAG size of input: 62 DAG size of output 53 [2018-04-13 10:16:12,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:12,465 INFO L93 Difference]: Finished difference Result 478 states and 523 transitions. [2018-04-13 10:16:12,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-04-13 10:16:12,465 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 130 [2018-04-13 10:16:12,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:12,466 INFO L225 Difference]: With dead ends: 478 [2018-04-13 10:16:12,466 INFO L226 Difference]: Without dead ends: 478 [2018-04-13 10:16:12,467 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 327 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=163, Invalid=1319, Unknown=0, NotChecked=0, Total=1482 [2018-04-13 10:16:12,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 478 states. [2018-04-13 10:16:12,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 478 to 462. [2018-04-13 10:16:12,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 462 states. [2018-04-13 10:16:12,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 462 states to 462 states and 513 transitions. [2018-04-13 10:16:12,469 INFO L78 Accepts]: Start accepts. Automaton has 462 states and 513 transitions. Word has length 130 [2018-04-13 10:16:12,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:12,470 INFO L459 AbstractCegarLoop]: Abstraction has 462 states and 513 transitions. [2018-04-13 10:16:12,470 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-13 10:16:12,470 INFO L276 IsEmpty]: Start isEmpty. Operand 462 states and 513 transitions. [2018-04-13 10:16:12,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-04-13 10:16:12,470 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:12,470 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:12,470 INFO L408 AbstractCegarLoop]: === Iteration 87 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, 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ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:12,470 INFO L82 PathProgramCache]: Analyzing trace with hash 1767258735, now seen corresponding path program 3 times [2018-04-13 10:16:12,470 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:12,471 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:12,471 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:12,471 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:12,471 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:12,480 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:12,480 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:12,483 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:12,483 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:12,483 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:12,483 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:16:12,504 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-04-13 10:16:12,504 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:12,507 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:12,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:12,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:12,533 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,534 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,537 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,538 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:16:12,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:16:12,557 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:16:12,558 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,561 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,564 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,564 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-04-13 10:16:12,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:16:12,588 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,589 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,589 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:16:12,589 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,595 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,600 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,600 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:42 [2018-04-13 10:16:12,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-04-13 10:16:12,631 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,631 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,632 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,632 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,633 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,633 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-04-13 10:16:12,634 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,642 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,648 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,648 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:58, output treesize:54 [2018-04-13 10:16:12,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 53 [2018-04-13 10:16:12,687 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,687 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,688 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,688 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,689 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,689 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,690 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,690 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,691 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,692 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,692 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 196 [2018-04-13 10:16:12,692 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,707 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,714 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,714 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:70, output treesize:66 [2018-04-13 10:16:12,758 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 63 [2018-04-13 10:16:12,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,761 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,761 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,762 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,764 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,764 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,765 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,767 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,768 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 277 [2018-04-13 10:16:12,769 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,790 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,798 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,798 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:82, output treesize:78 [2018-04-13 10:16:12,876 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 73 [2018-04-13 10:16:12,878 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,878 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,879 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,879 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,880 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,880 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,881 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,881 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,882 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,882 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,883 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,883 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,884 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,884 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,885 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,885 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,886 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,886 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,887 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,887 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,888 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:12,888 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 372 [2018-04-13 10:16:12,888 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,915 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,936 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:12,936 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:97, output treesize:93 [2018-04-13 10:16:13,259 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:13,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:13,260 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:13,261 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:13,263 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:13,264 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:23, output treesize:19 [2018-04-13 10:16:13,984 WARN L151 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 72 DAG size of output 70 [2018-04-13 10:16:14,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 117 treesize of output 115 [2018-04-13 10:16:14,019 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,020 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,028 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,031 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,032 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,033 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,034 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,035 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,035 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,037 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,038 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,039 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,040 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,041 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,042 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,043 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,044 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,045 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,046 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,047 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,048 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 484 [2018-04-13 10:16:14,054 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,055 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,056 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,057 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,058 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,059 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,060 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,061 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,063 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,064 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,064 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,066 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,068 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,069 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,069 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,070 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,071 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,072 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,073 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,074 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,075 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,076 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,076 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,082 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,083 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,084 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,085 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,085 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:14,085 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 28 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 574 [2018-04-13 10:16:14,086 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:14,147 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:14,181 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:14,185 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 120 treesize of output 103 [2018-04-13 10:16:14,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,196 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,196 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,197 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,198 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,198 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,199 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,199 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,200 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,200 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,201 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,202 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,202 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,203 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 469 [2018-04-13 10:16:14,208 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,210 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,210 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,211 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,211 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,212 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,215 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,215 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,216 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,216 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,217 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,217 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,218 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,218 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,219 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,220 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,220 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,221 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,221 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,222 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,224 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,224 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,226 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,227 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,227 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,228 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,228 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:14,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 28 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 574 [2018-04-13 10:16:14,229 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:14,294 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:14,308 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:14,334 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: 7 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:14,334 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 8 variables, input treesize:161, output treesize:138 [2018-04-13 10:16:14,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 86 [2018-04-13 10:16:14,831 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,832 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,832 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,833 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,834 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,834 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,835 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,835 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,836 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,836 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,837 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,837 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,838 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,838 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,839 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,840 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,840 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,841 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,841 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,842 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,842 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,843 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,843 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,844 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,845 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,845 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,846 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,847 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,847 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,848 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:14,848 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,849 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,849 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:14,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 28 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 426 [2018-04-13 10:16:14,850 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:14,880 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:14,887 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:14,887 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:129, output treesize:3 [2018-04-13 10:16:15,001 INFO L134 CoverageAnalysis]: Checked inductivity of 257 backedges. 174 proven. 59 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-04-13 10:16:15,002 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:15,002 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43] total 43 [2018-04-13 10:16:15,002 INFO L442 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-04-13 10:16:15,002 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-04-13 10:16:15,002 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=1695, Unknown=0, NotChecked=0, Total=1892 [2018-04-13 10:16:15,002 INFO L87 Difference]: Start difference. First operand 462 states and 513 transitions. Second operand 44 states. [2018-04-13 10:16:19,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:19,170 INFO L93 Difference]: Finished difference Result 482 states and 527 transitions. [2018-04-13 10:16:19,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-04-13 10:16:19,170 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 131 [2018-04-13 10:16:19,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:19,171 INFO L225 Difference]: With dead ends: 482 [2018-04-13 10:16:19,171 INFO L226 Difference]: Without dead ends: 482 [2018-04-13 10:16:19,172 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 89 SyntacticMatches, 1 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1633 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=432, Invalid=4970, Unknown=0, NotChecked=0, Total=5402 [2018-04-13 10:16:19,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 482 states. [2018-04-13 10:16:19,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 482 to 462. [2018-04-13 10:16:19,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 462 states. [2018-04-13 10:16:19,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 462 states to 462 states and 512 transitions. [2018-04-13 10:16:19,174 INFO L78 Accepts]: Start accepts. Automaton has 462 states and 512 transitions. Word has length 131 [2018-04-13 10:16:19,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:19,174 INFO L459 AbstractCegarLoop]: Abstraction has 462 states and 512 transitions. [2018-04-13 10:16:19,175 INFO L460 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-04-13 10:16:19,175 INFO L276 IsEmpty]: Start isEmpty. Operand 462 states and 512 transitions. [2018-04-13 10:16:19,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-04-13 10:16:19,175 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:19,175 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:19,175 INFO L408 AbstractCegarLoop]: === Iteration 88 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:19,175 INFO L82 PathProgramCache]: Analyzing trace with hash -1049553926, now seen corresponding path program 3 times [2018-04-13 10:16:19,175 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:19,175 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:19,176 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:19,176 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:19,176 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:19,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:19,187 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:19,190 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:19,190 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:19,190 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:19,190 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:16:19,216 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2018-04-13 10:16:19,216 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:19,218 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:19,222 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:19,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:19,223 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,224 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,226 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,226 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:15 [2018-04-13 10:16:19,235 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:16:19,237 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:16:19,237 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,240 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,243 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,243 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:16:19,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:16:19,259 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,260 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,260 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:16:19,261 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,266 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,270 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:16:19,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-04-13 10:16:19,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,300 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-04-13 10:16:19,300 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,309 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,315 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,315 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:55, output treesize:51 [2018-04-13 10:16:19,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 53 [2018-04-13 10:16:19,343 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,344 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,344 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,345 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,345 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,346 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,346 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,347 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,347 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,348 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 196 [2018-04-13 10:16:19,349 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,375 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,381 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,381 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:67, output treesize:63 [2018-04-13 10:16:19,415 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 63 [2018-04-13 10:16:19,417 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,417 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,418 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,418 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,419 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,419 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,420 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,420 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,421 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,421 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,422 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,422 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,423 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,423 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,424 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,424 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 277 [2018-04-13 10:16:19,425 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,447 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,455 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,455 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:79, output treesize:75 [2018-04-13 10:16:19,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 73 [2018-04-13 10:16:19,520 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,520 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,521 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,521 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,522 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,522 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,523 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,523 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,524 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,524 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,525 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,525 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,526 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,527 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,527 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,528 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,528 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,529 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,529 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,530 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,531 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:19,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 372 [2018-04-13 10:16:19,532 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,561 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,572 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,572 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:94, output treesize:90 [2018-04-13 10:16:19,805 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:19,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:19,806 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,807 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,808 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:19,808 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:15, output treesize:1 [2018-04-13 10:16:20,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 106 treesize of output 89 [2018-04-13 10:16:20,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,163 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,164 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,164 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,165 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,165 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,166 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,166 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,167 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,167 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,168 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,168 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,169 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,170 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,170 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,171 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,171 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,172 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,172 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,173 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,174 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,175 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,175 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,176 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 469 [2018-04-13 10:16:20,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,199 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,200 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,200 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,201 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,201 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,202 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,202 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,203 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,204 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,204 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,205 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,205 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,206 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,206 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,207 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,208 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,208 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,210 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,210 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,212 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,212 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,213 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:20,225 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 35 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 91 treesize of output 586 [2018-04-13 10:16:20,226 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:20,453 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:16:20,488 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:16:20,536 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 2 xjuncts. [2018-04-13 10:16:20,536 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 6 variables, input treesize:121, output treesize:215 [2018-04-13 10:16:21,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 116 treesize of output 98 [2018-04-13 10:16:21,565 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,566 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,566 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,567 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,567 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,568 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,568 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,569 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,569 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,570 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,570 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,571 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,571 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,572 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,572 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,573 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,573 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:21,574 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,574 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,575 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,576 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,576 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,577 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,577 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,578 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,578 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,579 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,579 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,580 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,580 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,589 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,590 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 28 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 398 [2018-04-13 10:16:21,590 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:21,622 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:21,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 116 treesize of output 98 [2018-04-13 10:16:21,646 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,647 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,647 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,648 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,648 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,649 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,649 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,649 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:21,650 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,650 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,651 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,652 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,652 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,652 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,653 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,653 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,654 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,654 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,655 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,655 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,656 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,658 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,658 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,659 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,659 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:21,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 9 select indices, 9 select index equivalence classes, 28 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 392 [2018-04-13 10:16:21,661 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:21,691 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:21,699 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:21,699 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 12 variables, input treesize:233, output treesize:3 [2018-04-13 10:16:21,838 INFO L134 CoverageAnalysis]: Checked inductivity of 260 backedges. 167 proven. 58 refuted. 0 times theorem prover too weak. 35 trivial. 0 not checked. [2018-04-13 10:16:21,838 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:21,838 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33] total 33 [2018-04-13 10:16:21,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-13 10:16:21,838 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-13 10:16:21,839 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=147, Invalid=975, Unknown=0, NotChecked=0, Total=1122 [2018-04-13 10:16:21,839 INFO L87 Difference]: Start difference. First operand 462 states and 512 transitions. Second operand 34 states. [2018-04-13 10:16:25,340 WARN L148 SmtUtils]: Spent 146ms on a formula simplification that was a NOOP. DAG size: 158 [2018-04-13 10:16:27,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:27,549 INFO L93 Difference]: Finished difference Result 465 states and 514 transitions. [2018-04-13 10:16:27,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-13 10:16:27,549 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 132 [2018-04-13 10:16:27,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:27,550 INFO L225 Difference]: With dead ends: 465 [2018-04-13 10:16:27,550 INFO L226 Difference]: Without dead ends: 465 [2018-04-13 10:16:27,551 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 100 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 560 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=228, Invalid=1934, Unknown=0, NotChecked=0, Total=2162 [2018-04-13 10:16:27,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 465 states. [2018-04-13 10:16:27,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 465 to 462. [2018-04-13 10:16:27,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 462 states. [2018-04-13 10:16:27,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 462 states to 462 states and 511 transitions. [2018-04-13 10:16:27,553 INFO L78 Accepts]: Start accepts. Automaton has 462 states and 511 transitions. Word has length 132 [2018-04-13 10:16:27,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:27,554 INFO L459 AbstractCegarLoop]: Abstraction has 462 states and 511 transitions. [2018-04-13 10:16:27,554 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-13 10:16:27,554 INFO L276 IsEmpty]: Start isEmpty. Operand 462 states and 511 transitions. [2018-04-13 10:16:27,554 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-04-13 10:16:27,554 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:27,554 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 5, 5, 5, 5, 5, 5, 5, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:27,554 INFO L408 AbstractCegarLoop]: === Iteration 89 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:27,554 INFO L82 PathProgramCache]: Analyzing trace with hash 1808162734, now seen corresponding path program 2 times [2018-04-13 10:16:27,554 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:27,555 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:27,555 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:27,555 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:27,555 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:27,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:27,561 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:27,607 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:16:27,607 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:27,607 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:27,608 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:16:27,615 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:16:27,615 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:27,616 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:27,659 INFO L134 CoverageAnalysis]: Checked inductivity of 294 backedges. 0 proven. 90 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:16:27,659 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:16:27,659 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 16 [2018-04-13 10:16:27,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-13 10:16:27,660 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-13 10:16:27,660 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=155, Unknown=0, NotChecked=0, Total=240 [2018-04-13 10:16:27,660 INFO L87 Difference]: Start difference. First operand 462 states and 511 transitions. Second operand 16 states. [2018-04-13 10:16:27,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:27,691 INFO L93 Difference]: Finished difference Result 537 states and 585 transitions. [2018-04-13 10:16:27,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-13 10:16:27,691 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 131 [2018-04-13 10:16:27,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:27,692 INFO L225 Difference]: With dead ends: 537 [2018-04-13 10:16:27,692 INFO L226 Difference]: Without dead ends: 529 [2018-04-13 10:16:27,692 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 126 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=182, Unknown=0, NotChecked=0, Total=272 [2018-04-13 10:16:27,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 529 states. [2018-04-13 10:16:27,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 529 to 486. [2018-04-13 10:16:27,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 486 states. [2018-04-13 10:16:27,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 486 states to 486 states and 545 transitions. [2018-04-13 10:16:27,696 INFO L78 Accepts]: Start accepts. Automaton has 486 states and 545 transitions. Word has length 131 [2018-04-13 10:16:27,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:27,696 INFO L459 AbstractCegarLoop]: Abstraction has 486 states and 545 transitions. [2018-04-13 10:16:27,696 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-13 10:16:27,696 INFO L276 IsEmpty]: Start isEmpty. Operand 486 states and 545 transitions. [2018-04-13 10:16:27,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-04-13 10:16:27,696 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:27,697 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:27,697 INFO L408 AbstractCegarLoop]: === Iteration 90 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:27,697 INFO L82 PathProgramCache]: Analyzing trace with hash -160278975, now seen corresponding path program 3 times [2018-04-13 10:16:27,697 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:27,697 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:27,697 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:27,697 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:27,697 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:27,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:27,708 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:27,711 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:27,711 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:27,711 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:27,712 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:16:27,739 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-04-13 10:16:27,739 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:27,742 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:27,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:27,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:27,782 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:27,784 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:27,786 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:27,787 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:16:27,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:16:27,847 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:27,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:16:27,848 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:27,851 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:27,855 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:27,855 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:19 [2018-04-13 10:16:27,937 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 40 treesize of output 50 [2018-04-13 10:16:27,939 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:27,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 53 [2018-04-13 10:16:27,940 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:27,958 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:27,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 65 [2018-04-13 10:16:27,965 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:27,977 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:16:27,993 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:16:27,993 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 5 variables, input treesize:52, output treesize:70 [2018-04-13 10:16:28,713 WARN L151 SmtUtils]: Spent 404ms on a formula simplification. DAG size of input: 82 DAG size of output 81 [2018-04-13 10:16:29,045 WARN L151 SmtUtils]: Spent 281ms on a formula simplification. DAG size of input: 82 DAG size of output 70 [2018-04-13 10:16:29,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 7 case distinctions, treesize of input 70 treesize of output 95 [2018-04-13 10:16:29,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:29,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 87 [2018-04-13 10:16:29,080 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:29,156 INFO L267 ElimStorePlain]: Start of recursive call 2: 4 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:29,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 42 [2018-04-13 10:16:29,196 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:29,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:16:29,197 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:29,203 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:29,245 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 65 treesize of output 75 [2018-04-13 10:16:29,248 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:29,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 78 [2018-04-13 10:16:29,249 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:29,300 INFO L267 ElimStorePlain]: Start of recursive call 6: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:29,331 INFO L267 ElimStorePlain]: Start of recursive call 1: 11 dim-0 vars, 3 dim-2 vars, End of recursive call: 11 dim-0 vars, and 3 xjuncts. [2018-04-13 10:16:29,331 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 14 variables, input treesize:183, output treesize:171 [2018-04-13 10:16:29,531 WARN L148 SmtUtils]: Spent 146ms on a formula simplification that was a NOOP. DAG size: 73 [2018-04-13 10:16:29,751 WARN L148 SmtUtils]: Spent 169ms on a formula simplification that was a NOOP. DAG size: 75 [2018-04-13 10:16:29,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 52 [2018-04-13 10:16:29,765 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:29,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:29,766 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:29,766 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:16:29,766 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:29,775 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:29,830 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 77 treesize of output 85 [2018-04-13 10:16:29,832 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:29,833 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:29,833 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:29,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 117 [2018-04-13 10:16:29,834 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:29,868 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:29,931 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 7 case distinctions, treesize of input 82 treesize of output 105 [2018-04-13 10:16:29,934 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:29,935 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:29,935 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:29,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 126 [2018-04-13 10:16:29,936 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:30,045 INFO L267 ElimStorePlain]: Start of recursive call 6: 4 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:30,080 INFO L267 ElimStorePlain]: Start of recursive call 1: 11 dim-0 vars, 3 dim-2 vars, End of recursive call: 11 dim-0 vars, and 3 xjuncts. [2018-04-13 10:16:30,080 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 14 variables, input treesize:219, output treesize:207 [2018-04-13 10:16:30,327 WARN L148 SmtUtils]: Spent 185ms on a formula simplification that was a NOOP. DAG size: 78 [2018-04-13 10:16:30,645 WARN L148 SmtUtils]: Spent 159ms on a formula simplification that was a NOOP. DAG size: 111 [2018-04-13 10:16:30,653 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-13 10:16:30,653 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:30,694 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 96 treesize of output 94 [2018-04-13 10:16:30,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 80 [2018-04-13 10:16:30,696 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:30,730 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:30,731 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,732 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,732 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,733 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,733 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,734 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 86 treesize of output 172 [2018-04-13 10:16:30,734 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:30,765 INFO L267 ElimStorePlain]: Start of recursive call 3: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:30,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 0 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 3 case distinctions, treesize of input 101 treesize of output 113 [2018-04-13 10:16:30,807 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,809 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,810 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,812 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,812 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:30,813 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:30,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 5 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 97 treesize of output 156 [2018-04-13 10:16:30,813 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:30,998 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2018-04-13 10:16:30,999 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:31,138 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,139 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,139 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,140 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,140 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,141 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:31,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 135 [2018-04-13 10:16:31,141 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:31,285 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,285 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,287 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,288 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,290 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,293 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:31,293 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 7 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 169 [2018-04-13 10:16:31,293 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:31,353 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,354 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,354 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,355 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,355 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,356 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,359 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,359 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,360 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:31,362 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:31,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 7 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 165 [2018-04-13 10:16:31,362 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:31,444 INFO L267 ElimStorePlain]: Start of recursive call 6: 13 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:31,461 INFO L267 ElimStorePlain]: Start of recursive call 1: 23 dim-0 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:31,462 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 26 variables, input treesize:276, output treesize:3 [2018-04-13 10:16:31,549 INFO L134 CoverageAnalysis]: Checked inductivity of 305 backedges. 19 proven. 83 refuted. 0 times theorem prover too weak. 203 trivial. 0 not checked. [2018-04-13 10:16:31,549 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:31,549 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-04-13 10:16:31,549 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-13 10:16:31,550 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-13 10:16:31,550 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=689, Unknown=0, NotChecked=0, Total=756 [2018-04-13 10:16:31,550 INFO L87 Difference]: Start difference. First operand 486 states and 545 transitions. Second operand 28 states. [2018-04-13 10:16:33,470 WARN L151 SmtUtils]: Spent 162ms on a formula simplification. DAG size of input: 84 DAG size of output 54 [2018-04-13 10:16:33,673 WARN L151 SmtUtils]: Spent 146ms on a formula simplification. DAG size of input: 86 DAG size of output 54 [2018-04-13 10:16:34,199 WARN L151 SmtUtils]: Spent 442ms on a formula simplification. DAG size of input: 99 DAG size of output 68 [2018-04-13 10:16:34,462 WARN L151 SmtUtils]: Spent 184ms on a formula simplification. DAG size of input: 101 DAG size of output 71 [2018-04-13 10:16:34,800 WARN L151 SmtUtils]: Spent 215ms on a formula simplification. DAG size of input: 103 DAG size of output 73 [2018-04-13 10:16:35,158 WARN L151 SmtUtils]: Spent 236ms on a formula simplification. DAG size of input: 89 DAG size of output 74 [2018-04-13 10:16:35,619 WARN L151 SmtUtils]: Spent 372ms on a formula simplification. DAG size of input: 91 DAG size of output 67 [2018-04-13 10:16:36,013 WARN L151 SmtUtils]: Spent 237ms on a formula simplification. DAG size of input: 93 DAG size of output 78 [2018-04-13 10:16:36,259 WARN L148 SmtUtils]: Spent 164ms on a formula simplification that was a NOOP. DAG size: 81 [2018-04-13 10:16:36,460 WARN L148 SmtUtils]: Spent 138ms on a formula simplification that was a NOOP. DAG size: 114 [2018-04-13 10:16:36,702 WARN L148 SmtUtils]: Spent 140ms on a formula simplification that was a NOOP. DAG size: 116 [2018-04-13 10:16:37,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:37,110 INFO L93 Difference]: Finished difference Result 585 states and 662 transitions. [2018-04-13 10:16:37,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-04-13 10:16:37,111 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 134 [2018-04-13 10:16:37,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:37,112 INFO L225 Difference]: With dead ends: 585 [2018-04-13 10:16:37,112 INFO L226 Difference]: Without dead ends: 585 [2018-04-13 10:16:37,112 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 110 SyntacticMatches, 1 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1199 ImplicationChecksByTransitivity, 5.9s TimeCoverageRelationStatistics Valid=344, Invalid=4078, Unknown=0, NotChecked=0, Total=4422 [2018-04-13 10:16:37,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 585 states. [2018-04-13 10:16:37,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 585 to 491. [2018-04-13 10:16:37,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 491 states. [2018-04-13 10:16:37,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 491 states to 491 states and 551 transitions. [2018-04-13 10:16:37,115 INFO L78 Accepts]: Start accepts. Automaton has 491 states and 551 transitions. Word has length 134 [2018-04-13 10:16:37,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:37,116 INFO L459 AbstractCegarLoop]: Abstraction has 491 states and 551 transitions. [2018-04-13 10:16:37,116 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-13 10:16:37,116 INFO L276 IsEmpty]: Start isEmpty. Operand 491 states and 551 transitions. [2018-04-13 10:16:37,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-04-13 10:16:37,116 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:37,116 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 7, 7, 6, 6, 6, 6, 6, 6, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:37,116 INFO L408 AbstractCegarLoop]: === Iteration 91 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:37,116 INFO L82 PathProgramCache]: Analyzing trace with hash -1037049644, now seen corresponding path program 6 times [2018-04-13 10:16:37,117 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:37,117 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:37,117 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:37,117 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:37,117 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:37,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:37,134 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:37,138 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:37,138 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:37,139 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:37,139 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 10:16:37,181 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2018-04-13 10:16:37,181 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:37,184 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:37,264 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:37,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:37,266 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:37,267 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:37,272 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:37,272 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-04-13 10:16:37,302 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:16:37,304 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:37,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:16:37,304 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:37,307 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:37,313 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:37,313 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:34 [2018-04-13 10:16:37,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-04-13 10:16:37,348 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:37,350 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 42 [2018-04-13 10:16:37,350 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:37,354 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:37,361 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:37,361 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:49, output treesize:45 [2018-04-13 10:16:37,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-04-13 10:16:37,442 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:37,444 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:37,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 65 [2018-04-13 10:16:37,445 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:37,451 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:37,460 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:37,460 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:65, output treesize:61 [2018-04-13 10:16:37,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 48 [2018-04-13 10:16:37,548 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:37,551 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:37,551 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:37,553 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:37,553 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 103 [2018-04-13 10:16:37,553 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:37,562 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:37,573 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:37,573 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:77, output treesize:73 [2018-04-13 10:16:38,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 36 [2018-04-13 10:16:38,054 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:38,055 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:38,055 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:38,056 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:38,056 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:38,057 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:38,057 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:38,058 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:38,059 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 5 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 69 [2018-04-13 10:16:38,059 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:38,065 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:38,070 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:38,071 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:69, output treesize:19 [2018-04-13 10:16:38,095 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:38,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:16:38,096 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:38,100 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:38,100 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:22, output treesize:17 [2018-04-13 10:16:38,231 INFO L134 CoverageAnalysis]: Checked inductivity of 342 backedges. 17 proven. 323 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:16:38,231 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:38,231 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34] total 34 [2018-04-13 10:16:38,231 INFO L442 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-04-13 10:16:38,231 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-04-13 10:16:38,231 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=1071, Unknown=0, NotChecked=0, Total=1190 [2018-04-13 10:16:38,231 INFO L87 Difference]: Start difference. First operand 491 states and 551 transitions. Second operand 35 states. [2018-04-13 10:16:40,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:40,807 INFO L93 Difference]: Finished difference Result 510 states and 568 transitions. [2018-04-13 10:16:40,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-13 10:16:40,808 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 132 [2018-04-13 10:16:40,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:40,809 INFO L225 Difference]: With dead ends: 510 [2018-04-13 10:16:40,809 INFO L226 Difference]: Without dead ends: 510 [2018-04-13 10:16:40,809 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 100 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 791 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=304, Invalid=3118, Unknown=0, NotChecked=0, Total=3422 [2018-04-13 10:16:40,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 510 states. [2018-04-13 10:16:40,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 510 to 497. [2018-04-13 10:16:40,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 497 states. [2018-04-13 10:16:40,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 558 transitions. [2018-04-13 10:16:40,813 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 558 transitions. Word has length 132 [2018-04-13 10:16:40,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:40,813 INFO L459 AbstractCegarLoop]: Abstraction has 497 states and 558 transitions. [2018-04-13 10:16:40,813 INFO L460 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-04-13 10:16:40,814 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 558 transitions. [2018-04-13 10:16:40,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-04-13 10:16:40,814 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:40,814 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:40,814 INFO L408 AbstractCegarLoop]: === Iteration 92 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:40,819 INFO L82 PathProgramCache]: Analyzing trace with hash -673680449, now seen corresponding path program 5 times [2018-04-13 10:16:40,819 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:40,819 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:40,819 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:40,819 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:40,819 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:40,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:40,835 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:40,842 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:40,842 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:40,842 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:40,842 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:16:40,916 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 15 check-sat command(s) [2018-04-13 10:16:40,916 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:40,922 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:40,972 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:16:40,972 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:40,973 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:40,973 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:16:41,007 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:41,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:41,008 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,009 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,014 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,014 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:37, output treesize:23 [2018-04-13 10:16:41,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 1 [2018-04-13 10:16:41,047 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,050 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,050 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:19, output treesize:3 [2018-04-13 10:16:41,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,081 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 33 [2018-04-13 10:16:41,081 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,087 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,087 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:30, output treesize:32 [2018-04-13 10:16:41,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 26 [2018-04-13 10:16:41,123 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 37 [2018-04-13 10:16:41,123 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,127 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,133 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,133 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:47, output treesize:48 [2018-04-13 10:16:41,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 14 [2018-04-13 10:16:41,172 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,176 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:41,176 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:44, output treesize:24 [2018-04-13 10:16:41,259 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,260 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,261 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 68 [2018-04-13 10:16:41,261 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,275 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:41,275 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:75, output treesize:87 [2018-04-13 10:16:41,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 53 [2018-04-13 10:16:41,362 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,362 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 88 [2018-04-13 10:16:41,363 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,371 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,381 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,381 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:82, output treesize:91 [2018-04-13 10:16:41,446 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 45 [2018-04-13 10:16:41,446 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,452 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:41,452 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:85, output treesize:54 [2018-04-13 10:16:41,579 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,580 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:41,580 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 109 [2018-04-13 10:16:41,581 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,592 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,592 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:99, output treesize:57 [2018-04-13 10:16:41,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 50 [2018-04-13 10:16:41,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,627 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:41,628 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,628 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 104 [2018-04-13 10:16:41,631 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:41,640 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:41,647 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:41,647 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:72, output treesize:60 [2018-04-13 10:16:41,775 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,775 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,776 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,776 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,777 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:41,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 103 [2018-04-13 10:16:41,778 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,789 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:41,790 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:75, output treesize:61 [2018-04-13 10:16:41,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 51 [2018-04-13 10:16:41,836 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,837 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,837 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,838 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,838 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:41,840 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,841 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 5 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 104 [2018-04-13 10:16:41,842 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:41,850 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:41,858 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:41,858 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:76, output treesize:56 [2018-04-13 10:16:41,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2018-04-13 10:16:41,940 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:41,940 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,941 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,941 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:41,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 41 [2018-04-13 10:16:41,944 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,947 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:41,965 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:41,966 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:69, output treesize:20 [2018-04-13 10:16:42,036 INFO L134 CoverageAnalysis]: Checked inductivity of 307 backedges. 32 proven. 144 refuted. 0 times theorem prover too weak. 131 trivial. 0 not checked. [2018-04-13 10:16:42,037 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:42,037 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42] total 42 [2018-04-13 10:16:42,037 INFO L442 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-04-13 10:16:42,037 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-04-13 10:16:42,037 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=1696, Unknown=0, NotChecked=0, Total=1806 [2018-04-13 10:16:42,037 INFO L87 Difference]: Start difference. First operand 497 states and 558 transitions. Second operand 43 states. [2018-04-13 10:16:43,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:43,922 INFO L93 Difference]: Finished difference Result 504 states and 563 transitions. [2018-04-13 10:16:43,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-13 10:16:43,922 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 135 [2018-04-13 10:16:43,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:43,923 INFO L225 Difference]: With dead ends: 504 [2018-04-13 10:16:43,923 INFO L226 Difference]: Without dead ends: 504 [2018-04-13 10:16:43,923 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1505 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=291, Invalid=5111, Unknown=0, NotChecked=0, Total=5402 [2018-04-13 10:16:43,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 504 states. [2018-04-13 10:16:43,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 504 to 498. [2018-04-13 10:16:43,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 498 states. [2018-04-13 10:16:43,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 498 states to 498 states and 559 transitions. [2018-04-13 10:16:43,926 INFO L78 Accepts]: Start accepts. Automaton has 498 states and 559 transitions. Word has length 135 [2018-04-13 10:16:43,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:43,926 INFO L459 AbstractCegarLoop]: Abstraction has 498 states and 559 transitions. [2018-04-13 10:16:43,926 INFO L460 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-04-13 10:16:43,926 INFO L276 IsEmpty]: Start isEmpty. Operand 498 states and 559 transitions. [2018-04-13 10:16:43,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2018-04-13 10:16:43,927 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:43,927 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 7, 7, 7, 6, 6, 6, 6, 6, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:43,927 INFO L408 AbstractCegarLoop]: === Iteration 93 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:43,927 INFO L82 PathProgramCache]: Analyzing trace with hash -2083767819, now seen corresponding path program 7 times [2018-04-13 10:16:43,927 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:43,927 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:43,928 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:43,928 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:43,928 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:43,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:43,944 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:43,950 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:43,950 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:43,950 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:43,950 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:16:43,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:43,984 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:44,046 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:44,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:44,047 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,048 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,051 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,051 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:16:44,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:16:44,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:16:44,079 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,082 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,087 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,087 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:16:44,124 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:16:44,126 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,127 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,127 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:16:44,128 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,134 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,140 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,140 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:16:44,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 39 [2018-04-13 10:16:44,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,194 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 113 [2018-04-13 10:16:44,195 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,206 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,214 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:44,214 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:59, output treesize:55 [2018-04-13 10:16:44,575 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 45 [2018-04-13 10:16:44,576 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:44,577 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,578 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,579 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,579 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,580 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,581 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:44,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 88 [2018-04-13 10:16:44,581 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,588 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,595 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:44,595 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:79, output treesize:3 [2018-04-13 10:16:44,676 INFO L134 CoverageAnalysis]: Checked inductivity of 348 backedges. 7 proven. 339 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:16:44,676 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:44,676 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30] total 30 [2018-04-13 10:16:44,676 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-04-13 10:16:44,677 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-04-13 10:16:44,677 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=849, Unknown=0, NotChecked=0, Total=930 [2018-04-13 10:16:44,677 INFO L87 Difference]: Start difference. First operand 498 states and 559 transitions. Second operand 31 states. [2018-04-13 10:16:46,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:46,558 INFO L93 Difference]: Finished difference Result 509 states and 570 transitions. [2018-04-13 10:16:46,558 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-13 10:16:46,558 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 133 [2018-04-13 10:16:46,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:46,559 INFO L225 Difference]: With dead ends: 509 [2018-04-13 10:16:46,559 INFO L226 Difference]: Without dead ends: 509 [2018-04-13 10:16:46,560 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 104 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 838 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=242, Invalid=3064, Unknown=0, NotChecked=0, Total=3306 [2018-04-13 10:16:46,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 509 states. [2018-04-13 10:16:46,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 509 to 499. [2018-04-13 10:16:46,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 499 states. [2018-04-13 10:16:46,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 560 transitions. [2018-04-13 10:16:46,563 INFO L78 Accepts]: Start accepts. Automaton has 499 states and 560 transitions. Word has length 133 [2018-04-13 10:16:46,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:46,563 INFO L459 AbstractCegarLoop]: Abstraction has 499 states and 560 transitions. [2018-04-13 10:16:46,563 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-04-13 10:16:46,563 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 560 transitions. [2018-04-13 10:16:46,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-04-13 10:16:46,564 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:46,564 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:46,564 INFO L408 AbstractCegarLoop]: === Iteration 94 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:46,564 INFO L82 PathProgramCache]: Analyzing trace with hash 1685442000, now seen corresponding path program 4 times [2018-04-13 10:16:46,564 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:46,564 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:46,564 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:46,564 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:16:46,564 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:46,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:46,575 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:46,579 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:46,579 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:46,579 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:46,579 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:16:46,602 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:16:46,602 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:46,606 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:46,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:46,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:46,651 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:46,652 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:46,655 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:46,655 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:15 [2018-04-13 10:16:46,754 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-04-13 10:16:46,755 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:46,755 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-04-13 10:16:46,755 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:46,757 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:46,763 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:46,763 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:40, output treesize:13 [2018-04-13 10:16:46,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:46,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:16:46,777 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:46,780 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:46,780 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:16:46,827 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 6 proven. 45 refuted. 0 times theorem prover too weak. 212 trivial. 0 not checked. [2018-04-13 10:16:46,828 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:46,828 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17] total 17 [2018-04-13 10:16:46,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-13 10:16:46,828 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-13 10:16:46,828 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=267, Unknown=0, NotChecked=0, Total=306 [2018-04-13 10:16:46,828 INFO L87 Difference]: Start difference. First operand 499 states and 560 transitions. Second operand 18 states. [2018-04-13 10:16:47,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:47,438 INFO L93 Difference]: Finished difference Result 508 states and 565 transitions. [2018-04-13 10:16:47,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-13 10:16:47,438 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 136 [2018-04-13 10:16:47,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:47,439 INFO L225 Difference]: With dead ends: 508 [2018-04-13 10:16:47,439 INFO L226 Difference]: Without dead ends: 508 [2018-04-13 10:16:47,439 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 119 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=98, Invalid=714, Unknown=0, NotChecked=0, Total=812 [2018-04-13 10:16:47,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 508 states. [2018-04-13 10:16:47,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 508 to 499. [2018-04-13 10:16:47,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 499 states. [2018-04-13 10:16:47,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 559 transitions. [2018-04-13 10:16:47,442 INFO L78 Accepts]: Start accepts. Automaton has 499 states and 559 transitions. Word has length 136 [2018-04-13 10:16:47,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:47,442 INFO L459 AbstractCegarLoop]: Abstraction has 499 states and 559 transitions. [2018-04-13 10:16:47,442 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-13 10:16:47,442 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 559 transitions. [2018-04-13 10:16:47,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2018-04-13 10:16:47,442 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:47,442 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:47,443 INFO L408 AbstractCegarLoop]: === Iteration 95 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:47,443 INFO L82 PathProgramCache]: Analyzing trace with hash 1685442001, now seen corresponding path program 4 times [2018-04-13 10:16:47,443 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:47,443 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:47,443 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:47,443 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:47,443 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:47,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:47,450 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:47,596 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 3 proven. 21 refuted. 0 times theorem prover too weak. 239 trivial. 0 not checked. [2018-04-13 10:16:47,596 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:47,596 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:47,597 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:16:47,606 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:16:47,606 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:47,608 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:47,801 INFO L134 CoverageAnalysis]: Checked inductivity of 263 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 247 trivial. 0 not checked. [2018-04-13 10:16:47,801 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:16:47,801 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 10] total 23 [2018-04-13 10:16:47,801 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-13 10:16:47,801 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-13 10:16:47,801 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=498, Unknown=0, NotChecked=0, Total=552 [2018-04-13 10:16:47,802 INFO L87 Difference]: Start difference. First operand 499 states and 559 transitions. Second operand 24 states. [2018-04-13 10:16:48,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:48,473 INFO L93 Difference]: Finished difference Result 515 states and 564 transitions. [2018-04-13 10:16:48,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-04-13 10:16:48,474 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 136 [2018-04-13 10:16:48,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:48,475 INFO L225 Difference]: With dead ends: 515 [2018-04-13 10:16:48,475 INFO L226 Difference]: Without dead ends: 515 [2018-04-13 10:16:48,475 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 127 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 187 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=134, Invalid=1056, Unknown=0, NotChecked=0, Total=1190 [2018-04-13 10:16:48,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 515 states. [2018-04-13 10:16:48,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 515 to 499. [2018-04-13 10:16:48,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 499 states. [2018-04-13 10:16:48,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 499 states to 499 states and 558 transitions. [2018-04-13 10:16:48,478 INFO L78 Accepts]: Start accepts. Automaton has 499 states and 558 transitions. Word has length 136 [2018-04-13 10:16:48,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:48,478 INFO L459 AbstractCegarLoop]: Abstraction has 499 states and 558 transitions. [2018-04-13 10:16:48,478 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-13 10:16:48,478 INFO L276 IsEmpty]: Start isEmpty. Operand 499 states and 558 transitions. [2018-04-13 10:16:48,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-04-13 10:16:48,478 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:48,478 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 7, 7, 7, 7, 6, 6, 6, 6, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:48,479 INFO L408 AbstractCegarLoop]: === Iteration 96 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:48,479 INFO L82 PathProgramCache]: Analyzing trace with hash -172292812, now seen corresponding path program 6 times [2018-04-13 10:16:48,479 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:48,479 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:48,479 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:48,479 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:48,479 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:48,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:48,501 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:48,504 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:48,504 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:48,504 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:48,504 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 10:16:48,537 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 12 check-sat command(s) [2018-04-13 10:16:48,537 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:48,540 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:48,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-04-13 10:16:48,570 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-04-13 10:16:48,570 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,571 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,573 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,573 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:17, output treesize:13 [2018-04-13 10:16:48,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:16:48,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 21 [2018-04-13 10:16:48,584 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,586 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,589 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,589 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-04-13 10:16:48,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-04-13 10:16:48,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 32 [2018-04-13 10:16:48,624 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,627 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,631 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:48,632 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:44, output treesize:40 [2018-04-13 10:16:48,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-04-13 10:16:48,679 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 32 [2018-04-13 10:16:48,680 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,683 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,689 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:16:48,689 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:47, output treesize:43 [2018-04-13 10:16:48,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 24 [2018-04-13 10:16:48,992 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:48,993 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 14 [2018-04-13 10:16:48,993 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,995 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,997 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:48,997 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:36, output treesize:3 [2018-04-13 10:16:49,057 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 18 proven. 329 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-04-13 10:16:49,057 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:49,057 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-04-13 10:16:49,057 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-13 10:16:49,058 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-13 10:16:49,058 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=675, Unknown=0, NotChecked=0, Total=756 [2018-04-13 10:16:49,058 INFO L87 Difference]: Start difference. First operand 499 states and 558 transitions. Second operand 28 states. [2018-04-13 10:16:50,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:50,055 INFO L93 Difference]: Finished difference Result 508 states and 567 transitions. [2018-04-13 10:16:50,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-04-13 10:16:50,055 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 134 [2018-04-13 10:16:50,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:50,056 INFO L225 Difference]: With dead ends: 508 [2018-04-13 10:16:50,056 INFO L226 Difference]: Without dead ends: 508 [2018-04-13 10:16:50,056 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 417 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=159, Invalid=1563, Unknown=0, NotChecked=0, Total=1722 [2018-04-13 10:16:50,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 508 states. [2018-04-13 10:16:50,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 508 to 500. [2018-04-13 10:16:50,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 500 states. [2018-04-13 10:16:50,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 500 states to 500 states and 559 transitions. [2018-04-13 10:16:50,059 INFO L78 Accepts]: Start accepts. Automaton has 500 states and 559 transitions. Word has length 134 [2018-04-13 10:16:50,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:50,059 INFO L459 AbstractCegarLoop]: Abstraction has 500 states and 559 transitions. [2018-04-13 10:16:50,059 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-13 10:16:50,059 INFO L276 IsEmpty]: Start isEmpty. Operand 500 states and 559 transitions. [2018-04-13 10:16:50,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-04-13 10:16:50,060 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:50,060 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:50,060 INFO L408 AbstractCegarLoop]: === Iteration 97 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:50,060 INFO L82 PathProgramCache]: Analyzing trace with hash 1974523743, now seen corresponding path program 4 times [2018-04-13 10:16:50,060 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:50,060 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:50,061 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:50,061 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:50,061 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:50,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:50,077 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:50,082 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:50,082 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:50,082 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:50,083 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:16:50,098 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:16:50,099 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:50,101 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:50,187 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:50,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:50,188 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:50,189 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:50,191 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:50,191 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:15 [2018-04-13 10:16:50,227 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:16:50,229 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:50,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:16:50,230 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:50,232 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:50,235 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:50,236 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:13 [2018-04-13 10:16:50,276 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:16:50,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:50,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:16:50,278 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:50,281 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:50,284 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:50,284 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-04-13 10:16:50,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-04-13 10:16:50,311 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:50,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 12 [2018-04-13 10:16:50,311 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:50,313 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:50,313 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:50,313 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:28, output treesize:3 [2018-04-13 10:16:50,336 INFO L134 CoverageAnalysis]: Checked inductivity of 346 backedges. 44 proven. 271 refuted. 0 times theorem prover too weak. 31 trivial. 0 not checked. [2018-04-13 10:16:50,336 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:50,336 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28] total 28 [2018-04-13 10:16:50,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-04-13 10:16:50,337 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-04-13 10:16:50,337 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=128, Invalid=684, Unknown=0, NotChecked=0, Total=812 [2018-04-13 10:16:50,337 INFO L87 Difference]: Start difference. First operand 500 states and 559 transitions. Second operand 29 states. [2018-04-13 10:16:50,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:50,963 INFO L93 Difference]: Finished difference Result 708 states and 808 transitions. [2018-04-13 10:16:50,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-13 10:16:50,963 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 138 [2018-04-13 10:16:50,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:50,964 INFO L225 Difference]: With dead ends: 708 [2018-04-13 10:16:50,965 INFO L226 Difference]: Without dead ends: 708 [2018-04-13 10:16:50,965 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 108 SyntacticMatches, 3 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 728 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=219, Invalid=1761, Unknown=0, NotChecked=0, Total=1980 [2018-04-13 10:16:50,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 708 states. [2018-04-13 10:16:50,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 708 to 528. [2018-04-13 10:16:50,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 528 states. [2018-04-13 10:16:50,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 528 states to 528 states and 589 transitions. [2018-04-13 10:16:50,968 INFO L78 Accepts]: Start accepts. Automaton has 528 states and 589 transitions. Word has length 138 [2018-04-13 10:16:50,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:50,968 INFO L459 AbstractCegarLoop]: Abstraction has 528 states and 589 transitions. [2018-04-13 10:16:50,968 INFO L460 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-04-13 10:16:50,968 INFO L276 IsEmpty]: Start isEmpty. Operand 528 states and 589 transitions. [2018-04-13 10:16:50,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-04-13 10:16:50,969 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:50,969 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:50,969 INFO L408 AbstractCegarLoop]: === Iteration 98 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:50,969 INFO L82 PathProgramCache]: Analyzing trace with hash 709094521, now seen corresponding path program 4 times [2018-04-13 10:16:50,969 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:50,969 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:50,970 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:50,970 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:50,970 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:50,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:50,980 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:50,983 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:50,983 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:50,983 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:50,984 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:16:50,999 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:16:50,999 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:51,001 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:51,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:16:51,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:16:51,009 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:51,010 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:51,013 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:51,013 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:16:51,032 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:16:51,033 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:51,034 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:16:51,034 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:51,037 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:51,039 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:51,039 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:16:51,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-13 10:16:51,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:51,214 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:51,215 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:16:51,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 37 [2018-04-13 10:16:51,215 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:51,218 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:51,220 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:16:51,220 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:39, output treesize:3 [2018-04-13 10:16:51,245 INFO L134 CoverageAnalysis]: Checked inductivity of 264 backedges. 8 proven. 47 refuted. 0 times theorem prover too weak. 209 trivial. 0 not checked. [2018-04-13 10:16:51,246 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:51,246 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14] total 14 [2018-04-13 10:16:51,246 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-04-13 10:16:51,246 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-04-13 10:16:51,246 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=178, Unknown=0, NotChecked=0, Total=210 [2018-04-13 10:16:51,246 INFO L87 Difference]: Start difference. First operand 528 states and 589 transitions. Second operand 15 states. [2018-04-13 10:16:52,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:16:52,007 INFO L93 Difference]: Finished difference Result 544 states and 603 transitions. [2018-04-13 10:16:52,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-13 10:16:52,041 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 137 [2018-04-13 10:16:52,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:16:52,042 INFO L225 Difference]: With dead ends: 544 [2018-04-13 10:16:52,042 INFO L226 Difference]: Without dead ends: 544 [2018-04-13 10:16:52,042 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 143 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=75, Invalid=387, Unknown=0, NotChecked=0, Total=462 [2018-04-13 10:16:52,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 544 states. [2018-04-13 10:16:52,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 544 to 528. [2018-04-13 10:16:52,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 528 states. [2018-04-13 10:16:52,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 528 states to 528 states and 588 transitions. [2018-04-13 10:16:52,045 INFO L78 Accepts]: Start accepts. Automaton has 528 states and 588 transitions. Word has length 137 [2018-04-13 10:16:52,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:16:52,045 INFO L459 AbstractCegarLoop]: Abstraction has 528 states and 588 transitions. [2018-04-13 10:16:52,045 INFO L460 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-04-13 10:16:52,045 INFO L276 IsEmpty]: Start isEmpty. Operand 528 states and 588 transitions. [2018-04-13 10:16:52,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-04-13 10:16:52,046 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:16:52,046 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:16:52,046 INFO L408 AbstractCegarLoop]: === Iteration 99 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:16:52,046 INFO L82 PathProgramCache]: Analyzing trace with hash 1967630962, now seen corresponding path program 5 times [2018-04-13 10:16:52,046 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:16:52,046 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:16:52,046 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:52,047 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:16:52,047 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:16:52,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:16:52,056 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:16:52,059 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:16:52,060 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:16:52,060 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:16:52,060 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:16:52,122 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 17 check-sat command(s) [2018-04-13 10:16:52,122 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:16:52,129 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:16:52,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-04-13 10:16:52,135 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:52,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-13 10:16:52,153 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:52,160 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:16:52,161 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-04-13 10:16:52,274 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,275 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 41 [2018-04-13 10:16:52,275 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:52,296 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,297 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 31 [2018-04-13 10:16:52,297 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:52,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,316 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 34 [2018-04-13 10:16:52,316 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:52,334 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 43 [2018-04-13 10:16:52,334 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:52,352 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-04-13 10:16:52,352 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:79, output treesize:61 [2018-04-13 10:16:52,620 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,621 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,621 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,622 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 83 [2018-04-13 10:16:52,628 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:52,724 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,726 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,726 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 83 [2018-04-13 10:16:52,731 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:52,852 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,852 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,853 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-04-13 10:16:52,853 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:52,947 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 49 [2018-04-13 10:16:52,948 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:52,950 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,950 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:52,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 41 [2018-04-13 10:16:52,951 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:53,038 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,039 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,040 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,041 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,046 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 54 treesize of output 85 [2018-04-13 10:16:53,046 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:53,170 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,171 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 41 [2018-04-13 10:16:53,171 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:53,173 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,173 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 47 [2018-04-13 10:16:53,174 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:53,273 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,273 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 39 [2018-04-13 10:16:53,274 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:53,275 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,276 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,276 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 45 [2018-04-13 10:16:53,276 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:53,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 51 [2018-04-13 10:16:53,373 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:53,480 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 24 dim-0 vars, and 8 xjuncts. [2018-04-13 10:16:53,480 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 24 variables, input treesize:217, output treesize:301 [2018-04-13 10:16:53,675 WARN L151 SmtUtils]: Spent 146ms on a formula simplification. DAG size of input: 137 DAG size of output 36 [2018-04-13 10:16:53,830 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,830 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,831 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-04-13 10:16:53,831 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:53,896 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,897 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 46 [2018-04-13 10:16:53,897 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:53,960 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,960 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:53,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-04-13 10:16:53,961 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:54,039 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 51 [2018-04-13 10:16:54,039 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:54,119 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,120 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,121 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 75 [2018-04-13 10:16:54,126 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:54,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 50 [2018-04-13 10:16:54,233 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:54,320 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 73 [2018-04-13 10:16:54,326 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:54,440 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,441 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,442 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,447 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 73 [2018-04-13 10:16:54,447 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:54,576 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 24 dim-0 vars, and 8 xjuncts. [2018-04-13 10:16:54,576 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 24 variables, input treesize:217, output treesize:301 [2018-04-13 10:16:54,770 WARN L151 SmtUtils]: Spent 132ms on a formula simplification. DAG size of input: 137 DAG size of output 36 [2018-04-13 10:16:54,911 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,912 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 50 [2018-04-13 10:16:54,913 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:54,975 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,975 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:54,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 46 [2018-04-13 10:16:54,976 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:55,036 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:55,036 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:55,041 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 73 [2018-04-13 10:16:55,041 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:55,129 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:55,130 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:55,130 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-04-13 10:16:55,130 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:55,202 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:55,203 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:55,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-04-13 10:16:55,203 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:55,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:55,287 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:55,289 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:55,293 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 75 [2018-04-13 10:16:55,293 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:55,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 51 [2018-04-13 10:16:55,396 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:55,492 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:55,493 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:55,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:55,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 73 [2018-04-13 10:16:55,499 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:55,624 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 24 dim-0 vars, and 8 xjuncts. [2018-04-13 10:16:55,624 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 24 variables, input treesize:217, output treesize:301 [2018-04-13 10:16:55,843 WARN L151 SmtUtils]: Spent 159ms on a formula simplification. DAG size of input: 137 DAG size of output 36 [2018-04-13 10:16:56,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 54 treesize of output 61 [2018-04-13 10:16:56,008 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:56,109 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,109 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 46 [2018-04-13 10:16:56,110 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:56,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 47 [2018-04-13 10:16:56,196 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:56,197 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,198 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,198 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 39 [2018-04-13 10:16:56,198 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:56,276 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,278 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,282 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 83 [2018-04-13 10:16:56,282 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:56,404 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,404 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-04-13 10:16:56,405 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:56,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,513 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,514 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 75 [2018-04-13 10:16:56,519 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:56,647 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,648 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,649 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 46 treesize of output 73 [2018-04-13 10:16:56,655 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:56,794 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,794 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,794 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 49 [2018-04-13 10:16:56,795 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:56,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:56,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 41 [2018-04-13 10:16:56,797 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:56,910 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 24 dim-0 vars, and 8 xjuncts. [2018-04-13 10:16:56,910 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 24 variables, input treesize:217, output treesize:301 [2018-04-13 10:16:57,128 WARN L151 SmtUtils]: Spent 155ms on a formula simplification. DAG size of input: 137 DAG size of output 36 [2018-04-13 10:16:57,293 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,294 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,299 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 83 [2018-04-13 10:16:57,300 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:57,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,396 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,397 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 54 treesize of output 85 [2018-04-13 10:16:57,402 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:57,520 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,521 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 41 [2018-04-13 10:16:57,521 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:57,522 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,523 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,523 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 49 [2018-04-13 10:16:57,523 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:57,618 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,619 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,620 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,621 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 83 [2018-04-13 10:16:57,626 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:57,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,771 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-04-13 10:16:57,772 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:57,879 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,879 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,880 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 47 [2018-04-13 10:16:57,880 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:57,881 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,882 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:57,882 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 41 [2018-04-13 10:16:57,882 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:57,987 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 48 treesize of output 51 [2018-04-13 10:16:57,988 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-04-13 10:16:58,107 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:58,107 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:58,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 39 [2018-04-13 10:16:58,108 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:58,109 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:58,110 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:16:58,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 45 [2018-04-13 10:16:58,110 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-13 10:16:58,230 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 8 dim-1 vars, End of recursive call: 24 dim-0 vars, and 8 xjuncts. [2018-04-13 10:16:58,230 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 24 variables, input treesize:217, output treesize:301 [2018-04-13 10:16:58,465 WARN L151 SmtUtils]: Spent 157ms on a formula simplification. DAG size of input: 137 DAG size of output 36 [2018-04-13 10:16:58,536 INFO L134 CoverageAnalysis]: Checked inductivity of 426 backedges. 68 proven. 159 refuted. 0 times theorem prover too weak. 199 trivial. 0 not checked. [2018-04-13 10:16:58,537 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:16:58,537 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26] total 26 [2018-04-13 10:16:58,537 INFO L442 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-04-13 10:16:58,537 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-04-13 10:16:58,537 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=640, Unknown=0, NotChecked=0, Total=702 [2018-04-13 10:16:58,537 INFO L87 Difference]: Start difference. First operand 528 states and 588 transitions. Second operand 27 states. [2018-04-13 10:16:59,277 WARN L148 SmtUtils]: Spent 143ms on a formula simplification that was a NOOP. DAG size: 53 [2018-04-13 10:16:59,489 WARN L148 SmtUtils]: Spent 158ms on a formula simplification that was a NOOP. DAG size: 57 [2018-04-13 10:16:59,690 WARN L148 SmtUtils]: Spent 158ms on a formula simplification that was a NOOP. DAG size: 57 [2018-04-13 10:17:00,164 WARN L148 SmtUtils]: Spent 163ms on a formula simplification that was a NOOP. DAG size: 62 [2018-04-13 10:17:01,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:01,260 INFO L93 Difference]: Finished difference Result 610 states and 670 transitions. [2018-04-13 10:17:01,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-04-13 10:17:01,260 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 140 [2018-04-13 10:17:01,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:01,261 INFO L225 Difference]: With dead ends: 610 [2018-04-13 10:17:01,261 INFO L226 Difference]: Without dead ends: 610 [2018-04-13 10:17:01,261 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 105 SyntacticMatches, 9 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 302 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=166, Invalid=1726, Unknown=0, NotChecked=0, Total=1892 [2018-04-13 10:17:01,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 610 states. [2018-04-13 10:17:01,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 610 to 531. [2018-04-13 10:17:01,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 531 states. [2018-04-13 10:17:01,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 531 states to 531 states and 591 transitions. [2018-04-13 10:17:01,264 INFO L78 Accepts]: Start accepts. Automaton has 531 states and 591 transitions. Word has length 140 [2018-04-13 10:17:01,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:01,264 INFO L459 AbstractCegarLoop]: Abstraction has 531 states and 591 transitions. [2018-04-13 10:17:01,264 INFO L460 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-04-13 10:17:01,264 INFO L276 IsEmpty]: Start isEmpty. Operand 531 states and 591 transitions. [2018-04-13 10:17:01,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-04-13 10:17:01,265 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:01,265 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:01,265 INFO L408 AbstractCegarLoop]: === Iteration 100 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:01,265 INFO L82 PathProgramCache]: Analyzing trace with hash 171874225, now seen corresponding path program 3 times [2018-04-13 10:17:01,265 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:01,265 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:01,266 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:01,266 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:01,266 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:01,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:01,273 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:01,319 INFO L134 CoverageAnalysis]: Checked inductivity of 370 backedges. 0 proven. 80 refuted. 0 times theorem prover too weak. 290 trivial. 0 not checked. [2018-04-13 10:17:01,319 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:01,319 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:01,320 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:17:01,341 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2018-04-13 10:17:01,341 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:01,343 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:01,393 INFO L134 CoverageAnalysis]: Checked inductivity of 370 backedges. 0 proven. 80 refuted. 0 times theorem prover too weak. 290 trivial. 0 not checked. [2018-04-13 10:17:01,393 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:17:01,393 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 16 [2018-04-13 10:17:01,393 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-13 10:17:01,393 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-13 10:17:01,393 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=155, Unknown=0, NotChecked=0, Total=240 [2018-04-13 10:17:01,393 INFO L87 Difference]: Start difference. First operand 531 states and 591 transitions. Second operand 16 states. [2018-04-13 10:17:01,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:01,458 INFO L93 Difference]: Finished difference Result 597 states and 659 transitions. [2018-04-13 10:17:01,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-04-13 10:17:01,458 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 140 [2018-04-13 10:17:01,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:01,459 INFO L225 Difference]: With dead ends: 597 [2018-04-13 10:17:01,459 INFO L226 Difference]: Without dead ends: 594 [2018-04-13 10:17:01,459 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 135 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=182, Unknown=0, NotChecked=0, Total=272 [2018-04-13 10:17:01,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 594 states. [2018-04-13 10:17:01,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 594 to 531. [2018-04-13 10:17:01,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 531 states. [2018-04-13 10:17:01,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 531 states to 531 states and 590 transitions. [2018-04-13 10:17:01,462 INFO L78 Accepts]: Start accepts. Automaton has 531 states and 590 transitions. Word has length 140 [2018-04-13 10:17:01,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:01,462 INFO L459 AbstractCegarLoop]: Abstraction has 531 states and 590 transitions. [2018-04-13 10:17:01,462 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-13 10:17:01,462 INFO L276 IsEmpty]: Start isEmpty. Operand 531 states and 590 transitions. [2018-04-13 10:17:01,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-04-13 10:17:01,463 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:01,463 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:01,463 INFO L408 AbstractCegarLoop]: === Iteration 101 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:01,463 INFO L82 PathProgramCache]: Analyzing trace with hash 1080694369, now seen corresponding path program 6 times [2018-04-13 10:17:01,463 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:01,463 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:01,463 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:01,464 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:01,464 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:01,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:01,488 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:01,493 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:17:01,494 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:01,494 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:01,497 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 10:17:01,515 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2018-04-13 10:17:01,515 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:01,517 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:01,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:17:01,520 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,521 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,521 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:17:01,532 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:01,534 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:01,534 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,535 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,537 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,537 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:13 [2018-04-13 10:17:01,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 1 [2018-04-13 10:17:01,548 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,549 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,549 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:18, output treesize:3 [2018-04-13 10:17:01,594 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:01,594 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:01,595 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 48 [2018-04-13 10:17:01,595 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,620 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,620 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:26, output treesize:33 [2018-04-13 10:17:01,784 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 36 [2018-04-13 10:17:01,785 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:01,786 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 52 [2018-04-13 10:17:01,786 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,790 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,795 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,796 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:48, output treesize:49 [2018-04-13 10:17:01,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 22 [2018-04-13 10:17:01,828 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,831 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:01,831 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:54, output treesize:26 [2018-04-13 10:17:01,896 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:01,896 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:01,896 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:01,897 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 83 [2018-04-13 10:17:01,897 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,902 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:01,902 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:63, output treesize:28 [2018-04-13 10:17:01,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 36 [2018-04-13 10:17:01,921 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:01,921 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:01,922 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:01,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 68 [2018-04-13 10:17:01,924 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:01,930 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:01,934 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:01,934 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:31 [2018-04-13 10:17:01,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 31 [2018-04-13 10:17:01,989 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:01,990 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:01,991 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:01,999 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 43 [2018-04-13 10:17:02,000 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:02,004 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:02,007 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:02,007 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:42, output treesize:11 [2018-04-13 10:17:02,055 INFO L134 CoverageAnalysis]: Checked inductivity of 347 backedges. 94 proven. 13 refuted. 0 times theorem prover too weak. 240 trivial. 0 not checked. [2018-04-13 10:17:02,056 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:17:02,056 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-04-13 10:17:02,056 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-13 10:17:02,056 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-13 10:17:02,056 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=410, Unknown=0, NotChecked=0, Total=462 [2018-04-13 10:17:02,057 INFO L87 Difference]: Start difference. First operand 531 states and 590 transitions. Second operand 22 states. [2018-04-13 10:17:02,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:02,647 INFO L93 Difference]: Finished difference Result 539 states and 596 transitions. [2018-04-13 10:17:02,647 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-13 10:17:02,647 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 139 [2018-04-13 10:17:02,647 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:02,648 INFO L225 Difference]: With dead ends: 539 [2018-04-13 10:17:02,648 INFO L226 Difference]: Without dead ends: 539 [2018-04-13 10:17:02,648 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 119 SyntacticMatches, 1 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=136, Invalid=986, Unknown=0, NotChecked=0, Total=1122 [2018-04-13 10:17:02,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2018-04-13 10:17:02,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 531. [2018-04-13 10:17:02,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 531 states. [2018-04-13 10:17:02,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 531 states to 531 states and 591 transitions. [2018-04-13 10:17:02,651 INFO L78 Accepts]: Start accepts. Automaton has 531 states and 591 transitions. Word has length 139 [2018-04-13 10:17:02,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:02,651 INFO L459 AbstractCegarLoop]: Abstraction has 531 states and 591 transitions. [2018-04-13 10:17:02,651 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-13 10:17:02,651 INFO L276 IsEmpty]: Start isEmpty. Operand 531 states and 591 transitions. [2018-04-13 10:17:02,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-04-13 10:17:02,652 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:02,652 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:02,652 INFO L408 AbstractCegarLoop]: === Iteration 102 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:02,652 INFO L82 PathProgramCache]: Analyzing trace with hash 768395717, now seen corresponding path program 3 times [2018-04-13 10:17:02,652 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:02,652 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:02,653 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:02,653 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:02,653 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:02,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:02,667 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:02,670 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:17:02,670 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:02,670 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:02,671 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:17:02,699 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 5 check-sat command(s) [2018-04-13 10:17:02,699 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:02,703 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:02,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:17:02,705 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:02,708 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:02,708 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-04-13 10:17:02,762 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:02,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:02,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-13 10:17:02,763 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:02,766 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:02,766 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:11 [2018-04-13 10:17:02,789 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:02,790 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:02,790 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:02,791 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:02,797 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:02,797 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:33, output treesize:26 [2018-04-13 10:17:02,911 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-04-13 10:17:02,912 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:02,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 38 [2018-04-13 10:17:02,913 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:02,916 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:02,921 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:02,921 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:27 [2018-04-13 10:17:03,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 24 [2018-04-13 10:17:03,037 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:03,038 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 38 [2018-04-13 10:17:03,038 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,041 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,046 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,046 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:42, output treesize:27 [2018-04-13 10:17:03,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 42 treesize of output 52 [2018-04-13 10:17:03,254 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:03,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 55 [2018-04-13 10:17:03,255 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,269 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,278 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:03,279 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:68, output treesize:64 [2018-04-13 10:17:03,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:17:03,377 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,388 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:03,388 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:70, output treesize:65 [2018-04-13 10:17:03,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 54 treesize of output 62 [2018-04-13 10:17:03,405 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:03,405 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:03,406 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:03,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 94 [2018-04-13 10:17:03,408 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,427 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,439 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:03,439 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:80, output treesize:76 [2018-04-13 10:17:03,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 61 treesize of output 59 [2018-04-13 10:17:03,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 48 [2018-04-13 10:17:03,586 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,602 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:03,603 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:03,603 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:03,604 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:03,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:03,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 5 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 84 [2018-04-13 10:17:03,609 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:03,625 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:03,626 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:03,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:03,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 55 [2018-04-13 10:17:03,629 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,636 INFO L267 ElimStorePlain]: Start of recursive call 2: 3 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,645 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,645 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 7 variables, input treesize:104, output treesize:10 [2018-04-13 10:17:03,674 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:03,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:17:03,675 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:03,678 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:03,678 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-13 10:17:03,755 INFO L134 CoverageAnalysis]: Checked inductivity of 313 backedges. 11 proven. 102 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-04-13 10:17:03,755 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:17:03,755 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27] total 27 [2018-04-13 10:17:03,756 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-04-13 10:17:03,756 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-04-13 10:17:03,756 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=691, Unknown=0, NotChecked=0, Total=756 [2018-04-13 10:17:03,756 INFO L87 Difference]: Start difference. First operand 531 states and 591 transitions. Second operand 28 states. [2018-04-13 10:17:06,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:06,335 INFO L93 Difference]: Finished difference Result 563 states and 623 transitions. [2018-04-13 10:17:06,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-04-13 10:17:06,336 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 138 [2018-04-13 10:17:06,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:06,336 INFO L225 Difference]: With dead ends: 563 [2018-04-13 10:17:06,336 INFO L226 Difference]: Without dead ends: 563 [2018-04-13 10:17:06,337 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 115 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 526 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=257, Invalid=2823, Unknown=0, NotChecked=0, Total=3080 [2018-04-13 10:17:06,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 563 states. [2018-04-13 10:17:06,339 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 563 to 537. [2018-04-13 10:17:06,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 537 states. [2018-04-13 10:17:06,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 537 states to 537 states and 597 transitions. [2018-04-13 10:17:06,339 INFO L78 Accepts]: Start accepts. Automaton has 537 states and 597 transitions. Word has length 138 [2018-04-13 10:17:06,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:06,340 INFO L459 AbstractCegarLoop]: Abstraction has 537 states and 597 transitions. [2018-04-13 10:17:06,340 INFO L460 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-04-13 10:17:06,340 INFO L276 IsEmpty]: Start isEmpty. Operand 537 states and 597 transitions. [2018-04-13 10:17:06,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-04-13 10:17:06,340 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:06,340 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:06,340 INFO L408 AbstractCegarLoop]: === Iteration 103 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:06,341 INFO L82 PathProgramCache]: Analyzing trace with hash 507093808, now seen corresponding path program 4 times [2018-04-13 10:17:06,341 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:06,341 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:06,341 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:06,341 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:06,341 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:06,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:06,353 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:06,355 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:17:06,355 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:06,356 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:06,356 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:17:06,370 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:17:06,370 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:06,372 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:06,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:06,384 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:06,384 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:06,385 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:06,388 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:06,388 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:17:06,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:17:06,410 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:06,410 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:17:06,410 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:06,413 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:06,415 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:06,415 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:17:06,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-04-13 10:17:06,590 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:06,591 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:06,591 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:06,592 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 37 [2018-04-13 10:17:06,592 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:06,595 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:06,597 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:06,597 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:39, output treesize:3 [2018-04-13 10:17:06,624 INFO L134 CoverageAnalysis]: Checked inductivity of 265 backedges. 8 proven. 60 refuted. 0 times theorem prover too weak. 197 trivial. 0 not checked. [2018-04-13 10:17:06,624 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:17:06,624 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15] total 15 [2018-04-13 10:17:06,625 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-04-13 10:17:06,625 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-04-13 10:17:06,625 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2018-04-13 10:17:06,625 INFO L87 Difference]: Start difference. First operand 537 states and 597 transitions. Second operand 16 states. [2018-04-13 10:17:07,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:07,397 INFO L93 Difference]: Finished difference Result 548 states and 606 transitions. [2018-04-13 10:17:07,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-04-13 10:17:07,397 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 138 [2018-04-13 10:17:07,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:07,398 INFO L225 Difference]: With dead ends: 548 [2018-04-13 10:17:07,398 INFO L226 Difference]: Without dead ends: 548 [2018-04-13 10:17:07,398 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 68 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=78, Invalid=428, Unknown=0, NotChecked=0, Total=506 [2018-04-13 10:17:07,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 548 states. [2018-04-13 10:17:07,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 548 to 537. [2018-04-13 10:17:07,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 537 states. [2018-04-13 10:17:07,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 537 states to 537 states and 596 transitions. [2018-04-13 10:17:07,401 INFO L78 Accepts]: Start accepts. Automaton has 537 states and 596 transitions. Word has length 138 [2018-04-13 10:17:07,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:07,401 INFO L459 AbstractCegarLoop]: Abstraction has 537 states and 596 transitions. [2018-04-13 10:17:07,401 INFO L460 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-04-13 10:17:07,402 INFO L276 IsEmpty]: Start isEmpty. Operand 537 states and 596 transitions. [2018-04-13 10:17:07,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-04-13 10:17:07,402 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:07,402 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 4, 4, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:07,402 INFO L408 AbstractCegarLoop]: === Iteration 104 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:07,402 INFO L82 PathProgramCache]: Analyzing trace with hash -615368946, now seen corresponding path program 5 times [2018-04-13 10:17:07,402 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:07,402 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:07,403 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:07,403 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:07,403 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:07,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:07,425 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:07,427 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:17:07,427 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:07,427 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:07,428 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:17:07,464 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2018-04-13 10:17:07,464 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:07,467 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:07,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:17:07,469 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,471 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,471 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:13 [2018-04-13 10:17:07,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:17:07,512 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,514 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,514 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:17:07,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:07,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:07,530 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,531 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,535 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,535 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:26, output treesize:22 [2018-04-13 10:17:07,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:17:07,561 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:17:07,562 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,564 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,569 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,569 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:31 [2018-04-13 10:17:07,597 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:17:07,598 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,599 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,600 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:17:07,600 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,606 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,611 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,612 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:43 [2018-04-13 10:17:07,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:17:07,649 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,650 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,650 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,651 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,651 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,651 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:17:07,652 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,661 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,667 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,667 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:59, output treesize:55 [2018-04-13 10:17:07,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 50 [2018-04-13 10:17:07,709 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,711 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,711 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,712 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,712 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,714 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 181 [2018-04-13 10:17:07,714 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,728 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,736 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,736 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:71, output treesize:67 [2018-04-13 10:17:07,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 60 [2018-04-13 10:17:07,789 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,790 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,790 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,791 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,791 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,792 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,792 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,793 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,793 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,794 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,794 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 259 [2018-04-13 10:17:07,797 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,816 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,826 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,826 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:83, output treesize:79 [2018-04-13 10:17:07,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 69 [2018-04-13 10:17:07,895 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,895 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,896 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,896 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,897 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,898 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,898 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,899 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,899 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,900 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,900 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,901 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,901 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,902 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,903 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,903 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,904 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,904 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,905 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,905 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,906 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:07,906 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 344 [2018-04-13 10:17:07,907 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,938 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:07,950 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:07,950 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:99, output treesize:95 [2018-04-13 10:17:08,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:08,103 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:08,103 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:08,104 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:08,107 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:08,107 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:26, output treesize:1 [2018-04-13 10:17:08,456 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 85 [2018-04-13 10:17:08,459 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,461 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,462 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,462 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,463 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,466 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,468 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,469 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,469 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,470 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,471 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,471 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,472 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,473 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,473 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,474 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,475 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,475 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,476 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,477 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,482 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 437 [2018-04-13 10:17:08,487 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,488 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,488 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,489 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,490 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,490 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,491 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,492 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,492 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,493 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,498 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,500 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,500 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,503 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:08,503 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,506 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:08,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 28 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 490 [2018-04-13 10:17:08,513 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:08,564 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:08,573 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:08,594 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:08,594 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:140, output treesize:129 [2018-04-13 10:17:09,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 100 treesize of output 82 [2018-04-13 10:17:09,072 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,072 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,073 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,074 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,074 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,075 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,075 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,076 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,077 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,077 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,082 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,083 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,083 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,084 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,085 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,085 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,086 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,087 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,087 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,088 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,088 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 28 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 354 [2018-04-13 10:17:09,089 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:09,118 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:09,128 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:09,128 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:143, output treesize:13 [2018-04-13 10:17:09,181 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:09,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:17:09,181 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:09,184 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:09,184 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:17:09,310 INFO L134 CoverageAnalysis]: Checked inductivity of 281 backedges. 43 proven. 229 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-04-13 10:17:09,310 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:17:09,310 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38] total 38 [2018-04-13 10:17:09,310 INFO L442 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-04-13 10:17:09,310 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-04-13 10:17:09,311 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=1363, Unknown=0, NotChecked=0, Total=1482 [2018-04-13 10:17:09,311 INFO L87 Difference]: Start difference. First operand 537 states and 596 transitions. Second operand 39 states. [2018-04-13 10:17:13,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:13,839 INFO L93 Difference]: Finished difference Result 545 states and 601 transitions. [2018-04-13 10:17:13,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-04-13 10:17:13,840 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 138 [2018-04-13 10:17:13,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:13,840 INFO L225 Difference]: With dead ends: 545 [2018-04-13 10:17:13,840 INFO L226 Difference]: Without dead ends: 545 [2018-04-13 10:17:13,841 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 101 SyntacticMatches, 0 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1313 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=411, Invalid=4991, Unknown=0, NotChecked=0, Total=5402 [2018-04-13 10:17:13,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 545 states. [2018-04-13 10:17:13,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 545 to 537. [2018-04-13 10:17:13,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 537 states. [2018-04-13 10:17:13,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 537 states to 537 states and 595 transitions. [2018-04-13 10:17:13,843 INFO L78 Accepts]: Start accepts. Automaton has 537 states and 595 transitions. Word has length 138 [2018-04-13 10:17:13,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:13,843 INFO L459 AbstractCegarLoop]: Abstraction has 537 states and 595 transitions. [2018-04-13 10:17:13,843 INFO L460 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-04-13 10:17:13,844 INFO L276 IsEmpty]: Start isEmpty. Operand 537 states and 595 transitions. [2018-04-13 10:17:13,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-04-13 10:17:13,844 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:13,844 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 5, 4, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:13,844 INFO L408 AbstractCegarLoop]: === Iteration 105 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:13,844 INFO L82 PathProgramCache]: Analyzing trace with hash -1896568069, now seen corresponding path program 5 times [2018-04-13 10:17:13,844 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:13,844 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:13,845 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:13,845 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:13,845 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:13,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:13,857 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:13,860 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:17:13,860 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:13,860 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:13,861 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:17:13,904 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2018-04-13 10:17:13,904 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:13,907 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:13,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:13,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:13,947 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:13,948 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:13,950 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:13,950 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:17:13,969 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:17:13,970 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:13,971 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:17:13,971 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:13,973 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:13,977 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:13,977 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:17:14,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:17:14,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,014 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,015 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:17:14,015 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,020 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,025 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,025 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:17:14,061 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:17:14,063 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,063 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,064 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,066 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,066 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:17:14,066 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,076 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,082 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,082 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:55, output treesize:51 [2018-04-13 10:17:14,126 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 50 [2018-04-13 10:17:14,128 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,128 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,129 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,130 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,130 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,131 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,131 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,132 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,133 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,133 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 181 [2018-04-13 10:17:14,134 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,147 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,154 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,154 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:67, output treesize:63 [2018-04-13 10:17:14,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 59 [2018-04-13 10:17:14,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,224 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,226 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,227 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,228 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,228 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,229 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,230 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,230 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,233 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 253 [2018-04-13 10:17:14,233 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,255 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,266 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:14,266 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:83, output treesize:79 [2018-04-13 10:17:14,385 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:14,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:14,387 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,391 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,394 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,394 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:26, output treesize:1 [2018-04-13 10:17:14,727 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 75 [2018-04-13 10:17:14,730 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,730 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,731 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,732 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,732 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,733 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,734 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,734 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,735 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,735 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,736 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,736 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,737 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,738 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,738 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,739 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,739 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,740 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,741 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,741 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,742 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 335 [2018-04-13 10:17:14,750 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,750 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,751 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,752 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,752 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,753 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,753 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,754 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,755 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,755 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,757 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,757 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,758 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,758 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,761 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,761 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,762 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:14,762 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,763 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:14,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 21 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 385 [2018-04-13 10:17:14,769 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,809 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,818 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:14,837 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:14,837 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:124, output treesize:113 [2018-04-13 10:17:15,334 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 72 [2018-04-13 10:17:15,337 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,337 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,338 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,339 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,339 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,340 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,340 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,341 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,342 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,342 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,343 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,344 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,344 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,345 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,346 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,346 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,347 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,347 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,348 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,348 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,349 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:15,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 21 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 262 [2018-04-13 10:17:15,349 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:15,368 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:15,376 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:15,377 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:122, output treesize:3 [2018-04-13 10:17:15,505 INFO L134 CoverageAnalysis]: Checked inductivity of 285 backedges. 27 proven. 249 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-04-13 10:17:15,505 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:17:15,505 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36] total 36 [2018-04-13 10:17:15,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-04-13 10:17:15,505 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-04-13 10:17:15,505 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=1217, Unknown=0, NotChecked=0, Total=1332 [2018-04-13 10:17:15,506 INFO L87 Difference]: Start difference. First operand 537 states and 595 transitions. Second operand 37 states. [2018-04-13 10:17:19,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:19,219 INFO L93 Difference]: Finished difference Result 544 states and 600 transitions. [2018-04-13 10:17:19,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-04-13 10:17:19,219 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 139 [2018-04-13 10:17:19,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:19,220 INFO L225 Difference]: With dead ends: 544 [2018-04-13 10:17:19,220 INFO L226 Difference]: Without dead ends: 544 [2018-04-13 10:17:19,220 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 104 SyntacticMatches, 0 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 878 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=257, Invalid=3283, Unknown=0, NotChecked=0, Total=3540 [2018-04-13 10:17:19,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 544 states. [2018-04-13 10:17:19,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 544 to 537. [2018-04-13 10:17:19,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 537 states. [2018-04-13 10:17:19,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 537 states to 537 states and 594 transitions. [2018-04-13 10:17:19,223 INFO L78 Accepts]: Start accepts. Automaton has 537 states and 594 transitions. Word has length 139 [2018-04-13 10:17:19,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:19,223 INFO L459 AbstractCegarLoop]: Abstraction has 537 states and 594 transitions. [2018-04-13 10:17:19,223 INFO L460 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-04-13 10:17:19,223 INFO L276 IsEmpty]: Start isEmpty. Operand 537 states and 594 transitions. [2018-04-13 10:17:19,223 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-04-13 10:17:19,223 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:19,223 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:19,223 INFO L408 AbstractCegarLoop]: === Iteration 106 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:19,224 INFO L82 PathProgramCache]: Analyzing trace with hash -108426269, now seen corresponding path program 4 times [2018-04-13 10:17:19,224 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:19,224 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:19,224 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:19,224 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:19,224 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:19,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:19,238 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:19,240 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:17:19,240 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:19,240 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:19,241 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:17:19,258 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:17:19,258 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:19,261 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:19,348 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:19,349 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:19,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 24 [2018-04-13 10:17:19,349 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,352 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,352 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:20, output treesize:18 [2018-04-13 10:17:19,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-13 10:17:19,373 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:19,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:19,379 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,380 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,383 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,383 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:33, output treesize:16 [2018-04-13 10:17:19,475 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-04-13 10:17:19,477 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:19,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-04-13 10:17:19,478 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,481 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,484 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,484 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:14 [2018-04-13 10:17:19,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:17:19,563 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,565 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,565 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:19, output treesize:14 [2018-04-13 10:17:19,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-04-13 10:17:19,569 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:19,569 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-04-13 10:17:19,570 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,572 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,576 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,576 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-04-13 10:17:19,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 23 [2018-04-13 10:17:19,608 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:19,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 13 [2018-04-13 10:17:19,609 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,611 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,612 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,612 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:10 [2018-04-13 10:17:19,628 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:19,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:17:19,628 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:19,631 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:19,631 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-13 10:17:19,666 INFO L134 CoverageAnalysis]: Checked inductivity of 350 backedges. 48 proven. 280 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-04-13 10:17:19,666 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:17:19,667 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-04-13 10:17:19,667 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-13 10:17:19,667 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-13 10:17:19,667 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=137, Invalid=855, Unknown=0, NotChecked=0, Total=992 [2018-04-13 10:17:19,667 INFO L87 Difference]: Start difference. First operand 537 states and 594 transitions. Second operand 32 states. [2018-04-13 10:17:20,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:20,584 INFO L93 Difference]: Finished difference Result 566 states and 622 transitions. [2018-04-13 10:17:20,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-04-13 10:17:20,585 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 142 [2018-04-13 10:17:20,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:20,585 INFO L225 Difference]: With dead ends: 566 [2018-04-13 10:17:20,585 INFO L226 Difference]: Without dead ends: 566 [2018-04-13 10:17:20,586 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 109 SyntacticMatches, 3 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 793 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=216, Invalid=1854, Unknown=0, NotChecked=0, Total=2070 [2018-04-13 10:17:20,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 566 states. [2018-04-13 10:17:20,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 566 to 535. [2018-04-13 10:17:20,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 535 states. [2018-04-13 10:17:20,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 535 states to 535 states and 592 transitions. [2018-04-13 10:17:20,588 INFO L78 Accepts]: Start accepts. Automaton has 535 states and 592 transitions. Word has length 142 [2018-04-13 10:17:20,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:20,588 INFO L459 AbstractCegarLoop]: Abstraction has 535 states and 592 transitions. [2018-04-13 10:17:20,588 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-13 10:17:20,588 INFO L276 IsEmpty]: Start isEmpty. Operand 535 states and 592 transitions. [2018-04-13 10:17:20,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-04-13 10:17:20,589 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:20,589 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 5, 5, 4, 4, 4, 4, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:20,589 INFO L408 AbstractCegarLoop]: === Iteration 107 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:20,589 INFO L82 PathProgramCache]: Analyzing trace with hash 1335932142, now seen corresponding path program 5 times [2018-04-13 10:17:20,589 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:20,589 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:20,590 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:20,590 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:20,590 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:20,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:20,601 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:20,603 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:17:20,603 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:20,603 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:20,604 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:17:20,649 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 13 check-sat command(s) [2018-04-13 10:17:20,649 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:20,653 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:20,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:20,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:20,688 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,688 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,691 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,691 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:17:20,711 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:17:20,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,713 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:17:20,713 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,716 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,720 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,720 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:17:20,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:17:20,748 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,749 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,749 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:17:20,750 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,755 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,760 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,760 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:17:20,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:17:20,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,809 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,810 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,811 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,811 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,812 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:17:20,813 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,823 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,831 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,831 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:55, output treesize:51 [2018-04-13 10:17:20,879 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 50 [2018-04-13 10:17:20,881 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,882 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,883 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,883 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,884 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,885 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,885 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,886 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,886 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,887 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,887 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 181 [2018-04-13 10:17:20,888 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,913 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,921 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:20,922 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:67, output treesize:63 [2018-04-13 10:17:20,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 59 [2018-04-13 10:17:20,996 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,997 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,998 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,998 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:20,999 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,000 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,000 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,001 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,003 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,003 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,004 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,004 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,005 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,006 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 253 [2018-04-13 10:17:21,007 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:21,032 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:21,043 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:21,043 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:83, output treesize:79 [2018-04-13 10:17:21,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:21,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:21,174 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:21,175 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:21,178 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:21,178 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:26, output treesize:1 [2018-04-13 10:17:21,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 75 [2018-04-13 10:17:21,531 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,531 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,532 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,533 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,533 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,534 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,535 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,535 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,536 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,537 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,537 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,538 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,539 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,539 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,540 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,541 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,541 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,542 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,542 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,543 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,544 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,548 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 335 [2018-04-13 10:17:21,552 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,553 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,554 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,554 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,555 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,556 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,556 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,557 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,558 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,558 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,559 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,559 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,560 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,561 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,561 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,562 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,562 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,563 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:21,563 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,564 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,564 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,565 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,566 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,566 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:21,572 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 21 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 421 [2018-04-13 10:17:21,572 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:21,613 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:21,621 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:21,639 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:21,639 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:124, output treesize:113 [2018-04-13 10:17:22,138 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 72 [2018-04-13 10:17:22,140 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,140 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,181 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,182 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,183 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,183 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:22,193 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 21 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 262 [2018-04-13 10:17:22,193 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:22,213 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:22,221 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:22,221 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:122, output treesize:3 [2018-04-13 10:17:22,352 INFO L134 CoverageAnalysis]: Checked inductivity of 289 backedges. 27 proven. 253 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-04-13 10:17:22,352 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:17:22,352 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36] total 36 [2018-04-13 10:17:22,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-04-13 10:17:22,353 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-04-13 10:17:22,353 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=1217, Unknown=0, NotChecked=0, Total=1332 [2018-04-13 10:17:22,353 INFO L87 Difference]: Start difference. First operand 535 states and 592 transitions. Second operand 37 states. [2018-04-13 10:17:26,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:26,050 INFO L93 Difference]: Finished difference Result 541 states and 597 transitions. [2018-04-13 10:17:26,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-04-13 10:17:26,050 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 140 [2018-04-13 10:17:26,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:26,051 INFO L225 Difference]: With dead ends: 541 [2018-04-13 10:17:26,051 INFO L226 Difference]: Without dead ends: 541 [2018-04-13 10:17:26,051 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 105 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 732 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=230, Invalid=2850, Unknown=0, NotChecked=0, Total=3080 [2018-04-13 10:17:26,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 541 states. [2018-04-13 10:17:26,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 541 to 535. [2018-04-13 10:17:26,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 535 states. [2018-04-13 10:17:26,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 535 states to 535 states and 591 transitions. [2018-04-13 10:17:26,053 INFO L78 Accepts]: Start accepts. Automaton has 535 states and 591 transitions. Word has length 140 [2018-04-13 10:17:26,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:26,053 INFO L459 AbstractCegarLoop]: Abstraction has 535 states and 591 transitions. [2018-04-13 10:17:26,053 INFO L460 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-04-13 10:17:26,053 INFO L276 IsEmpty]: Start isEmpty. Operand 535 states and 591 transitions. [2018-04-13 10:17:26,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-04-13 10:17:26,054 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:26,054 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 7, 6, 6, 6, 6, 6, 6, 6, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:26,054 INFO L408 AbstractCegarLoop]: === Iteration 108 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:26,054 INFO L82 PathProgramCache]: Analyzing trace with hash -696181446, now seen corresponding path program 3 times [2018-04-13 10:17:26,054 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:26,054 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:26,054 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:26,055 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:26,055 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:26,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:26,060 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:26,112 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:17:26,112 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:26,112 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:26,113 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:17:26,130 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2018-04-13 10:17:26,130 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:26,133 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:26,201 INFO L134 CoverageAnalysis]: Checked inductivity of 336 backedges. 0 proven. 132 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:17:26,201 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:17:26,201 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 18 [2018-04-13 10:17:26,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-13 10:17:26,202 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-13 10:17:26,202 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=197, Unknown=0, NotChecked=0, Total=306 [2018-04-13 10:17:26,202 INFO L87 Difference]: Start difference. First operand 535 states and 591 transitions. Second operand 18 states. [2018-04-13 10:17:26,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:26,246 INFO L93 Difference]: Finished difference Result 614 states and 665 transitions. [2018-04-13 10:17:26,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-13 10:17:26,247 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 139 [2018-04-13 10:17:26,247 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:26,247 INFO L225 Difference]: With dead ends: 614 [2018-04-13 10:17:26,247 INFO L226 Difference]: Without dead ends: 606 [2018-04-13 10:17:26,247 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 133 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=114, Invalid=228, Unknown=0, NotChecked=0, Total=342 [2018-04-13 10:17:26,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 606 states. [2018-04-13 10:17:26,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 606 to 559. [2018-04-13 10:17:26,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 559 states. [2018-04-13 10:17:26,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 559 states to 559 states and 625 transitions. [2018-04-13 10:17:26,251 INFO L78 Accepts]: Start accepts. Automaton has 559 states and 625 transitions. Word has length 139 [2018-04-13 10:17:26,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:26,251 INFO L459 AbstractCegarLoop]: Abstraction has 559 states and 625 transitions. [2018-04-13 10:17:26,251 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-13 10:17:26,251 INFO L276 IsEmpty]: Start isEmpty. Operand 559 states and 625 transitions. [2018-04-13 10:17:26,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2018-04-13 10:17:26,251 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:26,251 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 8, 8, 7, 7, 7, 7, 7, 7, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:26,251 INFO L408 AbstractCegarLoop]: === Iteration 109 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:26,252 INFO L82 PathProgramCache]: Analyzing trace with hash -1362307896, now seen corresponding path program 7 times [2018-04-13 10:17:26,252 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:26,252 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:26,252 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:26,252 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:26,252 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:26,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:26,265 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:26,270 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:17:26,270 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:26,270 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:26,271 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:17:26,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:26,294 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:26,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:26,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:26,366 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,367 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,370 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,370 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:26, output treesize:22 [2018-04-13 10:17:26,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:17:26,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:17:26,395 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,398 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,402 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,402 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:35, output treesize:31 [2018-04-13 10:17:26,432 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:17:26,434 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,434 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,435 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,435 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:17:26,435 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,440 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,445 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,446 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:43 [2018-04-13 10:17:26,493 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 39 [2018-04-13 10:17:26,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 113 [2018-04-13 10:17:26,498 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,508 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,516 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:26,516 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:63, output treesize:59 [2018-04-13 10:17:26,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:17:26,735 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,747 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:26,747 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 4 variables, input treesize:77, output treesize:72 [2018-04-13 10:17:26,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 45 [2018-04-13 10:17:26,914 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,914 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:26,915 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,916 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,916 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,917 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,917 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,918 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 82 [2018-04-13 10:17:26,918 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,925 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,933 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,933 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:88, output treesize:13 [2018-04-13 10:17:26,958 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:26,958 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:17:26,958 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,961 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:26,961 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:17:27,058 INFO L134 CoverageAnalysis]: Checked inductivity of 393 backedges. 7 proven. 384 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:17:27,059 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:17:27,059 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31] total 31 [2018-04-13 10:17:27,059 INFO L442 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-04-13 10:17:27,059 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-04-13 10:17:27,059 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=83, Invalid=909, Unknown=0, NotChecked=0, Total=992 [2018-04-13 10:17:27,059 INFO L87 Difference]: Start difference. First operand 559 states and 625 transitions. Second operand 32 states. [2018-04-13 10:17:29,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:29,060 INFO L93 Difference]: Finished difference Result 575 states and 642 transitions. [2018-04-13 10:17:29,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-04-13 10:17:29,061 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 140 [2018-04-13 10:17:29,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:29,061 INFO L225 Difference]: With dead ends: 575 [2018-04-13 10:17:29,061 INFO L226 Difference]: Without dead ends: 575 [2018-04-13 10:17:29,062 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 110 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 634 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=200, Invalid=2556, Unknown=0, NotChecked=0, Total=2756 [2018-04-13 10:17:29,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 575 states. [2018-04-13 10:17:29,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 575 to 565. [2018-04-13 10:17:29,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 565 states. [2018-04-13 10:17:29,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 565 states to 565 states and 632 transitions. [2018-04-13 10:17:29,064 INFO L78 Accepts]: Start accepts. Automaton has 565 states and 632 transitions. Word has length 140 [2018-04-13 10:17:29,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:29,064 INFO L459 AbstractCegarLoop]: Abstraction has 565 states and 632 transitions. [2018-04-13 10:17:29,064 INFO L460 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-04-13 10:17:29,064 INFO L276 IsEmpty]: Start isEmpty. Operand 565 states and 632 transitions. [2018-04-13 10:17:29,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-04-13 10:17:29,065 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:29,065 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:29,065 INFO L408 AbstractCegarLoop]: === Iteration 110 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:29,065 INFO L82 PathProgramCache]: Analyzing trace with hash -130779379, now seen corresponding path program 5 times [2018-04-13 10:17:29,065 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:29,065 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:29,066 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:29,066 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:17:29,066 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:29,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:29,078 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:29,135 INFO L134 CoverageAnalysis]: Checked inductivity of 327 backedges. 39 proven. 36 refuted. 0 times theorem prover too weak. 252 trivial. 0 not checked. [2018-04-13 10:17:29,135 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:29,135 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:29,136 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:17:29,176 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 15 check-sat command(s) [2018-04-13 10:17:29,176 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:29,181 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:29,432 INFO L134 CoverageAnalysis]: Checked inductivity of 327 backedges. 39 proven. 47 refuted. 0 times theorem prover too weak. 241 trivial. 0 not checked. [2018-04-13 10:17:29,432 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:17:29,432 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 16] total 24 [2018-04-13 10:17:29,432 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-04-13 10:17:29,432 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-04-13 10:17:29,432 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=459, Unknown=0, NotChecked=0, Total=552 [2018-04-13 10:17:29,432 INFO L87 Difference]: Start difference. First operand 565 states and 632 transitions. Second operand 24 states. [2018-04-13 10:17:29,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:29,789 INFO L93 Difference]: Finished difference Result 580 states and 647 transitions. [2018-04-13 10:17:29,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-04-13 10:17:29,789 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 143 [2018-04-13 10:17:29,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:29,790 INFO L225 Difference]: With dead ends: 580 [2018-04-13 10:17:29,790 INFO L226 Difference]: Without dead ends: 580 [2018-04-13 10:17:29,790 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 130 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 370 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=327, Invalid=1313, Unknown=0, NotChecked=0, Total=1640 [2018-04-13 10:17:29,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 580 states. [2018-04-13 10:17:29,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 580 to 565. [2018-04-13 10:17:29,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 565 states. [2018-04-13 10:17:29,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 565 states to 565 states and 632 transitions. [2018-04-13 10:17:29,795 INFO L78 Accepts]: Start accepts. Automaton has 565 states and 632 transitions. Word has length 143 [2018-04-13 10:17:29,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:29,795 INFO L459 AbstractCegarLoop]: Abstraction has 565 states and 632 transitions. [2018-04-13 10:17:29,795 INFO L460 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-04-13 10:17:29,795 INFO L276 IsEmpty]: Start isEmpty. Operand 565 states and 632 transitions. [2018-04-13 10:17:29,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-04-13 10:17:29,796 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:29,796 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 8, 8, 8, 7, 7, 7, 7, 7, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:29,796 INFO L408 AbstractCegarLoop]: === Iteration 111 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:29,796 INFO L82 PathProgramCache]: Analyzing trace with hash 718128257, now seen corresponding path program 8 times [2018-04-13 10:17:29,796 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:29,797 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:29,797 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:29,797 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:29,797 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:29,839 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:29,839 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:29,852 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:17:29,852 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:29,853 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:29,853 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:17:29,937 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:17:29,937 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:29,941 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:29,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:29,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:29,947 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:29,948 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:29,950 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:29,950 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:15 [2018-04-13 10:17:29,961 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:17:29,963 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:29,963 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:17:29,963 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:29,966 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:29,970 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:29,970 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:17:29,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:17:29,999 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:29,999 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:30,000 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:30,000 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:17:30,001 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:30,015 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:30,021 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:30,021 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:42 [2018-04-13 10:17:30,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2018-04-13 10:17:30,382 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:30,383 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:30,383 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:30,384 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:30,385 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:30,385 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:30,385 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 75 [2018-04-13 10:17:30,385 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:30,390 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:30,392 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:30,392 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:51, output treesize:3 [2018-04-13 10:17:30,451 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 91 proven. 200 refuted. 0 times theorem prover too weak. 109 trivial. 0 not checked. [2018-04-13 10:17:30,451 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:17:30,451 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-04-13 10:17:30,451 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-13 10:17:30,452 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-13 10:17:30,452 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=403, Unknown=0, NotChecked=0, Total=462 [2018-04-13 10:17:30,452 INFO L87 Difference]: Start difference. First operand 565 states and 632 transitions. Second operand 22 states. [2018-04-13 10:17:32,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:32,410 INFO L93 Difference]: Finished difference Result 576 states and 643 transitions. [2018-04-13 10:17:32,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-04-13 10:17:32,410 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 141 [2018-04-13 10:17:32,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:32,411 INFO L225 Difference]: With dead ends: 576 [2018-04-13 10:17:32,411 INFO L226 Difference]: Without dead ends: 576 [2018-04-13 10:17:32,411 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 120 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 476 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=194, Invalid=1786, Unknown=0, NotChecked=0, Total=1980 [2018-04-13 10:17:32,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 576 states. [2018-04-13 10:17:32,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 576 to 566. [2018-04-13 10:17:32,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 566 states. [2018-04-13 10:17:32,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 566 states to 566 states and 633 transitions. [2018-04-13 10:17:32,415 INFO L78 Accepts]: Start accepts. Automaton has 566 states and 633 transitions. Word has length 141 [2018-04-13 10:17:32,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:32,416 INFO L459 AbstractCegarLoop]: Abstraction has 566 states and 633 transitions. [2018-04-13 10:17:32,416 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-13 10:17:32,416 INFO L276 IsEmpty]: Start isEmpty. Operand 566 states and 633 transitions. [2018-04-13 10:17:32,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-04-13 10:17:32,416 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:32,417 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:32,417 INFO L408 AbstractCegarLoop]: === Iteration 112 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:32,417 INFO L82 PathProgramCache]: Analyzing trace with hash 1170474436, now seen corresponding path program 6 times [2018-04-13 10:17:32,417 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:32,417 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:32,418 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:32,418 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:32,418 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:32,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:32,440 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:32,444 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:17:32,444 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:32,444 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:32,444 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 10:17:32,480 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-04-13 10:17:32,480 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:32,484 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:32,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:17:32,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:32,558 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:32,560 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:32,564 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:32,564 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-04-13 10:17:32,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:17:32,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:32,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:17:32,607 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:32,611 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:32,617 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:17:32,617 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:41, output treesize:37 [2018-04-13 10:17:32,785 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 29 [2018-04-13 10:17:32,787 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:17:32,787 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:32,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 29 [2018-04-13 10:17:32,788 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:32,790 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:32,797 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:32,798 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:70, output treesize:13 [2018-04-13 10:17:32,813 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:32,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:17:32,814 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:32,817 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:32,817 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:17:32,865 INFO L134 CoverageAnalysis]: Checked inductivity of 274 backedges. 8 proven. 44 refuted. 0 times theorem prover too weak. 222 trivial. 0 not checked. [2018-04-13 10:17:32,866 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:17:32,866 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21] total 21 [2018-04-13 10:17:32,866 INFO L442 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-04-13 10:17:32,866 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-04-13 10:17:32,866 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=410, Unknown=0, NotChecked=0, Total=462 [2018-04-13 10:17:32,866 INFO L87 Difference]: Start difference. First operand 566 states and 633 transitions. Second operand 22 states. [2018-04-13 10:17:33,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:17:33,749 INFO L93 Difference]: Finished difference Result 612 states and 680 transitions. [2018-04-13 10:17:33,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-04-13 10:17:33,749 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 144 [2018-04-13 10:17:33,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:17:33,750 INFO L225 Difference]: With dead ends: 612 [2018-04-13 10:17:33,750 INFO L226 Difference]: Without dead ends: 612 [2018-04-13 10:17:33,750 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 123 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 288 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=177, Invalid=1383, Unknown=0, NotChecked=0, Total=1560 [2018-04-13 10:17:33,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 612 states. [2018-04-13 10:17:33,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 612 to 600. [2018-04-13 10:17:33,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 600 states. [2018-04-13 10:17:33,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 600 states to 600 states and 669 transitions. [2018-04-13 10:17:33,753 INFO L78 Accepts]: Start accepts. Automaton has 600 states and 669 transitions. Word has length 144 [2018-04-13 10:17:33,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:17:33,753 INFO L459 AbstractCegarLoop]: Abstraction has 600 states and 669 transitions. [2018-04-13 10:17:33,753 INFO L460 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-04-13 10:17:33,753 INFO L276 IsEmpty]: Start isEmpty. Operand 600 states and 669 transitions. [2018-04-13 10:17:33,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 145 [2018-04-13 10:17:33,754 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:17:33,754 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:17:33,754 INFO L408 AbstractCegarLoop]: === Iteration 113 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:17:33,754 INFO L82 PathProgramCache]: Analyzing trace with hash 1170474437, now seen corresponding path program 5 times [2018-04-13 10:17:33,754 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:17:33,754 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:17:33,755 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:33,755 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:17:33,755 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:17:33,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:17:33,763 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:17:33,765 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:17:33,765 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:17:33,765 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:17:33,765 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:17:33,801 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2018-04-13 10:17:33,801 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:17:33,805 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:17:33,827 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-04-13 10:17:33,827 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:33,829 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-04-13 10:17:33,829 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:33,847 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-04-13 10:17:33,848 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:33,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-04-13 10:17:33,867 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:33,884 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 3 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:17:33,885 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 5 variables, input treesize:50, output treesize:46 [2018-04-13 10:17:35,172 WARN L148 SmtUtils]: Spent 201ms on a formula simplification that was a NOOP. DAG size: 81 [2018-04-13 10:17:35,423 WARN L148 SmtUtils]: Spent 193ms on a formula simplification that was a NOOP. DAG size: 81 [2018-04-13 10:17:35,430 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 53 [2018-04-13 10:17:35,431 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:35,431 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:35,439 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:35,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 51 [2018-04-13 10:17:35,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:35,499 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:35,507 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:35,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 55 [2018-04-13 10:17:35,561 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:35,562 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:35,570 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:35,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 53 [2018-04-13 10:17:35,623 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:17:35,623 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:35,632 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:17:35,681 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 4 dim-2 vars, End of recursive call: 12 dim-0 vars, and 4 xjuncts. [2018-04-13 10:17:35,681 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 20 variables, input treesize:225, output treesize:229 [2018-04-13 10:17:35,947 WARN L148 SmtUtils]: Spent 199ms on a formula simplification that was a NOOP. DAG size: 87 [2018-04-13 10:17:36,237 WARN L148 SmtUtils]: Spent 217ms on a formula simplification that was a NOOP. DAG size: 86 [2018-04-13 10:17:36,712 WARN L148 SmtUtils]: Spent 201ms on a formula simplification that was a NOOP. DAG size: 86 [2018-04-13 10:17:37,050 WARN L148 SmtUtils]: Spent 249ms on a formula simplification that was a NOOP. DAG size: 92 [2018-04-13 10:17:37,740 WARN L148 SmtUtils]: Spent 596ms on a formula simplification that was a NOOP. DAG size: 100 [2018-04-13 10:17:37,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 77 [2018-04-13 10:17:37,746 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:37,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 79 [2018-04-13 10:17:37,909 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:38,070 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:38,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 66 [2018-04-13 10:17:38,070 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:38,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 77 [2018-04-13 10:17:38,221 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:38,374 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:38,374 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 64 [2018-04-13 10:17:38,375 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:38,522 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:38,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 66 [2018-04-13 10:17:38,522 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:38,671 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:38,671 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 68 [2018-04-13 10:17:38,672 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:38,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 76 treesize of output 75 [2018-04-13 10:17:38,806 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:38,936 INFO L267 ElimStorePlain]: Start of recursive call 1: 24 dim-0 vars, 8 dim-1 vars, End of recursive call: 24 dim-0 vars, and 8 xjuncts. [2018-04-13 10:17:38,936 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 32 variables, input treesize:633, output treesize:573 [2018-04-13 10:17:39,602 WARN L151 SmtUtils]: Spent 539ms on a formula simplification. DAG size of input: 158 DAG size of output 93 [2018-04-13 10:17:39,610 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:39,610 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:39,611 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 65 [2018-04-13 10:17:39,611 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:39,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:39,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:39,613 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 67 [2018-04-13 10:17:39,614 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:39,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:39,617 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:39,617 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 63 [2018-04-13 10:17:39,617 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:39,619 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:39,619 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:39,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 71 treesize of output 65 [2018-04-13 10:17:39,620 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:39,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 59 [2018-04-13 10:17:39,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 38 [2018-04-13 10:17:39,684 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:17:39,699 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:17:39,770 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 61 [2018-04-13 10:17:39,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 40 treesize of output 40 [2018-04-13 10:17:39,776 INFO L267 ElimStorePlain]: Start of recursive call 9: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:17:39,791 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:17:39,880 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-04-13 10:17:39,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 36 treesize of output 36 [2018-04-13 10:17:39,886 INFO L267 ElimStorePlain]: Start of recursive call 11: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:17:39,901 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:17:40,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 59 [2018-04-13 10:17:40,016 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 38 treesize of output 38 [2018-04-13 10:17:40,017 INFO L267 ElimStorePlain]: Start of recursive call 13: 2 dim-0 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:17:40,032 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:17:40,163 INFO L267 ElimStorePlain]: Start of recursive call 1: 13 dim-0 vars, 1 dim-1 vars, 4 dim-2 vars, End of recursive call: 36 dim-0 vars, and 8 xjuncts. [2018-04-13 10:17:40,163 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 18 variables, input treesize:285, output treesize:385 [2018-04-13 10:17:40,998 WARN L148 SmtUtils]: Spent 646ms on a formula simplification that was a NOOP. DAG size: 178 [2018-04-13 10:17:41,801 WARN L148 SmtUtils]: Spent 646ms on a formula simplification that was a NOOP. DAG size: 177 [2018-04-13 10:17:42,627 WARN L148 SmtUtils]: Spent 652ms on a formula simplification that was a NOOP. DAG size: 179 [2018-04-13 10:17:43,865 WARN L151 SmtUtils]: Spent 1087ms on a formula simplification. DAG size of input: 177 DAG size of output 177 [2018-04-13 10:17:44,117 WARN L148 SmtUtils]: Spent 124ms on a formula simplification that was a NOOP. DAG size: 97 [2018-04-13 10:17:44,127 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:44,128 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 86 [2018-04-13 10:17:44,131 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:44,132 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:44,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 66 [2018-04-13 10:17:44,136 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:17:44,174 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:17:44,308 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 77 [2018-04-13 10:17:44,308 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:44,433 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 72 [2018-04-13 10:17:44,433 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:44,434 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 68 [2018-04-13 10:17:44,434 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:44,552 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:44,552 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:44,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 72 [2018-04-13 10:17:44,553 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:44,681 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:44,682 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:44,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 74 [2018-04-13 10:17:44,682 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:44,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 69 [2018-04-13 10:17:44,803 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:44,919 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:44,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 81 [2018-04-13 10:17:44,922 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:44,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 45 treesize of output 66 [2018-04-13 10:17:44,928 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-04-13 10:17:44,959 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:17:45,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 74 [2018-04-13 10:17:45,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 44 [2018-04-13 10:17:45,116 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 2 xjuncts. [2018-04-13 10:17:45,145 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:17:45,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 73 treesize of output 68 [2018-04-13 10:17:45,331 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:45,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 60 [2018-04-13 10:17:45,332 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:45,510 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:45,511 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:45,511 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 93 [2018-04-13 10:17:45,515 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:45,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 5 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 47 treesize of output 68 [2018-04-13 10:17:45,520 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 2 xjuncts. [2018-04-13 10:17:45,555 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:17:45,757 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:45,757 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:45,758 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 68 [2018-04-13 10:17:45,758 INFO L267 ElimStorePlain]: Start of recursive call 18: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:45,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:45,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:45,760 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-04-13 10:17:45,760 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:45,956 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:45,957 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:45,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 66 [2018-04-13 10:17:45,957 INFO L267 ElimStorePlain]: Start of recursive call 20: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:45,959 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:45,959 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:17:45,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 62 [2018-04-13 10:17:45,960 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-04-13 10:17:46,150 INFO L267 ElimStorePlain]: Start of recursive call 1: 24 dim-0 vars, 12 dim-1 vars, End of recursive call: 40 dim-0 vars, and 8 xjuncts. [2018-04-13 10:17:46,150 INFO L202 ElimStorePlain]: Needed 21 recursive calls to eliminate 36 variables, input treesize:321, output treesize:469 [2018-04-13 10:17:46,662 WARN L151 SmtUtils]: Spent 173ms on a formula simplification. DAG size of input: 254 DAG size of output 63 [2018-04-13 10:17:47,863 INFO L134 CoverageAnalysis]: Checked inductivity of 274 backedges. 146 proven. 128 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-04-13 10:17:47,863 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:17:47,864 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45] total 45 [2018-04-13 10:17:47,864 INFO L442 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-04-13 10:17:47,864 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-04-13 10:17:47,864 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=1915, Unknown=0, NotChecked=0, Total=2070 [2018-04-13 10:17:47,864 INFO L87 Difference]: Start difference. First operand 600 states and 669 transitions. Second operand 46 states. [2018-04-13 10:17:48,330 WARN L151 SmtUtils]: Spent 133ms on a formula simplification. DAG size of input: 65 DAG size of output 51 [2018-04-13 10:17:48,667 WARN L151 SmtUtils]: Spent 239ms on a formula simplification. DAG size of input: 94 DAG size of output 70 [2018-04-13 10:17:53,539 WARN L151 SmtUtils]: Spent 986ms on a formula simplification. DAG size of input: 112 DAG size of output 112 [2018-04-13 10:17:54,760 WARN L151 SmtUtils]: Spent 521ms on a formula simplification. DAG size of input: 95 DAG size of output 90 [2018-04-13 10:17:55,913 WARN L151 SmtUtils]: Spent 801ms on a formula simplification. DAG size of input: 246 DAG size of output 100 [2018-04-13 10:17:57,121 WARN L151 SmtUtils]: Spent 961ms on a formula simplification. DAG size of input: 253 DAG size of output 105 [2018-04-13 10:17:57,993 WARN L151 SmtUtils]: Spent 712ms on a formula simplification. DAG size of input: 139 DAG size of output 100 [2018-04-13 10:17:58,693 WARN L151 SmtUtils]: Spent 597ms on a formula simplification. DAG size of input: 132 DAG size of output 98 [2018-04-13 10:18:01,012 WARN L151 SmtUtils]: Spent 2107ms on a formula simplification. DAG size of input: 210 DAG size of output 184 [2018-04-13 10:18:02,988 WARN L151 SmtUtils]: Spent 1754ms on a formula simplification. DAG size of input: 207 DAG size of output 182 [2018-04-13 10:18:03,834 WARN L151 SmtUtils]: Spent 397ms on a formula simplification. DAG size of input: 183 DAG size of output 98 [2018-04-13 10:18:04,143 WARN L151 SmtUtils]: Spent 183ms on a formula simplification. DAG size of input: 78 DAG size of output 69 [2018-04-13 10:18:04,699 WARN L148 SmtUtils]: Spent 251ms on a formula simplification that was a NOOP. DAG size: 101 [2018-04-13 10:18:05,134 WARN L148 SmtUtils]: Spent 259ms on a formula simplification that was a NOOP. DAG size: 104 [2018-04-13 10:18:05,639 WARN L148 SmtUtils]: Spent 298ms on a formula simplification that was a NOOP. DAG size: 101 [2018-04-13 10:18:06,042 WARN L148 SmtUtils]: Spent 223ms on a formula simplification that was a NOOP. DAG size: 102 [2018-04-13 10:18:06,814 WARN L148 SmtUtils]: Spent 278ms on a formula simplification that was a NOOP. DAG size: 103 [2018-04-13 10:18:08,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:18:08,173 INFO L93 Difference]: Finished difference Result 660 states and 737 transitions. [2018-04-13 10:18:08,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-04-13 10:18:08,173 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 144 [2018-04-13 10:18:08,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:18:08,173 INFO L225 Difference]: With dead ends: 660 [2018-04-13 10:18:08,174 INFO L226 Difference]: Without dead ends: 660 [2018-04-13 10:18:08,174 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1584 ImplicationChecksByTransitivity, 23.6s TimeCoverageRelationStatistics Valid=470, Invalid=5850, Unknown=0, NotChecked=0, Total=6320 [2018-04-13 10:18:08,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 660 states. [2018-04-13 10:18:08,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 660 to 641. [2018-04-13 10:18:08,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 641 states. [2018-04-13 10:18:08,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 641 states to 641 states and 727 transitions. [2018-04-13 10:18:08,177 INFO L78 Accepts]: Start accepts. Automaton has 641 states and 727 transitions. Word has length 144 [2018-04-13 10:18:08,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:18:08,177 INFO L459 AbstractCegarLoop]: Abstraction has 641 states and 727 transitions. [2018-04-13 10:18:08,177 INFO L460 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-04-13 10:18:08,177 INFO L276 IsEmpty]: Start isEmpty. Operand 641 states and 727 transitions. [2018-04-13 10:18:08,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-04-13 10:18:08,177 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:18:08,178 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 8, 8, 8, 8, 7, 7, 7, 7, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:18:08,178 INFO L408 AbstractCegarLoop]: === Iteration 114 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:18:08,178 INFO L82 PathProgramCache]: Analyzing trace with hash 787139624, now seen corresponding path program 7 times [2018-04-13 10:18:08,178 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:18:08,178 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:18:08,178 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:18:08,178 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:18:08,178 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:18:08,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:18:08,191 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:18:08,193 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:18:08,193 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:18:08,193 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:18:08,194 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:18:08,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:18:08,218 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:18:08,292 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:18:08,293 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:18:08,293 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:08,294 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:08,297 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:08,298 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:18:08,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:18:08,324 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:08,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:18:08,324 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:08,327 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:08,331 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:08,331 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:18:08,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-04-13 10:18:08,370 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:08,371 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:08,372 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:08,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 64 [2018-04-13 10:18:08,373 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:08,384 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:08,390 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:18:08,390 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:47, output treesize:43 [2018-04-13 10:18:08,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2018-04-13 10:18:08,776 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:18:08,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:08,778 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:08,779 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:08,779 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 49 [2018-04-13 10:18:08,779 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:08,784 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:08,790 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:08,790 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:67, output treesize:3 [2018-04-13 10:18:08,872 INFO L134 CoverageAnalysis]: Checked inductivity of 407 backedges. 3 proven. 402 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:18:08,872 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:18:08,872 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30] total 30 [2018-04-13 10:18:08,872 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-04-13 10:18:08,872 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-04-13 10:18:08,872 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=854, Unknown=0, NotChecked=0, Total=930 [2018-04-13 10:18:08,872 INFO L87 Difference]: Start difference. First operand 641 states and 727 transitions. Second operand 31 states. [2018-04-13 10:18:10,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:18:10,692 INFO L93 Difference]: Finished difference Result 650 states and 736 transitions. [2018-04-13 10:18:10,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-13 10:18:10,693 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 142 [2018-04-13 10:18:10,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:18:10,695 INFO L225 Difference]: With dead ends: 650 [2018-04-13 10:18:10,695 INFO L226 Difference]: Without dead ends: 650 [2018-04-13 10:18:10,695 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 162 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 575 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=179, Invalid=2371, Unknown=0, NotChecked=0, Total=2550 [2018-04-13 10:18:10,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 650 states. [2018-04-13 10:18:10,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 650 to 642. [2018-04-13 10:18:10,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 642 states. [2018-04-13 10:18:10,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 642 states to 642 states and 728 transitions. [2018-04-13 10:18:10,701 INFO L78 Accepts]: Start accepts. Automaton has 642 states and 728 transitions. Word has length 142 [2018-04-13 10:18:10,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:18:10,702 INFO L459 AbstractCegarLoop]: Abstraction has 642 states and 728 transitions. [2018-04-13 10:18:10,702 INFO L460 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-04-13 10:18:10,702 INFO L276 IsEmpty]: Start isEmpty. Operand 642 states and 728 transitions. [2018-04-13 10:18:10,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 146 [2018-04-13 10:18:10,702 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:18:10,703 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:18:10,703 INFO L408 AbstractCegarLoop]: === Iteration 115 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:18:10,703 INFO L82 PathProgramCache]: Analyzing trace with hash 1924969221, now seen corresponding path program 6 times [2018-04-13 10:18:10,703 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:18:10,703 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:18:10,704 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:18:10,704 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:18:10,704 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:18:10,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:18:10,724 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:18:10,729 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:18:10,729 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:18:10,729 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:18:10,729 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 10:18:10,818 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-04-13 10:18:10,818 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:18:10,823 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:18:10,867 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:18:10,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:18:10,868 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:10,869 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:10,872 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:10,872 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-04-13 10:18:10,894 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:18:10,895 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:10,895 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:18:10,896 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:10,899 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:10,903 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:10,903 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-04-13 10:18:10,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:18:10,934 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:10,935 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:10,935 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:10,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:18:10,936 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:10,941 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:10,947 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:10,947 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:42 [2018-04-13 10:18:10,989 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 39 [2018-04-13 10:18:10,990 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:10,991 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:10,992 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:10,992 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:10,993 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:10,993 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:10,994 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 113 [2018-04-13 10:18:10,994 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:11,004 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:11,013 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:18:11,013 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:62, output treesize:58 [2018-04-13 10:18:11,073 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 48 [2018-04-13 10:18:11,075 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,076 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,077 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,077 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 171 [2018-04-13 10:18:11,082 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:11,098 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:11,110 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:18:11,110 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:78, output treesize:74 [2018-04-13 10:18:11,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 57 [2018-04-13 10:18:11,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,196 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 241 [2018-04-13 10:18:11,197 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:11,218 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:11,231 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:18:11,231 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:94, output treesize:90 [2018-04-13 10:18:11,326 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 66 [2018-04-13 10:18:11,328 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,329 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,329 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,330 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,331 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,331 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,332 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,333 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,334 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,334 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,335 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,336 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,336 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,337 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,338 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,339 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,339 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,340 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,341 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,341 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,342 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 323 [2018-04-13 10:18:11,343 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:11,381 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:11,397 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-04-13 10:18:11,397 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:110, output treesize:106 [2018-04-13 10:18:11,596 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 75 [2018-04-13 10:18:11,598 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,599 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,600 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,600 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,601 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,601 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,602 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,603 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,603 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,604 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,605 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,606 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,607 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,608 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,609 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,609 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,610 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,611 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,612 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,614 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,615 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:11,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 417 [2018-04-13 10:18:11,616 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:11,664 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:11,684 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 1 xjuncts. [2018-04-13 10:18:11,685 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:126, output treesize:122 [2018-04-13 10:18:12,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:18:12,430 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:18:12,431 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:12,431 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:12,433 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:12,433 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:19, output treesize:1 [2018-04-13 10:18:12,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 19 [2018-04-13 10:18:12,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 22 [2018-04-13 10:18:12,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 22 treesize of output 35 [2018-04-13 10:18:12,544 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:18:12,550 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:18:12,556 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:18:12,569 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:12,570 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:31, output treesize:1 [2018-04-13 10:18:12,959 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 105 [2018-04-13 10:18:12,962 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,963 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,964 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,965 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,966 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,966 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,967 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,968 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,969 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,970 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,971 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,971 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,972 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,973 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,973 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,974 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,975 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,976 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,976 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,977 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,978 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,979 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,979 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,980 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,981 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,982 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,982 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,983 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,984 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,984 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,985 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,986 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,986 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,987 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,988 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,988 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:12,995 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 531 [2018-04-13 10:18:13,001 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,002 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,003 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,004 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,005 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,005 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,006 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,007 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,008 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,008 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,009 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,010 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,011 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,011 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,014 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,014 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,015 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,016 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,016 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,017 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,018 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,019 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,020 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,020 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,028 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,031 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,033 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,034 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,035 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 44 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 107 treesize of output 640 [2018-04-13 10:18:13,094 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,098 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,099 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,102 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,106 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,108 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,109 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,111 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,114 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,116 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,118 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,120 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,125 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,126 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,128 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,130 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,132 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,134 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,137 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,143 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,145 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,152 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,154 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,164 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,166 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,167 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,169 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,173 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,174 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,177 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,180 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,182 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,198 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,200 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,202 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,205 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,212 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,216 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,218 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,221 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,292 INFO L303 Elim1Store]: Index analysis took 205 ms [2018-04-13 10:18:13,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 52 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 5 case distinctions, treesize of input 628 treesize of output 765 [2018-04-13 10:18:13,356 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,358 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,359 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,360 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,361 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,362 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,364 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,366 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,367 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,369 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,370 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,372 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,373 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,375 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,376 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,377 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,379 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,380 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,382 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,384 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,384 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,386 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,387 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,389 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,391 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,396 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,398 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,399 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,401 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,403 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,404 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,406 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,407 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,409 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,411 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,412 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,415 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,417 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,419 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,420 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,421 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,422 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,423 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,425 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,427 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,429 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,431 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,433 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,433 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,434 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,435 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:13,460 INFO L303 Elim1Store]: Index analysis took 109 ms [2018-04-13 10:18:13,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 739 treesize of output 889 [2018-04-13 10:18:13,461 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:14,678 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,680 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,681 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,683 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,684 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,686 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,687 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,688 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,689 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,691 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,692 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,693 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,694 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,695 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,696 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,697 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,698 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,699 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,700 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,702 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,704 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,705 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,707 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,708 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,709 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,712 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,714 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,715 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,716 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,718 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,719 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,721 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,722 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,723 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,724 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,725 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,726 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,727 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,728 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,730 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,731 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,732 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,733 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,734 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,736 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,737 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,739 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,740 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,741 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,744 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,745 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,746 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:14,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 54 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 125 treesize of output 794 [2018-04-13 10:18:14,777 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:18:15,452 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,453 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,455 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,456 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,457 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,458 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,459 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,461 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,462 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,463 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,466 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,468 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,469 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,470 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,471 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,473 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,474 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,475 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,475 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,476 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,477 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,478 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,479 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,480 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,482 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,485 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,486 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,487 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,488 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,489 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,490 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,491 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,492 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,493 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,494 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,498 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,503 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,506 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,507 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,508 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,509 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,510 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:15,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 53 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 116 treesize of output 773 [2018-04-13 10:18:15,541 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-04-13 10:18:16,124 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,126 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,127 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,129 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,130 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,131 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,132 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,134 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,135 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,136 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,138 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,139 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,141 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,142 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,143 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,144 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,146 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,147 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,148 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,149 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,150 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,152 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,154 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,156 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,158 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,162 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,163 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,165 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,166 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,167 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,168 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,169 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,170 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,172 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,173 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,174 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,176 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,180 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,181 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,182 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,196 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,197 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,199 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,200 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,201 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,204 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,205 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,206 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,207 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,209 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,210 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,225 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:18:16,244 INFO L303 Elim1Store]: Index analysis took 124 ms [2018-04-13 10:18:16,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 62 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 114 treesize of output 891 [2018-04-13 10:18:16,261 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-04-13 10:18:16,784 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,786 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,787 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,788 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,789 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,790 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,791 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,793 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,794 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,797 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,798 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,799 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,800 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,801 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,802 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,803 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,804 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,805 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,806 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,807 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,811 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,814 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,815 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,817 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,818 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,819 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,821 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,822 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,823 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,824 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,824 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,825 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,826 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,828 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,829 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,833 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,835 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,836 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,837 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,839 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,847 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,848 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,849 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,850 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,852 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,853 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,854 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,855 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,856 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,857 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,860 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,861 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,862 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,864 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,865 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,866 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,867 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,868 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,870 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,871 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:16,903 INFO L303 Elim1Store]: Index analysis took 123 ms [2018-04-13 10:18:16,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 62 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 5 case distinctions, treesize of input 111 treesize of output 877 [2018-04-13 10:18:16,920 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-04-13 10:18:17,492 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,493 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,495 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,497 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,498 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,498 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,499 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,501 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,502 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,503 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,504 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,506 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,507 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,508 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,509 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,510 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,511 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,511 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,513 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,514 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,517 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,518 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,519 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,520 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,521 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,522 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,523 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,524 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,525 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,526 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,527 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,528 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,529 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,530 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,530 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,531 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,532 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,533 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,534 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,535 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:17,536 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 666 [2018-04-13 10:18:17,537 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:17,878 INFO L267 ElimStorePlain]: Start of recursive call 5: 8 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-04-13 10:18:18,109 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,112 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,114 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,115 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,117 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,118 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,120 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,121 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,123 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,125 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,127 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,129 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,130 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,131 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,132 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,133 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,135 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,137 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,138 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,140 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,142 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,144 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,145 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,149 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,151 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,152 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,154 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,157 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,158 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,160 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,161 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,163 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,164 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,166 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,168 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,169 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,171 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,172 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,174 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,176 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,177 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,178 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,181 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 44 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 111 treesize of output 644 [2018-04-13 10:18:18,233 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,234 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,236 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,238 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,240 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,242 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,243 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,244 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,246 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,247 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,249 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,251 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,252 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,253 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,254 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,256 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,257 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,259 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,261 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,262 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,267 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,269 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,270 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,272 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,273 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,274 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,276 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,278 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,284 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,286 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,288 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,289 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,291 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,292 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,293 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,295 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,304 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,306 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,308 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,309 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,311 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,312 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,314 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,317 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,341 INFO L303 Elim1Store]: Index analysis took 114 ms [2018-04-13 10:18:18,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 54 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 632 treesize of output 770 [2018-04-13 10:18:18,345 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:18,686 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,687 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,688 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,689 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,690 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,691 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,692 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,693 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,694 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,695 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,697 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,697 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,698 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,699 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,700 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,701 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,702 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,703 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,704 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,705 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,706 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,707 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,708 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,709 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,711 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,713 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,714 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,715 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,716 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,717 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,718 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,719 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,720 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,721 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,721 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,722 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,723 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,724 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,725 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,726 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,728 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,729 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,730 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,730 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:18,731 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 115 treesize of output 663 [2018-04-13 10:18:18,732 INFO L267 ElimStorePlain]: Start of recursive call 14: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:18,869 INFO L267 ElimStorePlain]: Start of recursive call 12: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:18:19,007 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 6 xjuncts. [2018-04-13 10:18:19,210 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 6 xjuncts. [2018-04-13 10:18:19,328 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 6 xjuncts. [2018-04-13 10:18:19,482 INFO L267 ElimStorePlain]: Start of recursive call 1: 13 dim-0 vars, 1 dim-2 vars, End of recursive call: 54 dim-0 vars, and 6 xjuncts. [2018-04-13 10:18:19,482 INFO L202 ElimStorePlain]: Needed 14 recursive calls to eliminate 14 variables, input treesize:177, output treesize:936 [2018-04-13 10:18:31,344 WARN L151 SmtUtils]: Spent 5401ms on a formula simplification. DAG size of input: 406 DAG size of output 145 [2018-04-13 10:18:32,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 144 treesize of output 122 [2018-04-13 10:18:32,223 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,224 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,225 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,226 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,226 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,227 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,227 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,228 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,228 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,229 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,229 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,230 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,233 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,233 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,234 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,235 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,235 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,236 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,236 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,237 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,238 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,238 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,239 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,239 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,240 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,240 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,241 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,241 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,242 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,243 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,243 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,244 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,244 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,245 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,245 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,246 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,246 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,247 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,247 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,248 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 400 [2018-04-13 10:18:32,249 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:32,329 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:32,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 144 treesize of output 122 [2018-04-13 10:18:32,371 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,372 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,372 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,373 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,373 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,374 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,375 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,375 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,376 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,376 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,377 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,377 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,378 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,378 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,379 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,380 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,380 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,381 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,381 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,382 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,382 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,383 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,383 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,384 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,385 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,385 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,386 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,386 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,387 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,387 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,388 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,389 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,389 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,390 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,390 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,391 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,391 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:18:32,396 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 400 [2018-04-13 10:18:32,396 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:18:32,485 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:32,508 INFO L267 ElimStorePlain]: Start of recursive call 1: 20 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:18:32,508 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 22 variables, input treesize:289, output treesize:3 [2018-04-13 10:18:32,726 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 54 proven. 200 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-04-13 10:18:32,726 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:18:32,727 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41] total 41 [2018-04-13 10:18:32,727 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-04-13 10:18:32,727 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-04-13 10:18:32,727 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=1556, Unknown=1, NotChecked=0, Total=1722 [2018-04-13 10:18:32,727 INFO L87 Difference]: Start difference. First operand 642 states and 728 transitions. Second operand 42 states. [2018-04-13 10:18:44,867 WARN L151 SmtUtils]: Spent 274ms on a formula simplification. DAG size of input: 74 DAG size of output 67 [2018-04-13 10:18:53,814 WARN L151 SmtUtils]: Spent 197ms on a formula simplification. DAG size of input: 71 DAG size of output 70 [2018-04-13 10:19:18,641 WARN L151 SmtUtils]: Spent 671ms on a formula simplification. DAG size of input: 155 DAG size of output 88 [2018-04-13 10:19:19,149 WARN L148 SmtUtils]: Spent 225ms on a formula simplification that was a NOOP. DAG size: 220 [2018-04-13 10:19:19,575 WARN L148 SmtUtils]: Spent 211ms on a formula simplification that was a NOOP. DAG size: 222 [2018-04-13 10:19:19,870 WARN L148 SmtUtils]: Spent 105ms on a formula simplification that was a NOOP. DAG size: 150 [2018-04-13 10:19:20,141 WARN L148 SmtUtils]: Spent 111ms on a formula simplification that was a NOOP. DAG size: 152 [2018-04-13 10:19:21,806 WARN L148 SmtUtils]: Spent 106ms on a formula simplification that was a NOOP. DAG size: 153 [2018-04-13 10:19:29,109 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:19:29,109 INFO L93 Difference]: Finished difference Result 649 states and 733 transitions. [2018-04-13 10:19:29,110 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-04-13 10:19:29,110 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 145 [2018-04-13 10:19:29,110 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:19:29,111 INFO L225 Difference]: With dead ends: 649 [2018-04-13 10:19:29,112 INFO L226 Difference]: Without dead ends: 649 [2018-04-13 10:19:29,112 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 173 GetRequests, 104 SyntacticMatches, 0 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1126 ImplicationChecksByTransitivity, 37.8s TimeCoverageRelationStatistics Valid=457, Invalid=4508, Unknown=5, NotChecked=0, Total=4970 [2018-04-13 10:19:29,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 649 states. [2018-04-13 10:19:29,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 649 to 642. [2018-04-13 10:19:29,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 642 states. [2018-04-13 10:19:29,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 642 states to 642 states and 727 transitions. [2018-04-13 10:19:29,116 INFO L78 Accepts]: Start accepts. Automaton has 642 states and 727 transitions. Word has length 145 [2018-04-13 10:19:29,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:19:29,116 INFO L459 AbstractCegarLoop]: Abstraction has 642 states and 727 transitions. [2018-04-13 10:19:29,116 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-04-13 10:19:29,117 INFO L276 IsEmpty]: Start isEmpty. Operand 642 states and 727 transitions. [2018-04-13 10:19:29,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-04-13 10:19:29,117 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:19:29,117 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:19:29,117 INFO L408 AbstractCegarLoop]: === Iteration 116 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:19:29,117 INFO L82 PathProgramCache]: Analyzing trace with hash 1632786351, now seen corresponding path program 6 times [2018-04-13 10:19:29,117 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:19:29,118 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:19:29,118 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:29,118 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:19:29,118 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:29,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:29,137 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:19:29,140 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:19:29,141 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:19:29,141 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:19:29,141 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 10:19:29,160 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2018-04-13 10:19:29,160 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:19:29,162 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:19:29,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:19:29,175 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:19:29,175 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,176 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,177 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,177 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-04-13 10:19:29,244 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 40 treesize of output 50 [2018-04-13 10:19:29,246 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:29,247 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 53 [2018-04-13 10:19:29,248 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,278 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:29,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 36 treesize of output 65 [2018-04-13 10:19:29,286 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:19:29,302 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:19:29,313 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 2 xjuncts. [2018-04-13 10:19:29,314 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 5 variables, input treesize:40, output treesize:38 [2018-04-13 10:19:29,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:19:29,380 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:29,381 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:19:29,381 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,384 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,386 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,386 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:12 [2018-04-13 10:19:29,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:19:29,478 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:29,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:19:29,479 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,490 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,493 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,493 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-04-13 10:19:29,593 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:19:29,594 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 51 [2018-04-13 10:19:29,595 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:29,596 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:29,597 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:29,597 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:29,598 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:19:29,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 100 [2018-04-13 10:19:29,598 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,606 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,610 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,610 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:36 [2018-04-13 10:19:29,641 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 39 [2018-04-13 10:19:29,643 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:29,643 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:29,644 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:29,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 44 [2018-04-13 10:19:29,645 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,648 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,649 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:29,649 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:47, output treesize:3 [2018-04-13 10:19:29,700 INFO L134 CoverageAnalysis]: Checked inductivity of 359 backedges. 78 proven. 66 refuted. 0 times theorem prover too weak. 215 trivial. 0 not checked. [2018-04-13 10:19:29,701 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:19:29,701 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20] total 20 [2018-04-13 10:19:29,701 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-04-13 10:19:29,701 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-04-13 10:19:29,701 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2018-04-13 10:19:29,701 INFO L87 Difference]: Start difference. First operand 642 states and 727 transitions. Second operand 21 states. [2018-04-13 10:19:31,420 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:19:31,420 INFO L93 Difference]: Finished difference Result 754 states and 847 transitions. [2018-04-13 10:19:31,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-04-13 10:19:31,421 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 147 [2018-04-13 10:19:31,421 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:19:31,421 INFO L225 Difference]: With dead ends: 754 [2018-04-13 10:19:31,421 INFO L226 Difference]: Without dead ends: 754 [2018-04-13 10:19:31,422 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 199 GetRequests, 136 SyntacticMatches, 4 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 831 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=574, Invalid=3086, Unknown=0, NotChecked=0, Total=3660 [2018-04-13 10:19:31,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 754 states. [2018-04-13 10:19:31,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 754 to 654. [2018-04-13 10:19:31,425 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 654 states. [2018-04-13 10:19:31,425 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 654 states to 654 states and 740 transitions. [2018-04-13 10:19:31,425 INFO L78 Accepts]: Start accepts. Automaton has 654 states and 740 transitions. Word has length 147 [2018-04-13 10:19:31,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:19:31,425 INFO L459 AbstractCegarLoop]: Abstraction has 654 states and 740 transitions. [2018-04-13 10:19:31,425 INFO L460 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-04-13 10:19:31,426 INFO L276 IsEmpty]: Start isEmpty. Operand 654 states and 740 transitions. [2018-04-13 10:19:31,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-04-13 10:19:31,426 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:19:31,426 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:19:31,426 INFO L408 AbstractCegarLoop]: === Iteration 117 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, 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ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:19:31,426 INFO L82 PathProgramCache]: Analyzing trace with hash -455496156, now seen corresponding path program 6 times [2018-04-13 10:19:31,426 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:19:31,426 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:19:31,427 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:31,427 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:19:31,427 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:31,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:31,438 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:19:31,443 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:19:31,443 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:19:31,443 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:19:31,443 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 10:19:31,499 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 14 check-sat command(s) [2018-04-13 10:19:31,499 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:19:31,502 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:19:31,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:19:31,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:19:31,558 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,560 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,564 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,564 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-04-13 10:19:31,588 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 22 [2018-04-13 10:19:31,589 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 35 [2018-04-13 10:19:31,589 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,593 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,598 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:31,598 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:37 [2018-04-13 10:19:31,636 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 32 [2018-04-13 10:19:31,638 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,638 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,639 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,639 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 73 [2018-04-13 10:19:31,639 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,645 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:31,652 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:53, output treesize:49 [2018-04-13 10:19:31,707 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 42 [2018-04-13 10:19:31,709 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,710 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,711 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,711 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,712 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 125 [2018-04-13 10:19:31,712 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,722 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,730 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:31,730 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:65, output treesize:61 [2018-04-13 10:19:31,794 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 52 [2018-04-13 10:19:31,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,797 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,797 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,798 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,799 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,799 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,800 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,801 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 191 [2018-04-13 10:19:31,801 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,816 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,825 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:31,825 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:77, output treesize:73 [2018-04-13 10:19:31,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 62 [2018-04-13 10:19:31,892 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,892 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,893 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,893 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,893 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,894 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,894 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,895 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,895 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,896 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,897 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,897 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,898 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,898 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,899 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:31,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 271 [2018-04-13 10:19:31,899 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,920 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:31,930 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:31,930 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:89, output treesize:85 [2018-04-13 10:19:32,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 87 treesize of output 72 [2018-04-13 10:19:32,016 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,016 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,017 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,017 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,018 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,018 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,019 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,020 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,020 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,027 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 365 [2018-04-13 10:19:32,027 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:32,064 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:32,077 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:32,077 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:101, output treesize:97 [2018-04-13 10:19:32,188 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 98 treesize of output 81 [2018-04-13 10:19:32,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,196 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,196 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,197 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,198 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,198 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,199 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,199 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,200 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,200 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,201 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,201 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,202 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,203 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,203 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,204 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,204 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,205 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 81 treesize of output 465 [2018-04-13 10:19:32,205 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:32,250 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:32,265 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:32,265 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:117, output treesize:113 [2018-04-13 10:19:32,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-04-13 10:19:32,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-04-13 10:19:32,460 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:32,461 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:32,465 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:32,465 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:27, output treesize:1 [2018-04-13 10:19:32,553 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 21 [2018-04-13 10:19:32,554 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 24 [2018-04-13 10:19:32,555 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:32,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 39 [2018-04-13 10:19:32,556 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:32,559 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:32,562 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:32,566 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:32,566 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 6 variables, input treesize:35, output treesize:1 [2018-04-13 10:19:32,856 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 105 [2018-04-13 10:19:32,859 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,017 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,018 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,018 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,019 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,020 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,028 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,028 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,031 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,031 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,032 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,033 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,033 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,034 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,035 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,035 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,036 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,037 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,037 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,038 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,038 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,039 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,044 INFO L303 Elim1Store]: Index analysis took 187 ms [2018-04-13 10:19:33,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 105 treesize of output 579 [2018-04-13 10:19:33,051 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,051 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,052 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,052 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,053 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,053 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,054 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,054 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,055 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,056 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,064 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,066 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,066 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,067 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,068 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,068 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,069 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,069 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,070 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,071 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,071 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,072 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,073 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,073 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,074 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,074 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,075 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,076 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,076 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,077 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,077 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,078 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,082 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,082 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,083 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,084 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,084 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,085 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,092 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 107 treesize of output 703 [2018-04-13 10:19:33,099 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,099 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,100 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,101 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,101 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,102 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,103 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,103 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,104 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,105 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,106 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,106 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,107 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,107 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,108 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,109 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,109 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,110 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,110 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,111 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,111 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,112 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,112 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,113 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,114 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,114 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,115 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,115 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,116 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,117 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,117 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,118 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,118 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,119 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,120 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,120 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,121 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,121 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,122 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,123 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,124 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,124 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,125 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,126 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 109 treesize of output 711 [2018-04-13 10:19:33,135 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:33,216 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:33,285 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:33,297 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:33,321 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:33,322 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 7 variables, input treesize:156, output treesize:149 [2018-04-13 10:19:33,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 91 [2018-04-13 10:19:33,860 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,860 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,861 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,861 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,862 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,863 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,863 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,864 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,864 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,865 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,866 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,866 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,867 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,867 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,868 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,868 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,869 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,869 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,870 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,870 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,871 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,871 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,872 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,872 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,873 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,873 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,874 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,874 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,875 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,875 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,876 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,876 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,877 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,877 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,878 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,878 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:19:33,879 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,879 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,880 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,880 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,881 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,881 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,882 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,882 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,883 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,884 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,884 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,885 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,885 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,886 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:33,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 11 select indices, 11 select index equivalence classes, 45 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 533 [2018-04-13 10:19:33,887 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:33,935 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:33,942 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:33,942 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:142, output treesize:3 [2018-04-13 10:19:34,082 INFO L134 CoverageAnalysis]: Checked inductivity of 278 backedges. 152 proven. 104 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2018-04-13 10:19:34,083 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:19:34,083 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41] total 41 [2018-04-13 10:19:34,083 INFO L442 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-04-13 10:19:34,083 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-04-13 10:19:34,083 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=223, Invalid=1499, Unknown=0, NotChecked=0, Total=1722 [2018-04-13 10:19:34,083 INFO L87 Difference]: Start difference. First operand 654 states and 740 transitions. Second operand 42 states. [2018-04-13 10:19:37,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:19:37,598 INFO L93 Difference]: Finished difference Result 660 states and 745 transitions. [2018-04-13 10:19:37,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-04-13 10:19:37,598 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 146 [2018-04-13 10:19:37,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:19:37,599 INFO L225 Difference]: With dead ends: 660 [2018-04-13 10:19:37,599 INFO L226 Difference]: Without dead ends: 660 [2018-04-13 10:19:37,599 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 103 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 930 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=394, Invalid=3388, Unknown=0, NotChecked=0, Total=3782 [2018-04-13 10:19:37,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 660 states. [2018-04-13 10:19:37,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 660 to 654. [2018-04-13 10:19:37,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 654 states. [2018-04-13 10:19:37,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 654 states to 654 states and 739 transitions. [2018-04-13 10:19:37,605 INFO L78 Accepts]: Start accepts. Automaton has 654 states and 739 transitions. Word has length 146 [2018-04-13 10:19:37,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:19:37,605 INFO L459 AbstractCegarLoop]: Abstraction has 654 states and 739 transitions. [2018-04-13 10:19:37,605 INFO L460 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-04-13 10:19:37,605 INFO L276 IsEmpty]: Start isEmpty. Operand 654 states and 739 transitions. [2018-04-13 10:19:37,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-04-13 10:19:37,606 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:19:37,606 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:19:37,606 INFO L408 AbstractCegarLoop]: === Iteration 118 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, 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__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:19:37,606 INFO L82 PathProgramCache]: Analyzing trace with hash -923230191, now seen corresponding path program 7 times [2018-04-13 10:19:37,606 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:19:37,606 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:19:37,607 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:37,607 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:19:37,607 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:37,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:37,646 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:19:37,652 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:19:37,652 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:19:37,652 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:19:37,653 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:19:37,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:37,713 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:19:37,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:19:37,948 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:37,983 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:37,984 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:19:38,046 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:19:38,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:19:38,047 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,048 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,052 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,052 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:30, output treesize:23 [2018-04-13 10:19:38,081 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 1 [2018-04-13 10:19:38,081 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,083 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,083 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:21, output treesize:3 [2018-04-13 10:19:38,119 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,120 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,120 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 39 [2018-04-13 10:19:38,120 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,126 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,126 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:32, output treesize:36 [2018-04-13 10:19:38,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:19:38,169 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,169 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 43 [2018-04-13 10:19:38,169 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,173 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,179 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,179 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:51, output treesize:52 [2018-04-13 10:19:38,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 16 [2018-04-13 10:19:38,226 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,230 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:38,230 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:48, output treesize:26 [2018-04-13 10:19:38,328 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,328 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,329 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 76 [2018-04-13 10:19:38,330 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,344 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:38,344 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:81, output treesize:95 [2018-04-13 10:19:38,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 59 [2018-04-13 10:19:38,427 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,428 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 98 [2018-04-13 10:19:38,428 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,437 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,448 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,448 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:88, output treesize:97 [2018-04-13 10:19:38,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 49 [2018-04-13 10:19:38,518 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,524 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:38,524 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:91, output treesize:58 [2018-04-13 10:19:38,673 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:19:38,674 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 105 [2018-04-13 10:19:38,674 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,693 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,694 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:105, output treesize:61 [2018-04-13 10:19:38,727 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 54 [2018-04-13 10:19:38,729 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,729 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,730 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:19:38,730 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,731 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,733 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 114 [2018-04-13 10:19:38,733 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:38,742 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:38,750 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:38,750 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:76, output treesize:64 [2018-04-13 10:19:38,872 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,872 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:19:38,872 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,873 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 103 [2018-04-13 10:19:38,873 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:38,886 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:38,887 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:79, output treesize:61 [2018-04-13 10:19:38,934 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 51 [2018-04-13 10:19:38,935 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,936 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,936 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,937 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,937 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:19:38,938 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,938 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:19:38,940 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:38,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 5 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 141 [2018-04-13 10:19:38,943 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:38,952 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:38,960 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:38,960 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:76, output treesize:58 [2018-04-13 10:19:39,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2018-04-13 10:19:39,048 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:39,049 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:39,050 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:39,051 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 30 [2018-04-13 10:19:39,051 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:39,055 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:39,060 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:39,060 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:59, output treesize:20 [2018-04-13 10:19:39,177 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 51 proven. 301 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-04-13 10:19:39,177 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:19:39,177 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53] total 53 [2018-04-13 10:19:39,178 INFO L442 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-04-13 10:19:39,178 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-04-13 10:19:39,178 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=212, Invalid=2650, Unknown=0, NotChecked=0, Total=2862 [2018-04-13 10:19:39,178 INFO L87 Difference]: Start difference. First operand 654 states and 739 transitions. Second operand 54 states. [2018-04-13 10:19:41,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:19:41,372 INFO L93 Difference]: Finished difference Result 663 states and 746 transitions. [2018-04-13 10:19:41,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-04-13 10:19:41,372 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 148 [2018-04-13 10:19:41,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:19:41,373 INFO L225 Difference]: With dead ends: 663 [2018-04-13 10:19:41,373 INFO L226 Difference]: Without dead ends: 663 [2018-04-13 10:19:41,373 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 86 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2641 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=409, Invalid=7247, Unknown=0, NotChecked=0, Total=7656 [2018-04-13 10:19:41,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 663 states. [2018-04-13 10:19:41,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 663 to 660. [2018-04-13 10:19:41,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 660 states. [2018-04-13 10:19:41,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 660 states to 660 states and 745 transitions. [2018-04-13 10:19:41,376 INFO L78 Accepts]: Start accepts. Automaton has 660 states and 745 transitions. Word has length 148 [2018-04-13 10:19:41,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:19:41,376 INFO L459 AbstractCegarLoop]: Abstraction has 660 states and 745 transitions. [2018-04-13 10:19:41,376 INFO L460 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-04-13 10:19:41,376 INFO L276 IsEmpty]: Start isEmpty. Operand 660 states and 745 transitions. [2018-04-13 10:19:41,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 147 [2018-04-13 10:19:41,376 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:19:41,376 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 5, 5, 5, 5, 5, 5, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:19:41,377 INFO L408 AbstractCegarLoop]: === Iteration 119 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:19:41,377 INFO L82 PathProgramCache]: Analyzing trace with hash 448418050, now seen corresponding path program 7 times [2018-04-13 10:19:41,377 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:19:41,377 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:19:41,377 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:41,377 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:19:41,377 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:41,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:41,387 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:19:41,389 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:19:41,389 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:19:41,390 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:19:41,390 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:19:41,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:41,425 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:19:41,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:19:41,491 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:19:41,491 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,492 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,496 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,496 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-04-13 10:19:41,522 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:19:41,523 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,523 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:19:41,524 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,526 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,532 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,532 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:34 [2018-04-13 10:19:41,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 30 [2018-04-13 10:19:41,567 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,567 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,568 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 67 [2018-04-13 10:19:41,568 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,574 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,580 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,580 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:46 [2018-04-13 10:19:41,621 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 40 [2018-04-13 10:19:41,623 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,623 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,624 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,625 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 117 [2018-04-13 10:19:41,625 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,633 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,640 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,641 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:62, output treesize:58 [2018-04-13 10:19:41,690 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 50 [2018-04-13 10:19:41,692 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,692 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,693 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,693 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,694 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,695 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,695 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,696 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,696 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,697 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,697 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 181 [2018-04-13 10:19:41,697 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,712 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,721 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,721 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:74, output treesize:70 [2018-04-13 10:19:41,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 59 [2018-04-13 10:19:41,790 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,790 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,791 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,791 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,792 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,793 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,793 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,794 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,794 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,797 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,797 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,798 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:41,798 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 253 [2018-04-13 10:19:41,798 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,819 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,830 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:41,830 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:90, output treesize:86 [2018-04-13 10:19:41,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:19:41,980 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:19:41,980 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,981 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,983 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:41,983 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:19, output treesize:1 [2018-04-13 10:19:42,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 75 [2018-04-13 10:19:42,144 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,145 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,145 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,146 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,147 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,147 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,148 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,148 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,149 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,150 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,150 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,151 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,151 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,152 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,152 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,153 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,153 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,154 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,156 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,160 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 335 [2018-04-13 10:19:42,165 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,166 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,167 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,167 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,168 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,168 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,169 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,170 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,170 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,171 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,172 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,172 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,173 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,173 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,174 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,175 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,175 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,176 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,176 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,177 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,177 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,178 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,179 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,179 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,180 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:42,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 27 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 77 treesize of output 433 [2018-04-13 10:19:42,205 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:19:42,382 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:19:42,407 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:19:42,446 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 8 dim-0 vars, and 2 xjuncts. [2018-04-13 10:19:42,446 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 7 variables, input treesize:117, output treesize:207 [2018-04-13 10:19:42,847 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:19:42,847 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:42,867 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-1 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:42,867 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 6 variables, input treesize:121, output treesize:113 [2018-04-13 10:19:43,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 90 treesize of output 74 [2018-04-13 10:19:43,153 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,182 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,183 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,185 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,186 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,187 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,189 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,190 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,192 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:19:43,193 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,194 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,195 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,196 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,196 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 21 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 314 [2018-04-13 10:19:43,197 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:43,219 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:43,228 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:43,228 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:129, output treesize:13 [2018-04-13 10:19:43,265 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:43,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:19:43,265 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:43,268 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:43,268 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:19:43,395 INFO L134 CoverageAnalysis]: Checked inductivity of 316 backedges. 27 proven. 280 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-04-13 10:19:43,395 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:19:43,395 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39] total 39 [2018-04-13 10:19:43,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-04-13 10:19:43,395 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-04-13 10:19:43,396 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=1436, Unknown=0, NotChecked=0, Total=1560 [2018-04-13 10:19:43,396 INFO L87 Difference]: Start difference. First operand 660 states and 745 transitions. Second operand 40 states. [2018-04-13 10:19:46,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:19:46,991 INFO L93 Difference]: Finished difference Result 668 states and 750 transitions. [2018-04-13 10:19:46,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-04-13 10:19:46,991 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 146 [2018-04-13 10:19:46,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:19:46,992 INFO L225 Difference]: With dead ends: 668 [2018-04-13 10:19:46,992 INFO L226 Difference]: Without dead ends: 668 [2018-04-13 10:19:46,992 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 942 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=255, Invalid=3527, Unknown=0, NotChecked=0, Total=3782 [2018-04-13 10:19:46,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 668 states. [2018-04-13 10:19:46,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 668 to 660. [2018-04-13 10:19:46,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 660 states. [2018-04-13 10:19:46,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 660 states to 660 states and 744 transitions. [2018-04-13 10:19:46,997 INFO L78 Accepts]: Start accepts. Automaton has 660 states and 744 transitions. Word has length 146 [2018-04-13 10:19:46,997 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:19:46,997 INFO L459 AbstractCegarLoop]: Abstraction has 660 states and 744 transitions. [2018-04-13 10:19:46,997 INFO L460 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-04-13 10:19:46,997 INFO L276 IsEmpty]: Start isEmpty. Operand 660 states and 744 transitions. [2018-04-13 10:19:46,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-04-13 10:19:46,998 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:19:46,998 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 6, 5, 5, 5, 5, 5, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:19:46,998 INFO L408 AbstractCegarLoop]: === Iteration 120 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:19:46,998 INFO L82 PathProgramCache]: Analyzing trace with hash 1016057735, now seen corresponding path program 7 times [2018-04-13 10:19:46,998 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:19:46,998 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:19:46,999 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:46,999 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:19:46,999 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:47,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:47,016 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:19:47,019 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:19:47,019 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:19:47,019 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:19:47,019 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:19:47,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:47,074 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:19:47,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:19:47,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:19:47,152 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,154 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,159 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,160 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:25, output treesize:21 [2018-04-13 10:19:47,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:19:47,191 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:19:47,191 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,195 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,200 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,200 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-04-13 10:19:47,236 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-04-13 10:19:47,238 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,239 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,239 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,240 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 58 [2018-04-13 10:19:47,240 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,246 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,252 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,252 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:19:47,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-04-13 10:19:47,297 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,298 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,299 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,301 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 93 [2018-04-13 10:19:47,301 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,311 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,318 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,318 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:52, output treesize:48 [2018-04-13 10:19:47,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 41 [2018-04-13 10:19:47,379 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,380 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,380 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,381 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,381 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,382 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,383 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,383 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,384 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,384 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,385 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 136 [2018-04-13 10:19:47,385 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,397 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,405 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,405 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-04-13 10:19:47,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:19:47,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:19:47,563 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,564 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,567 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,567 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:26, output treesize:1 [2018-04-13 10:19:47,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 55 [2018-04-13 10:19:47,776 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,778 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,780 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,781 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,782 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,783 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,784 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,785 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,786 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,787 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,788 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,789 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,790 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,791 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,792 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 187 [2018-04-13 10:19:47,804 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,805 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,806 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,807 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,809 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,810 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,811 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,812 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,812 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:19:47,813 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,814 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,815 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,816 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,817 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,817 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:47,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 15 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 208 [2018-04-13 10:19:47,827 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,849 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,861 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:47,875 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:47,875 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 5 variables, input treesize:94, output treesize:76 [2018-04-13 10:19:48,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 52 [2018-04-13 10:19:48,334 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,365 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,366 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,367 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,367 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,368 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,368 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,369 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,369 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,370 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,370 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,370 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,371 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,371 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,372 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:48,372 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 15 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 134 [2018-04-13 10:19:48,372 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:48,384 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:48,389 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:48,389 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:85, output treesize:3 [2018-04-13 10:19:48,507 INFO L134 CoverageAnalysis]: Checked inductivity of 321 backedges. 0 proven. 312 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-04-13 10:19:48,507 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:19:48,507 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39] total 39 [2018-04-13 10:19:48,508 INFO L442 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-04-13 10:19:48,508 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-04-13 10:19:48,508 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=123, Invalid=1437, Unknown=0, NotChecked=0, Total=1560 [2018-04-13 10:19:48,508 INFO L87 Difference]: Start difference. First operand 660 states and 744 transitions. Second operand 40 states. [2018-04-13 10:19:51,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:19:51,884 INFO L93 Difference]: Finished difference Result 670 states and 752 transitions. [2018-04-13 10:19:51,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-04-13 10:19:51,884 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 147 [2018-04-13 10:19:51,884 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:19:51,885 INFO L225 Difference]: With dead ends: 670 [2018-04-13 10:19:51,885 INFO L226 Difference]: Without dead ends: 670 [2018-04-13 10:19:51,885 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1098 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=261, Invalid=3771, Unknown=0, NotChecked=0, Total=4032 [2018-04-13 10:19:51,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 670 states. [2018-04-13 10:19:51,890 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 670 to 660. [2018-04-13 10:19:51,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 660 states. [2018-04-13 10:19:51,891 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 660 states to 660 states and 743 transitions. [2018-04-13 10:19:51,891 INFO L78 Accepts]: Start accepts. Automaton has 660 states and 743 transitions. Word has length 147 [2018-04-13 10:19:51,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:19:51,891 INFO L459 AbstractCegarLoop]: Abstraction has 660 states and 743 transitions. [2018-04-13 10:19:51,891 INFO L460 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-04-13 10:19:51,891 INFO L276 IsEmpty]: Start isEmpty. Operand 660 states and 743 transitions. [2018-04-13 10:19:51,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-04-13 10:19:51,892 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:19:51,892 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 7, 7, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:19:51,892 INFO L408 AbstractCegarLoop]: === Iteration 121 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:19:51,892 INFO L82 PathProgramCache]: Analyzing trace with hash -2068418099, now seen corresponding path program 7 times [2018-04-13 10:19:51,892 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:19:51,892 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:19:51,893 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:51,893 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:19:51,893 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:51,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:51,916 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:19:51,920 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:19:51,920 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:19:51,920 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:19:51,921 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:19:51,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:51,967 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:19:52,095 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:19:52,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:19:52,096 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,097 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,099 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,100 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:19, output treesize:15 [2018-04-13 10:19:52,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:19:52,135 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:19:52,136 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,139 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,141 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,142 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:13 [2018-04-13 10:19:52,178 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:19:52,179 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,179 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:19:52,180 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,182 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,185 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,185 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:28, output treesize:24 [2018-04-13 10:19:52,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 22 [2018-04-13 10:19:52,211 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 12 [2018-04-13 10:19:52,211 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,213 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,213 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,213 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:28, output treesize:3 [2018-04-13 10:19:52,238 INFO L134 CoverageAnalysis]: Checked inductivity of 413 backedges. 57 proven. 304 refuted. 0 times theorem prover too weak. 52 trivial. 0 not checked. [2018-04-13 10:19:52,238 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:19:52,239 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-04-13 10:19:52,239 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-13 10:19:52,239 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-13 10:19:52,239 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=133, Invalid=737, Unknown=0, NotChecked=0, Total=870 [2018-04-13 10:19:52,239 INFO L87 Difference]: Start difference. First operand 660 states and 743 transitions. Second operand 30 states. [2018-04-13 10:19:52,754 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:19:52,754 INFO L93 Difference]: Finished difference Result 887 states and 1018 transitions. [2018-04-13 10:19:52,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-04-13 10:19:52,754 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 151 [2018-04-13 10:19:52,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:19:52,755 INFO L225 Difference]: With dead ends: 887 [2018-04-13 10:19:52,755 INFO L226 Difference]: Without dead ends: 887 [2018-04-13 10:19:52,756 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 168 GetRequests, 120 SyntacticMatches, 3 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 819 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=228, Invalid=1934, Unknown=0, NotChecked=0, Total=2162 [2018-04-13 10:19:52,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 887 states. [2018-04-13 10:19:52,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 887 to 676. [2018-04-13 10:19:52,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 676 states. [2018-04-13 10:19:52,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 676 states to 676 states and 759 transitions. [2018-04-13 10:19:52,759 INFO L78 Accepts]: Start accepts. Automaton has 676 states and 759 transitions. Word has length 151 [2018-04-13 10:19:52,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:19:52,759 INFO L459 AbstractCegarLoop]: Abstraction has 676 states and 759 transitions. [2018-04-13 10:19:52,760 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-13 10:19:52,760 INFO L276 IsEmpty]: Start isEmpty. Operand 676 states and 759 transitions. [2018-04-13 10:19:52,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-04-13 10:19:52,760 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:19:52,760 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 6, 6, 5, 5, 5, 5, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:19:52,760 INFO L408 AbstractCegarLoop]: === Iteration 122 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:19:52,760 INFO L82 PathProgramCache]: Analyzing trace with hash 1433018850, now seen corresponding path program 7 times [2018-04-13 10:19:52,760 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:19:52,760 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:19:52,761 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:52,761 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:19:52,761 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:52,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:52,772 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:19:52,774 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:19:52,774 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:19:52,774 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:19:52,775 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:19:52,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:52,822 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:19:52,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:19:52,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:19:52,850 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,851 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,853 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,854 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:19:52,874 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:19:52,875 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:19:52,875 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,878 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,882 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,882 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-04-13 10:19:52,914 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-04-13 10:19:52,916 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,916 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,917 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,917 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 58 [2018-04-13 10:19:52,917 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,922 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,927 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,927 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:40, output treesize:36 [2018-04-13 10:19:52,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-04-13 10:19:52,957 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,958 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,958 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,959 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,959 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,959 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:52,960 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 93 [2018-04-13 10:19:52,960 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,967 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,973 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:52,973 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:49, output treesize:45 [2018-04-13 10:19:53,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 41 [2018-04-13 10:19:53,009 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,010 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,010 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,011 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,011 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,011 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,013 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 136 [2018-04-13 10:19:53,014 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:53,026 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:53,032 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:53,033 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:58, output treesize:54 [2018-04-13 10:19:53,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:19:53,153 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:19:53,153 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:53,154 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:53,156 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:53,156 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:19, output treesize:1 [2018-04-13 10:19:53,304 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 55 [2018-04-13 10:19:53,306 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,307 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,307 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,308 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,309 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,309 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,310 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,310 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,311 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,312 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,312 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,313 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,313 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,314 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 187 [2018-04-13 10:19:53,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,322 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,322 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,323 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,323 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,324 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,325 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,325 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,325 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,326 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,327 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,327 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,328 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,328 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,329 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,329 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,330 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,330 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:19:53,330 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 15 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 228 [2018-04-13 10:19:53,364 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:53,389 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:53,395 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:53,405 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:19:53,405 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 5 variables, input treesize:80, output treesize:66 [2018-04-13 10:19:53,803 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 52 [2018-04-13 10:19:53,804 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,805 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,805 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,806 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,806 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,807 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,807 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,809 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,809 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,810 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,810 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,811 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,811 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:53,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 6 select indices, 6 select index equivalence classes, 15 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 134 [2018-04-13 10:19:53,812 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:53,824 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:53,827 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:19:53,827 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:75, output treesize:3 [2018-04-13 10:19:53,924 INFO L134 CoverageAnalysis]: Checked inductivity of 326 backedges. 0 proven. 312 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-04-13 10:19:53,924 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:19:53,924 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35] total 35 [2018-04-13 10:19:53,924 INFO L442 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-04-13 10:19:53,924 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-04-13 10:19:53,924 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=1163, Unknown=0, NotChecked=0, Total=1260 [2018-04-13 10:19:53,925 INFO L87 Difference]: Start difference. First operand 676 states and 759 transitions. Second operand 36 states. [2018-04-13 10:19:56,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:19:56,552 INFO L93 Difference]: Finished difference Result 682 states and 764 transitions. [2018-04-13 10:19:56,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-04-13 10:19:56,553 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 148 [2018-04-13 10:19:56,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:19:56,553 INFO L225 Difference]: With dead ends: 682 [2018-04-13 10:19:56,553 INFO L226 Difference]: Without dead ends: 682 [2018-04-13 10:19:56,554 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 679 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=163, Invalid=2287, Unknown=0, NotChecked=0, Total=2450 [2018-04-13 10:19:56,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 682 states. [2018-04-13 10:19:56,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 682 to 676. [2018-04-13 10:19:56,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 676 states. [2018-04-13 10:19:56,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 676 states to 676 states and 758 transitions. [2018-04-13 10:19:56,557 INFO L78 Accepts]: Start accepts. Automaton has 676 states and 758 transitions. Word has length 148 [2018-04-13 10:19:56,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:19:56,557 INFO L459 AbstractCegarLoop]: Abstraction has 676 states and 758 transitions. [2018-04-13 10:19:56,557 INFO L460 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-04-13 10:19:56,557 INFO L276 IsEmpty]: Start isEmpty. Operand 676 states and 758 transitions. [2018-04-13 10:19:56,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-04-13 10:19:56,557 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:19:56,557 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 8, 7, 7, 7, 7, 7, 7, 7, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:19:56,558 INFO L408 AbstractCegarLoop]: === Iteration 123 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:19:56,558 INFO L82 PathProgramCache]: Analyzing trace with hash -2103734586, now seen corresponding path program 4 times [2018-04-13 10:19:56,558 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:19:56,558 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:19:56,558 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:56,558 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-04-13 10:19:56,558 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:56,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:56,564 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:19:56,623 INFO L134 CoverageAnalysis]: Checked inductivity of 386 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:19:56,623 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:19:56,623 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:19:56,624 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:19:56,631 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:19:56,631 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:19:56,633 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:19:56,706 INFO L134 CoverageAnalysis]: Checked inductivity of 386 backedges. 0 proven. 182 refuted. 0 times theorem prover too weak. 204 trivial. 0 not checked. [2018-04-13 10:19:56,706 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:19:56,706 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 20 [2018-04-13 10:19:56,707 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-04-13 10:19:56,707 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-04-13 10:19:56,707 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=244, Unknown=0, NotChecked=0, Total=380 [2018-04-13 10:19:56,707 INFO L87 Difference]: Start difference. First operand 676 states and 758 transitions. Second operand 20 states. [2018-04-13 10:19:56,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:19:56,764 INFO L93 Difference]: Finished difference Result 775 states and 856 transitions. [2018-04-13 10:19:56,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-04-13 10:19:56,764 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 147 [2018-04-13 10:19:56,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:19:56,765 INFO L225 Difference]: With dead ends: 775 [2018-04-13 10:19:56,765 INFO L226 Difference]: Without dead ends: 765 [2018-04-13 10:19:56,765 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 140 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=141, Invalid=279, Unknown=0, NotChecked=0, Total=420 [2018-04-13 10:19:56,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 765 states. [2018-04-13 10:19:56,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 765 to 708. [2018-04-13 10:19:56,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 708 states. [2018-04-13 10:19:56,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 708 states to 708 states and 804 transitions. [2018-04-13 10:19:56,768 INFO L78 Accepts]: Start accepts. Automaton has 708 states and 804 transitions. Word has length 147 [2018-04-13 10:19:56,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:19:56,768 INFO L459 AbstractCegarLoop]: Abstraction has 708 states and 804 transitions. [2018-04-13 10:19:56,768 INFO L460 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-04-13 10:19:56,768 INFO L276 IsEmpty]: Start isEmpty. Operand 708 states and 804 transitions. [2018-04-13 10:19:56,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2018-04-13 10:19:56,769 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:19:56,769 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:19:56,769 INFO L408 AbstractCegarLoop]: === Iteration 124 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:19:56,769 INFO L82 PathProgramCache]: Analyzing trace with hash -649043616, now seen corresponding path program 6 times [2018-04-13 10:19:56,769 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:19:56,769 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:19:56,770 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:56,770 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:19:56,770 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:19:56,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:19:56,780 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:19:56,783 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:19:56,783 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:19:56,783 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:19:56,783 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 10:19:56,843 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2018-04-13 10:19:56,843 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:19:56,846 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:19:57,006 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:57,006 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:57,007 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 41 [2018-04-13 10:19:57,007 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:57,028 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 33 [2018-04-13 10:19:57,028 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:57,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:57,062 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:57,063 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 43 [2018-04-13 10:19:57,063 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:57,081 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 35 [2018-04-13 10:19:57,082 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:57,099 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 4 dim-1 vars, End of recursive call: 6 dim-0 vars, and 2 xjuncts. [2018-04-13 10:19:57,099 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 10 variables, input treesize:83, output treesize:69 [2018-04-13 10:19:57,339 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:57,339 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:57,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 55 [2018-04-13 10:19:57,340 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:57,404 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:57,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 55 treesize of output 68 [2018-04-13 10:19:57,409 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:19:57,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:57,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:57,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 53 [2018-04-13 10:19:57,513 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:57,604 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 53 treesize of output 56 [2018-04-13 10:19:57,605 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-13 10:19:57,711 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:57,712 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:57,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 61 treesize of output 78 [2018-04-13 10:19:57,718 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:19:57,853 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:57,859 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 63 treesize of output 70 [2018-04-13 10:19:57,860 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:19:58,010 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,010 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 56 [2018-04-13 10:19:58,011 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:58,012 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,013 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,013 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 46 [2018-04-13 10:19:58,013 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:58,155 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,156 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 54 [2018-04-13 10:19:58,156 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:58,158 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,158 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 46 [2018-04-13 10:19:58,159 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:58,297 INFO L267 ElimStorePlain]: Start of recursive call 1: 20 dim-0 vars, 8 dim-1 vars, End of recursive call: 32 dim-0 vars, and 8 xjuncts. [2018-04-13 10:19:58,297 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 28 variables, input treesize:245, output treesize:365 [2018-04-13 10:19:58,681 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,682 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 52 [2018-04-13 10:19:58,682 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:58,740 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,741 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 75 [2018-04-13 10:19:58,747 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:19:58,835 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,841 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 65 [2018-04-13 10:19:58,841 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:19:58,946 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,947 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 51 [2018-04-13 10:19:58,947 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:58,948 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,949 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:58,949 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 43 [2018-04-13 10:19:58,949 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:59,042 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,048 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 60 treesize of output 67 [2018-04-13 10:19:59,048 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:19:59,169 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,170 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,170 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 50 [2018-04-13 10:19:59,170 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:59,297 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 50 treesize of output 53 [2018-04-13 10:19:59,298 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-04-13 10:19:59,439 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,440 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 53 [2018-04-13 10:19:59,440 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:59,442 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,442 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,442 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 43 [2018-04-13 10:19:59,442 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:59,565 INFO L267 ElimStorePlain]: Start of recursive call 1: 20 dim-0 vars, 8 dim-1 vars, End of recursive call: 32 dim-0 vars, and 8 xjuncts. [2018-04-13 10:19:59,565 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 28 variables, input treesize:233, output treesize:341 [2018-04-13 10:19:59,845 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,846 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,852 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 75 [2018-04-13 10:19:59,852 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:19:59,943 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,944 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,944 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 50 [2018-04-13 10:19:59,944 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:19:59,946 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,946 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:19:59,946 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 58 [2018-04-13 10:19:59,947 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:00,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 75 [2018-04-13 10:20:00,031 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:00,142 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 63 [2018-04-13 10:20:00,149 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:00,274 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,274 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 58 [2018-04-13 10:20:00,275 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:00,276 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-04-13 10:20:00,277 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:00,420 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,421 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,421 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-04-13 10:20:00,421 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:00,422 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,423 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,423 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 56 [2018-04-13 10:20:00,423 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:00,537 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 60 treesize of output 67 [2018-04-13 10:20:00,544 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:00,679 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,680 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 50 [2018-04-13 10:20:00,680 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:00,682 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,682 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:00,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 60 [2018-04-13 10:20:00,683 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:00,804 INFO L267 ElimStorePlain]: Start of recursive call 1: 20 dim-0 vars, 8 dim-1 vars, End of recursive call: 32 dim-0 vars, and 8 xjuncts. [2018-04-13 10:20:00,804 INFO L202 ElimStorePlain]: Needed 13 recursive calls to eliminate 28 variables, input treesize:233, output treesize:341 [2018-04-13 10:20:01,125 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,127 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 75 [2018-04-13 10:20:01,133 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:01,229 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,230 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 43 [2018-04-13 10:20:01,230 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:01,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,232 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 51 [2018-04-13 10:20:01,232 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:01,322 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,323 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 54 [2018-04-13 10:20:01,323 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:01,403 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,409 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 63 [2018-04-13 10:20:01,410 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:01,518 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,520 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 58 treesize of output 75 [2018-04-13 10:20:01,525 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:01,654 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,655 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 51 [2018-04-13 10:20:01,655 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:01,656 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,657 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:01,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 41 [2018-04-13 10:20:01,657 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:01,804 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 54 treesize of output 57 [2018-04-13 10:20:01,804 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:02,120 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,123 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 41 [2018-04-13 10:20:02,124 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:02,126 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,128 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 49 [2018-04-13 10:20:02,129 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:02,307 INFO L267 ElimStorePlain]: Start of recursive call 1: 20 dim-0 vars, 8 dim-1 vars, End of recursive call: 32 dim-0 vars, and 8 xjuncts. [2018-04-13 10:20:02,308 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 28 variables, input treesize:233, output treesize:341 [2018-04-13 10:20:02,570 WARN L151 SmtUtils]: Spent 125ms on a formula simplification. DAG size of input: 201 DAG size of output 48 [2018-04-13 10:20:02,728 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,728 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,729 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 59 [2018-04-13 10:20:02,729 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:02,795 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,796 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,796 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 59 [2018-04-13 10:20:02,796 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:02,858 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 56 treesize of output 63 [2018-04-13 10:20:02,865 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:02,952 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,954 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 56 [2018-04-13 10:20:02,954 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:02,956 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,957 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:02,957 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 48 [2018-04-13 10:20:02,957 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:03,039 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:03,044 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 65 [2018-04-13 10:20:03,044 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:03,150 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:03,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 60 treesize of output 67 [2018-04-13 10:20:03,157 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:03,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:03,281 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:03,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 60 [2018-04-13 10:20:03,282 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:03,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:03,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:03,284 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 50 [2018-04-13 10:20:03,284 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:03,396 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:03,402 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 52 treesize of output 65 [2018-04-13 10:20:03,402 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:03,548 INFO L267 ElimStorePlain]: Start of recursive call 1: 20 dim-0 vars, 8 dim-1 vars, End of recursive call: 32 dim-0 vars, and 8 xjuncts. [2018-04-13 10:20:03,548 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 28 variables, input treesize:233, output treesize:341 [2018-04-13 10:20:03,916 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:03,917 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:03,917 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:03,923 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 65 treesize of output 92 [2018-04-13 10:20:03,923 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:04,032 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,034 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,034 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,039 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 65 treesize of output 92 [2018-04-13 10:20:04,040 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:04,167 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,168 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 61 [2018-04-13 10:20:04,168 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:04,170 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,170 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 55 [2018-04-13 10:20:04,171 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:04,277 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,278 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,278 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 57 [2018-04-13 10:20:04,278 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:04,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,280 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 64 treesize of output 65 [2018-04-13 10:20:04,281 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:04,381 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,381 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 64 [2018-04-13 10:20:04,382 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:04,483 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,484 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,484 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 64 [2018-04-13 10:20:04,485 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:04,579 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 60 [2018-04-13 10:20:04,580 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:04,691 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,693 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,693 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:04,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 57 treesize of output 84 [2018-04-13 10:20:04,699 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:04,841 INFO L267 ElimStorePlain]: Start of recursive call 1: 20 dim-0 vars, 8 dim-1 vars, End of recursive call: 32 dim-0 vars, and 8 xjuncts. [2018-04-13 10:20:04,841 INFO L202 ElimStorePlain]: Needed 11 recursive calls to eliminate 28 variables, input treesize:261, output treesize:373 [2018-04-13 10:20:05,073 WARN L151 SmtUtils]: Spent 126ms on a formula simplification. DAG size of input: 192 DAG size of output 49 [2018-04-13 10:20:05,176 INFO L134 CoverageAnalysis]: Checked inductivity of 509 backedges. 132 proven. 272 refuted. 0 times theorem prover too weak. 105 trivial. 0 not checked. [2018-04-13 10:20:05,176 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:20:05,176 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33] total 33 [2018-04-13 10:20:05,176 INFO L442 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-04-13 10:20:05,177 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-04-13 10:20:05,177 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=158, Invalid=964, Unknown=0, NotChecked=0, Total=1122 [2018-04-13 10:20:05,177 INFO L87 Difference]: Start difference. First operand 708 states and 804 transitions. Second operand 34 states. [2018-04-13 10:20:06,369 WARN L151 SmtUtils]: Spent 249ms on a formula simplification. DAG size of input: 100 DAG size of output 74 [2018-04-13 10:20:06,860 WARN L151 SmtUtils]: Spent 314ms on a formula simplification. DAG size of input: 112 DAG size of output 82 [2018-04-13 10:20:07,182 WARN L151 SmtUtils]: Spent 280ms on a formula simplification. DAG size of input: 117 DAG size of output 82 [2018-04-13 10:20:07,478 WARN L151 SmtUtils]: Spent 118ms on a formula simplification. DAG size of input: 93 DAG size of output 55 [2018-04-13 10:20:08,193 WARN L151 SmtUtils]: Spent 225ms on a formula simplification. DAG size of input: 112 DAG size of output 75 [2018-04-13 10:20:08,439 WARN L151 SmtUtils]: Spent 108ms on a formula simplification. DAG size of input: 90 DAG size of output 51 [2018-04-13 10:20:09,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:20:09,877 INFO L93 Difference]: Finished difference Result 808 states and 912 transitions. [2018-04-13 10:20:09,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-04-13 10:20:09,877 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 153 [2018-04-13 10:20:09,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:20:09,878 INFO L225 Difference]: With dead ends: 808 [2018-04-13 10:20:09,878 INFO L226 Difference]: Without dead ends: 808 [2018-04-13 10:20:09,879 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 112 SyntacticMatches, 8 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 980 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=509, Invalid=3273, Unknown=0, NotChecked=0, Total=3782 [2018-04-13 10:20:09,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 808 states. [2018-04-13 10:20:09,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 808 to 715. [2018-04-13 10:20:09,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 715 states. [2018-04-13 10:20:09,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 715 states to 715 states and 814 transitions. [2018-04-13 10:20:09,882 INFO L78 Accepts]: Start accepts. Automaton has 715 states and 814 transitions. Word has length 153 [2018-04-13 10:20:09,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:20:09,883 INFO L459 AbstractCegarLoop]: Abstraction has 715 states and 814 transitions. [2018-04-13 10:20:09,883 INFO L460 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-04-13 10:20:09,883 INFO L276 IsEmpty]: Start isEmpty. Operand 715 states and 814 transitions. [2018-04-13 10:20:09,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 154 [2018-04-13 10:20:09,883 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:20:09,883 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 7, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:20:09,883 INFO L408 AbstractCegarLoop]: === Iteration 125 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:20:09,884 INFO L82 PathProgramCache]: Analyzing trace with hash 1850166943, now seen corresponding path program 4 times [2018-04-13 10:20:09,884 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:20:09,884 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:20:09,884 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:20:09,884 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:20:09,884 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:20:09,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:20:09,892 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:20:09,940 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 326 trivial. 0 not checked. [2018-04-13 10:20:09,941 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:20:09,941 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:20:09,941 INFO L103 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-04-13 10:20:09,949 INFO L242 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2018-04-13 10:20:09,949 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:20:09,951 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:20:10,005 INFO L134 CoverageAnalysis]: Checked inductivity of 443 backedges. 0 proven. 117 refuted. 0 times theorem prover too weak. 326 trivial. 0 not checked. [2018-04-13 10:20:10,005 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-04-13 10:20:10,005 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 18 [2018-04-13 10:20:10,005 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-04-13 10:20:10,005 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-04-13 10:20:10,005 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=197, Unknown=0, NotChecked=0, Total=306 [2018-04-13 10:20:10,005 INFO L87 Difference]: Start difference. First operand 715 states and 814 transitions. Second operand 18 states. [2018-04-13 10:20:10,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:20:10,072 INFO L93 Difference]: Finished difference Result 801 states and 907 transitions. [2018-04-13 10:20:10,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-04-13 10:20:10,072 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 153 [2018-04-13 10:20:10,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:20:10,074 INFO L225 Difference]: With dead ends: 801 [2018-04-13 10:20:10,074 INFO L226 Difference]: Without dead ends: 798 [2018-04-13 10:20:10,074 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=114, Invalid=228, Unknown=0, NotChecked=0, Total=342 [2018-04-13 10:20:10,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 798 states. [2018-04-13 10:20:10,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 798 to 715. [2018-04-13 10:20:10,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 715 states. [2018-04-13 10:20:10,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 715 states to 715 states and 813 transitions. [2018-04-13 10:20:10,080 INFO L78 Accepts]: Start accepts. Automaton has 715 states and 813 transitions. Word has length 153 [2018-04-13 10:20:10,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:20:10,080 INFO L459 AbstractCegarLoop]: Abstraction has 715 states and 813 transitions. [2018-04-13 10:20:10,080 INFO L460 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-04-13 10:20:10,080 INFO L276 IsEmpty]: Start isEmpty. Operand 715 states and 813 transitions. [2018-04-13 10:20:10,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-04-13 10:20:10,081 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:20:10,081 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:20:10,081 INFO L408 AbstractCegarLoop]: === Iteration 126 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:20:10,081 INFO L82 PathProgramCache]: Analyzing trace with hash 1020421171, now seen corresponding path program 5 times [2018-04-13 10:20:10,081 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:20:10,081 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:20:10,082 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:20:10,082 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:20:10,082 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:20:10,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:20:10,112 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:20:10,117 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:20:10,117 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:20:10,118 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:20:10,118 INFO L103 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-04-13 10:20:10,191 INFO L242 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 16 check-sat command(s) [2018-04-13 10:20:10,192 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:20:10,197 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:20:10,230 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:10,231 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:10,231 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-04-13 10:20:10,231 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,233 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,234 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:14, output treesize:8 [2018-04-13 10:20:10,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:20:10,254 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:20:10,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:20:10,262 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,263 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,267 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,267 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:28, output treesize:16 [2018-04-13 10:20:10,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:20:10,369 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,375 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-04-13 10:20:10,376 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:10,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-04-13 10:20:10,377 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,380 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,383 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,384 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:34, output treesize:14 [2018-04-13 10:20:10,452 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-04-13 10:20:10,453 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:10,454 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-04-13 10:20:10,454 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,457 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,460 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,460 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:14 [2018-04-13 10:20:10,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-04-13 10:20:10,530 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:10,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 32 [2018-04-13 10:20:10,531 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,534 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,537 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,537 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-04-13 10:20:10,570 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 28 [2018-04-13 10:20:10,572 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:10,572 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:10,573 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:10,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 59 [2018-04-13 10:20:10,574 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,579 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,584 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,584 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:43, output treesize:39 [2018-04-13 10:20:10,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 30 [2018-04-13 10:20:10,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:10,627 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:10,628 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:10,629 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 29 [2018-04-13 10:20:10,629 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,631 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,633 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,633 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:43, output treesize:10 [2018-04-13 10:20:10,650 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:10,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:20:10,650 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:10,653 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:10,653 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-13 10:20:10,691 INFO L134 CoverageAnalysis]: Checked inductivity of 367 backedges. 44 proven. 141 refuted. 0 times theorem prover too weak. 182 trivial. 0 not checked. [2018-04-13 10:20:10,691 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:20:10,691 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22] total 22 [2018-04-13 10:20:10,692 INFO L442 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-04-13 10:20:10,692 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-04-13 10:20:10,692 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=451, Unknown=0, NotChecked=0, Total=506 [2018-04-13 10:20:10,692 INFO L87 Difference]: Start difference. First operand 715 states and 813 transitions. Second operand 23 states. [2018-04-13 10:20:11,639 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:20:11,639 INFO L93 Difference]: Finished difference Result 732 states and 829 transitions. [2018-04-13 10:20:11,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-04-13 10:20:11,639 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 151 [2018-04-13 10:20:11,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:20:11,640 INFO L225 Difference]: With dead ends: 732 [2018-04-13 10:20:11,640 INFO L226 Difference]: Without dead ends: 732 [2018-04-13 10:20:11,640 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 125 SyntacticMatches, 5 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 209 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=142, Invalid=1264, Unknown=0, NotChecked=0, Total=1406 [2018-04-13 10:20:11,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 732 states. [2018-04-13 10:20:11,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 732 to 718. [2018-04-13 10:20:11,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 718 states. [2018-04-13 10:20:11,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 816 transitions. [2018-04-13 10:20:11,652 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 816 transitions. Word has length 151 [2018-04-13 10:20:11,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:20:11,652 INFO L459 AbstractCegarLoop]: Abstraction has 718 states and 816 transitions. [2018-04-13 10:20:11,652 INFO L460 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-04-13 10:20:11,652 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 816 transitions. [2018-04-13 10:20:11,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2018-04-13 10:20:11,653 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:20:11,653 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 9, 9, 8, 8, 8, 8, 8, 8, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:20:11,653 INFO L408 AbstractCegarLoop]: === Iteration 127 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:20:11,653 INFO L82 PathProgramCache]: Analyzing trace with hash -2046782276, now seen corresponding path program 8 times [2018-04-13 10:20:11,653 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:20:11,653 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:20:11,654 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:20:11,654 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:20:11,654 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:20:11,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:20:11,664 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:20:11,666 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:20:11,666 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:20:11,666 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:20:11,667 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:20:11,689 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:20:11,689 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:20:11,692 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:20:11,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:20:11,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:20:11,871 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:11,872 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:11,878 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:11,878 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:41, output treesize:37 [2018-04-13 10:20:11,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:20:11,933 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:11,934 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:20:11,934 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:11,937 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:11,945 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:11,945 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:53, output treesize:49 [2018-04-13 10:20:11,998 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:20:11,999 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:12,000 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:12,000 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:12,001 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:20:12,001 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:12,007 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:12,016 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:12,016 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:65, output treesize:61 [2018-04-13 10:20:12,377 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-04-13 10:20:12,377 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:12,387 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:12,387 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:69, output treesize:64 [2018-04-13 10:20:12,425 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 37 [2018-04-13 10:20:12,427 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:12,427 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:12,427 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:20:12,428 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:12,428 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 54 [2018-04-13 10:20:12,428 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:12,432 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:12,439 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:12,439 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:75, output treesize:13 [2018-04-13 10:20:12,463 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:12,464 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:20:12,464 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:12,466 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:12,467 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:16, output treesize:11 [2018-04-13 10:20:12,569 INFO L134 CoverageAnalysis]: Checked inductivity of 452 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-04-13 10:20:12,569 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:20:12,570 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34] total 34 [2018-04-13 10:20:12,570 INFO L442 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-04-13 10:20:12,570 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-04-13 10:20:12,570 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=1059, Unknown=0, NotChecked=0, Total=1190 [2018-04-13 10:20:12,570 INFO L87 Difference]: Start difference. First operand 718 states and 816 transitions. Second operand 35 states. [2018-04-13 10:20:16,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:20:16,087 INFO L93 Difference]: Finished difference Result 737 states and 833 transitions. [2018-04-13 10:20:16,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-04-13 10:20:16,088 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 148 [2018-04-13 10:20:16,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:20:16,089 INFO L225 Difference]: With dead ends: 737 [2018-04-13 10:20:16,089 INFO L226 Difference]: Without dead ends: 737 [2018-04-13 10:20:16,089 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 188 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1488 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=561, Invalid=4989, Unknown=0, NotChecked=0, Total=5550 [2018-04-13 10:20:16,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 737 states. [2018-04-13 10:20:16,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 737 to 724. [2018-04-13 10:20:16,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 724 states. [2018-04-13 10:20:16,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 724 states to 724 states and 823 transitions. [2018-04-13 10:20:16,092 INFO L78 Accepts]: Start accepts. Automaton has 724 states and 823 transitions. Word has length 148 [2018-04-13 10:20:16,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:20:16,092 INFO L459 AbstractCegarLoop]: Abstraction has 724 states and 823 transitions. [2018-04-13 10:20:16,092 INFO L460 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-04-13 10:20:16,093 INFO L276 IsEmpty]: Start isEmpty. Operand 724 states and 823 transitions. [2018-04-13 10:20:16,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2018-04-13 10:20:16,093 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:20:16,093 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 9, 9, 9, 8, 8, 8, 8, 8, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:20:16,093 INFO L408 AbstractCegarLoop]: === Iteration 128 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:20:16,093 INFO L82 PathProgramCache]: Analyzing trace with hash 974258957, now seen corresponding path program 9 times [2018-04-13 10:20:16,094 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:20:16,094 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:20:16,094 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:20:16,094 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:20:16,094 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:20:16,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:20:16,105 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:20:16,110 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:20:16,110 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:20:16,110 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:20:16,110 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-04-13 10:20:16,130 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 8 check-sat command(s) [2018-04-13 10:20:16,130 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:20:16,132 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:20:16,150 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:20:16,151 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:20:16,151 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,152 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,154 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,154 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-04-13 10:20:16,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 23 [2018-04-13 10:20:16,173 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:20:16,174 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,177 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,180 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,180 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:30 [2018-04-13 10:20:16,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 40 treesize of output 33 [2018-04-13 10:20:16,205 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,206 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,206 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 76 [2018-04-13 10:20:16,207 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,212 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,217 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,217 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:42 [2018-04-13 10:20:16,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-04-13 10:20:16,266 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,267 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,267 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,268 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,268 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,269 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,269 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 129 [2018-04-13 10:20:16,269 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,278 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,285 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,285 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:61, output treesize:57 [2018-04-13 10:20:16,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 49 [2018-04-13 10:20:16,747 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,772 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,773 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,774 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,775 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,777 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:16,777 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:20:16,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 5 select indices, 5 select index equivalence classes, 6 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 85 [2018-04-13 10:20:16,778 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,782 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,788 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:16,788 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:83, output treesize:3 [2018-04-13 10:20:16,879 INFO L134 CoverageAnalysis]: Checked inductivity of 460 backedges. 342 proven. 25 refuted. 0 times theorem prover too weak. 93 trivial. 0 not checked. [2018-04-13 10:20:16,879 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:20:16,880 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29] total 29 [2018-04-13 10:20:16,880 INFO L442 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-04-13 10:20:16,880 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-04-13 10:20:16,880 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=127, Invalid=743, Unknown=0, NotChecked=0, Total=870 [2018-04-13 10:20:16,880 INFO L87 Difference]: Start difference. First operand 724 states and 823 transitions. Second operand 30 states. [2018-04-13 10:20:18,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:20:18,211 INFO L93 Difference]: Finished difference Result 729 states and 825 transitions. [2018-04-13 10:20:18,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-04-13 10:20:18,211 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 149 [2018-04-13 10:20:18,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:20:18,212 INFO L225 Difference]: With dead ends: 729 [2018-04-13 10:20:18,212 INFO L226 Difference]: Without dead ends: 729 [2018-04-13 10:20:18,212 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 121 SyntacticMatches, 1 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 965 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=425, Invalid=2997, Unknown=0, NotChecked=0, Total=3422 [2018-04-13 10:20:18,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 729 states. [2018-04-13 10:20:18,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 729 to 724. [2018-04-13 10:20:18,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 724 states. [2018-04-13 10:20:18,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 724 states to 724 states and 822 transitions. [2018-04-13 10:20:18,215 INFO L78 Accepts]: Start accepts. Automaton has 724 states and 822 transitions. Word has length 149 [2018-04-13 10:20:18,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:20:18,215 INFO L459 AbstractCegarLoop]: Abstraction has 724 states and 822 transitions. [2018-04-13 10:20:18,216 INFO L460 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-04-13 10:20:18,216 INFO L276 IsEmpty]: Start isEmpty. Operand 724 states and 822 transitions. [2018-04-13 10:20:18,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-04-13 10:20:18,216 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:20:18,216 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:20:18,216 INFO L408 AbstractCegarLoop]: === Iteration 129 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:20:18,216 INFO L82 PathProgramCache]: Analyzing trace with hash -31127112, now seen corresponding path program 8 times [2018-04-13 10:20:18,216 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:20:18,216 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:20:18,217 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:20:18,217 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:20:18,217 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:20:18,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:20:18,228 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:20:18,232 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:20:18,232 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:20:18,233 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:20:18,233 INFO L103 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-04-13 10:20:18,275 INFO L242 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2018-04-13 10:20:18,276 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:20:18,278 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:20:18,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-04-13 10:20:18,280 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,281 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,281 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-04-13 10:20:18,283 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,283 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 21 [2018-04-13 10:20:18,283 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,286 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:18,286 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:16, output treesize:11 [2018-04-13 10:20:18,317 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,318 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 30 [2018-04-13 10:20:18,318 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,324 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:18,325 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:27, output treesize:22 [2018-04-13 10:20:18,400 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-04-13 10:20:18,400 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:20:18,401 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,402 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,408 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:18,408 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:34 [2018-04-13 10:20:18,446 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-04-13 10:20:18,447 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,447 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 31 [2018-04-13 10:20:18,448 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,451 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,458 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:18,458 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:47, output treesize:43 [2018-04-13 10:20:18,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 27 [2018-04-13 10:20:18,505 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,506 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,506 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,507 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 58 [2018-04-13 10:20:18,507 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,512 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,521 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:18,521 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:56, output treesize:52 [2018-04-13 10:20:18,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 34 [2018-04-13 10:20:18,577 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,577 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,578 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,578 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,579 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,579 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 93 [2018-04-13 10:20:18,580 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,588 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,598 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:18,598 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:65, output treesize:61 [2018-04-13 10:20:18,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 41 [2018-04-13 10:20:18,660 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,661 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,662 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,662 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,663 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,663 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,664 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,664 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 136 [2018-04-13 10:20:18,665 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,677 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,688 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:18,688 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:74, output treesize:70 [2018-04-13 10:20:18,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 48 [2018-04-13 10:20:18,755 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,756 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,757 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,757 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,758 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,758 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,759 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,760 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,761 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,761 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,762 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 187 [2018-04-13 10:20:18,762 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,789 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,801 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:18,801 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:83, output treesize:79 [2018-04-13 10:20:18,875 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 55 [2018-04-13 10:20:18,877 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,878 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,878 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,879 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,879 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,879 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,880 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,880 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,881 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,881 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,881 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,882 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,882 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,883 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,883 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,883 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,884 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,884 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,885 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,885 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,885 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:18,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 55 treesize of output 246 [2018-04-13 10:20:18,886 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,911 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:18,924 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:18,924 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:92, output treesize:88 [2018-04-13 10:20:19,016 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 79 treesize of output 62 [2018-04-13 10:20:19,018 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,018 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,019 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,019 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,020 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,020 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,021 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,022 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,023 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,024 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,025 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,028 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,028 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,029 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,030 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,031 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 313 [2018-04-13 10:20:19,031 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:19,069 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:19,084 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-04-13 10:20:19,085 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:101, output treesize:97 [2018-04-13 10:20:19,485 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 13 [2018-04-13 10:20:19,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 12 [2018-04-13 10:20:19,486 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:19,487 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:19,491 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:19,491 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:30, output treesize:3 [2018-04-13 10:20:19,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 20 [2018-04-13 10:20:19,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 23 [2018-04-13 10:20:19,683 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:19,684 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 37 [2018-04-13 10:20:19,684 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:19,687 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:19,690 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:19,694 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:19,694 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 6 variables, input treesize:37, output treesize:3 [2018-04-13 10:20:20,447 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:20,451 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:20,452 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 42 [2018-04-13 10:20:20,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 48 [2018-04-13 10:20:20,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 4 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 6 case distinctions, treesize of input 36 treesize of output 56 [2018-04-13 10:20:20,508 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:20,512 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:20,516 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:20,522 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:20,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 42 treesize of output 61 [2018-04-13 10:20:20,529 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 4 xjuncts. [2018-04-13 10:20:20,918 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:20,923 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:20,927 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:20,933 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:20,940 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 30 treesize of output 57 [2018-04-13 10:20:20,940 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 4 xjuncts. [2018-04-13 10:20:21,349 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:21,353 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:21,359 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:21,363 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 28 treesize of output 43 [2018-04-13 10:20:21,363 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:21,768 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:21,774 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:21,833 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:21,844 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:21,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 7 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 6 case distinctions, treesize of input 32 treesize of output 67 [2018-04-13 10:20:21,855 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 8 xjuncts. [2018-04-13 10:20:22,486 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:22,490 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:22,496 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:22,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 28 treesize of output 43 [2018-04-13 10:20:22,500 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:23,065 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:23,071 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 29 [2018-04-13 10:20:23,071 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:23,613 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:23,617 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:23,623 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:23,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 4 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 28 treesize of output 43 [2018-04-13 10:20:23,627 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:24,184 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:24,188 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:24,192 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:24,198 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:24,204 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 4 case distinctions, treesize of input 30 treesize of output 57 [2018-04-13 10:20:24,205 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 4 xjuncts. [2018-04-13 10:20:24,820 INFO L267 ElimStorePlain]: Start of recursive call 4: 8 dim-1 vars, End of recursive call: and 27 xjuncts. [2018-04-13 10:20:25,389 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 27 xjuncts. [2018-04-13 10:20:25,955 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 27 xjuncts. [2018-04-13 10:20:29,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 91 [2018-04-13 10:20:29,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,300 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,301 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,302 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,303 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,304 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,305 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,305 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,306 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,306 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,307 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,308 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,308 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,309 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,310 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,310 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,311 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,312 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,312 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,313 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,314 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,314 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,315 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,316 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,316 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,317 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,317 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,318 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,319 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,319 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,320 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,321 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,322 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,329 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 405 [2018-04-13 10:20:29,336 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,337 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,337 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,338 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,338 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,339 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,339 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,340 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,341 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,341 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,342 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,342 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,343 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,344 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,344 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,345 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,346 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,346 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,347 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,347 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,348 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,349 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,349 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,350 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,351 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,351 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,352 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,352 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,353 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,354 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,355 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,355 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,356 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,356 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,357 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,358 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,358 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,359 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,360 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,361 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,361 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,362 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,363 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,363 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,364 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,380 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 500 [2018-04-13 10:20:29,388 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,388 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,389 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,390 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,390 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,391 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,392 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,393 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,394 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,395 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,396 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,397 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,397 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,398 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,399 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,399 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,400 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,401 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,401 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,402 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,403 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,403 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,404 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,405 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,405 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,406 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,407 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,407 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,408 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,409 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,409 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,410 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,411 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,411 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,412 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,413 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,413 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:20:29,414 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,415 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,415 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,416 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,416 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,417 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,418 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,418 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,419 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,420 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,437 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 95 treesize of output 544 [2018-04-13 10:20:29,444 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,445 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,446 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,446 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,447 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,447 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,448 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,449 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,449 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,450 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,450 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,451 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,451 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,452 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,453 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,453 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,454 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,454 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,455 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,456 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,456 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,457 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,457 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,458 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,459 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,459 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,461 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,462 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,462 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,463 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,463 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,466 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,466 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,468 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,468 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,469 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,469 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,470 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,471 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,471 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,472 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,473 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,473 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:20:29,474 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,474 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,475 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:29,486 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 45 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 88 treesize of output 575 [2018-04-13 10:20:29,486 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:29,590 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:29,666 INFO L267 ElimStorePlain]: Start of recursive call 15: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:29,728 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:29,743 INFO L267 ElimStorePlain]: Start of recursive call 13: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:30,012 INFO L267 ElimStorePlain]: Start of recursive call 1: 11 dim-0 vars, 1 dim-1 vars, 1 dim-2 vars, End of recursive call: 114 dim-0 vars, and 22 xjuncts. [2018-04-13 10:20:30,012 INFO L202 ElimStorePlain]: Needed 17 recursive calls to eliminate 13 variables, input treesize:173, output treesize:3171 [2018-04-13 10:20:31,096 WARN L151 SmtUtils]: Spent 622ms on a formula simplification. DAG size of input: 829 DAG size of output 92 [2018-04-13 10:20:31,545 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:31,547 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:31,550 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 24 [2018-04-13 10:20:31,550 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:31,585 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 7 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:31,585 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:144, output treesize:280 [2018-04-13 10:20:32,040 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,041 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 24 [2018-04-13 10:20:32,045 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:32,079 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-1 vars, End of recursive call: 7 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:32,079 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:141, output treesize:280 [2018-04-13 10:20:32,425 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-13 10:20:32,425 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:32,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 107 treesize of output 85 [2018-04-13 10:20:32,460 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,461 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,461 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,462 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,462 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,463 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,464 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,465 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,466 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,466 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,467 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,468 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,469 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,469 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,470 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,470 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,471 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,471 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,472 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,472 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,473 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,473 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,474 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,475 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,475 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,476 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,476 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,477 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,477 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,478 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,479 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,480 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,480 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,481 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,481 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,482 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,483 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,483 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,484 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,484 INFO L682 Elim1Store]: detected equality via solver [2018-04-13 10:20:32,485 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,486 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,486 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,487 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,487 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,488 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,489 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,489 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 11 select indices, 11 select index equivalence classes, 45 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 85 treesize of output 476 [2018-04-13 10:20:32,490 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:32,547 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:32,556 INFO L267 ElimStorePlain]: Start of recursive call 1: 10 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:32,556 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 12 variables, input treesize:302, output treesize:14 [2018-04-13 10:20:32,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,626 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:32,627 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-04-13 10:20:32,627 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:32,631 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:32,631 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:11 [2018-04-13 10:20:32,868 INFO L134 CoverageAnalysis]: Checked inductivity of 293 backedges. 0 proven. 275 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-04-13 10:20:32,868 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:20:32,868 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57] total 57 [2018-04-13 10:20:32,868 INFO L442 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-04-13 10:20:32,868 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-04-13 10:20:32,869 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=248, Invalid=3058, Unknown=0, NotChecked=0, Total=3306 [2018-04-13 10:20:32,869 INFO L87 Difference]: Start difference. First operand 724 states and 822 transitions. Second operand 58 states. [2018-04-13 10:20:42,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-04-13 10:20:42,987 INFO L93 Difference]: Finished difference Result 727 states and 821 transitions. [2018-04-13 10:20:42,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-04-13 10:20:42,987 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 152 [2018-04-13 10:20:42,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-04-13 10:20:42,988 INFO L225 Difference]: With dead ends: 727 [2018-04-13 10:20:42,988 INFO L226 Difference]: Without dead ends: 727 [2018-04-13 10:20:42,988 INFO L567 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 95 SyntacticMatches, 0 SemanticMatches, 110 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3619 ImplicationChecksByTransitivity, 8.3s TimeCoverageRelationStatistics Valid=738, Invalid=11694, Unknown=0, NotChecked=0, Total=12432 [2018-04-13 10:20:42,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 727 states. [2018-04-13 10:20:42,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 727 to 724. [2018-04-13 10:20:42,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 724 states. [2018-04-13 10:20:42,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 724 states to 724 states and 821 transitions. [2018-04-13 10:20:42,991 INFO L78 Accepts]: Start accepts. Automaton has 724 states and 821 transitions. Word has length 152 [2018-04-13 10:20:42,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-04-13 10:20:42,991 INFO L459 AbstractCegarLoop]: Abstraction has 724 states and 821 transitions. [2018-04-13 10:20:42,992 INFO L460 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-04-13 10:20:42,992 INFO L276 IsEmpty]: Start isEmpty. Operand 724 states and 821 transitions. [2018-04-13 10:20:42,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 153 [2018-04-13 10:20:42,992 INFO L347 BasicCegarLoop]: Found error trace [2018-04-13 10:20:42,992 INFO L355 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-04-13 10:20:42,992 INFO L408 AbstractCegarLoop]: === Iteration 130 === [__U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_sub_returnErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_createErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kref_initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_destroy_msgsErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_freeErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_add_tailErr1RequiresViolation, mainErr0EnsuresViolationMEMORY_LEAK, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_get_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_allocErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_addErr7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_dev_set_drvdataErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i____ldv_list_delErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_atomic_add_returnErr3RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__free_17Err3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_list_addErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__LDV_INIT_LIST_HEADErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err7RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err6RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__alloc_17Err4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr4AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr5AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_kobject_cleanupErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr1RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr2AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__entry_pointErr3AssertViolationMEMORY_FREE, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr0RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr3RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr4RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr5RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr2RequiresViolation, __U_MULTI_fmemleaks_test_____true_valid_memsafety_true_termination_i__ldv_msg_fillErr1RequiresViolation]=== [2018-04-13 10:20:42,992 INFO L82 PathProgramCache]: Analyzing trace with hash -31127111, now seen corresponding path program 6 times [2018-04-13 10:20:42,992 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS_NO_ARRAY [2018-04-13 10:20:42,992 INFO L68 tionRefinementEngine]: Using refinement strategy SmtInterpolRefinementStrategy [2018-04-13 10:20:42,993 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:20:42,993 INFO L101 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-04-13 10:20:42,993 INFO L119 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-04-13 10:20:43,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-04-13 10:20:43,001 WARN L250 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-04-13 10:20:43,005 INFO L431 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown lemma type! [2018-04-13 10:20:43,005 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-04-13 10:20:43,005 INFO L213 ckRefinementStrategy]: Switched to mode SMTINTERPOL_FP [2018-04-13 10:20:43,005 INFO L103 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-04-13 10:20:43,032 INFO L242 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 7 check-sat command(s) [2018-04-13 10:20:43,032 INFO L243 tOrderPrioritization]: Conjunction of SSA is unsat [2018-04-13 10:20:43,035 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-04-13 10:20:43,039 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-04-13 10:20:43,039 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:43,048 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-04-13 10:20:43,048 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:43,055 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:20:43,056 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:36 [2018-04-13 10:20:43,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 49 [2018-04-13 10:20:43,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:20:43,528 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:43,537 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:43,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 50 treesize of output 47 [2018-04-13 10:20:43,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-04-13 10:20:43,563 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:43,571 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:43,593 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:43,593 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:103, output treesize:89 [2018-04-13 10:20:43,913 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:43,914 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:43,914 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-04-13 10:20:43,914 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:43,971 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:43,972 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:43,972 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 59 treesize of output 53 [2018-04-13 10:20:43,972 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:44,026 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:44,027 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:44,027 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 55 [2018-04-13 10:20:44,027 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:44,079 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:44,080 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:44,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 55 [2018-04-13 10:20:44,080 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:44,134 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 4 dim-1 vars, End of recursive call: 12 dim-0 vars, and 4 xjuncts. [2018-04-13 10:20:44,134 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 16 variables, input treesize:245, output treesize:221 [2018-04-13 10:20:44,549 WARN L148 SmtUtils]: Spent 332ms on a formula simplification that was a NOOP. DAG size: 88 [2018-04-13 10:20:44,560 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 63 [2018-04-13 10:20:44,562 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:44,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 47 [2018-04-13 10:20:44,563 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:44,574 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:44,654 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 65 [2018-04-13 10:20:44,656 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:44,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 49 [2018-04-13 10:20:44,657 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:44,669 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:44,737 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 67 [2018-04-13 10:20:44,739 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:44,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 51 [2018-04-13 10:20:44,740 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:44,751 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:44,820 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 65 [2018-04-13 10:20:44,823 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:44,824 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 49 [2018-04-13 10:20:44,824 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:44,835 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:44,894 INFO L267 ElimStorePlain]: Start of recursive call 1: 16 dim-0 vars, 4 dim-2 vars, End of recursive call: 12 dim-0 vars, and 4 xjuncts. [2018-04-13 10:20:44,894 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 20 variables, input treesize:281, output treesize:221 [2018-04-13 10:20:45,283 WARN L148 SmtUtils]: Spent 315ms on a formula simplification that was a NOOP. DAG size: 89 [2018-04-13 10:20:45,700 WARN L148 SmtUtils]: Spent 323ms on a formula simplification that was a NOOP. DAG size: 88 [2018-04-13 10:20:45,707 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 55 [2018-04-13 10:20:45,708 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:45,709 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 57 [2018-04-13 10:20:45,709 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:45,710 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 55 [2018-04-13 10:20:45,711 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:45,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 53 [2018-04-13 10:20:45,712 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:45,764 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 1 dim-1 vars, End of recursive call: 12 dim-0 vars, and 4 xjuncts. [2018-04-13 10:20:45,764 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 13 variables, input treesize:241, output treesize:221 [2018-04-13 10:20:45,778 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 68 treesize of output 63 [2018-04-13 10:20:45,779 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:45,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 47 [2018-04-13 10:20:45,781 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:45,792 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:45,869 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 65 [2018-04-13 10:20:45,871 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:45,872 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 49 [2018-04-13 10:20:45,872 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:45,884 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:45,955 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 72 treesize of output 67 [2018-04-13 10:20:45,957 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:45,958 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 51 [2018-04-13 10:20:45,958 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:45,970 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:46,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 70 treesize of output 65 [2018-04-13 10:20:46,035 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:46,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 35 treesize of output 49 [2018-04-13 10:20:46,037 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:46,048 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-04-13 10:20:46,105 INFO L267 ElimStorePlain]: Start of recursive call 1: 12 dim-0 vars, 4 dim-2 vars, End of recursive call: 12 dim-0 vars, and 4 xjuncts. [2018-04-13 10:20:46,105 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 16 variables, input treesize:281, output treesize:265 [2018-04-13 10:20:46,520 WARN L148 SmtUtils]: Spent 335ms on a formula simplification that was a NOOP. DAG size: 91 [2018-04-13 10:20:46,794 WARN L148 SmtUtils]: Spent 175ms on a formula simplification that was a NOOP. DAG size: 127 [2018-04-13 10:20:46,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 89 treesize of output 83 [2018-04-13 10:20:46,808 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:46,809 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:46,814 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 58 [2018-04-13 10:20:46,814 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:46,835 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:46,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 84 treesize of output 78 [2018-04-13 10:20:46,944 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:46,945 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:46,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 43 treesize of output 60 [2018-04-13 10:20:46,950 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:46,969 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:47,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 74 [2018-04-13 10:20:47,091 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:47,092 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:47,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 39 treesize of output 56 [2018-04-13 10:20:47,096 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:47,115 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:47,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 82 treesize of output 76 [2018-04-13 10:20:47,256 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:47,256 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:47,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 41 treesize of output 58 [2018-04-13 10:20:47,262 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:47,280 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:47,467 INFO L267 ElimStorePlain]: Start of recursive call 1: 24 dim-0 vars, 4 dim-2 vars, End of recursive call: 36 dim-0 vars, and 8 xjuncts. [2018-04-13 10:20:47,467 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 28 variables, input treesize:357, output treesize:365 [2018-04-13 10:20:48,725 WARN L148 SmtUtils]: Spent 998ms on a formula simplification that was a NOOP. DAG size: 210 [2018-04-13 10:20:48,745 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 53 [2018-04-13 10:20:48,745 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:48,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 48 [2018-04-13 10:20:48,912 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:49,049 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 52 [2018-04-13 10:20:49,050 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:49,190 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 50 [2018-04-13 10:20:49,190 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:49,339 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 48 [2018-04-13 10:20:49,339 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:49,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 49 treesize of output 48 [2018-04-13 10:20:49,470 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:49,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 50 [2018-04-13 10:20:49,612 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:49,739 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 46 [2018-04-13 10:20:49,740 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:49,865 INFO L267 ElimStorePlain]: Start of recursive call 1: 44 dim-0 vars, 8 dim-1 vars, End of recursive call: 44 dim-0 vars, and 8 xjuncts. [2018-04-13 10:20:49,865 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 52 variables, input treesize:413, output treesize:393 [2018-04-13 10:20:51,386 WARN L148 SmtUtils]: Spent 1254ms on a formula simplification that was a NOOP. DAG size: 234 [2018-04-13 10:20:53,070 WARN L148 SmtUtils]: Spent 1440ms on a formula simplification that was a NOOP. DAG size: 234 [2018-04-13 10:20:53,106 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-04-13 10:20:53,106 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:53,262 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:53,262 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:53,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 76 [2018-04-13 10:20:53,265 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:53,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 35 treesize of output 56 [2018-04-13 10:20:53,270 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:53,297 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:20:53,390 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:53,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 62 [2018-04-13 10:20:53,398 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 32 [2018-04-13 10:20:53,399 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:53,421 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:20:53,536 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:53,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 64 [2018-04-13 10:20:53,540 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:53,541 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:53,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 23 treesize of output 54 [2018-04-13 10:20:53,546 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:53,575 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:20:53,983 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:53,983 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:53,984 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 3 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 74 [2018-04-13 10:20:53,986 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:53,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 33 treesize of output 54 [2018-04-13 10:20:53,991 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-04-13 10:20:54,020 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-04-13 10:20:54,177 INFO L267 ElimStorePlain]: Start of recursive call 1: 44 dim-0 vars, 8 dim-1 vars, End of recursive call: 32 dim-0 vars, and 8 xjuncts. [2018-04-13 10:20:54,177 INFO L202 ElimStorePlain]: Needed 10 recursive calls to eliminate 52 variables, input treesize:473, output treesize:397 [2018-04-13 10:20:54,814 WARN L151 SmtUtils]: Spent 480ms on a formula simplification. DAG size of input: 202 DAG size of output 53 [2018-04-13 10:20:55,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:55,081 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:55,081 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 40 [2018-04-13 10:20:55,082 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:55,103 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:55,104 INFO L700 Elim1Store]: detected not equals via solver [2018-04-13 10:20:55,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 38 [2018-04-13 10:20:55,104 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:55,122 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 2 dim-1 vars, End of recursive call: 6 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:55,122 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 8 variables, input treesize:91, output treesize:75 [2018-04-13 10:20:55,478 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 36 [2018-04-13 10:20:55,478 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:55,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 38 [2018-04-13 10:20:55,479 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:55,497 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-1 vars, End of recursive call: 6 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:55,498 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:85, output treesize:75 [2018-04-13 10:20:55,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 53 [2018-04-13 10:20:55,675 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:55,676 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 55 [2018-04-13 10:20:55,676 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-04-13 10:20:55,698 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-1 vars, End of recursive call: 6 dim-0 vars, and 2 xjuncts. [2018-04-13 10:20:55,698 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:119, output treesize:75 [2018-04-13 10:20:56,120 INFO L134 CoverageAnalysis]: Checked inductivity of 293 backedges. 6 proven. 85 refuted. 0 times theorem prover too weak. 202 trivial. 0 not checked. [2018-04-13 10:20:56,121 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2018-04-13 10:20:56,121 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32] total 32 [2018-04-13 10:20:56,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-04-13 10:20:56,121 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-04-13 10:20:56,121 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=988, Unknown=0, NotChecked=0, Total=1056 [2018-04-13 10:20:56,121 INFO L87 Difference]: Start difference. First operand 724 states and 821 transitions. Second operand 33 states. [2018-04-13 10:20:56,672 WARN L151 SmtUtils]: Spent 106ms on a formula simplification. DAG size of input: 54 DAG size of output 52 [2018-04-13 10:20:56,955 WARN L151 SmtUtils]: Spent 204ms on a formula simplification. DAG size of input: 73 DAG size of output 71 [2018-04-13 10:20:59,035 WARN L151 SmtUtils]: Spent 266ms on a formula simplification. DAG size of input: 75 DAG size of output 75 [2018-04-13 10:20:59,350 WARN L148 SmtUtils]: Spent 102ms on a formula simplification that was a NOOP. DAG size: 65 [2018-04-13 10:21:02,992 WARN L151 SmtUtils]: Spent 1248ms on a formula simplification. DAG size of input: 124 DAG size of output 124 [2018-04-13 10:21:05,878 WARN L151 SmtUtils]: Spent 1336ms on a formula simplification. DAG size of input: 284 DAG size of output 211 [2018-04-13 10:21:09,494 WARN L151 SmtUtils]: Spent 3142ms on a formula simplification. DAG size of input: 349 DAG size of output 257 [2018-04-13 10:21:11,768 WARN L151 SmtUtils]: Spent 2013ms on a formula simplification. DAG size of input: 308 DAG size of output 228 Received shutdown request... [2018-04-13 10:21:12,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-04-13 10:21:12,757 WARN L519 AbstractCegarLoop]: Verification canceled [2018-04-13 10:21:12,761 WARN L197 ceAbstractionStarter]: Timeout [2018-04-13 10:21:12,762 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 13.04 10:21:12 BoogieIcfgContainer [2018-04-13 10:21:12,762 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-04-13 10:21:12,763 INFO L168 Benchmark]: Toolchain (without parser) took 803496.10 ms. Allocated memory was 398.5 MB in the beginning and 604.0 MB in the end (delta: 205.5 MB). Free memory was 330.0 MB in the beginning and 270.3 MB in the end (delta: 59.6 MB). Peak memory consumption was 265.2 MB. Max. memory is 5.3 GB. [2018-04-13 10:21:12,764 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 398.5 MB. Free memory is still 361.3 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-04-13 10:21:12,764 INFO L168 Benchmark]: CACSL2BoogieTranslator took 299.02 ms. Allocated memory is still 398.5 MB. Free memory was 330.0 MB in the beginning and 284.9 MB in the end (delta: 45.1 MB). Peak memory consumption was 45.1 MB. Max. memory is 5.3 GB. [2018-04-13 10:21:12,764 INFO L168 Benchmark]: Boogie Preprocessor took 57.38 ms. Allocated memory is still 398.5 MB. Free memory was 284.9 MB in the beginning and 281.0 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 5.3 GB. [2018-04-13 10:21:12,764 INFO L168 Benchmark]: RCFGBuilder took 821.44 ms. Allocated memory was 398.5 MB in the beginning and 602.9 MB in the end (delta: 204.5 MB). Free memory was 281.0 MB in the beginning and 464.8 MB in the end (delta: -183.8 MB). Peak memory consumption was 36.4 MB. Max. memory is 5.3 GB. [2018-04-13 10:21:12,765 INFO L168 Benchmark]: TraceAbstraction took 802315.47 ms. Allocated memory was 602.9 MB in the beginning and 604.0 MB in the end (delta: 1.0 MB). Free memory was 464.8 MB in the beginning and 270.3 MB in the end (delta: 194.4 MB). Peak memory consumption was 195.5 MB. Max. memory is 5.3 GB. [2018-04-13 10:21:12,766 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 398.5 MB. Free memory is still 361.3 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 299.02 ms. Allocated memory is still 398.5 MB. Free memory was 330.0 MB in the beginning and 284.9 MB in the end (delta: 45.1 MB). Peak memory consumption was 45.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 57.38 ms. Allocated memory is still 398.5 MB. Free memory was 284.9 MB in the beginning and 281.0 MB in the end (delta: 4.0 MB). Peak memory consumption was 4.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 821.44 ms. Allocated memory was 398.5 MB in the beginning and 602.9 MB in the end (delta: 204.5 MB). Free memory was 281.0 MB in the beginning and 464.8 MB in the end (delta: -183.8 MB). Peak memory consumption was 36.4 MB. Max. memory is 5.3 GB. * TraceAbstraction took 802315.47 ms. Allocated memory was 602.9 MB in the beginning and 604.0 MB in the end (delta: 1.0 MB). Free memory was 464.8 MB in the beginning and 270.3 MB in the end (delta: 194.4 MB). Peak memory consumption was 195.5 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1265]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1267]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1265]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1267]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1411]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1411]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1294]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1294]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1179]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1179]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1179]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1179]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1179]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1179]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1131]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1131]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1131]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1131]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1163]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1163). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1163]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1163). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1164]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1164). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1164]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1164). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1163]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1163). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1163]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1163). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1126]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1126). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1126]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1126). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1478]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1478). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1193]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1193]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1146]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1146). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1146]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1146). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1108]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1108). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1107]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1107). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1109]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1109). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1108]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1108). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1109]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1109). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1107]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1107). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1110]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1110). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1110]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1110). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1198]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1198]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1116]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1116). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1115]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1115). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1115]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1115). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1116]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1116). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1258]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1256]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1256]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1258]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1135]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1135]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1135]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1135]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1460]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1460). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1460]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1460). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1460]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1460). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1460]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1460). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1121]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1121). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1121]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1121). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1099]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1100]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1099]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1100]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1446]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1446). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1452]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1452). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1451]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1451). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1451]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1451). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1451]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1451). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1446]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1446). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1452]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1452). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1451]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1451). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1344]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1340]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1339]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1344]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1340]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1339]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1470]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1470). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1474]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1474). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1470]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1470). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1474]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1474). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1156]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1156]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1157]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1157). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1157]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1157). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1156]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - TimeoutResultAtElement [Line: 1156]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was constructing difference of abstraction (724states) and interpolant automaton (currently 25 states, 33 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 278. - StatisticsResult: Ultimate Automizer benchmark data CFG has 45 procedures, 384 locations, 87 error locations. TIMEOUT Result, 802.2s OverallTime, 130 OverallIterations, 12 TraceHistogramMax, 548.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 11797 SDtfs, 19423 SDslu, 119172 SDs, 0 SdLazy, 148552 SolverSat, 4822 SolverUnsat, 64 SolverUnknown, 0 SolverNotchecked, 198.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 16308 GetRequests, 11190 SyntacticMatches, 167 SemanticMatches, 4950 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 65131 ImplicationChecksByTransitivity, 500.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=724occurred in iteration=127, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 129 MinimizatonAttempts, 3236 StatesRemovedByMinimization, 125 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 4.3s SatisfiabilityAnalysisTime, 248.1s InterpolantComputationTime, 27938 NumberOfCodeBlocks, 27175 NumberOfCodeBlocksAsserted, 625 NumberOfCheckSat, 17923 ConstructedInterpolants, 3767 QuantifiedInterpolants, 47634955 SizeOfPredicates, 1202 NumberOfNonLiveVariables, 42866 ConjunctsInSsa, 5278 ConjunctsInUnsatCore, 170 InterpolantComputations, 14 PerfectInterpolantSequences, 24638/40129 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test17_1_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-Benchmark-0-2018-04-13_10-21-12-774.csv Written .csv to /home/ultimate/work/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test17_1_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_SmtInterpol_NoArray.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-04-13_10-21-12-774.csv Completed graceful shutdown