/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf -i ../../../trunk/examples/svcomp/systemc/transmitter.02.cil.c -------------------------------------------------------------------------------- This is Ultimate 0.1.25-267fbe0 [2020-07-17 12:17:56,351 INFO L177 SettingsManager]: Resetting all preferences to default values... [2020-07-17 12:17:56,354 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2020-07-17 12:17:56,374 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2020-07-17 12:17:56,375 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2020-07-17 12:17:56,377 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2020-07-17 12:17:56,379 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2020-07-17 12:17:56,393 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2020-07-17 12:17:56,395 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2020-07-17 12:17:56,396 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2020-07-17 12:17:56,397 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2020-07-17 12:17:56,398 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2020-07-17 12:17:56,399 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2020-07-17 12:17:56,400 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2020-07-17 12:17:56,401 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2020-07-17 12:17:56,402 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2020-07-17 12:17:56,403 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2020-07-17 12:17:56,404 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2020-07-17 12:17:56,405 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2020-07-17 12:17:56,407 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2020-07-17 12:17:56,409 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2020-07-17 12:17:56,410 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2020-07-17 12:17:56,411 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2020-07-17 12:17:56,412 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2020-07-17 12:17:56,414 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2020-07-17 12:17:56,414 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2020-07-17 12:17:56,415 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2020-07-17 12:17:56,416 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2020-07-17 12:17:56,416 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2020-07-17 12:17:56,417 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2020-07-17 12:17:56,417 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2020-07-17 12:17:56,418 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2020-07-17 12:17:56,419 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2020-07-17 12:17:56,420 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2020-07-17 12:17:56,421 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2020-07-17 12:17:56,421 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2020-07-17 12:17:56,421 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2020-07-17 12:17:56,422 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2020-07-17 12:17:56,422 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2020-07-17 12:17:56,423 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2020-07-17 12:17:56,423 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2020-07-17 12:17:56,424 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/default/automizer/svcomp-Reach-32bit-Automizer_Default.epf [2020-07-17 12:17:56,439 INFO L113 SettingsManager]: Loading preferences was successful [2020-07-17 12:17:56,439 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2020-07-17 12:17:56,441 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2020-07-17 12:17:56,441 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2020-07-17 12:17:56,441 INFO L138 SettingsManager]: * Use SBE=true [2020-07-17 12:17:56,441 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2020-07-17 12:17:56,442 INFO L138 SettingsManager]: * sizeof long=4 [2020-07-17 12:17:56,442 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2020-07-17 12:17:56,442 INFO L138 SettingsManager]: * sizeof POINTER=4 [2020-07-17 12:17:56,442 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2020-07-17 12:17:56,442 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2020-07-17 12:17:56,442 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2020-07-17 12:17:56,443 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2020-07-17 12:17:56,443 INFO L138 SettingsManager]: * sizeof long double=12 [2020-07-17 12:17:56,443 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2020-07-17 12:17:56,443 INFO L138 SettingsManager]: * Use constant arrays=true [2020-07-17 12:17:56,443 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2020-07-17 12:17:56,444 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2020-07-17 12:17:56,444 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2020-07-17 12:17:56,444 INFO L138 SettingsManager]: * To the following directory=./dump/ [2020-07-17 12:17:56,444 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2020-07-17 12:17:56,444 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2020-07-17 12:17:56,445 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2020-07-17 12:17:56,445 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2020-07-17 12:17:56,445 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2020-07-17 12:17:56,445 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2020-07-17 12:17:56,446 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2020-07-17 12:17:56,446 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2020-07-17 12:17:56,446 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2020-07-17 12:17:56,446 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2020-07-17 12:17:56,717 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2020-07-17 12:17:56,738 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2020-07-17 12:17:56,741 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2020-07-17 12:17:56,742 INFO L271 PluginConnector]: Initializing CDTParser... [2020-07-17 12:17:56,743 INFO L275 PluginConnector]: CDTParser initialized [2020-07-17 12:17:56,743 INFO L429 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/systemc/transmitter.02.cil.c [2020-07-17 12:17:56,825 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4b2c3509b/db2c16d56ecf413aa4f771af78115bbe/FLAG6773299d2 [2020-07-17 12:17:57,352 INFO L306 CDTParser]: Found 1 translation units. [2020-07-17 12:17:57,354 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/systemc/transmitter.02.cil.c [2020-07-17 12:17:57,369 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4b2c3509b/db2c16d56ecf413aa4f771af78115bbe/FLAG6773299d2 [2020-07-17 12:17:57,703 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/4b2c3509b/db2c16d56ecf413aa4f771af78115bbe [2020-07-17 12:17:57,714 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2020-07-17 12:17:57,718 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2020-07-17 12:17:57,719 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2020-07-17 12:17:57,719 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2020-07-17 12:17:57,723 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2020-07-17 12:17:57,724 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.07 12:17:57" (1/1) ... [2020-07-17 12:17:57,727 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7fe1dbf7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.07 12:17:57, skipping insertion in model container [2020-07-17 12:17:57,727 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 17.07 12:17:57" (1/1) ... [2020-07-17 12:17:57,735 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2020-07-17 12:17:57,769 INFO L178 MainTranslator]: Built tables and reachable declarations [2020-07-17 12:17:57,983 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-07-17 12:17:57,989 INFO L203 MainTranslator]: Completed pre-run [2020-07-17 12:17:58,114 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-07-17 12:17:58,141 INFO L208 MainTranslator]: Completed translation [2020-07-17 12:17:58,141 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.07 12:17:58 WrapperNode [2020-07-17 12:17:58,141 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2020-07-17 12:17:58,142 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2020-07-17 12:17:58,142 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2020-07-17 12:17:58,142 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2020-07-17 12:17:58,154 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.07 12:17:58" (1/1) ... [2020-07-17 12:17:58,154 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.07 12:17:58" (1/1) ... [2020-07-17 12:17:58,162 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.07 12:17:58" (1/1) ... [2020-07-17 12:17:58,162 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.07 12:17:58" (1/1) ... [2020-07-17 12:17:58,172 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.07 12:17:58" (1/1) ... [2020-07-17 12:17:58,183 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.07 12:17:58" (1/1) ... [2020-07-17 12:17:58,186 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.07 12:17:58" (1/1) ... [2020-07-17 12:17:58,190 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2020-07-17 12:17:58,190 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2020-07-17 12:17:58,191 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2020-07-17 12:17:58,191 INFO L275 PluginConnector]: RCFGBuilder initialized [2020-07-17 12:17:58,192 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.07 12:17:58" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2020-07-17 12:17:58,256 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2020-07-17 12:17:58,257 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2020-07-17 12:17:58,257 INFO L138 BoogieDeclarations]: Found implementation of procedure error [2020-07-17 12:17:58,257 INFO L138 BoogieDeclarations]: Found implementation of procedure master [2020-07-17 12:17:58,257 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit1 [2020-07-17 12:17:58,257 INFO L138 BoogieDeclarations]: Found implementation of procedure transmit2 [2020-07-17 12:17:58,257 INFO L138 BoogieDeclarations]: Found implementation of procedure is_master_triggered [2020-07-17 12:17:58,257 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit1_triggered [2020-07-17 12:17:58,258 INFO L138 BoogieDeclarations]: Found implementation of procedure is_transmit2_triggered [2020-07-17 12:17:58,258 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels [2020-07-17 12:17:58,258 INFO L138 BoogieDeclarations]: Found implementation of procedure init_threads [2020-07-17 12:17:58,258 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread [2020-07-17 12:17:58,259 INFO L138 BoogieDeclarations]: Found implementation of procedure eval [2020-07-17 12:17:58,259 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events [2020-07-17 12:17:58,259 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events [2020-07-17 12:17:58,260 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads [2020-07-17 12:17:58,260 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2020-07-17 12:17:58,260 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_time_events [2020-07-17 12:17:58,260 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_time_events [2020-07-17 12:17:58,261 INFO L138 BoogieDeclarations]: Found implementation of procedure init_model [2020-07-17 12:17:58,261 INFO L138 BoogieDeclarations]: Found implementation of procedure stop_simulation [2020-07-17 12:17:58,261 INFO L138 BoogieDeclarations]: Found implementation of procedure start_simulation [2020-07-17 12:17:58,262 INFO L138 BoogieDeclarations]: Found implementation of procedure main [2020-07-17 12:17:58,262 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2020-07-17 12:17:58,263 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2020-07-17 12:17:58,264 INFO L130 BoogieDeclarations]: Found specification of procedure error [2020-07-17 12:17:58,264 INFO L130 BoogieDeclarations]: Found specification of procedure is_master_triggered [2020-07-17 12:17:58,264 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit1_triggered [2020-07-17 12:17:58,264 INFO L130 BoogieDeclarations]: Found specification of procedure is_transmit2_triggered [2020-07-17 12:17:58,264 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2020-07-17 12:17:58,265 INFO L130 BoogieDeclarations]: Found specification of procedure master [2020-07-17 12:17:58,265 INFO L130 BoogieDeclarations]: Found specification of procedure transmit1 [2020-07-17 12:17:58,265 INFO L130 BoogieDeclarations]: Found specification of procedure transmit2 [2020-07-17 12:17:58,265 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels [2020-07-17 12:17:58,265 INFO L130 BoogieDeclarations]: Found specification of procedure init_threads [2020-07-17 12:17:58,265 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread [2020-07-17 12:17:58,266 INFO L130 BoogieDeclarations]: Found specification of procedure eval [2020-07-17 12:17:58,266 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events [2020-07-17 12:17:58,266 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events [2020-07-17 12:17:58,266 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads [2020-07-17 12:17:58,267 INFO L130 BoogieDeclarations]: Found specification of procedure fire_time_events [2020-07-17 12:17:58,267 INFO L130 BoogieDeclarations]: Found specification of procedure reset_time_events [2020-07-17 12:17:58,267 INFO L130 BoogieDeclarations]: Found specification of procedure init_model [2020-07-17 12:17:58,267 INFO L130 BoogieDeclarations]: Found specification of procedure stop_simulation [2020-07-17 12:17:58,267 INFO L130 BoogieDeclarations]: Found specification of procedure start_simulation [2020-07-17 12:17:58,268 INFO L130 BoogieDeclarations]: Found specification of procedure main [2020-07-17 12:17:58,268 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2020-07-17 12:17:58,268 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2020-07-17 12:17:58,833 INFO L290 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2020-07-17 12:17:58,834 INFO L295 CfgBuilder]: Removed 6 assume(true) statements. [2020-07-17 12:17:58,840 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.07 12:17:58 BoogieIcfgContainer [2020-07-17 12:17:58,840 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2020-07-17 12:17:58,841 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2020-07-17 12:17:58,842 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2020-07-17 12:17:58,845 INFO L275 PluginConnector]: TraceAbstraction initialized [2020-07-17 12:17:58,845 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 17.07 12:17:57" (1/3) ... [2020-07-17 12:17:58,846 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3026d9d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 17.07 12:17:58, skipping insertion in model container [2020-07-17 12:17:58,846 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 17.07 12:17:58" (2/3) ... [2020-07-17 12:17:58,847 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3026d9d2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 17.07 12:17:58, skipping insertion in model container [2020-07-17 12:17:58,847 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 17.07 12:17:58" (3/3) ... [2020-07-17 12:17:58,849 INFO L109 eAbstractionObserver]: Analyzing ICFG transmitter.02.cil.c [2020-07-17 12:17:58,859 INFO L157 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2020-07-17 12:17:58,866 INFO L169 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2020-07-17 12:17:58,879 INFO L251 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2020-07-17 12:17:58,902 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-07-17 12:17:58,902 INFO L376 AbstractCegarLoop]: Hoare is true [2020-07-17 12:17:58,902 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-07-17 12:17:58,903 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-07-17 12:17:58,903 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-07-17 12:17:58,903 INFO L380 AbstractCegarLoop]: Difference is false [2020-07-17 12:17:58,904 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-07-17 12:17:58,904 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-07-17 12:17:58,931 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states. [2020-07-17 12:17:58,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-17 12:17:58,944 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:17:58,945 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:17:58,946 INFO L427 AbstractCegarLoop]: === Iteration 1 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:17:58,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:17:58,953 INFO L82 PathProgramCache]: Analyzing trace with hash 1996614335, now seen corresponding path program 1 times [2020-07-17 12:17:58,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:17:58,963 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1409796293] [2020-07-17 12:17:58,964 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:17:59,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:17:59,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:17:59,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:17:59,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:17:59,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:17:59,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:17:59,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:17:59,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:17:59,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:17:59,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:17:59,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:17:59,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:17:59,440 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-17 12:17:59,441 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1409796293] [2020-07-17 12:17:59,442 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:17:59,443 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2020-07-17 12:17:59,444 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [13657267] [2020-07-17 12:17:59,450 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2020-07-17 12:17:59,450 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:17:59,465 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-07-17 12:17:59,466 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2020-07-17 12:17:59,469 INFO L87 Difference]: Start difference. First operand 169 states. Second operand 8 states. [2020-07-17 12:18:01,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:01,053 INFO L93 Difference]: Finished difference Result 412 states and 626 transitions. [2020-07-17 12:18:01,054 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2020-07-17 12:18:01,056 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 90 [2020-07-17 12:18:01,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:01,094 INFO L225 Difference]: With dead ends: 412 [2020-07-17 12:18:01,094 INFO L226 Difference]: Without dead ends: 247 [2020-07-17 12:18:01,106 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=62, Invalid=148, Unknown=0, NotChecked=0, Total=210 [2020-07-17 12:18:01,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 247 states. [2020-07-17 12:18:01,203 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 247 to 160. [2020-07-17 12:18:01,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2020-07-17 12:18:01,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 212 transitions. [2020-07-17 12:18:01,210 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 212 transitions. Word has length 90 [2020-07-17 12:18:01,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:01,210 INFO L479 AbstractCegarLoop]: Abstraction has 160 states and 212 transitions. [2020-07-17 12:18:01,210 INFO L480 AbstractCegarLoop]: Interpolant automaton has 8 states. [2020-07-17 12:18:01,211 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 212 transitions. [2020-07-17 12:18:01,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-17 12:18:01,220 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:01,221 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:01,221 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2020-07-17 12:18:01,221 INFO L427 AbstractCegarLoop]: === Iteration 2 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:01,221 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:01,221 INFO L82 PathProgramCache]: Analyzing trace with hash -387310403, now seen corresponding path program 1 times [2020-07-17 12:18:01,222 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:01,222 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [831716416] [2020-07-17 12:18:01,222 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:01,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:01,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:01,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:01,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:01,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:01,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:01,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:01,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:01,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:01,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:01,479 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:01,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:01,493 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-17 12:18:01,494 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [831716416] [2020-07-17 12:18:01,494 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:01,494 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2020-07-17 12:18:01,494 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [364990666] [2020-07-17 12:18:01,496 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2020-07-17 12:18:01,496 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:01,497 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-07-17 12:18:01,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2020-07-17 12:18:01,497 INFO L87 Difference]: Start difference. First operand 160 states and 212 transitions. Second operand 9 states. [2020-07-17 12:18:03,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:03,765 INFO L93 Difference]: Finished difference Result 579 states and 839 transitions. [2020-07-17 12:18:03,765 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2020-07-17 12:18:03,765 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 90 [2020-07-17 12:18:03,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:03,776 INFO L225 Difference]: With dead ends: 579 [2020-07-17 12:18:03,778 INFO L226 Difference]: Without dead ends: 439 [2020-07-17 12:18:03,780 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 26 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=91, Invalid=215, Unknown=0, NotChecked=0, Total=306 [2020-07-17 12:18:03,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 439 states. [2020-07-17 12:18:03,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 439 to 294. [2020-07-17 12:18:03,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2020-07-17 12:18:03,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 393 transitions. [2020-07-17 12:18:03,890 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 393 transitions. Word has length 90 [2020-07-17 12:18:03,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:03,890 INFO L479 AbstractCegarLoop]: Abstraction has 294 states and 393 transitions. [2020-07-17 12:18:03,890 INFO L480 AbstractCegarLoop]: Interpolant automaton has 9 states. [2020-07-17 12:18:03,891 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 393 transitions. [2020-07-17 12:18:03,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-17 12:18:03,902 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:03,903 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:03,903 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2020-07-17 12:18:03,903 INFO L427 AbstractCegarLoop]: === Iteration 3 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:03,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:03,904 INFO L82 PathProgramCache]: Analyzing trace with hash 1952833149, now seen corresponding path program 1 times [2020-07-17 12:18:03,904 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:03,906 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [370451974] [2020-07-17 12:18:03,906 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:03,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:04,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:04,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:04,032 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:04,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:04,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:04,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:04,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:04,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:04,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:04,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:04,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:04,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-17 12:18:04,117 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [370451974] [2020-07-17 12:18:04,118 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:04,118 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-17 12:18:04,118 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1035276061] [2020-07-17 12:18:04,119 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-17 12:18:04,119 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:04,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-17 12:18:04,120 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2020-07-17 12:18:04,120 INFO L87 Difference]: Start difference. First operand 294 states and 393 transitions. Second operand 10 states. [2020-07-17 12:18:05,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:05,365 INFO L93 Difference]: Finished difference Result 704 states and 993 transitions. [2020-07-17 12:18:05,365 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2020-07-17 12:18:05,366 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-17 12:18:05,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:05,370 INFO L225 Difference]: With dead ends: 704 [2020-07-17 12:18:05,370 INFO L226 Difference]: Without dead ends: 430 [2020-07-17 12:18:05,371 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=145, Unknown=0, NotChecked=0, Total=210 [2020-07-17 12:18:05,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2020-07-17 12:18:05,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 294. [2020-07-17 12:18:05,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2020-07-17 12:18:05,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 386 transitions. [2020-07-17 12:18:05,411 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 386 transitions. Word has length 90 [2020-07-17 12:18:05,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:05,411 INFO L479 AbstractCegarLoop]: Abstraction has 294 states and 386 transitions. [2020-07-17 12:18:05,411 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-17 12:18:05,412 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 386 transitions. [2020-07-17 12:18:05,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-17 12:18:05,413 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:05,414 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:05,414 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2020-07-17 12:18:05,414 INFO L427 AbstractCegarLoop]: === Iteration 4 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:05,414 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:05,415 INFO L82 PathProgramCache]: Analyzing trace with hash 227206333, now seen corresponding path program 1 times [2020-07-17 12:18:05,415 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:05,415 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954141035] [2020-07-17 12:18:05,415 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:05,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:05,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:05,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:05,547 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:05,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:05,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:05,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:05,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:05,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:05,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:05,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:05,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:05,687 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-17 12:18:05,687 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1954141035] [2020-07-17 12:18:05,688 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:05,688 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-17 12:18:05,688 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [926976102] [2020-07-17 12:18:05,689 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-17 12:18:05,690 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:05,690 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-17 12:18:05,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2020-07-17 12:18:05,690 INFO L87 Difference]: Start difference. First operand 294 states and 386 transitions. Second operand 10 states. [2020-07-17 12:18:06,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:06,928 INFO L93 Difference]: Finished difference Result 700 states and 971 transitions. [2020-07-17 12:18:06,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2020-07-17 12:18:06,929 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-17 12:18:06,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:06,932 INFO L225 Difference]: With dead ends: 700 [2020-07-17 12:18:06,933 INFO L226 Difference]: Without dead ends: 426 [2020-07-17 12:18:06,934 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=65, Invalid=145, Unknown=0, NotChecked=0, Total=210 [2020-07-17 12:18:06,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states. [2020-07-17 12:18:06,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 294. [2020-07-17 12:18:06,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294 states. [2020-07-17 12:18:06,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 379 transitions. [2020-07-17 12:18:06,976 INFO L78 Accepts]: Start accepts. Automaton has 294 states and 379 transitions. Word has length 90 [2020-07-17 12:18:06,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:06,977 INFO L479 AbstractCegarLoop]: Abstraction has 294 states and 379 transitions. [2020-07-17 12:18:06,977 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-17 12:18:06,977 INFO L276 IsEmpty]: Start isEmpty. Operand 294 states and 379 transitions. [2020-07-17 12:18:06,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-17 12:18:06,978 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:06,978 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:06,979 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2020-07-17 12:18:06,979 INFO L427 AbstractCegarLoop]: === Iteration 5 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:06,979 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:06,979 INFO L82 PathProgramCache]: Analyzing trace with hash 1418466941, now seen corresponding path program 1 times [2020-07-17 12:18:06,980 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:06,980 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871148222] [2020-07-17 12:18:06,980 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:06,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:07,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:07,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:07,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:07,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:07,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:07,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:07,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:07,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:07,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:07,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:07,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:07,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-17 12:18:07,149 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871148222] [2020-07-17 12:18:07,149 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:07,149 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-17 12:18:07,149 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [827543767] [2020-07-17 12:18:07,150 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-17 12:18:07,150 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:07,150 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-17 12:18:07,150 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2020-07-17 12:18:07,151 INFO L87 Difference]: Start difference. First operand 294 states and 379 transitions. Second operand 10 states. [2020-07-17 12:18:08,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:08,971 INFO L93 Difference]: Finished difference Result 855 states and 1230 transitions. [2020-07-17 12:18:08,971 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2020-07-17 12:18:08,972 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-17 12:18:08,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:08,976 INFO L225 Difference]: With dead ends: 855 [2020-07-17 12:18:08,976 INFO L226 Difference]: Without dead ends: 581 [2020-07-17 12:18:08,978 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 25 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=123, Invalid=297, Unknown=0, NotChecked=0, Total=420 [2020-07-17 12:18:08,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 581 states. [2020-07-17 12:18:09,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 581 to 366. [2020-07-17 12:18:09,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 366 states. [2020-07-17 12:18:09,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 366 states to 366 states and 457 transitions. [2020-07-17 12:18:09,030 INFO L78 Accepts]: Start accepts. Automaton has 366 states and 457 transitions. Word has length 90 [2020-07-17 12:18:09,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:09,031 INFO L479 AbstractCegarLoop]: Abstraction has 366 states and 457 transitions. [2020-07-17 12:18:09,031 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-17 12:18:09,031 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states and 457 transitions. [2020-07-17 12:18:09,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-17 12:18:09,032 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:09,033 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:09,033 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2020-07-17 12:18:09,033 INFO L427 AbstractCegarLoop]: === Iteration 6 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:09,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:09,033 INFO L82 PathProgramCache]: Analyzing trace with hash 1504622653, now seen corresponding path program 1 times [2020-07-17 12:18:09,034 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:09,034 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662308327] [2020-07-17 12:18:09,034 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:09,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:09,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:09,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:09,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:09,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:09,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:09,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:09,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:09,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:09,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:09,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:09,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:09,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-17 12:18:09,242 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1662308327] [2020-07-17 12:18:09,244 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:09,244 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-17 12:18:09,244 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1037164136] [2020-07-17 12:18:09,245 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-17 12:18:09,245 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:09,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-17 12:18:09,246 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2020-07-17 12:18:09,247 INFO L87 Difference]: Start difference. First operand 366 states and 457 transitions. Second operand 10 states. [2020-07-17 12:18:10,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:10,988 INFO L93 Difference]: Finished difference Result 877 states and 1164 transitions. [2020-07-17 12:18:10,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2020-07-17 12:18:10,990 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-17 12:18:10,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:10,996 INFO L225 Difference]: With dead ends: 877 [2020-07-17 12:18:10,996 INFO L226 Difference]: Without dead ends: 532 [2020-07-17 12:18:10,999 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=84, Invalid=222, Unknown=0, NotChecked=0, Total=306 [2020-07-17 12:18:11,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 532 states. [2020-07-17 12:18:11,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 532 to 376. [2020-07-17 12:18:11,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 376 states. [2020-07-17 12:18:11,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 376 states to 376 states and 465 transitions. [2020-07-17 12:18:11,062 INFO L78 Accepts]: Start accepts. Automaton has 376 states and 465 transitions. Word has length 90 [2020-07-17 12:18:11,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:11,062 INFO L479 AbstractCegarLoop]: Abstraction has 376 states and 465 transitions. [2020-07-17 12:18:11,063 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-17 12:18:11,063 INFO L276 IsEmpty]: Start isEmpty. Operand 376 states and 465 transitions. [2020-07-17 12:18:11,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-17 12:18:11,065 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:11,065 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:11,066 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2020-07-17 12:18:11,066 INFO L427 AbstractCegarLoop]: === Iteration 7 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:11,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:11,066 INFO L82 PathProgramCache]: Analyzing trace with hash -523963457, now seen corresponding path program 1 times [2020-07-17 12:18:11,067 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:11,067 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1600669153] [2020-07-17 12:18:11,068 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:11,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:11,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:11,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:11,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:11,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:11,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:11,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:11,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:11,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:11,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:11,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:11,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:11,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-17 12:18:11,308 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1600669153] [2020-07-17 12:18:11,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:11,309 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-17 12:18:11,309 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1160128395] [2020-07-17 12:18:11,310 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-17 12:18:11,310 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:11,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-17 12:18:11,313 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2020-07-17 12:18:11,314 INFO L87 Difference]: Start difference. First operand 376 states and 465 transitions. Second operand 10 states. [2020-07-17 12:18:13,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:13,132 INFO L93 Difference]: Finished difference Result 915 states and 1208 transitions. [2020-07-17 12:18:13,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2020-07-17 12:18:13,141 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-17 12:18:13,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:13,146 INFO L225 Difference]: With dead ends: 915 [2020-07-17 12:18:13,146 INFO L226 Difference]: Without dead ends: 560 [2020-07-17 12:18:13,148 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=91, Invalid=251, Unknown=0, NotChecked=0, Total=342 [2020-07-17 12:18:13,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 560 states. [2020-07-17 12:18:13,194 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 560 to 396. [2020-07-17 12:18:13,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 396 states. [2020-07-17 12:18:13,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 485 transitions. [2020-07-17 12:18:13,197 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 485 transitions. Word has length 90 [2020-07-17 12:18:13,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:13,198 INFO L479 AbstractCegarLoop]: Abstraction has 396 states and 485 transitions. [2020-07-17 12:18:13,198 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-17 12:18:13,198 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 485 transitions. [2020-07-17 12:18:13,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-17 12:18:13,199 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:13,200 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:13,200 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2020-07-17 12:18:13,200 INFO L427 AbstractCegarLoop]: === Iteration 8 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:13,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:13,200 INFO L82 PathProgramCache]: Analyzing trace with hash -275816963, now seen corresponding path program 1 times [2020-07-17 12:18:13,201 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:13,202 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961204546] [2020-07-17 12:18:13,202 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:13,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:13,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:13,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:13,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:13,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:13,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:13,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:13,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:13,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:13,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:13,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:13,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:13,402 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-17 12:18:13,402 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961204546] [2020-07-17 12:18:13,403 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:13,403 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-17 12:18:13,403 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1890419766] [2020-07-17 12:18:13,404 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-17 12:18:13,404 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:13,404 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-17 12:18:13,404 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2020-07-17 12:18:13,405 INFO L87 Difference]: Start difference. First operand 396 states and 485 transitions. Second operand 10 states. [2020-07-17 12:18:15,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:15,021 INFO L93 Difference]: Finished difference Result 939 states and 1222 transitions. [2020-07-17 12:18:15,022 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2020-07-17 12:18:15,022 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-17 12:18:15,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:15,027 INFO L225 Difference]: With dead ends: 939 [2020-07-17 12:18:15,027 INFO L226 Difference]: Without dead ends: 564 [2020-07-17 12:18:15,029 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 23 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=91, Invalid=251, Unknown=0, NotChecked=0, Total=342 [2020-07-17 12:18:15,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 564 states. [2020-07-17 12:18:15,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 564 to 406. [2020-07-17 12:18:15,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 406 states. [2020-07-17 12:18:15,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 406 states to 406 states and 493 transitions. [2020-07-17 12:18:15,071 INFO L78 Accepts]: Start accepts. Automaton has 406 states and 493 transitions. Word has length 90 [2020-07-17 12:18:15,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:15,073 INFO L479 AbstractCegarLoop]: Abstraction has 406 states and 493 transitions. [2020-07-17 12:18:15,073 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-17 12:18:15,073 INFO L276 IsEmpty]: Start isEmpty. Operand 406 states and 493 transitions. [2020-07-17 12:18:15,074 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-17 12:18:15,074 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:15,074 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:15,074 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2020-07-17 12:18:15,075 INFO L427 AbstractCegarLoop]: === Iteration 9 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:15,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:15,075 INFO L82 PathProgramCache]: Analyzing trace with hash -348203521, now seen corresponding path program 1 times [2020-07-17 12:18:15,075 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:15,076 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616098461] [2020-07-17 12:18:15,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:15,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:15,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:15,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:15,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:15,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:15,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:15,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:15,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:15,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:15,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:15,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:15,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:15,258 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-17 12:18:15,259 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616098461] [2020-07-17 12:18:15,259 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:15,259 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-17 12:18:15,264 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1387709175] [2020-07-17 12:18:15,265 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-17 12:18:15,265 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:15,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-17 12:18:15,266 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2020-07-17 12:18:15,266 INFO L87 Difference]: Start difference. First operand 406 states and 493 transitions. Second operand 10 states. [2020-07-17 12:18:17,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:17,099 INFO L93 Difference]: Finished difference Result 1144 states and 1493 transitions. [2020-07-17 12:18:17,100 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2020-07-17 12:18:17,100 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2020-07-17 12:18:17,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:17,106 INFO L225 Difference]: With dead ends: 1144 [2020-07-17 12:18:17,106 INFO L226 Difference]: Without dead ends: 758 [2020-07-17 12:18:17,109 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=161, Invalid=439, Unknown=0, NotChecked=0, Total=600 [2020-07-17 12:18:17,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 758 states. [2020-07-17 12:18:17,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 758 to 467. [2020-07-17 12:18:17,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 467 states. [2020-07-17 12:18:17,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 467 states to 467 states and 547 transitions. [2020-07-17 12:18:17,180 INFO L78 Accepts]: Start accepts. Automaton has 467 states and 547 transitions. Word has length 90 [2020-07-17 12:18:17,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:17,180 INFO L479 AbstractCegarLoop]: Abstraction has 467 states and 547 transitions. [2020-07-17 12:18:17,181 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-17 12:18:17,181 INFO L276 IsEmpty]: Start isEmpty. Operand 467 states and 547 transitions. [2020-07-17 12:18:17,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2020-07-17 12:18:17,182 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:17,182 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:17,182 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2020-07-17 12:18:17,183 INFO L427 AbstractCegarLoop]: === Iteration 10 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:17,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:17,183 INFO L82 PathProgramCache]: Analyzing trace with hash -286163907, now seen corresponding path program 1 times [2020-07-17 12:18:17,184 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:17,184 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2094209163] [2020-07-17 12:18:17,187 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:17,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:17,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:17,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:17,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:17,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:17,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:17,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:17,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:17,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:17,315 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:17,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:17,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:17,331 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-17 12:18:17,331 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2094209163] [2020-07-17 12:18:17,332 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:17,332 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-07-17 12:18:17,332 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1834917401] [2020-07-17 12:18:17,333 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2020-07-17 12:18:17,333 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:17,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-07-17 12:18:17,333 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2020-07-17 12:18:17,333 INFO L87 Difference]: Start difference. First operand 467 states and 547 transitions. Second operand 7 states. [2020-07-17 12:18:19,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:19,029 INFO L93 Difference]: Finished difference Result 1503 states and 1877 transitions. [2020-07-17 12:18:19,030 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2020-07-17 12:18:19,030 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 90 [2020-07-17 12:18:19,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:19,037 INFO L225 Difference]: With dead ends: 1503 [2020-07-17 12:18:19,037 INFO L226 Difference]: Without dead ends: 1058 [2020-07-17 12:18:19,039 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2020-07-17 12:18:19,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1058 states. [2020-07-17 12:18:19,108 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1058 to 847. [2020-07-17 12:18:19,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 847 states. [2020-07-17 12:18:19,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 847 states to 847 states and 1018 transitions. [2020-07-17 12:18:19,112 INFO L78 Accepts]: Start accepts. Automaton has 847 states and 1018 transitions. Word has length 90 [2020-07-17 12:18:19,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:19,112 INFO L479 AbstractCegarLoop]: Abstraction has 847 states and 1018 transitions. [2020-07-17 12:18:19,113 INFO L480 AbstractCegarLoop]: Interpolant automaton has 7 states. [2020-07-17 12:18:19,113 INFO L276 IsEmpty]: Start isEmpty. Operand 847 states and 1018 transitions. [2020-07-17 12:18:19,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2020-07-17 12:18:19,114 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:19,114 INFO L422 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:19,115 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2020-07-17 12:18:19,115 INFO L427 AbstractCegarLoop]: === Iteration 11 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:19,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:19,115 INFO L82 PathProgramCache]: Analyzing trace with hash 1417763379, now seen corresponding path program 1 times [2020-07-17 12:18:19,115 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:19,116 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239876812] [2020-07-17 12:18:19,116 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:19,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:19,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:19,186 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:19,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:19,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:19,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:19,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:19,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:19,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:19,227 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:19,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:19,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:19,251 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-07-17 12:18:19,252 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [239876812] [2020-07-17 12:18:19,252 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:19,252 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-07-17 12:18:19,252 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1377271456] [2020-07-17 12:18:19,253 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2020-07-17 12:18:19,253 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:19,253 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-07-17 12:18:19,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2020-07-17 12:18:19,254 INFO L87 Difference]: Start difference. First operand 847 states and 1018 transitions. Second operand 7 states. [2020-07-17 12:18:20,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:20,939 INFO L93 Difference]: Finished difference Result 2813 states and 3701 transitions. [2020-07-17 12:18:20,939 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2020-07-17 12:18:20,939 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 91 [2020-07-17 12:18:20,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:20,952 INFO L225 Difference]: With dead ends: 2813 [2020-07-17 12:18:20,952 INFO L226 Difference]: Without dead ends: 1993 [2020-07-17 12:18:20,957 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 27 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2020-07-17 12:18:20,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1993 states. [2020-07-17 12:18:21,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1993 to 1710. [2020-07-17 12:18:21,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1710 states. [2020-07-17 12:18:21,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1710 states to 1710 states and 2141 transitions. [2020-07-17 12:18:21,131 INFO L78 Accepts]: Start accepts. Automaton has 1710 states and 2141 transitions. Word has length 91 [2020-07-17 12:18:21,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:21,132 INFO L479 AbstractCegarLoop]: Abstraction has 1710 states and 2141 transitions. [2020-07-17 12:18:21,132 INFO L480 AbstractCegarLoop]: Interpolant automaton has 7 states. [2020-07-17 12:18:21,132 INFO L276 IsEmpty]: Start isEmpty. Operand 1710 states and 2141 transitions. [2020-07-17 12:18:21,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2020-07-17 12:18:21,134 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:21,135 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:21,135 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2020-07-17 12:18:21,135 INFO L427 AbstractCegarLoop]: === Iteration 12 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:21,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:21,136 INFO L82 PathProgramCache]: Analyzing trace with hash 1387972843, now seen corresponding path program 1 times [2020-07-17 12:18:21,136 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:21,136 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264223147] [2020-07-17 12:18:21,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:21,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:21,315 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 1 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2020-07-17 12:18:21,316 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1264223147] [2020-07-17 12:18:21,316 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:21,317 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2020-07-17 12:18:21,317 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2047002530] [2020-07-17 12:18:21,318 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2020-07-17 12:18:21,318 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:21,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-07-17 12:18:21,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2020-07-17 12:18:21,319 INFO L87 Difference]: Start difference. First operand 1710 states and 2141 transitions. Second operand 9 states. [2020-07-17 12:18:22,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:22,840 INFO L93 Difference]: Finished difference Result 3845 states and 5084 transitions. [2020-07-17 12:18:22,840 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2020-07-17 12:18:22,840 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 111 [2020-07-17 12:18:22,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:22,854 INFO L225 Difference]: With dead ends: 3845 [2020-07-17 12:18:22,854 INFO L226 Difference]: Without dead ends: 2157 [2020-07-17 12:18:22,860 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 27 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=80, Invalid=192, Unknown=0, NotChecked=0, Total=272 [2020-07-17 12:18:22,863 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2157 states. [2020-07-17 12:18:23,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2157 to 1767. [2020-07-17 12:18:23,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1767 states. [2020-07-17 12:18:23,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1767 states to 1767 states and 2232 transitions. [2020-07-17 12:18:23,085 INFO L78 Accepts]: Start accepts. Automaton has 1767 states and 2232 transitions. Word has length 111 [2020-07-17 12:18:23,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:23,086 INFO L479 AbstractCegarLoop]: Abstraction has 1767 states and 2232 transitions. [2020-07-17 12:18:23,086 INFO L480 AbstractCegarLoop]: Interpolant automaton has 9 states. [2020-07-17 12:18:23,087 INFO L276 IsEmpty]: Start isEmpty. Operand 1767 states and 2232 transitions. [2020-07-17 12:18:23,090 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2020-07-17 12:18:23,090 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:23,091 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:23,091 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2020-07-17 12:18:23,091 INFO L427 AbstractCegarLoop]: === Iteration 13 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:23,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:23,092 INFO L82 PathProgramCache]: Analyzing trace with hash 36587625, now seen corresponding path program 1 times [2020-07-17 12:18:23,092 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:23,093 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1625258396] [2020-07-17 12:18:23,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:23,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,249 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:23,306 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2020-07-17 12:18:23,307 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1625258396] [2020-07-17 12:18:23,307 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:23,307 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2020-07-17 12:18:23,307 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1963884865] [2020-07-17 12:18:23,308 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2020-07-17 12:18:23,308 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:23,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-07-17 12:18:23,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2020-07-17 12:18:23,309 INFO L87 Difference]: Start difference. First operand 1767 states and 2232 transitions. Second operand 8 states. [2020-07-17 12:18:25,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:25,469 INFO L93 Difference]: Finished difference Result 5835 states and 7942 transitions. [2020-07-17 12:18:25,469 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2020-07-17 12:18:25,470 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 111 [2020-07-17 12:18:25,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:25,489 INFO L225 Difference]: With dead ends: 5835 [2020-07-17 12:18:25,489 INFO L226 Difference]: Without dead ends: 3120 [2020-07-17 12:18:25,501 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 34 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=106, Invalid=236, Unknown=0, NotChecked=0, Total=342 [2020-07-17 12:18:25,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3120 states. [2020-07-17 12:18:25,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3120 to 2788. [2020-07-17 12:18:25,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2788 states. [2020-07-17 12:18:25,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2788 states to 2788 states and 3646 transitions. [2020-07-17 12:18:25,944 INFO L78 Accepts]: Start accepts. Automaton has 2788 states and 3646 transitions. Word has length 111 [2020-07-17 12:18:25,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:25,946 INFO L479 AbstractCegarLoop]: Abstraction has 2788 states and 3646 transitions. [2020-07-17 12:18:25,946 INFO L480 AbstractCegarLoop]: Interpolant automaton has 8 states. [2020-07-17 12:18:25,946 INFO L276 IsEmpty]: Start isEmpty. Operand 2788 states and 3646 transitions. [2020-07-17 12:18:25,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2020-07-17 12:18:25,953 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:25,953 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:25,953 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2020-07-17 12:18:25,954 INFO L427 AbstractCegarLoop]: === Iteration 14 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:25,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:25,954 INFO L82 PathProgramCache]: Analyzing trace with hash -1178118941, now seen corresponding path program 1 times [2020-07-17 12:18:25,954 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:25,959 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500184952] [2020-07-17 12:18:25,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:25,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,055 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:26,233 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2020-07-17 12:18:26,233 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [500184952] [2020-07-17 12:18:26,234 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:26,234 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2020-07-17 12:18:26,234 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1747143032] [2020-07-17 12:18:26,235 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2020-07-17 12:18:26,235 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:26,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-07-17 12:18:26,236 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2020-07-17 12:18:26,236 INFO L87 Difference]: Start difference. First operand 2788 states and 3646 transitions. Second operand 9 states. [2020-07-17 12:18:29,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:29,012 INFO L93 Difference]: Finished difference Result 8089 states and 11637 transitions. [2020-07-17 12:18:29,013 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2020-07-17 12:18:29,013 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 155 [2020-07-17 12:18:29,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:29,060 INFO L225 Difference]: With dead ends: 8089 [2020-07-17 12:18:29,061 INFO L226 Difference]: Without dead ends: 5323 [2020-07-17 12:18:29,089 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=125, Invalid=295, Unknown=0, NotChecked=0, Total=420 [2020-07-17 12:18:29,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5323 states. [2020-07-17 12:18:30,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5323 to 4852. [2020-07-17 12:18:30,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4852 states. [2020-07-17 12:18:30,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4852 states to 4852 states and 6633 transitions. [2020-07-17 12:18:30,128 INFO L78 Accepts]: Start accepts. Automaton has 4852 states and 6633 transitions. Word has length 155 [2020-07-17 12:18:30,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:30,129 INFO L479 AbstractCegarLoop]: Abstraction has 4852 states and 6633 transitions. [2020-07-17 12:18:30,129 INFO L480 AbstractCegarLoop]: Interpolant automaton has 9 states. [2020-07-17 12:18:30,129 INFO L276 IsEmpty]: Start isEmpty. Operand 4852 states and 6633 transitions. [2020-07-17 12:18:30,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2020-07-17 12:18:30,137 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:30,138 INFO L422 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:30,138 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2020-07-17 12:18:30,138 INFO L427 AbstractCegarLoop]: === Iteration 15 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:30,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:30,139 INFO L82 PathProgramCache]: Analyzing trace with hash -390866386, now seen corresponding path program 1 times [2020-07-17 12:18:30,139 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:30,139 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563518304] [2020-07-17 12:18:30,140 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:30,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,425 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:30,497 INFO L134 CoverageAnalysis]: Checked inductivity of 46 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2020-07-17 12:18:30,498 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [563518304] [2020-07-17 12:18:30,498 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:30,498 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2020-07-17 12:18:30,499 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [672900763] [2020-07-17 12:18:30,500 INFO L459 AbstractCegarLoop]: Interpolant automaton has 10 states [2020-07-17 12:18:30,500 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:30,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-07-17 12:18:30,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2020-07-17 12:18:30,501 INFO L87 Difference]: Start difference. First operand 4852 states and 6633 transitions. Second operand 10 states. [2020-07-17 12:18:34,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:34,232 INFO L93 Difference]: Finished difference Result 12975 states and 19533 transitions. [2020-07-17 12:18:34,232 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2020-07-17 12:18:34,232 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 156 [2020-07-17 12:18:34,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:34,290 INFO L225 Difference]: With dead ends: 12975 [2020-07-17 12:18:34,291 INFO L226 Difference]: Without dead ends: 6726 [2020-07-17 12:18:34,331 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=137, Invalid=415, Unknown=0, NotChecked=0, Total=552 [2020-07-17 12:18:34,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6726 states. [2020-07-17 12:18:35,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6726 to 6174. [2020-07-17 12:18:35,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6174 states. [2020-07-17 12:18:35,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6174 states to 6174 states and 8297 transitions. [2020-07-17 12:18:35,044 INFO L78 Accepts]: Start accepts. Automaton has 6174 states and 8297 transitions. Word has length 156 [2020-07-17 12:18:35,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:35,045 INFO L479 AbstractCegarLoop]: Abstraction has 6174 states and 8297 transitions. [2020-07-17 12:18:35,045 INFO L480 AbstractCegarLoop]: Interpolant automaton has 10 states. [2020-07-17 12:18:35,045 INFO L276 IsEmpty]: Start isEmpty. Operand 6174 states and 8297 transitions. [2020-07-17 12:18:35,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 208 [2020-07-17 12:18:35,054 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:35,054 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:35,055 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2020-07-17 12:18:35,055 INFO L427 AbstractCegarLoop]: === Iteration 16 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:35,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:35,055 INFO L82 PathProgramCache]: Analyzing trace with hash -1382123670, now seen corresponding path program 1 times [2020-07-17 12:18:35,055 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:35,056 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [251779724] [2020-07-17 12:18:35,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:35,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,326 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,330 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,337 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-07-17 12:18:35,496 INFO L134 CoverageAnalysis]: Checked inductivity of 114 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2020-07-17 12:18:35,497 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [251779724] [2020-07-17 12:18:35,500 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-07-17 12:18:35,500 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2020-07-17 12:18:35,501 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1215781243] [2020-07-17 12:18:35,502 INFO L459 AbstractCegarLoop]: Interpolant automaton has 11 states [2020-07-17 12:18:35,502 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2020-07-17 12:18:35,503 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-07-17 12:18:35,503 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2020-07-17 12:18:35,503 INFO L87 Difference]: Start difference. First operand 6174 states and 8297 transitions. Second operand 11 states. [2020-07-17 12:18:38,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-07-17 12:18:38,562 INFO L93 Difference]: Finished difference Result 12270 states and 16979 transitions. [2020-07-17 12:18:38,562 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2020-07-17 12:18:38,562 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 207 [2020-07-17 12:18:38,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-07-17 12:18:38,579 INFO L225 Difference]: With dead ends: 12270 [2020-07-17 12:18:38,580 INFO L226 Difference]: Without dead ends: 3143 [2020-07-17 12:18:38,600 INFO L675 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 125 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=158, Invalid=492, Unknown=0, NotChecked=0, Total=650 [2020-07-17 12:18:38,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3143 states. [2020-07-17 12:18:38,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3143 to 2950. [2020-07-17 12:18:38,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2950 states. [2020-07-17 12:18:38,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2950 states to 2950 states and 3443 transitions. [2020-07-17 12:18:38,872 INFO L78 Accepts]: Start accepts. Automaton has 2950 states and 3443 transitions. Word has length 207 [2020-07-17 12:18:38,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-07-17 12:18:38,872 INFO L479 AbstractCegarLoop]: Abstraction has 2950 states and 3443 transitions. [2020-07-17 12:18:38,872 INFO L480 AbstractCegarLoop]: Interpolant automaton has 11 states. [2020-07-17 12:18:38,873 INFO L276 IsEmpty]: Start isEmpty. Operand 2950 states and 3443 transitions. [2020-07-17 12:18:38,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 209 [2020-07-17 12:18:38,878 INFO L414 BasicCegarLoop]: Found error trace [2020-07-17 12:18:38,878 INFO L422 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-07-17 12:18:38,879 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2020-07-17 12:18:38,879 INFO L427 AbstractCegarLoop]: === Iteration 17 === [errorErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-07-17 12:18:38,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-07-17 12:18:38,879 INFO L82 PathProgramCache]: Analyzing trace with hash 89354437, now seen corresponding path program 1 times [2020-07-17 12:18:38,879 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-07-17 12:18:38,879 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1274110191] [2020-07-17 12:18:38,880 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-07-17 12:18:38,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-17 12:18:38,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2020-07-17 12:18:39,006 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2020-07-17 12:18:39,007 INFO L520 BasicCegarLoop]: Counterexample might be feasible [2020-07-17 12:18:39,007 WARN L516 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2020-07-17 12:18:39,192 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 17.07 12:18:39 BoogieIcfgContainer [2020-07-17 12:18:39,192 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2020-07-17 12:18:39,195 INFO L168 Benchmark]: Toolchain (without parser) took 41478.33 ms. Allocated memory was 137.4 MB in the beginning and 706.7 MB in the end (delta: 569.4 MB). Free memory was 100.7 MB in the beginning and 86.2 MB in the end (delta: 14.4 MB). Peak memory consumption was 583.8 MB. Max. memory is 7.1 GB. [2020-07-17 12:18:39,196 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 137.4 MB. Free memory is still 119.0 MB. There was no memory consumed. Max. memory is 7.1 GB. [2020-07-17 12:18:39,199 INFO L168 Benchmark]: CACSL2BoogieTranslator took 422.71 ms. Allocated memory was 137.4 MB in the beginning and 201.9 MB in the end (delta: 64.5 MB). Free memory was 100.2 MB in the beginning and 178.0 MB in the end (delta: -77.7 MB). Peak memory consumption was 25.3 MB. Max. memory is 7.1 GB. [2020-07-17 12:18:39,204 INFO L168 Benchmark]: Boogie Preprocessor took 48.25 ms. Allocated memory is still 201.9 MB. Free memory was 178.0 MB in the beginning and 176.0 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. [2020-07-17 12:18:39,205 INFO L168 Benchmark]: RCFGBuilder took 649.66 ms. Allocated memory is still 201.9 MB. Free memory was 176.0 MB in the beginning and 139.9 MB in the end (delta: 36.1 MB). Peak memory consumption was 36.1 MB. Max. memory is 7.1 GB. [2020-07-17 12:18:39,206 INFO L168 Benchmark]: TraceAbstraction took 40351.02 ms. Allocated memory was 201.9 MB in the beginning and 706.7 MB in the end (delta: 504.9 MB). Free memory was 139.2 MB in the beginning and 86.2 MB in the end (delta: 53.0 MB). Peak memory consumption was 557.9 MB. Max. memory is 7.1 GB. [2020-07-17 12:18:39,213 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 137.4 MB. Free memory is still 119.0 MB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 422.71 ms. Allocated memory was 137.4 MB in the beginning and 201.9 MB in the end (delta: 64.5 MB). Free memory was 100.2 MB in the beginning and 178.0 MB in the end (delta: -77.7 MB). Peak memory consumption was 25.3 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 48.25 ms. Allocated memory is still 201.9 MB. Free memory was 178.0 MB in the beginning and 176.0 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. * RCFGBuilder took 649.66 ms. Allocated memory is still 201.9 MB. Free memory was 176.0 MB in the beginning and 139.9 MB in the end (delta: 36.1 MB). Peak memory consumption was 36.1 MB. Max. memory is 7.1 GB. * TraceAbstraction took 40351.02 ms. Allocated memory was 201.9 MB in the beginning and 706.7 MB in the end (delta: 504.9 MB). Free memory was 139.2 MB in the beginning and 86.2 MB in the end (delta: 53.0 MB). Peak memory consumption was 557.9 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int m_st ; [L19] int t1_st ; [L20] int t2_st ; [L21] int m_i ; [L22] int t1_i ; [L23] int t2_i ; [L24] int M_E = 2; [L25] int T1_E = 2; [L26] int T2_E = 2; [L27] int E_1 = 2; [L28] int E_2 = 2; VAL [\old(E_1)=17, \old(E_2)=6, \old(M_E)=14, \old(m_i)=8, \old(m_pc)=12, \old(m_st)=13, \old(T1_E)=4, \old(t1_i)=16, \old(t1_pc)=9, \old(t1_st)=5, \old(T2_E)=15, \old(t2_i)=7, \old(t2_pc)=10, \old(t2_st)=11, E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L563] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L567] CALL init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L477] m_i = 1 [L478] t1_i = 1 [L479] t2_i = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L567] RET init_model() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L568] CALL start_simulation() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L504] int kernel_st ; [L505] int tmp ; [L506] int tmp___0 ; [L510] kernel_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L511] FCALL update_channels() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L512] CALL init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L211] COND TRUE m_i == 1 [L212] m_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L216] COND TRUE t1_i == 1 [L217] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L221] COND TRUE t2_i == 1 [L222] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L512] RET init_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L513] CALL fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L324] COND FALSE !(M_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L329] COND FALSE !(T1_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L334] COND FALSE !(T2_E == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L339] COND FALSE !(E_1 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L344] COND FALSE !(E_2 == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L513] RET fire_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L514] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L143] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L146] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L156] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L158] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0] [L401] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L162] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L165] COND FALSE !(t1_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L175] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L177] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L401] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0, tmp___0=0] [L409] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L181] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L184] COND FALSE !(t2_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L194] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L196] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=0, __retres1=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L409] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0, tmp___0=0] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=0, tmp___0=0, tmp___1=0] [L514] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L515] CALL reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L357] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L362] COND FALSE !(T1_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L367] COND FALSE !(T2_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L372] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L377] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L515] RET reset_delta_events() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L518] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L521] kernel_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, kernel_st=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L522] CALL eval() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L257] int tmp ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L261] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L231] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L252] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND FALSE !(\read(tmp_ndt_1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1, tmp_ndt_1=0] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1] [L291] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L78] COND TRUE t1_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L89] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L91] t1_pc = 1 [L92] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L291] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=1] [L305] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L113] COND TRUE t2_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L124] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L126] t2_pc = 1 [L127] t2_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L305] RET transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=1] [L261] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=1] [L264] CALL, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L231] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, __retres1=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L252] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, \result=1, __retres1=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L264] RET, EXPR exists_runnable_thread() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, exists_runnable_thread()=1, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=1] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=-1, tmp_ndt_3=1] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND TRUE \read(tmp_ndt_1) [L276] m_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=-2, tmp_ndt_2=-1, tmp_ndt_3=1] [L277] CALL master() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L37] COND TRUE m_pc == 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L48] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L51] E_1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L52] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L425] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L143] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND FALSE !(m_pc == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, is_master_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND TRUE E_1 == 1 [L167] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=1, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=1, __retres1=1, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L401] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, is_transmit1_triggered()=1, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND TRUE \read(tmp___0) [L404] t1_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=1] [L409] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND FALSE !(E_2 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L194] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=0, __retres1=0, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L409] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, is_transmit2_triggered()=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=1] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=1, tmp___1=0] [L425] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L52] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L53] E_1 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L56] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L58] m_pc = 1 [L59] m_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=1, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=2, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L277] RET master() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=-2, tmp_ndt_2=-1, tmp_ndt_3=1] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=1, tmp_ndt_1=-2, tmp_ndt_2=3, tmp_ndt_3=1] [L291] CALL transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L78] COND FALSE !(t1_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L81] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L97] E_2 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L98] CALL immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L425] CALL activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] CALL, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L143] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND TRUE m_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L147] COND FALSE !(M_E == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] RET, EXPR is_master_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, is_master_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] CALL, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND FALSE !(E_1 == 1) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L175] __retres1 = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=0, __retres1=0, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L401] RET, EXPR is_transmit1_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, is_transmit1_triggered()=0, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=0] [L409] CALL, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND TRUE E_2 == 1 [L186] __retres1 = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, __retres1=1, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, \result=1, __retres1=1, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L409] RET, EXPR is_transmit2_triggered() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, is_transmit2_triggered()=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, tmp=0, tmp___0=0] [L409] tmp___1 = is_transmit2_triggered() [L411] COND TRUE \read(tmp___1) [L412] t2_st = 0 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, tmp=0, tmp___0=0, tmp___1=1] [L425] RET activate_threads() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L98] RET immediate_notify() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L99] E_2 = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L89] COND TRUE 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L91] t1_pc = 1 [L92] t1_st = 2 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=2, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=1, \old(t1_st)=1, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=2, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L291] RET transmit1() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, tmp=1, tmp_ndt_1=-2, tmp_ndt_2=3, tmp_ndt_3=1] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=0, \old(t2_st)=0, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, tmp=1, tmp_ndt_1=-2, tmp_ndt_2=3, tmp_ndt_3=1] [L305] CALL transmit2() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L113] COND FALSE !(t2_pc == 0) VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L116] COND TRUE t2_pc == 1 VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L132] CALL error() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L11] __VERIFIER_error() VAL [\old(E_1)=2, \old(E_2)=2, \old(M_E)=2, \old(m_i)=0, \old(m_pc)=0, \old(m_st)=0, \old(T1_E)=2, \old(t1_i)=0, \old(t1_pc)=0, \old(t1_st)=0, \old(T2_E)=2, \old(t2_i)=0, \old(t2_pc)=1, \old(t2_st)=1, E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 23 procedures, 169 locations, 1 error locations. Started 1 CEGAR loops. VerificationResult: UNSAFE, OverallTime: 40.1s, OverallIterations: 17, TraceHistogramMax: 3, AutomataDifference: 32.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 2605 SDtfs, 11531 SDslu, 735 SDs, 0 SdLazy, 15820 SolverSat, 5837 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 19.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 756 GetRequests, 486 SyntacticMatches, 2 SemanticMatches, 268 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 797 ImplicationChecksByTransitivity, 5.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6174occurred in iteration=15, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.4s AutomataMinimizationTime, 16 MinimizatonAttempts, 3916 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 3.0s InterpolantComputationTime, 1939 NumberOfCodeBlocks, 1939 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 1715 ConstructedInterpolants, 0 QuantifiedInterpolants, 487945 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 237/237 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...