java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -s ../../../trunk/examples/settings/ai/array-bench/reach_32bit_array_oct.epf -i ../../../trunk/examples/programs/real-life/GuiTestExampleUnsafe.bpl -------------------------------------------------------------------------------- This is Ultimate 0.1.24-e1a14da [2018-12-24 14:13:33,271 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-12-24 14:13:33,273 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-12-24 14:13:33,286 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-12-24 14:13:33,286 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-12-24 14:13:33,287 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-12-24 14:13:33,289 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-12-24 14:13:33,298 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-12-24 14:13:33,301 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-12-24 14:13:33,302 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-12-24 14:13:33,303 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-12-24 14:13:33,303 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-12-24 14:13:33,304 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2018-12-24 14:13:33,305 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-12-24 14:13:33,306 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2018-12-24 14:13:33,307 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-12-24 14:13:33,308 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-12-24 14:13:33,310 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-12-24 14:13:33,312 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-12-24 14:13:33,314 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-12-24 14:13:33,315 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-12-24 14:13:33,317 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-12-24 14:13:33,319 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-12-24 14:13:33,320 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-12-24 14:13:33,320 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2018-12-24 14:13:33,321 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-12-24 14:13:33,322 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-12-24 14:13:33,323 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2018-12-24 14:13:33,324 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-12-24 14:13:33,325 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-12-24 14:13:33,326 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-12-24 14:13:33,326 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-12-24 14:13:33,327 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2018-12-24 14:13:33,327 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2018-12-24 14:13:33,328 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-12-24 14:13:33,329 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-12-24 14:13:33,329 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/array-bench/reach_32bit_array_oct.epf [2018-12-24 14:13:33,358 INFO L110 SettingsManager]: Loading preferences was successful [2018-12-24 14:13:33,359 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-12-24 14:13:33,360 INFO L131 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2018-12-24 14:13:33,360 INFO L133 SettingsManager]: * Show backtranslation warnings=false [2018-12-24 14:13:33,360 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-12-24 14:13:33,360 INFO L133 SettingsManager]: * User list type=DISABLED [2018-12-24 14:13:33,365 INFO L133 SettingsManager]: * Inline calls to unimplemented procedures=true [2018-12-24 14:13:33,365 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-12-24 14:13:33,365 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2018-12-24 14:13:33,366 INFO L133 SettingsManager]: * Underlying domain=OctagonDomain [2018-12-24 14:13:33,366 INFO L133 SettingsManager]: * Abstract domain=ArrayDomain [2018-12-24 14:13:33,366 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2018-12-24 14:13:33,366 INFO L133 SettingsManager]: * Interval Domain=false [2018-12-24 14:13:33,367 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2018-12-24 14:13:33,367 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2018-12-24 14:13:33,367 INFO L133 SettingsManager]: * Use SBE=true [2018-12-24 14:13:33,369 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-12-24 14:13:33,369 INFO L133 SettingsManager]: * sizeof long=4 [2018-12-24 14:13:33,369 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-12-24 14:13:33,369 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-12-24 14:13:33,370 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-12-24 14:13:33,370 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-12-24 14:13:33,370 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-12-24 14:13:33,370 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-12-24 14:13:33,371 INFO L133 SettingsManager]: * sizeof long double=12 [2018-12-24 14:13:33,371 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-12-24 14:13:33,371 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-12-24 14:13:33,371 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-12-24 14:13:33,371 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-12-24 14:13:33,372 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-12-24 14:13:33,372 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-24 14:13:33,372 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-12-24 14:13:33,372 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-12-24 14:13:33,372 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-12-24 14:13:33,373 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-12-24 14:13:33,373 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-12-24 14:13:33,373 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-12-24 14:13:33,373 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-12-24 14:13:33,373 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-12-24 14:13:33,437 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-12-24 14:13:33,455 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2018-12-24 14:13:33,463 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2018-12-24 14:13:33,465 INFO L271 PluginConnector]: Initializing Boogie PL CUP Parser... [2018-12-24 14:13:33,466 INFO L276 PluginConnector]: Boogie PL CUP Parser initialized [2018-12-24 14:13:33,467 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExampleUnsafe.bpl [2018-12-24 14:13:33,467 INFO L111 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExampleUnsafe.bpl' [2018-12-24 14:13:33,551 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-12-24 14:13:33,553 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-12-24 14:13:33,554 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2018-12-24 14:13:33,554 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2018-12-24 14:13:33,555 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2018-12-24 14:13:33,572 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 24.12 02:13:33" (1/1) ... [2018-12-24 14:13:33,590 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 24.12 02:13:33" (1/1) ... [2018-12-24 14:13:33,599 WARN L165 Inliner]: Program contained no entry procedure! [2018-12-24 14:13:33,600 WARN L168 Inliner]: Missing entry procedures: [ULTIMATE.start] [2018-12-24 14:13:33,600 WARN L175 Inliner]: Fallback enabled. All procedures will be processed. [2018-12-24 14:13:33,648 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2018-12-24 14:13:33,649 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-12-24 14:13:33,649 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-12-24 14:13:33,650 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-12-24 14:13:33,661 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 24.12 02:13:33" (1/1) ... [2018-12-24 14:13:33,662 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 24.12 02:13:33" (1/1) ... [2018-12-24 14:13:33,673 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 24.12 02:13:33" (1/1) ... [2018-12-24 14:13:33,674 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 24.12 02:13:33" (1/1) ... [2018-12-24 14:13:33,696 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 24.12 02:13:33" (1/1) ... [2018-12-24 14:13:33,702 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 24.12 02:13:33" (1/1) ... [2018-12-24 14:13:33,716 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 24.12 02:13:33" (1/1) ... [2018-12-24 14:13:33,730 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-12-24 14:13:33,732 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-12-24 14:13:33,732 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-12-24 14:13:33,732 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-12-24 14:13:33,734 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 24.12 02:13:33" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-12-24 14:13:33,808 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 given in one single declaration [2018-12-24 14:13:33,809 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 [2018-12-24 14:13:33,809 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 [2018-12-24 14:13:33,809 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 given in one single declaration [2018-12-24 14:13:33,809 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 [2018-12-24 14:13:33,811 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 [2018-12-24 14:13:33,811 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 given in one single declaration [2018-12-24 14:13:33,812 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 [2018-12-24 14:13:33,812 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 [2018-12-24 14:13:33,812 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 given in one single declaration [2018-12-24 14:13:33,815 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 [2018-12-24 14:13:33,816 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 [2018-12-24 14:13:33,816 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 given in one single declaration [2018-12-24 14:13:33,816 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 [2018-12-24 14:13:33,816 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 [2018-12-24 14:13:33,817 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.SwingUtilities$invokeLater$4940 [2018-12-24 14:13:33,817 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setLayout$1827 [2018-12-24 14:13:33,817 INFO L124 BoogieDeclarations]: Specification and implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 given in one single declaration [2018-12-24 14:13:33,817 INFO L130 BoogieDeclarations]: Found specification of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 [2018-12-24 14:13:33,817 INFO L138 BoogieDeclarations]: Found implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 [2018-12-24 14:13:33,820 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 given in one single declaration [2018-12-24 14:13:33,820 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 [2018-12-24 14:13:33,820 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 [2018-12-24 14:13:33,821 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setResizable$1858 [2018-12-24 14:13:33,821 INFO L124 BoogieDeclarations]: Specification and implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 given in one single declaration [2018-12-24 14:13:33,821 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 [2018-12-24 14:13:33,821 INFO L138 BoogieDeclarations]: Found implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 [2018-12-24 14:13:33,821 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 given in one single declaration [2018-12-24 14:13:33,822 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$$la$init$ra$$1809 [2018-12-24 14:13:33,822 INFO L138 BoogieDeclarations]: Found implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 [2018-12-24 14:13:33,822 INFO L124 BoogieDeclarations]: Specification and implementation of procedure int$SimpleFrame2Cons$access$2$1808 given in one single declaration [2018-12-24 14:13:33,823 INFO L130 BoogieDeclarations]: Found specification of procedure int$SimpleFrame2Cons$access$2$1808 [2018-12-24 14:13:33,823 INFO L138 BoogieDeclarations]: Found implementation of procedure int$SimpleFrame2Cons$access$2$1808 [2018-12-24 14:13:33,823 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setDefaultCloseOperation$1816 [2018-12-24 14:13:33,823 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$addActionListener$4123 [2018-12-24 14:13:33,823 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setLocation$1913 [2018-12-24 14:13:33,824 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 given in one single declaration [2018-12-24 14:13:33,824 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 [2018-12-24 14:13:33,824 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 [2018-12-24 14:13:33,824 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 given in one single declaration [2018-12-24 14:13:33,824 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 [2018-12-24 14:13:33,824 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 [2018-12-24 14:13:33,825 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$setEnabled$4131 [2018-12-24 14:13:33,825 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setVisible$1918 [2018-12-24 14:13:33,825 INFO L130 BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getHeight$2305 [2018-12-24 14:13:33,825 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$pack$1909 [2018-12-24 14:13:33,825 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Toolkit$java.awt.Toolkit$getDefaultToolkit$3255 [2018-12-24 14:13:33,826 INFO L130 BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getWidth$2304 [2018-12-24 14:13:33,826 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setTitle$1852 [2018-12-24 14:13:33,826 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$access$1$1807 given in one single declaration [2018-12-24 14:13:33,826 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$access$1$1807 [2018-12-24 14:13:33,826 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$access$1$1807 [2018-12-24 14:13:33,827 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.FlowLayout$$la$init$ra$$4889 [2018-12-24 14:13:33,827 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$run$1803 given in one single declaration [2018-12-24 14:13:33,827 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$run$1803 [2018-12-24 14:13:33,827 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$run$1803 [2018-12-24 14:13:33,827 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$main$1804 given in one single declaration [2018-12-24 14:13:33,828 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$main$1804 [2018-12-24 14:13:33,828 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$main$1804 [2018-12-24 14:13:33,828 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JButton$$la$init$ra$$2558 [2018-12-24 14:13:33,828 INFO L124 BoogieDeclarations]: Specification and implementation of procedure $EFG_Procedure given in one single declaration [2018-12-24 14:13:33,828 INFO L130 BoogieDeclarations]: Found specification of procedure $EFG_Procedure [2018-12-24 14:13:33,829 INFO L138 BoogieDeclarations]: Found implementation of procedure $EFG_Procedure [2018-12-24 14:13:33,829 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Component$java.awt.Container$add$2075 [2018-12-24 14:13:33,829 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.lang.Object$$la$init$ra$$38 [2018-12-24 14:13:34,096 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-24 14:13:34,170 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-24 14:13:34,229 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-24 14:13:34,262 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-24 14:13:34,667 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-24 14:13:34,733 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-24 14:13:34,744 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-24 14:13:34,746 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-24 14:13:34,752 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-24 14:13:34,784 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-24 14:13:34,871 WARN L615 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-12-24 14:13:35,583 INFO L272 CfgBuilder]: Using library mode [2018-12-24 14:13:35,583 INFO L280 CfgBuilder]: Removed 206 assue(true) statements. [2018-12-24 14:13:35,584 INFO L202 PluginConnector]: Adding new model GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.12 02:13:35 BoogieIcfgContainer [2018-12-24 14:13:35,584 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-12-24 14:13:35,585 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-12-24 14:13:35,586 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-12-24 14:13:35,589 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-12-24 14:13:35,590 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 24.12 02:13:33" (1/2) ... [2018-12-24 14:13:35,591 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@edd7e0c and model type GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.12 02:13:35, skipping insertion in model container [2018-12-24 14:13:35,591 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.12 02:13:35" (2/2) ... [2018-12-24 14:13:35,593 INFO L112 eAbstractionObserver]: Analyzing ICFG GuiTestExampleUnsafe.bpl [2018-12-24 14:13:35,604 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-12-24 14:13:35,615 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 87 error locations. [2018-12-24 14:13:35,634 INFO L257 AbstractCegarLoop]: Starting to check reachability of 87 error locations. [2018-12-24 14:13:35,682 INFO L382 AbstractCegarLoop]: Interprodecural is true [2018-12-24 14:13:35,682 INFO L383 AbstractCegarLoop]: Hoare is true [2018-12-24 14:13:35,682 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-12-24 14:13:35,683 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2018-12-24 14:13:35,683 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-12-24 14:13:35,683 INFO L387 AbstractCegarLoop]: Difference is false [2018-12-24 14:13:35,683 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-12-24 14:13:35,684 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-12-24 14:13:35,719 INFO L276 IsEmpty]: Start isEmpty. Operand 304 states. [2018-12-24 14:13:35,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3 [2018-12-24 14:13:35,726 INFO L394 BasicCegarLoop]: Found error trace [2018-12-24 14:13:35,727 INFO L402 BasicCegarLoop]: trace histogram [1, 1] [2018-12-24 14:13:35,733 INFO L423 AbstractCegarLoop]: === Iteration 1 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT]=== [2018-12-24 14:13:35,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-24 14:13:35,740 INFO L82 PathProgramCache]: Analyzing trace with hash 10434, now seen corresponding path program 1 times [2018-12-24 14:13:35,743 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-24 14:13:35,800 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:35,801 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-24 14:13:35,801 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:35,801 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-24 14:13:35,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-24 14:13:35,918 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-24 14:13:35,921 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-24 14:13:35,921 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2018-12-24 14:13:35,921 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-24 14:13:35,927 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-24 14:13:35,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-24 14:13:35,945 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-24 14:13:35,948 INFO L87 Difference]: Start difference. First operand 304 states. Second operand 3 states. [2018-12-24 14:13:36,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-24 14:13:36,005 INFO L93 Difference]: Finished difference Result 304 states and 306 transitions. [2018-12-24 14:13:36,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-24 14:13:36,011 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 2 [2018-12-24 14:13:36,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-24 14:13:36,031 INFO L225 Difference]: With dead ends: 304 [2018-12-24 14:13:36,031 INFO L226 Difference]: Without dead ends: 252 [2018-12-24 14:13:36,036 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-24 14:13:36,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2018-12-24 14:13:36,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 252. [2018-12-24 14:13:36,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 252 states. [2018-12-24 14:13:36,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 252 states and 257 transitions. [2018-12-24 14:13:36,132 INFO L78 Accepts]: Start accepts. Automaton has 252 states and 257 transitions. Word has length 2 [2018-12-24 14:13:36,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-24 14:13:36,133 INFO L480 AbstractCegarLoop]: Abstraction has 252 states and 257 transitions. [2018-12-24 14:13:36,133 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-24 14:13:36,134 INFO L276 IsEmpty]: Start isEmpty. Operand 252 states and 257 transitions. [2018-12-24 14:13:36,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-12-24 14:13:36,135 INFO L394 BasicCegarLoop]: Found error trace [2018-12-24 14:13:36,135 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-12-24 14:13:36,140 INFO L423 AbstractCegarLoop]: === Iteration 2 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT]=== [2018-12-24 14:13:36,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-24 14:13:36,141 INFO L82 PathProgramCache]: Analyzing trace with hash 181753, now seen corresponding path program 1 times [2018-12-24 14:13:36,141 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-24 14:13:36,142 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:36,143 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-24 14:13:36,143 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:36,143 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-24 14:13:36,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-24 14:13:36,173 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-24 14:13:36,173 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-24 14:13:36,173 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-24 14:13:36,173 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-24 14:13:36,175 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-24 14:13:36,175 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-24 14:13:36,176 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-24 14:13:36,176 INFO L87 Difference]: Start difference. First operand 252 states and 257 transitions. Second operand 4 states. [2018-12-24 14:13:36,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-24 14:13:36,231 INFO L93 Difference]: Finished difference Result 252 states and 257 transitions. [2018-12-24 14:13:36,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-24 14:13:36,232 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-12-24 14:13:36,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-24 14:13:36,234 INFO L225 Difference]: With dead ends: 252 [2018-12-24 14:13:36,235 INFO L226 Difference]: Without dead ends: 248 [2018-12-24 14:13:36,236 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-24 14:13:36,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-12-24 14:13:36,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248. [2018-12-24 14:13:36,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2018-12-24 14:13:36,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 254 transitions. [2018-12-24 14:13:36,255 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 254 transitions. Word has length 3 [2018-12-24 14:13:36,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-24 14:13:36,256 INFO L480 AbstractCegarLoop]: Abstraction has 248 states and 254 transitions. [2018-12-24 14:13:36,256 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-24 14:13:36,256 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 254 transitions. [2018-12-24 14:13:36,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-12-24 14:13:36,257 INFO L394 BasicCegarLoop]: Found error trace [2018-12-24 14:13:36,257 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-12-24 14:13:36,260 INFO L423 AbstractCegarLoop]: === Iteration 3 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT]=== [2018-12-24 14:13:36,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-24 14:13:36,260 INFO L82 PathProgramCache]: Analyzing trace with hash 168844, now seen corresponding path program 1 times [2018-12-24 14:13:36,261 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-24 14:13:36,262 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:36,262 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-24 14:13:36,262 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:36,262 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-24 14:13:36,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-24 14:13:36,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-24 14:13:36,299 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-24 14:13:36,300 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-24 14:13:36,300 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-24 14:13:36,300 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-24 14:13:36,300 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-24 14:13:36,301 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-24 14:13:36,301 INFO L87 Difference]: Start difference. First operand 248 states and 254 transitions. Second operand 4 states. [2018-12-24 14:13:36,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-24 14:13:36,333 INFO L93 Difference]: Finished difference Result 248 states and 254 transitions. [2018-12-24 14:13:36,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-24 14:13:36,333 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-12-24 14:13:36,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-24 14:13:36,335 INFO L225 Difference]: With dead ends: 248 [2018-12-24 14:13:36,336 INFO L226 Difference]: Without dead ends: 244 [2018-12-24 14:13:36,336 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-24 14:13:36,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244 states. [2018-12-24 14:13:36,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 244. [2018-12-24 14:13:36,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2018-12-24 14:13:36,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 251 transitions. [2018-12-24 14:13:36,353 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 251 transitions. Word has length 3 [2018-12-24 14:13:36,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-24 14:13:36,353 INFO L480 AbstractCegarLoop]: Abstraction has 244 states and 251 transitions. [2018-12-24 14:13:36,354 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-24 14:13:36,354 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 251 transitions. [2018-12-24 14:13:36,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-12-24 14:13:36,355 INFO L394 BasicCegarLoop]: Found error trace [2018-12-24 14:13:36,355 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-12-24 14:13:36,357 INFO L423 AbstractCegarLoop]: === Iteration 4 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT]=== [2018-12-24 14:13:36,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-24 14:13:36,358 INFO L82 PathProgramCache]: Analyzing trace with hash 323784, now seen corresponding path program 1 times [2018-12-24 14:13:36,358 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-24 14:13:36,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:36,360 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-24 14:13:36,360 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:36,360 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-24 14:13:36,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-24 14:13:36,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-24 14:13:36,406 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-24 14:13:36,406 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-24 14:13:36,406 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-24 14:13:36,406 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-24 14:13:36,407 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-24 14:13:36,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-24 14:13:36,408 INFO L87 Difference]: Start difference. First operand 244 states and 251 transitions. Second operand 4 states. [2018-12-24 14:13:36,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-24 14:13:36,455 INFO L93 Difference]: Finished difference Result 244 states and 251 transitions. [2018-12-24 14:13:36,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-24 14:13:36,463 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-12-24 14:13:36,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-24 14:13:36,465 INFO L225 Difference]: With dead ends: 244 [2018-12-24 14:13:36,466 INFO L226 Difference]: Without dead ends: 243 [2018-12-24 14:13:36,466 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-24 14:13:36,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2018-12-24 14:13:36,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 243. [2018-12-24 14:13:36,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243 states. [2018-12-24 14:13:36,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 250 transitions. [2018-12-24 14:13:36,506 INFO L78 Accepts]: Start accepts. Automaton has 243 states and 250 transitions. Word has length 3 [2018-12-24 14:13:36,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-24 14:13:36,506 INFO L480 AbstractCegarLoop]: Abstraction has 243 states and 250 transitions. [2018-12-24 14:13:36,507 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-24 14:13:36,507 INFO L276 IsEmpty]: Start isEmpty. Operand 243 states and 250 transitions. [2018-12-24 14:13:36,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-12-24 14:13:36,507 INFO L394 BasicCegarLoop]: Found error trace [2018-12-24 14:13:36,508 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-12-24 14:13:36,514 INFO L423 AbstractCegarLoop]: === Iteration 5 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT]=== [2018-12-24 14:13:36,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-24 14:13:36,517 INFO L82 PathProgramCache]: Analyzing trace with hash 161893, now seen corresponding path program 1 times [2018-12-24 14:13:36,517 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-24 14:13:36,518 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:36,518 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-24 14:13:36,519 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:36,519 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-24 14:13:36,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-24 14:13:36,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-24 14:13:36,659 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-24 14:13:36,659 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-24 14:13:36,659 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-24 14:13:36,662 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-24 14:13:36,662 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-24 14:13:36,662 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-24 14:13:36,663 INFO L87 Difference]: Start difference. First operand 243 states and 250 transitions. Second operand 4 states. [2018-12-24 14:13:36,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-24 14:13:36,738 INFO L93 Difference]: Finished difference Result 243 states and 250 transitions. [2018-12-24 14:13:36,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-24 14:13:36,739 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-12-24 14:13:36,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-24 14:13:36,740 INFO L225 Difference]: With dead ends: 243 [2018-12-24 14:13:36,741 INFO L226 Difference]: Without dead ends: 239 [2018-12-24 14:13:36,741 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-24 14:13:36,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-12-24 14:13:36,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 239. [2018-12-24 14:13:36,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2018-12-24 14:13:36,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 247 transitions. [2018-12-24 14:13:36,753 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 247 transitions. Word has length 3 [2018-12-24 14:13:36,753 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-24 14:13:36,753 INFO L480 AbstractCegarLoop]: Abstraction has 239 states and 247 transitions. [2018-12-24 14:13:36,754 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-24 14:13:36,754 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 247 transitions. [2018-12-24 14:13:36,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-12-24 14:13:36,754 INFO L394 BasicCegarLoop]: Found error trace [2018-12-24 14:13:36,755 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-12-24 14:13:36,757 INFO L423 AbstractCegarLoop]: === Iteration 6 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT]=== [2018-12-24 14:13:36,757 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-24 14:13:36,758 INFO L82 PathProgramCache]: Analyzing trace with hash 29824, now seen corresponding path program 1 times [2018-12-24 14:13:36,758 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-24 14:13:36,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:36,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-24 14:13:36,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:36,760 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-24 14:13:36,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-24 14:13:36,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-24 14:13:36,819 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-24 14:13:36,819 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-24 14:13:36,819 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-24 14:13:36,820 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-24 14:13:36,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-24 14:13:36,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-24 14:13:36,821 INFO L87 Difference]: Start difference. First operand 239 states and 247 transitions. Second operand 4 states. [2018-12-24 14:13:36,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-24 14:13:36,927 INFO L93 Difference]: Finished difference Result 239 states and 247 transitions. [2018-12-24 14:13:36,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-24 14:13:36,927 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2018-12-24 14:13:36,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-24 14:13:36,929 INFO L225 Difference]: With dead ends: 239 [2018-12-24 14:13:36,929 INFO L226 Difference]: Without dead ends: 235 [2018-12-24 14:13:36,930 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-24 14:13:36,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2018-12-24 14:13:36,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 235. [2018-12-24 14:13:36,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 235 states. [2018-12-24 14:13:36,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 244 transitions. [2018-12-24 14:13:36,949 INFO L78 Accepts]: Start accepts. Automaton has 235 states and 244 transitions. Word has length 3 [2018-12-24 14:13:36,949 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-24 14:13:36,950 INFO L480 AbstractCegarLoop]: Abstraction has 235 states and 244 transitions. [2018-12-24 14:13:36,950 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-24 14:13:36,950 INFO L276 IsEmpty]: Start isEmpty. Operand 235 states and 244 transitions. [2018-12-24 14:13:36,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-12-24 14:13:36,950 INFO L394 BasicCegarLoop]: Found error trace [2018-12-24 14:13:36,951 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-12-24 14:13:36,954 INFO L423 AbstractCegarLoop]: === Iteration 7 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT]=== [2018-12-24 14:13:36,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-24 14:13:36,955 INFO L82 PathProgramCache]: Analyzing trace with hash 1755747, now seen corresponding path program 1 times [2018-12-24 14:13:36,955 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-24 14:13:36,956 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:36,956 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-24 14:13:36,956 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:36,963 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-24 14:13:36,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-24 14:13:37,025 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-24 14:13:37,026 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-24 14:13:37,026 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-24 14:13:37,026 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-24 14:13:37,026 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-12-24 14:13:37,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-12-24 14:13:37,027 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-12-24 14:13:37,027 INFO L87 Difference]: Start difference. First operand 235 states and 244 transitions. Second operand 4 states. [2018-12-24 14:13:37,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-24 14:13:37,222 INFO L93 Difference]: Finished difference Result 235 states and 244 transitions. [2018-12-24 14:13:37,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-12-24 14:13:37,222 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 4 [2018-12-24 14:13:37,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-24 14:13:37,224 INFO L225 Difference]: With dead ends: 235 [2018-12-24 14:13:37,225 INFO L226 Difference]: Without dead ends: 214 [2018-12-24 14:13:37,226 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-12-24 14:13:37,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2018-12-24 14:13:37,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2018-12-24 14:13:37,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-12-24 14:13:37,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 223 transitions. [2018-12-24 14:13:37,234 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 223 transitions. Word has length 4 [2018-12-24 14:13:37,234 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-24 14:13:37,234 INFO L480 AbstractCegarLoop]: Abstraction has 214 states and 223 transitions. [2018-12-24 14:13:37,235 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-12-24 14:13:37,235 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 223 transitions. [2018-12-24 14:13:37,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-12-24 14:13:37,235 INFO L394 BasicCegarLoop]: Found error trace [2018-12-24 14:13:37,235 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-12-24 14:13:37,240 INFO L423 AbstractCegarLoop]: === Iteration 8 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT]=== [2018-12-24 14:13:37,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-24 14:13:37,241 INFO L82 PathProgramCache]: Analyzing trace with hash 6127075, now seen corresponding path program 1 times [2018-12-24 14:13:37,241 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-24 14:13:37,243 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:37,243 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-24 14:13:37,243 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:37,244 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-24 14:13:37,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-24 14:13:37,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-24 14:13:37,267 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-24 14:13:37,267 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-12-24 14:13:37,267 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-24 14:13:37,268 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-12-24 14:13:37,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-12-24 14:13:37,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-24 14:13:37,269 INFO L87 Difference]: Start difference. First operand 214 states and 223 transitions. Second operand 3 states. [2018-12-24 14:13:37,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-24 14:13:37,292 INFO L93 Difference]: Finished difference Result 214 states and 223 transitions. [2018-12-24 14:13:37,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-12-24 14:13:37,292 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-12-24 14:13:37,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-24 14:13:37,294 INFO L225 Difference]: With dead ends: 214 [2018-12-24 14:13:37,294 INFO L226 Difference]: Without dead ends: 213 [2018-12-24 14:13:37,294 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-12-24 14:13:37,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-12-24 14:13:37,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 213. [2018-12-24 14:13:37,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2018-12-24 14:13:37,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 222 transitions. [2018-12-24 14:13:37,303 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 222 transitions. Word has length 4 [2018-12-24 14:13:37,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-24 14:13:37,303 INFO L480 AbstractCegarLoop]: Abstraction has 213 states and 222 transitions. [2018-12-24 14:13:37,303 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-12-24 14:13:37,304 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 222 transitions. [2018-12-24 14:13:37,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2018-12-24 14:13:37,304 INFO L394 BasicCegarLoop]: Found error trace [2018-12-24 14:13:37,304 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2018-12-24 14:13:37,306 INFO L423 AbstractCegarLoop]: === Iteration 9 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT]=== [2018-12-24 14:13:37,307 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-24 14:13:37,307 INFO L82 PathProgramCache]: Analyzing trace with hash 54428221, now seen corresponding path program 1 times [2018-12-24 14:13:37,307 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-24 14:13:37,309 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:37,309 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-24 14:13:37,309 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:37,309 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-24 14:13:37,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-12-24 14:13:37,352 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-12-24 14:13:37,352 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-12-24 14:13:37,353 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-12-24 14:13:37,353 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-12-24 14:13:37,353 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-12-24 14:13:37,354 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-12-24 14:13:37,354 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-12-24 14:13:37,354 INFO L87 Difference]: Start difference. First operand 213 states and 222 transitions. Second operand 5 states. [2018-12-24 14:13:37,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-12-24 14:13:37,556 INFO L93 Difference]: Finished difference Result 213 states and 222 transitions. [2018-12-24 14:13:37,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-12-24 14:13:37,557 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 5 [2018-12-24 14:13:37,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-12-24 14:13:37,559 INFO L225 Difference]: With dead ends: 213 [2018-12-24 14:13:37,559 INFO L226 Difference]: Without dead ends: 212 [2018-12-24 14:13:37,560 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-12-24 14:13:37,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-12-24 14:13:37,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 212. [2018-12-24 14:13:37,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2018-12-24 14:13:37,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 221 transitions. [2018-12-24 14:13:37,568 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 221 transitions. Word has length 5 [2018-12-24 14:13:37,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-12-24 14:13:37,568 INFO L480 AbstractCegarLoop]: Abstraction has 212 states and 221 transitions. [2018-12-24 14:13:37,569 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-12-24 14:13:37,569 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 221 transitions. [2018-12-24 14:13:37,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2018-12-24 14:13:37,570 INFO L394 BasicCegarLoop]: Found error trace [2018-12-24 14:13:37,570 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2018-12-24 14:13:37,571 INFO L423 AbstractCegarLoop]: === Iteration 10 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT]=== [2018-12-24 14:13:37,572 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2018-12-24 14:13:37,572 INFO L82 PathProgramCache]: Analyzing trace with hash 179442176, now seen corresponding path program 1 times [2018-12-24 14:13:37,572 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-12-24 14:13:37,573 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:37,574 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-12-24 14:13:37,574 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2018-12-24 14:13:37,574 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-12-24 14:13:37,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-24 14:13:37,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-12-24 14:13:37,608 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2018-12-24 14:13:37,637 INFO L202 PluginConnector]: Adding new model GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.12 02:13:37 BoogieIcfgContainer [2018-12-24 14:13:37,638 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-12-24 14:13:37,639 INFO L168 Benchmark]: Toolchain (without parser) took 4086.57 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.3 GB in the end (delta: 179.8 MB). Peak memory consumption was 179.8 MB. Max. memory is 7.1 GB. [2018-12-24 14:13:37,641 INFO L168 Benchmark]: Boogie PL CUP Parser took 0.24 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-12-24 14:13:37,641 INFO L168 Benchmark]: Boogie Procedure Inliner took 94.54 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-12-24 14:13:37,642 INFO L168 Benchmark]: Boogie Preprocessor took 82.38 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. [2018-12-24 14:13:37,642 INFO L168 Benchmark]: RCFGBuilder took 1852.42 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 84.6 MB). Peak memory consumption was 84.6 MB. Max. memory is 7.1 GB. [2018-12-24 14:13:37,645 INFO L168 Benchmark]: TraceAbstraction took 2052.30 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 95.2 MB). Peak memory consumption was 95.2 MB. Max. memory is 7.1 GB. [2018-12-24 14:13:37,651 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.24 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 94.54 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Preprocessor took 82.38 ms. Allocated memory is still 1.5 GB. Free memory is still 1.5 GB. There was no memory consumed. Max. memory is 7.1 GB. * RCFGBuilder took 1852.42 ms. Allocated memory is still 1.5 GB. Free memory was 1.5 GB in the beginning and 1.4 GB in the end (delta: 84.6 MB). Peak memory consumption was 84.6 MB. Max. memory is 7.1 GB. * TraceAbstraction took 2052.30 ms. Allocated memory is still 1.5 GB. Free memory was 1.4 GB in the beginning and 1.3 GB in the end (delta: 95.2 MB). Peak memory consumption was 95.2 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 658]: assertion can be violated assertion can be violated We found a FailurePath: [L642] requires void$SimpleFrame2Cons$4$actionPerformed$4888$__this != $null; [L651] r0125 := void$SimpleFrame2Cons$4$actionPerformed$4888$__this; [L653] r1126 := void$SimpleFrame2Cons$4$actionPerformed$4888$param_0; [L655] $r2129 := SimpleFrame2Cons$SimpleFrame2Cons$4$this$0763; [L390] r083 := $param_0; [L392] $r185 := javax.swing.JButton$SimpleFrame2Cons$event2227; [L394] __ret := $r185; [L658] assert $r3130 != $null; - StatisticsResult: Ultimate Automizer benchmark data CFG has 16 procedures, 304 locations, 87 error locations. UNSAFE Result, 1.9s OverallTime, 10 OverallIterations, 1 TraceHistogramMax, 0.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2190 SDtfs, 400 SDslu, 3738 SDs, 0 SdLazy, 41 SolverSat, 11 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=304occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 9 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.4s InterpolantComputationTime, 35 NumberOfCodeBlocks, 35 NumberOfCodeBlocksAsserted, 10 NumberOfCheckSat, 21 ConstructedInterpolants, 0 QuantifiedInterpolants, 202 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 9 InterpolantComputations, 9 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...