java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -s ../../../trunk/examples/settings/ai/array-bench/reach_32bit_compound_exp_cong.epf -i ../../../trunk/examples/programs/real-life/GuiTestExampleUnsafe.bpl


--------------------------------------------------------------------------------


This is Ultimate 0.1.24-df3cc4e-m
[2019-01-11 11:00:50,219 INFO  L170        SettingsManager]: Resetting all preferences to default values...
[2019-01-11 11:00:50,221 INFO  L174        SettingsManager]: Resetting UltimateCore preferences to default values
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[2019-01-11 11:00:50,243 INFO  L174        SettingsManager]: Resetting Abstract Interpretation preferences to default values
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[2019-01-11 11:00:50,267 INFO  L174        SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
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[2019-01-11 11:00:50,270 INFO  L174        SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2019-01-11 11:00:50,276 INFO  L174        SettingsManager]: Resetting CodeCheck preferences to default values
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[2019-01-11 11:00:50,287 INFO  L177        SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
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[2019-01-11 11:00:50,293 INFO  L174        SettingsManager]: Resetting Boogie Printer preferences to default values
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[2019-01-11 11:00:50,299 INFO  L174        SettingsManager]: Resetting SmtParser preferences to default values
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[2019-01-11 11:00:50,300 INFO  L181        SettingsManager]: Finished resetting all preferences to default values...
[2019-01-11 11:00:50,301 INFO  L98         SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/array-bench/reach_32bit_compound_exp_cong.epf
[2019-01-11 11:00:50,317 INFO  L110        SettingsManager]: Loading preferences was successful
[2019-01-11 11:00:50,318 INFO  L112        SettingsManager]: Preferences different from defaults after loading the file:
[2019-01-11 11:00:50,318 INFO  L131        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2019-01-11 11:00:50,319 INFO  L133        SettingsManager]:  * Show backtranslation warnings=false
[2019-01-11 11:00:50,319 INFO  L131        SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2019-01-11 11:00:50,319 INFO  L133        SettingsManager]:  * User list type=DISABLED
[2019-01-11 11:00:50,319 INFO  L133        SettingsManager]:  * Inline calls to unimplemented procedures=true
[2019-01-11 11:00:50,319 INFO  L131        SettingsManager]: Preferences of Abstract Interpretation differ from their defaults:
[2019-01-11 11:00:50,320 INFO  L133        SettingsManager]:  * Explicit value domain=true
[2019-01-11 11:00:50,320 INFO  L133        SettingsManager]:  * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain
[2019-01-11 11:00:50,320 INFO  L133        SettingsManager]:  * Octagon Domain=false
[2019-01-11 11:00:50,320 INFO  L133        SettingsManager]:  * Abstract domain=CompoundDomain
[2019-01-11 11:00:50,320 INFO  L133        SettingsManager]:  * Check feasibility of abstract posts with an SMT solver=true
[2019-01-11 11:00:50,321 INFO  L133        SettingsManager]:  * Interval Domain=false
[2019-01-11 11:00:50,321 INFO  L131        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2019-01-11 11:00:50,321 INFO  L133        SettingsManager]:  * Create parallel compositions if possible=false
[2019-01-11 11:00:50,322 INFO  L133        SettingsManager]:  * Use SBE=true
[2019-01-11 11:00:50,322 INFO  L131        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2019-01-11 11:00:50,322 INFO  L133        SettingsManager]:  * sizeof long=4
[2019-01-11 11:00:50,322 INFO  L133        SettingsManager]:  * Overapproximate operations on floating types=true
[2019-01-11 11:00:50,322 INFO  L133        SettingsManager]:  * sizeof POINTER=4
[2019-01-11 11:00:50,323 INFO  L133        SettingsManager]:  * Check division by zero=IGNORE
[2019-01-11 11:00:50,323 INFO  L133        SettingsManager]:  * Pointer to allocated memory at dereference=IGNORE
[2019-01-11 11:00:50,323 INFO  L133        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=IGNORE
[2019-01-11 11:00:50,323 INFO  L133        SettingsManager]:  * Check array bounds for arrays that are off heap=IGNORE
[2019-01-11 11:00:50,323 INFO  L133        SettingsManager]:  * sizeof long double=12
[2019-01-11 11:00:50,324 INFO  L133        SettingsManager]:  * Check if freed pointer was valid=false
[2019-01-11 11:00:50,324 INFO  L133        SettingsManager]:  * Pointer base address is valid at dereference=IGNORE
[2019-01-11 11:00:50,324 INFO  L131        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2019-01-11 11:00:50,324 INFO  L133        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2019-01-11 11:00:50,324 INFO  L133        SettingsManager]:  * SMT solver=External_DefaultMode
[2019-01-11 11:00:50,325 INFO  L133        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:8192 -smt2 -in -t:2000
[2019-01-11 11:00:50,325 INFO  L131        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2019-01-11 11:00:50,325 INFO  L133        SettingsManager]:  * Compute Interpolants along a Counterexample=FPandBP
[2019-01-11 11:00:50,325 INFO  L133        SettingsManager]:  * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles
[2019-01-11 11:00:50,325 INFO  L133        SettingsManager]:  * Trace refinement strategy=TAIPAN
[2019-01-11 11:00:50,326 INFO  L133        SettingsManager]:  * SMT solver=External_ModelsAndUnsatCoreMode
[2019-01-11 11:00:50,326 INFO  L133        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:8192 -smt2 -in
[2019-01-11 11:00:50,326 INFO  L133        SettingsManager]:  * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true
[2019-01-11 11:00:50,326 INFO  L133        SettingsManager]:  * Abstract interpretation Mode=USE_PREDICATES
[2019-01-11 11:00:50,378 INFO  L81    nceAwareModelManager]: Repository-Root is: /tmp
[2019-01-11 11:00:50,390 INFO  L258   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2019-01-11 11:00:50,393 INFO  L214   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2019-01-11 11:00:50,394 INFO  L271        PluginConnector]: Initializing Boogie PL CUP Parser...
[2019-01-11 11:00:50,395 INFO  L276        PluginConnector]: Boogie PL CUP Parser initialized
[2019-01-11 11:00:50,395 INFO  L418   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExampleUnsafe.bpl
[2019-01-11 11:00:50,396 INFO  L111           BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExampleUnsafe.bpl'
[2019-01-11 11:00:50,457 INFO  L296   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2019-01-11 11:00:50,459 INFO  L131        ToolchainWalker]: Walking toolchain with 4 elements.
[2019-01-11 11:00:50,460 INFO  L113        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2019-01-11 11:00:50,460 INFO  L271        PluginConnector]: Initializing Boogie Procedure Inliner...
[2019-01-11 11:00:50,460 INFO  L276        PluginConnector]: Boogie Procedure Inliner initialized
[2019-01-11 11:00:50,476 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 11.01 11:00:50" (1/1) ...
[2019-01-11 11:00:50,493 INFO  L185        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 11.01 11:00:50" (1/1) ...
[2019-01-11 11:00:50,501 WARN  L165                Inliner]: Program contained no entry procedure!
[2019-01-11 11:00:50,502 WARN  L168                Inliner]: Missing entry procedures: [ULTIMATE.start]
[2019-01-11 11:00:50,502 WARN  L175                Inliner]: Fallback enabled. All procedures will be processed.
[2019-01-11 11:00:50,556 INFO  L132        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2019-01-11 11:00:50,557 INFO  L113        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2019-01-11 11:00:50,557 INFO  L271        PluginConnector]: Initializing Boogie Preprocessor...
[2019-01-11 11:00:50,558 INFO  L276        PluginConnector]: Boogie Preprocessor initialized
[2019-01-11 11:00:50,572 INFO  L185        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 11.01 11:00:50" (1/1) ...
[2019-01-11 11:00:50,572 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 11.01 11:00:50" (1/1) ...
[2019-01-11 11:00:50,593 INFO  L185        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 11.01 11:00:50" (1/1) ...
[2019-01-11 11:00:50,594 INFO  L185        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 11.01 11:00:50" (1/1) ...
[2019-01-11 11:00:50,623 INFO  L185        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 11.01 11:00:50" (1/1) ...
[2019-01-11 11:00:50,632 INFO  L185        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 11.01 11:00:50" (1/1) ...
[2019-01-11 11:00:50,643 INFO  L185        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 11.01 11:00:50" (1/1) ...
[2019-01-11 11:00:50,656 INFO  L132        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2019-01-11 11:00:50,659 INFO  L113        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2019-01-11 11:00:50,659 INFO  L271        PluginConnector]: Initializing RCFGBuilder...
[2019-01-11 11:00:50,659 INFO  L276        PluginConnector]: RCFGBuilder initialized
[2019-01-11 11:00:50,661 INFO  L185        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 11.01 11:00:50" (1/1) ...
No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:8192 -smt2 -in -t:2000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:8192 -smt2 -in -t:2000
[2019-01-11 11:00:50,743 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 given in one single declaration
[2019-01-11 11:00:50,743 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885
[2019-01-11 11:00:50,743 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885
[2019-01-11 11:00:50,744 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 given in one single declaration
[2019-01-11 11:00:50,744 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$actionPerformed$4553
[2019-01-11 11:00:50,744 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553
[2019-01-11 11:00:50,744 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 given in one single declaration
[2019-01-11 11:00:50,744 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$actionPerformed$4886
[2019-01-11 11:00:50,745 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886
[2019-01-11 11:00:50,745 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 given in one single declaration
[2019-01-11 11:00:50,745 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$$la$init$ra$$1805
[2019-01-11 11:00:50,745 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805
[2019-01-11 11:00:50,745 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 given in one single declaration
[2019-01-11 11:00:50,746 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802
[2019-01-11 11:00:50,747 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802
[2019-01-11 11:00:50,747 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.SwingUtilities$invokeLater$4940
[2019-01-11 11:00:50,747 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setLayout$1827
[2019-01-11 11:00:50,748 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 given in one single declaration
[2019-01-11 11:00:50,748 INFO  L130     BoogieDeclarations]: Found specification of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806
[2019-01-11 11:00:50,748 INFO  L138     BoogieDeclarations]: Found implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806
[2019-01-11 11:00:50,748 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 given in one single declaration
[2019-01-11 11:00:50,749 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552
[2019-01-11 11:00:50,750 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552
[2019-01-11 11:00:50,751 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setResizable$1858
[2019-01-11 11:00:50,751 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 given in one single declaration
[2019-01-11 11:00:50,751 INFO  L130     BoogieDeclarations]: Found specification of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246
[2019-01-11 11:00:50,751 INFO  L138     BoogieDeclarations]: Found implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246
[2019-01-11 11:00:50,751 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 given in one single declaration
[2019-01-11 11:00:50,752 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$$la$init$ra$$1809
[2019-01-11 11:00:50,752 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809
[2019-01-11 11:00:50,753 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure int$SimpleFrame2Cons$access$2$1808 given in one single declaration
[2019-01-11 11:00:50,753 INFO  L130     BoogieDeclarations]: Found specification of procedure int$SimpleFrame2Cons$access$2$1808
[2019-01-11 11:00:50,753 INFO  L138     BoogieDeclarations]: Found implementation of procedure int$SimpleFrame2Cons$access$2$1808
[2019-01-11 11:00:50,753 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setDefaultCloseOperation$1816
[2019-01-11 11:00:50,753 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$addActionListener$4123
[2019-01-11 11:00:50,755 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setLocation$1913
[2019-01-11 11:00:50,755 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 given in one single declaration
[2019-01-11 11:00:50,756 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887
[2019-01-11 11:00:50,756 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887
[2019-01-11 11:00:50,756 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 given in one single declaration
[2019-01-11 11:00:50,756 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$actionPerformed$4888
[2019-01-11 11:00:50,756 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888
[2019-01-11 11:00:50,756 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$setEnabled$4131
[2019-01-11 11:00:50,757 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setVisible$1918
[2019-01-11 11:00:50,757 INFO  L130     BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getHeight$2305
[2019-01-11 11:00:50,757 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Window$pack$1909
[2019-01-11 11:00:50,757 INFO  L130     BoogieDeclarations]: Found specification of procedure java.awt.Toolkit$java.awt.Toolkit$getDefaultToolkit$3255
[2019-01-11 11:00:50,757 INFO  L130     BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getWidth$2304
[2019-01-11 11:00:50,757 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setTitle$1852
[2019-01-11 11:00:50,758 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$access$1$1807 given in one single declaration
[2019-01-11 11:00:50,758 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$access$1$1807
[2019-01-11 11:00:50,758 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$access$1$1807
[2019-01-11 11:00:50,759 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.FlowLayout$$la$init$ra$$4889
[2019-01-11 11:00:50,759 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$run$1803 given in one single declaration
[2019-01-11 11:00:50,759 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$run$1803
[2019-01-11 11:00:50,759 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$run$1803
[2019-01-11 11:00:50,759 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$main$1804 given in one single declaration
[2019-01-11 11:00:50,759 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$main$1804
[2019-01-11 11:00:50,760 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$main$1804
[2019-01-11 11:00:50,760 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JButton$$la$init$ra$$2558
[2019-01-11 11:00:50,760 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure $EFG_Procedure given in one single declaration
[2019-01-11 11:00:50,760 INFO  L130     BoogieDeclarations]: Found specification of procedure $EFG_Procedure
[2019-01-11 11:00:50,760 INFO  L138     BoogieDeclarations]: Found implementation of procedure $EFG_Procedure
[2019-01-11 11:00:50,760 INFO  L130     BoogieDeclarations]: Found specification of procedure java.awt.Component$java.awt.Container$add$2075
[2019-01-11 11:00:50,761 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.lang.Object$$la$init$ra$$38
[2019-01-11 11:00:51,148 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-11 11:00:51,200 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-11 11:00:51,282 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-11 11:00:51,330 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-11 11:00:51,804 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-11 11:00:51,816 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-11 11:00:51,827 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-11 11:00:51,858 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-11 11:00:51,898 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-11 11:00:51,928 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-11 11:00:51,972 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-11 11:00:52,634 INFO  L278             CfgBuilder]: Using library mode
[2019-01-11 11:00:52,634 INFO  L286             CfgBuilder]: Removed 206 assue(true) statements.
[2019-01-11 11:00:52,636 INFO  L202        PluginConnector]: Adding new model GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.01 11:00:52 BoogieIcfgContainer
[2019-01-11 11:00:52,636 INFO  L132        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2019-01-11 11:00:52,637 INFO  L113        PluginConnector]: ------------------------TraceAbstraction----------------------------
[2019-01-11 11:00:52,637 INFO  L271        PluginConnector]: Initializing TraceAbstraction...
[2019-01-11 11:00:52,640 INFO  L276        PluginConnector]: TraceAbstraction initialized
[2019-01-11 11:00:52,640 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 11.01 11:00:50" (1/2) ...
[2019-01-11 11:00:52,641 INFO  L205        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5fdddab5 and model type GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.01 11:00:52, skipping insertion in model container
[2019-01-11 11:00:52,642 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.01 11:00:52" (2/2) ...
[2019-01-11 11:00:52,644 INFO  L112   eAbstractionObserver]: Analyzing ICFG GuiTestExampleUnsafe.bpl
[2019-01-11 11:00:52,653 INFO  L156   ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2019-01-11 11:00:52,662 INFO  L168   ceAbstractionStarter]: Appying trace abstraction to program that has 87 error locations.
[2019-01-11 11:00:52,677 INFO  L257      AbstractCegarLoop]: Starting to check reachability of 87 error locations.
[2019-01-11 11:00:52,714 INFO  L382      AbstractCegarLoop]: Interprodecural is true
[2019-01-11 11:00:52,714 INFO  L383      AbstractCegarLoop]: Hoare is true
[2019-01-11 11:00:52,714 INFO  L384      AbstractCegarLoop]: Compute interpolants for FPandBP
[2019-01-11 11:00:52,715 INFO  L385      AbstractCegarLoop]: Backedges is STRAIGHT_LINE
[2019-01-11 11:00:52,715 INFO  L386      AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2019-01-11 11:00:52,715 INFO  L387      AbstractCegarLoop]: Difference is false
[2019-01-11 11:00:52,715 INFO  L388      AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA
[2019-01-11 11:00:52,715 INFO  L393      AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce========
[2019-01-11 11:00:52,744 INFO  L276                IsEmpty]: Start isEmpty. Operand 304 states.
[2019-01-11 11:00:52,750 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 3
[2019-01-11 11:00:52,751 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-11 11:00:52,752 INFO  L402         BasicCegarLoop]: trace histogram [1, 1]
[2019-01-11 11:00:52,757 INFO  L423      AbstractCegarLoop]: === Iteration 1 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT]===
[2019-01-11 11:00:52,763 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-11 11:00:52,763 INFO  L82        PathProgramCache]: Analyzing trace with hash 10434, now seen corresponding path program 1 times
[2019-01-11 11:00:52,765 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-11 11:00:52,809 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:52,809 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-11 11:00:52,809 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:52,809 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-11 11:00:52,828 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-11 11:00:52,912 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-11 11:00:52,914 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-11 11:00:52,914 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1
[2019-01-11 11:00:52,914 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-11 11:00:52,918 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 3 states
[2019-01-11 11:00:52,928 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2019-01-11 11:00:52,928 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2019-01-11 11:00:52,930 INFO  L87              Difference]: Start difference. First operand 304 states. Second operand 3 states.
[2019-01-11 11:00:52,982 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-11 11:00:52,983 INFO  L93              Difference]: Finished difference Result 304 states and 306 transitions.
[2019-01-11 11:00:52,987 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2019-01-11 11:00:52,991 INFO  L78                 Accepts]: Start accepts. Automaton has 3 states. Word has length 2
[2019-01-11 11:00:52,991 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-11 11:00:53,020 INFO  L225             Difference]: With dead ends: 304
[2019-01-11 11:00:53,021 INFO  L226             Difference]: Without dead ends: 252
[2019-01-11 11:00:53,025 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2019-01-11 11:00:53,049 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 252 states.
[2019-01-11 11:00:53,097 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 252.
[2019-01-11 11:00:53,098 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 252 states.
[2019-01-11 11:00:53,103 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 252 states and 257 transitions.
[2019-01-11 11:00:53,104 INFO  L78                 Accepts]: Start accepts. Automaton has 252 states and 257 transitions. Word has length 2
[2019-01-11 11:00:53,105 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-11 11:00:53,105 INFO  L480      AbstractCegarLoop]: Abstraction has 252 states and 257 transitions.
[2019-01-11 11:00:53,105 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 3 states.
[2019-01-11 11:00:53,105 INFO  L276                IsEmpty]: Start isEmpty. Operand 252 states and 257 transitions.
[2019-01-11 11:00:53,106 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-01-11 11:00:53,106 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-11 11:00:53,106 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-01-11 11:00:53,108 INFO  L423      AbstractCegarLoop]: === Iteration 2 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT]===
[2019-01-11 11:00:53,109 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-11 11:00:53,109 INFO  L82        PathProgramCache]: Analyzing trace with hash 168844, now seen corresponding path program 1 times
[2019-01-11 11:00:53,109 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-11 11:00:53,110 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,110 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-11 11:00:53,111 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,111 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-11 11:00:53,113 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-11 11:00:53,128 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-11 11:00:53,129 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-11 11:00:53,129 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-11 11:00:53,129 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-11 11:00:53,131 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-11 11:00:53,131 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-11 11:00:53,131 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-11 11:00:53,132 INFO  L87              Difference]: Start difference. First operand 252 states and 257 transitions. Second operand 4 states.
[2019-01-11 11:00:53,173 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-11 11:00:53,173 INFO  L93              Difference]: Finished difference Result 252 states and 257 transitions.
[2019-01-11 11:00:53,173 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-11 11:00:53,173 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-01-11 11:00:53,173 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-11 11:00:53,176 INFO  L225             Difference]: With dead ends: 252
[2019-01-11 11:00:53,176 INFO  L226             Difference]: Without dead ends: 248
[2019-01-11 11:00:53,177 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-11 11:00:53,178 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 248 states.
[2019-01-11 11:00:53,192 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248.
[2019-01-11 11:00:53,192 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 248 states.
[2019-01-11 11:00:53,194 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 254 transitions.
[2019-01-11 11:00:53,194 INFO  L78                 Accepts]: Start accepts. Automaton has 248 states and 254 transitions. Word has length 3
[2019-01-11 11:00:53,195 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-11 11:00:53,195 INFO  L480      AbstractCegarLoop]: Abstraction has 248 states and 254 transitions.
[2019-01-11 11:00:53,195 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-11 11:00:53,195 INFO  L276                IsEmpty]: Start isEmpty. Operand 248 states and 254 transitions.
[2019-01-11 11:00:53,195 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-01-11 11:00:53,196 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-11 11:00:53,196 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-01-11 11:00:53,198 INFO  L423      AbstractCegarLoop]: === Iteration 3 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT]===
[2019-01-11 11:00:53,198 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-11 11:00:53,199 INFO  L82        PathProgramCache]: Analyzing trace with hash 181753, now seen corresponding path program 1 times
[2019-01-11 11:00:53,199 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-11 11:00:53,200 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,200 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-11 11:00:53,200 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,201 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-11 11:00:53,203 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-11 11:00:53,245 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-11 11:00:53,246 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-11 11:00:53,246 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-11 11:00:53,246 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-11 11:00:53,246 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-11 11:00:53,247 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-11 11:00:53,247 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-11 11:00:53,247 INFO  L87              Difference]: Start difference. First operand 248 states and 254 transitions. Second operand 4 states.
[2019-01-11 11:00:53,275 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-11 11:00:53,275 INFO  L93              Difference]: Finished difference Result 248 states and 254 transitions.
[2019-01-11 11:00:53,275 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-11 11:00:53,276 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-01-11 11:00:53,276 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-11 11:00:53,278 INFO  L225             Difference]: With dead ends: 248
[2019-01-11 11:00:53,278 INFO  L226             Difference]: Without dead ends: 244
[2019-01-11 11:00:53,279 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-11 11:00:53,280 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 244 states.
[2019-01-11 11:00:53,296 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 244.
[2019-01-11 11:00:53,296 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 244 states.
[2019-01-11 11:00:53,298 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 251 transitions.
[2019-01-11 11:00:53,298 INFO  L78                 Accepts]: Start accepts. Automaton has 244 states and 251 transitions. Word has length 3
[2019-01-11 11:00:53,298 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-11 11:00:53,298 INFO  L480      AbstractCegarLoop]: Abstraction has 244 states and 251 transitions.
[2019-01-11 11:00:53,299 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-11 11:00:53,299 INFO  L276                IsEmpty]: Start isEmpty. Operand 244 states and 251 transitions.
[2019-01-11 11:00:53,299 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-01-11 11:00:53,299 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-11 11:00:53,300 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-01-11 11:00:53,302 INFO  L423      AbstractCegarLoop]: === Iteration 4 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT]===
[2019-01-11 11:00:53,303 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-11 11:00:53,303 INFO  L82        PathProgramCache]: Analyzing trace with hash 323784, now seen corresponding path program 1 times
[2019-01-11 11:00:53,303 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-11 11:00:53,305 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,305 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-11 11:00:53,305 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,305 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-11 11:00:53,308 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-11 11:00:53,341 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-11 11:00:53,342 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-11 11:00:53,342 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-11 11:00:53,342 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-11 11:00:53,342 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-11 11:00:53,342 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-11 11:00:53,343 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-11 11:00:53,343 INFO  L87              Difference]: Start difference. First operand 244 states and 251 transitions. Second operand 4 states.
[2019-01-11 11:00:53,375 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-11 11:00:53,375 INFO  L93              Difference]: Finished difference Result 244 states and 251 transitions.
[2019-01-11 11:00:53,378 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-11 11:00:53,378 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-01-11 11:00:53,378 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-11 11:00:53,385 INFO  L225             Difference]: With dead ends: 244
[2019-01-11 11:00:53,385 INFO  L226             Difference]: Without dead ends: 243
[2019-01-11 11:00:53,386 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-11 11:00:53,387 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 243 states.
[2019-01-11 11:00:53,413 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 243.
[2019-01-11 11:00:53,413 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 243 states.
[2019-01-11 11:00:53,415 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 250 transitions.
[2019-01-11 11:00:53,415 INFO  L78                 Accepts]: Start accepts. Automaton has 243 states and 250 transitions. Word has length 3
[2019-01-11 11:00:53,415 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-11 11:00:53,415 INFO  L480      AbstractCegarLoop]: Abstraction has 243 states and 250 transitions.
[2019-01-11 11:00:53,416 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-11 11:00:53,416 INFO  L276                IsEmpty]: Start isEmpty. Operand 243 states and 250 transitions.
[2019-01-11 11:00:53,416 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-01-11 11:00:53,422 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-11 11:00:53,422 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-01-11 11:00:53,427 INFO  L423      AbstractCegarLoop]: === Iteration 5 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT]===
[2019-01-11 11:00:53,428 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-11 11:00:53,428 INFO  L82        PathProgramCache]: Analyzing trace with hash 161893, now seen corresponding path program 1 times
[2019-01-11 11:00:53,429 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-11 11:00:53,433 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,434 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-11 11:00:53,434 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,434 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-11 11:00:53,438 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-11 11:00:53,561 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-11 11:00:53,562 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-11 11:00:53,562 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-11 11:00:53,562 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-11 11:00:53,563 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-11 11:00:53,563 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-11 11:00:53,563 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-11 11:00:53,563 INFO  L87              Difference]: Start difference. First operand 243 states and 250 transitions. Second operand 4 states.
[2019-01-11 11:00:53,629 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-11 11:00:53,630 INFO  L93              Difference]: Finished difference Result 243 states and 250 transitions.
[2019-01-11 11:00:53,630 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-11 11:00:53,630 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-01-11 11:00:53,630 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-11 11:00:53,632 INFO  L225             Difference]: With dead ends: 243
[2019-01-11 11:00:53,632 INFO  L226             Difference]: Without dead ends: 239
[2019-01-11 11:00:53,633 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-11 11:00:53,634 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 239 states.
[2019-01-11 11:00:53,641 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 239.
[2019-01-11 11:00:53,642 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 239 states.
[2019-01-11 11:00:53,643 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 247 transitions.
[2019-01-11 11:00:53,643 INFO  L78                 Accepts]: Start accepts. Automaton has 239 states and 247 transitions. Word has length 3
[2019-01-11 11:00:53,643 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-11 11:00:53,644 INFO  L480      AbstractCegarLoop]: Abstraction has 239 states and 247 transitions.
[2019-01-11 11:00:53,644 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-11 11:00:53,644 INFO  L276                IsEmpty]: Start isEmpty. Operand 239 states and 247 transitions.
[2019-01-11 11:00:53,644 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-01-11 11:00:53,644 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-11 11:00:53,645 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-01-11 11:00:53,647 INFO  L423      AbstractCegarLoop]: === Iteration 6 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT]===
[2019-01-11 11:00:53,648 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-11 11:00:53,648 INFO  L82        PathProgramCache]: Analyzing trace with hash 29824, now seen corresponding path program 1 times
[2019-01-11 11:00:53,648 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-11 11:00:53,649 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,650 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-11 11:00:53,650 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,650 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-11 11:00:53,652 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-11 11:00:53,710 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-11 11:00:53,710 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-11 11:00:53,710 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-11 11:00:53,710 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-11 11:00:53,710 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-11 11:00:53,711 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-11 11:00:53,711 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-11 11:00:53,711 INFO  L87              Difference]: Start difference. First operand 239 states and 247 transitions. Second operand 4 states.
[2019-01-11 11:00:53,733 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-11 11:00:53,734 INFO  L93              Difference]: Finished difference Result 239 states and 247 transitions.
[2019-01-11 11:00:53,734 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-11 11:00:53,734 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-01-11 11:00:53,734 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-11 11:00:53,736 INFO  L225             Difference]: With dead ends: 239
[2019-01-11 11:00:53,736 INFO  L226             Difference]: Without dead ends: 235
[2019-01-11 11:00:53,737 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-11 11:00:53,737 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 235 states.
[2019-01-11 11:00:53,743 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 235.
[2019-01-11 11:00:53,743 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 235 states.
[2019-01-11 11:00:53,744 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 244 transitions.
[2019-01-11 11:00:53,744 INFO  L78                 Accepts]: Start accepts. Automaton has 235 states and 244 transitions. Word has length 3
[2019-01-11 11:00:53,744 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-11 11:00:53,745 INFO  L480      AbstractCegarLoop]: Abstraction has 235 states and 244 transitions.
[2019-01-11 11:00:53,745 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-11 11:00:53,745 INFO  L276                IsEmpty]: Start isEmpty. Operand 235 states and 244 transitions.
[2019-01-11 11:00:53,745 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 5
[2019-01-11 11:00:53,745 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-11 11:00:53,746 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1]
[2019-01-11 11:00:53,748 INFO  L423      AbstractCegarLoop]: === Iteration 7 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT]===
[2019-01-11 11:00:53,748 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-11 11:00:53,748 INFO  L82        PathProgramCache]: Analyzing trace with hash 6127075, now seen corresponding path program 1 times
[2019-01-11 11:00:53,749 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-11 11:00:53,750 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,750 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-11 11:00:53,750 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,750 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-11 11:00:53,753 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-11 11:00:53,780 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-11 11:00:53,781 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-11 11:00:53,781 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-11 11:00:53,781 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-11 11:00:53,781 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 3 states
[2019-01-11 11:00:53,782 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2019-01-11 11:00:53,782 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2019-01-11 11:00:53,782 INFO  L87              Difference]: Start difference. First operand 235 states and 244 transitions. Second operand 3 states.
[2019-01-11 11:00:53,811 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-11 11:00:53,811 INFO  L93              Difference]: Finished difference Result 235 states and 244 transitions.
[2019-01-11 11:00:53,813 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2019-01-11 11:00:53,813 INFO  L78                 Accepts]: Start accepts. Automaton has 3 states. Word has length 4
[2019-01-11 11:00:53,814 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-11 11:00:53,815 INFO  L225             Difference]: With dead ends: 235
[2019-01-11 11:00:53,815 INFO  L226             Difference]: Without dead ends: 234
[2019-01-11 11:00:53,816 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2019-01-11 11:00:53,817 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 234 states.
[2019-01-11 11:00:53,823 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 234.
[2019-01-11 11:00:53,823 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 234 states.
[2019-01-11 11:00:53,826 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 243 transitions.
[2019-01-11 11:00:53,826 INFO  L78                 Accepts]: Start accepts. Automaton has 234 states and 243 transitions. Word has length 4
[2019-01-11 11:00:53,826 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-11 11:00:53,827 INFO  L480      AbstractCegarLoop]: Abstraction has 234 states and 243 transitions.
[2019-01-11 11:00:53,827 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 3 states.
[2019-01-11 11:00:53,827 INFO  L276                IsEmpty]: Start isEmpty. Operand 234 states and 243 transitions.
[2019-01-11 11:00:53,827 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 5
[2019-01-11 11:00:53,828 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-11 11:00:53,828 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1]
[2019-01-11 11:00:53,834 INFO  L423      AbstractCegarLoop]: === Iteration 8 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT]===
[2019-01-11 11:00:53,834 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-11 11:00:53,835 INFO  L82        PathProgramCache]: Analyzing trace with hash 1755747, now seen corresponding path program 1 times
[2019-01-11 11:00:53,835 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-11 11:00:53,836 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,837 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-11 11:00:53,837 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:53,837 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-11 11:00:53,848 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-11 11:00:53,930 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-11 11:00:53,930 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-11 11:00:53,930 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-11 11:00:53,930 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-11 11:00:53,931 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-11 11:00:53,931 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-11 11:00:53,931 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-11 11:00:53,932 INFO  L87              Difference]: Start difference. First operand 234 states and 243 transitions. Second operand 4 states.
[2019-01-11 11:00:54,116 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-11 11:00:54,117 INFO  L93              Difference]: Finished difference Result 234 states and 243 transitions.
[2019-01-11 11:00:54,119 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-11 11:00:54,119 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 4
[2019-01-11 11:00:54,119 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-11 11:00:54,121 INFO  L225             Difference]: With dead ends: 234
[2019-01-11 11:00:54,121 INFO  L226             Difference]: Without dead ends: 213
[2019-01-11 11:00:54,121 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-11 11:00:54,123 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 213 states.
[2019-01-11 11:00:54,130 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 213.
[2019-01-11 11:00:54,130 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 213 states.
[2019-01-11 11:00:54,131 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 222 transitions.
[2019-01-11 11:00:54,131 INFO  L78                 Accepts]: Start accepts. Automaton has 213 states and 222 transitions. Word has length 4
[2019-01-11 11:00:54,132 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-11 11:00:54,132 INFO  L480      AbstractCegarLoop]: Abstraction has 213 states and 222 transitions.
[2019-01-11 11:00:54,132 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-11 11:00:54,132 INFO  L276                IsEmpty]: Start isEmpty. Operand 213 states and 222 transitions.
[2019-01-11 11:00:54,132 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-01-11 11:00:54,133 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-11 11:00:54,134 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-01-11 11:00:54,135 INFO  L423      AbstractCegarLoop]: === Iteration 9 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT]===
[2019-01-11 11:00:54,141 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-11 11:00:54,141 INFO  L82        PathProgramCache]: Analyzing trace with hash 189939531, now seen corresponding path program 1 times
[2019-01-11 11:00:54,141 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-11 11:00:54,143 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:54,143 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-11 11:00:54,143 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:54,143 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-11 11:00:54,152 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-11 11:00:54,280 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-11 11:00:54,280 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-11 11:00:54,280 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2019-01-11 11:00:54,281 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-11 11:00:54,281 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-11 11:00:54,281 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-11 11:00:54,281 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-11 11:00:54,282 INFO  L87              Difference]: Start difference. First operand 213 states and 222 transitions. Second operand 4 states.
[2019-01-11 11:00:54,412 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-11 11:00:54,412 INFO  L93              Difference]: Finished difference Result 213 states and 222 transitions.
[2019-01-11 11:00:54,413 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-11 11:00:54,413 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 5
[2019-01-11 11:00:54,413 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-11 11:00:54,414 INFO  L225             Difference]: With dead ends: 213
[2019-01-11 11:00:54,414 INFO  L226             Difference]: Without dead ends: 212
[2019-01-11 11:00:54,416 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-11 11:00:54,416 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 212 states.
[2019-01-11 11:00:54,423 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 212.
[2019-01-11 11:00:54,423 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 212 states.
[2019-01-11 11:00:54,424 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 221 transitions.
[2019-01-11 11:00:54,424 INFO  L78                 Accepts]: Start accepts. Automaton has 212 states and 221 transitions. Word has length 5
[2019-01-11 11:00:54,424 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-11 11:00:54,424 INFO  L480      AbstractCegarLoop]: Abstraction has 212 states and 221 transitions.
[2019-01-11 11:00:54,424 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-11 11:00:54,425 INFO  L276                IsEmpty]: Start isEmpty. Operand 212 states and 221 transitions.
[2019-01-11 11:00:54,425 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-01-11 11:00:54,425 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-11 11:00:54,425 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-01-11 11:00:54,429 INFO  L423      AbstractCegarLoop]: === Iteration 10 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT]===
[2019-01-11 11:00:54,429 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-11 11:00:54,429 INFO  L82        PathProgramCache]: Analyzing trace with hash 311167050, now seen corresponding path program 1 times
[2019-01-11 11:00:54,429 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-11 11:00:54,431 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:54,432 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-11 11:00:54,432 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:54,432 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-11 11:00:54,435 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-11 11:00:54,473 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-11 11:00:54,474 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-11 11:00:54,474 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2019-01-11 11:00:54,474 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-11 11:00:54,475 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 5 states
[2019-01-11 11:00:54,475 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2019-01-11 11:00:54,475 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2019-01-11 11:00:54,476 INFO  L87              Difference]: Start difference. First operand 212 states and 221 transitions. Second operand 5 states.
[2019-01-11 11:00:54,551 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-11 11:00:54,551 INFO  L93              Difference]: Finished difference Result 212 states and 221 transitions.
[2019-01-11 11:00:54,551 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2019-01-11 11:00:54,551 INFO  L78                 Accepts]: Start accepts. Automaton has 5 states. Word has length 5
[2019-01-11 11:00:54,552 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-11 11:00:54,553 INFO  L225             Difference]: With dead ends: 212
[2019-01-11 11:00:54,553 INFO  L226             Difference]: Without dead ends: 206
[2019-01-11 11:00:54,553 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2019-01-11 11:00:54,555 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 206 states.
[2019-01-11 11:00:54,560 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 206.
[2019-01-11 11:00:54,560 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 206 states.
[2019-01-11 11:00:54,561 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 216 transitions.
[2019-01-11 11:00:54,561 INFO  L78                 Accepts]: Start accepts. Automaton has 206 states and 216 transitions. Word has length 5
[2019-01-11 11:00:54,561 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-11 11:00:54,562 INFO  L480      AbstractCegarLoop]: Abstraction has 206 states and 216 transitions.
[2019-01-11 11:00:54,562 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 5 states.
[2019-01-11 11:00:54,562 INFO  L276                IsEmpty]: Start isEmpty. Operand 206 states and 216 transitions.
[2019-01-11 11:00:54,562 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-01-11 11:00:54,562 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-11 11:00:54,563 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-01-11 11:00:54,566 INFO  L423      AbstractCegarLoop]: === Iteration 11 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT]===
[2019-01-11 11:00:54,566 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-11 11:00:54,566 INFO  L82        PathProgramCache]: Analyzing trace with hash 179442176, now seen corresponding path program 1 times
[2019-01-11 11:00:54,567 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-11 11:00:54,568 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:54,568 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-11 11:00:54,568 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-11 11:00:54,568 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-11 11:00:54,571 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2019-01-11 11:00:54,575 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2019-01-11 11:00:54,586 INFO  L469         BasicCegarLoop]: Counterexample might be feasible
[2019-01-11 11:00:54,611 INFO  L202        PluginConnector]: Adding new model GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 11.01 11:00:54 BoogieIcfgContainer
[2019-01-11 11:00:54,611 INFO  L132        PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2019-01-11 11:00:54,612 INFO  L168              Benchmark]: Toolchain (without parser) took 4154.68 ms. Allocated memory was 132.1 MB in the beginning and 195.0 MB in the end (delta: 62.9 MB). Free memory was 100.6 MB in the beginning and 137.5 MB in the end (delta: -37.0 MB). Peak memory consumption was 25.9 MB. Max. memory is 7.1 GB.
[2019-01-11 11:00:54,614 INFO  L168              Benchmark]: Boogie PL CUP Parser took 0.13 ms. Allocated memory is still 132.1 MB. Free memory is still 103.3 MB. There was no memory consumed. Max. memory is 7.1 GB.
[2019-01-11 11:00:54,617 INFO  L168              Benchmark]: Boogie Procedure Inliner took 97.21 ms. Allocated memory is still 132.1 MB. Free memory was 100.6 MB in the beginning and 96.0 MB in the end (delta: 4.5 MB). Peak memory consumption was 4.5 MB. Max. memory is 7.1 GB.
[2019-01-11 11:00:54,617 INFO  L168              Benchmark]: Boogie Preprocessor took 99.14 ms. Allocated memory is still 132.1 MB. Free memory was 96.0 MB in the beginning and 93.7 MB in the end (delta: 2.3 MB). Peak memory consumption was 2.3 MB. Max. memory is 7.1 GB.
[2019-01-11 11:00:54,619 INFO  L168              Benchmark]: RCFGBuilder took 1977.10 ms. Allocated memory was 132.1 MB in the beginning and 178.3 MB in the end (delta: 46.1 MB). Free memory was 93.7 MB in the beginning and 120.8 MB in the end (delta: -27.1 MB). Peak memory consumption was 44.8 MB. Max. memory is 7.1 GB.
[2019-01-11 11:00:54,620 INFO  L168              Benchmark]: TraceAbstraction took 1974.45 ms. Allocated memory was 178.3 MB in the beginning and 195.0 MB in the end (delta: 16.8 MB). Free memory was 120.8 MB in the beginning and 137.5 MB in the end (delta: -16.7 MB). Peak memory consumption was 48.4 kB. Max. memory is 7.1 GB.
[2019-01-11 11:00:54,629 INFO  L336   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * Boogie PL CUP Parser took 0.13 ms. Allocated memory is still 132.1 MB. Free memory is still 103.3 MB. There was no memory consumed. Max. memory is 7.1 GB.
 * Boogie Procedure Inliner took 97.21 ms. Allocated memory is still 132.1 MB. Free memory was 100.6 MB in the beginning and 96.0 MB in the end (delta: 4.5 MB). Peak memory consumption was 4.5 MB. Max. memory is 7.1 GB.
 * Boogie Preprocessor took 99.14 ms. Allocated memory is still 132.1 MB. Free memory was 96.0 MB in the beginning and 93.7 MB in the end (delta: 2.3 MB). Peak memory consumption was 2.3 MB. Max. memory is 7.1 GB.
 * RCFGBuilder took 1977.10 ms. Allocated memory was 132.1 MB in the beginning and 178.3 MB in the end (delta: 46.1 MB). Free memory was 93.7 MB in the beginning and 120.8 MB in the end (delta: -27.1 MB). Peak memory consumption was 44.8 MB. Max. memory is 7.1 GB.
 * TraceAbstraction took 1974.45 ms. Allocated memory was 178.3 MB in the beginning and 195.0 MB in the end (delta: 16.8 MB). Free memory was 120.8 MB in the beginning and 137.5 MB in the end (delta: -16.7 MB). Peak memory consumption was 48.4 kB. Max. memory is 7.1 GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - CounterExampleResult [Line: 658]: assertion can be violated
    assertion can be violated
We found a FailurePath: 
[L642]        requires void$SimpleFrame2Cons$4$actionPerformed$4888$__this != $null;
[L651]        r0125 := void$SimpleFrame2Cons$4$actionPerformed$4888$__this;
[L653]        r1126 := void$SimpleFrame2Cons$4$actionPerformed$4888$param_0;
[L655]        $r2129 := SimpleFrame2Cons$SimpleFrame2Cons$4$this$0763;
[L390]        r083 := $param_0;
[L392]        $r185 := javax.swing.JButton$SimpleFrame2Cons$event2227;
[L394]        __ret := $r185;
[L658]        assert $r3130 != $null;

  - StatisticsResult: Ultimate Automizer benchmark data
    CFG has 16 procedures, 304 locations, 87 error locations. UNSAFE Result, 1.8s OverallTime, 11 OverallIterations, 1 TraceHistogramMax, 0.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2437 SDtfs, 419 SDslu, 4174 SDs, 0 SdLazy, 35 SolverSat, 11 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=304occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 10 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.6s InterpolantComputationTime, 40 NumberOfCodeBlocks, 40 NumberOfCodeBlocksAsserted, 11 NumberOfCheckSat, 25 ConstructedInterpolants, 0 QuantifiedInterpolants, 242 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 10 InterpolantComputations, 10 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available
RESULT: Ultimate proved your program to be incorrect!
Received shutdown request...