java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -s ../../../trunk/examples/settings/ai/array-bench/reach_32bit_array_oct.epf -i ../../../trunk/examples/programs/real-life/GuiTestExample.bpl


--------------------------------------------------------------------------------


This is Ultimate 0.1.24-fa1c628-m
[2019-01-31 17:21:01,921 INFO  L170        SettingsManager]: Resetting all preferences to default values...
[2019-01-31 17:21:01,923 INFO  L174        SettingsManager]: Resetting UltimateCore preferences to default values
[2019-01-31 17:21:01,935 INFO  L177        SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring...
[2019-01-31 17:21:01,935 INFO  L174        SettingsManager]: Resetting Boogie Preprocessor preferences to default values
[2019-01-31 17:21:01,937 INFO  L174        SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values
[2019-01-31 17:21:01,938 INFO  L174        SettingsManager]: Resetting Abstract Interpretation preferences to default values
[2019-01-31 17:21:01,940 INFO  L174        SettingsManager]: Resetting LassoRanker preferences to default values
[2019-01-31 17:21:01,941 INFO  L174        SettingsManager]: Resetting Reaching Definitions preferences to default values
[2019-01-31 17:21:01,942 INFO  L174        SettingsManager]: Resetting SyntaxChecker preferences to default values
[2019-01-31 17:21:01,943 INFO  L177        SettingsManager]: Büchi Program Product provides no preferences, ignoring...
[2019-01-31 17:21:01,943 INFO  L174        SettingsManager]: Resetting LTL2Aut preferences to default values
[2019-01-31 17:21:01,944 INFO  L174        SettingsManager]: Resetting PEA to Boogie preferences to default values
[2019-01-31 17:21:01,945 INFO  L174        SettingsManager]: Resetting BlockEncodingV2 preferences to default values
[2019-01-31 17:21:01,947 INFO  L174        SettingsManager]: Resetting ChcToBoogie preferences to default values
[2019-01-31 17:21:01,947 INFO  L174        SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
[2019-01-31 17:21:01,948 INFO  L174        SettingsManager]: Resetting BuchiAutomizer preferences to default values
[2019-01-31 17:21:01,950 INFO  L174        SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2019-01-31 17:21:01,952 INFO  L174        SettingsManager]: Resetting CodeCheck preferences to default values
[2019-01-31 17:21:01,954 INFO  L174        SettingsManager]: Resetting InvariantSynthesis preferences to default values
[2019-01-31 17:21:01,955 INFO  L174        SettingsManager]: Resetting RCFGBuilder preferences to default values
[2019-01-31 17:21:01,957 INFO  L174        SettingsManager]: Resetting TraceAbstraction preferences to default values
[2019-01-31 17:21:01,959 INFO  L177        SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
[2019-01-31 17:21:01,960 INFO  L177        SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring...
[2019-01-31 17:21:01,960 INFO  L174        SettingsManager]: Resetting TreeAutomizer preferences to default values
[2019-01-31 17:21:01,961 INFO  L174        SettingsManager]: Resetting IcfgTransformer preferences to default values
[2019-01-31 17:21:01,962 INFO  L174        SettingsManager]: Resetting Boogie Printer preferences to default values
[2019-01-31 17:21:01,963 INFO  L174        SettingsManager]: Resetting ReqPrinter preferences to default values
[2019-01-31 17:21:01,964 INFO  L174        SettingsManager]: Resetting Witness Printer preferences to default values
[2019-01-31 17:21:01,965 INFO  L177        SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring...
[2019-01-31 17:21:01,965 INFO  L174        SettingsManager]: Resetting CDTParser preferences to default values
[2019-01-31 17:21:01,966 INFO  L177        SettingsManager]: AutomataScriptParser provides no preferences, ignoring...
[2019-01-31 17:21:01,966 INFO  L177        SettingsManager]: ReqParser provides no preferences, ignoring...
[2019-01-31 17:21:01,966 INFO  L174        SettingsManager]: Resetting SmtParser preferences to default values
[2019-01-31 17:21:01,967 INFO  L174        SettingsManager]: Resetting Witness Parser preferences to default values
[2019-01-31 17:21:01,968 INFO  L181        SettingsManager]: Finished resetting all preferences to default values...
[2019-01-31 17:21:01,968 INFO  L98         SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/array-bench/reach_32bit_array_oct.epf
[2019-01-31 17:21:01,981 INFO  L110        SettingsManager]: Loading preferences was successful
[2019-01-31 17:21:01,981 INFO  L112        SettingsManager]: Preferences different from defaults after loading the file:
[2019-01-31 17:21:01,982 INFO  L131        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2019-01-31 17:21:01,982 INFO  L133        SettingsManager]:  * Show backtranslation warnings=false
[2019-01-31 17:21:01,982 INFO  L131        SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2019-01-31 17:21:01,982 INFO  L133        SettingsManager]:  * User list type=DISABLED
[2019-01-31 17:21:01,983 INFO  L133        SettingsManager]:  * Inline calls to unimplemented procedures=true
[2019-01-31 17:21:01,983 INFO  L131        SettingsManager]: Preferences of Abstract Interpretation differ from their defaults:
[2019-01-31 17:21:01,983 INFO  L133        SettingsManager]:  * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain
[2019-01-31 17:21:01,983 INFO  L133        SettingsManager]:  * Underlying domain=OctagonDomain
[2019-01-31 17:21:01,983 INFO  L133        SettingsManager]:  * Abstract domain=ArrayDomain
[2019-01-31 17:21:01,984 INFO  L133        SettingsManager]:  * Check feasibility of abstract posts with an SMT solver=true
[2019-01-31 17:21:01,984 INFO  L133        SettingsManager]:  * Interval Domain=false
[2019-01-31 17:21:01,984 INFO  L131        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2019-01-31 17:21:01,985 INFO  L133        SettingsManager]:  * Create parallel compositions if possible=false
[2019-01-31 17:21:01,985 INFO  L133        SettingsManager]:  * Use SBE=true
[2019-01-31 17:21:01,985 INFO  L131        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2019-01-31 17:21:01,985 INFO  L133        SettingsManager]:  * sizeof long=4
[2019-01-31 17:21:01,985 INFO  L133        SettingsManager]:  * Overapproximate operations on floating types=true
[2019-01-31 17:21:01,986 INFO  L133        SettingsManager]:  * sizeof POINTER=4
[2019-01-31 17:21:01,986 INFO  L133        SettingsManager]:  * Check division by zero=IGNORE
[2019-01-31 17:21:01,986 INFO  L133        SettingsManager]:  * Pointer to allocated memory at dereference=IGNORE
[2019-01-31 17:21:01,986 INFO  L133        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=IGNORE
[2019-01-31 17:21:01,986 INFO  L133        SettingsManager]:  * Check array bounds for arrays that are off heap=IGNORE
[2019-01-31 17:21:01,986 INFO  L133        SettingsManager]:  * sizeof long double=12
[2019-01-31 17:21:01,987 INFO  L133        SettingsManager]:  * Check if freed pointer was valid=false
[2019-01-31 17:21:01,987 INFO  L133        SettingsManager]:  * Pointer base address is valid at dereference=IGNORE
[2019-01-31 17:21:01,987 INFO  L131        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2019-01-31 17:21:01,987 INFO  L133        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2019-01-31 17:21:01,987 INFO  L133        SettingsManager]:  * SMT solver=External_DefaultMode
[2019-01-31 17:21:01,988 INFO  L133        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:8092 -smt2 -in -t:10000
[2019-01-31 17:21:01,988 INFO  L131        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2019-01-31 17:21:01,988 INFO  L133        SettingsManager]:  * Compute Interpolants along a Counterexample=FPandBP
[2019-01-31 17:21:01,988 INFO  L133        SettingsManager]:  * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles
[2019-01-31 17:21:01,988 INFO  L133        SettingsManager]:  * Trace refinement strategy=TAIPAN
[2019-01-31 17:21:01,989 INFO  L133        SettingsManager]:  * SMT solver=External_ModelsAndUnsatCoreMode
[2019-01-31 17:21:01,989 INFO  L133        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:8092 -smt2 -in
[2019-01-31 17:21:01,989 INFO  L133        SettingsManager]:  * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true
[2019-01-31 17:21:01,989 INFO  L133        SettingsManager]:  * Abstract interpretation Mode=USE_PREDICATES
[2019-01-31 17:21:02,020 INFO  L81    nceAwareModelManager]: Repository-Root is: /tmp
[2019-01-31 17:21:02,036 INFO  L258   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2019-01-31 17:21:02,041 INFO  L214   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2019-01-31 17:21:02,042 INFO  L271        PluginConnector]: Initializing Boogie PL CUP Parser...
[2019-01-31 17:21:02,043 INFO  L276        PluginConnector]: Boogie PL CUP Parser initialized
[2019-01-31 17:21:02,044 INFO  L418   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExample.bpl
[2019-01-31 17:21:02,044 INFO  L111           BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExample.bpl'
[2019-01-31 17:21:02,121 INFO  L296   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2019-01-31 17:21:02,123 INFO  L131        ToolchainWalker]: Walking toolchain with 4 elements.
[2019-01-31 17:21:02,124 INFO  L113        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2019-01-31 17:21:02,124 INFO  L271        PluginConnector]: Initializing Boogie Procedure Inliner...
[2019-01-31 17:21:02,124 INFO  L276        PluginConnector]: Boogie Procedure Inliner initialized
[2019-01-31 17:21:02,141 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 31.01 05:21:02" (1/1) ...
[2019-01-31 17:21:02,166 INFO  L185        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 31.01 05:21:02" (1/1) ...
[2019-01-31 17:21:02,180 WARN  L165                Inliner]: Program contained no entry procedure!
[2019-01-31 17:21:02,180 WARN  L168                Inliner]: Missing entry procedures: [ULTIMATE.start]
[2019-01-31 17:21:02,181 WARN  L175                Inliner]: Fallback enabled. All procedures will be processed.
[2019-01-31 17:21:02,242 INFO  L132        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2019-01-31 17:21:02,242 INFO  L113        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2019-01-31 17:21:02,243 INFO  L271        PluginConnector]: Initializing Boogie Preprocessor...
[2019-01-31 17:21:02,243 INFO  L276        PluginConnector]: Boogie Preprocessor initialized
[2019-01-31 17:21:02,253 INFO  L185        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 31.01 05:21:02" (1/1) ...
[2019-01-31 17:21:02,253 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 31.01 05:21:02" (1/1) ...
[2019-01-31 17:21:02,267 INFO  L185        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 31.01 05:21:02" (1/1) ...
[2019-01-31 17:21:02,268 INFO  L185        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 31.01 05:21:02" (1/1) ...
[2019-01-31 17:21:02,280 INFO  L185        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 31.01 05:21:02" (1/1) ...
[2019-01-31 17:21:02,285 INFO  L185        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 31.01 05:21:02" (1/1) ...
[2019-01-31 17:21:02,290 INFO  L185        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 31.01 05:21:02" (1/1) ...
[2019-01-31 17:21:02,298 INFO  L132        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2019-01-31 17:21:02,298 INFO  L113        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2019-01-31 17:21:02,298 INFO  L271        PluginConnector]: Initializing RCFGBuilder...
[2019-01-31 17:21:02,299 INFO  L276        PluginConnector]: RCFGBuilder initialized
[2019-01-31 17:21:02,300 INFO  L185        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 31.01 05:21:02" (1/1) ...
No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:8092 -smt2 -in -t:10000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:8092 -smt2 -in -t:10000
[2019-01-31 17:21:02,389 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 given in one single declaration
[2019-01-31 17:21:02,389 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885
[2019-01-31 17:21:02,389 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885
[2019-01-31 17:21:02,390 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 given in one single declaration
[2019-01-31 17:21:02,390 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$actionPerformed$4553
[2019-01-31 17:21:02,390 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553
[2019-01-31 17:21:02,390 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 given in one single declaration
[2019-01-31 17:21:02,391 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$actionPerformed$4886
[2019-01-31 17:21:02,393 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886
[2019-01-31 17:21:02,393 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 given in one single declaration
[2019-01-31 17:21:02,393 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$$la$init$ra$$1805
[2019-01-31 17:21:02,393 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805
[2019-01-31 17:21:02,394 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 given in one single declaration
[2019-01-31 17:21:02,394 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802
[2019-01-31 17:21:02,394 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802
[2019-01-31 17:21:02,394 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.SwingUtilities$invokeLater$4940
[2019-01-31 17:21:02,394 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setLayout$1827
[2019-01-31 17:21:02,395 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 given in one single declaration
[2019-01-31 17:21:02,395 INFO  L130     BoogieDeclarations]: Found specification of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806
[2019-01-31 17:21:02,395 INFO  L138     BoogieDeclarations]: Found implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806
[2019-01-31 17:21:02,395 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 given in one single declaration
[2019-01-31 17:21:02,395 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552
[2019-01-31 17:21:02,396 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552
[2019-01-31 17:21:02,401 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setResizable$1858
[2019-01-31 17:21:02,402 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 given in one single declaration
[2019-01-31 17:21:02,402 INFO  L130     BoogieDeclarations]: Found specification of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246
[2019-01-31 17:21:02,402 INFO  L138     BoogieDeclarations]: Found implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246
[2019-01-31 17:21:02,402 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 given in one single declaration
[2019-01-31 17:21:02,402 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$$la$init$ra$$1809
[2019-01-31 17:21:02,402 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809
[2019-01-31 17:21:02,403 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure int$SimpleFrame2Cons$access$2$1808 given in one single declaration
[2019-01-31 17:21:02,403 INFO  L130     BoogieDeclarations]: Found specification of procedure int$SimpleFrame2Cons$access$2$1808
[2019-01-31 17:21:02,403 INFO  L138     BoogieDeclarations]: Found implementation of procedure int$SimpleFrame2Cons$access$2$1808
[2019-01-31 17:21:02,403 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setDefaultCloseOperation$1816
[2019-01-31 17:21:02,403 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$addActionListener$4123
[2019-01-31 17:21:02,403 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setLocation$1913
[2019-01-31 17:21:02,404 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 given in one single declaration
[2019-01-31 17:21:02,404 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887
[2019-01-31 17:21:02,404 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887
[2019-01-31 17:21:02,404 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 given in one single declaration
[2019-01-31 17:21:02,404 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$actionPerformed$4888
[2019-01-31 17:21:02,405 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888
[2019-01-31 17:21:02,406 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$setEnabled$4131
[2019-01-31 17:21:02,406 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setVisible$1918
[2019-01-31 17:21:02,406 INFO  L130     BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getHeight$2305
[2019-01-31 17:21:02,407 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Window$pack$1909
[2019-01-31 17:21:02,407 INFO  L130     BoogieDeclarations]: Found specification of procedure java.awt.Toolkit$java.awt.Toolkit$getDefaultToolkit$3255
[2019-01-31 17:21:02,407 INFO  L130     BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getWidth$2304
[2019-01-31 17:21:02,407 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setTitle$1852
[2019-01-31 17:21:02,407 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$access$1$1807 given in one single declaration
[2019-01-31 17:21:02,407 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$access$1$1807
[2019-01-31 17:21:02,408 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$access$1$1807
[2019-01-31 17:21:02,408 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.FlowLayout$$la$init$ra$$4889
[2019-01-31 17:21:02,408 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$run$1803 given in one single declaration
[2019-01-31 17:21:02,409 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$run$1803
[2019-01-31 17:21:02,409 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$run$1803
[2019-01-31 17:21:02,409 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$main$1804 given in one single declaration
[2019-01-31 17:21:02,409 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$main$1804
[2019-01-31 17:21:02,409 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$main$1804
[2019-01-31 17:21:02,409 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JButton$$la$init$ra$$2558
[2019-01-31 17:21:02,410 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure $EFG_Procedure given in one single declaration
[2019-01-31 17:21:02,410 INFO  L130     BoogieDeclarations]: Found specification of procedure $EFG_Procedure
[2019-01-31 17:21:02,410 INFO  L138     BoogieDeclarations]: Found implementation of procedure $EFG_Procedure
[2019-01-31 17:21:02,410 INFO  L130     BoogieDeclarations]: Found specification of procedure java.awt.Component$java.awt.Container$add$2075
[2019-01-31 17:21:02,410 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.lang.Object$$la$init$ra$$38
[2019-01-31 17:21:02,741 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-31 17:21:02,859 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-31 17:21:02,949 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-31 17:21:02,988 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-31 17:21:03,498 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-31 17:21:03,539 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-31 17:21:03,551 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-31 17:21:03,554 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-31 17:21:03,584 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-31 17:21:03,595 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-31 17:21:03,610 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-01-31 17:21:04,236 INFO  L278             CfgBuilder]: Using library mode
[2019-01-31 17:21:04,236 INFO  L286             CfgBuilder]: Removed 206 assue(true) statements.
[2019-01-31 17:21:04,238 INFO  L202        PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.01 05:21:04 BoogieIcfgContainer
[2019-01-31 17:21:04,238 INFO  L132        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2019-01-31 17:21:04,239 INFO  L113        PluginConnector]: ------------------------TraceAbstraction----------------------------
[2019-01-31 17:21:04,239 INFO  L271        PluginConnector]: Initializing TraceAbstraction...
[2019-01-31 17:21:04,242 INFO  L276        PluginConnector]: TraceAbstraction initialized
[2019-01-31 17:21:04,242 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 31.01 05:21:02" (1/2) ...
[2019-01-31 17:21:04,243 INFO  L205        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@303dff95 and model type GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 31.01 05:21:04, skipping insertion in model container
[2019-01-31 17:21:04,244 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 31.01 05:21:04" (2/2) ...
[2019-01-31 17:21:04,246 INFO  L112   eAbstractionObserver]: Analyzing ICFG GuiTestExample.bpl
[2019-01-31 17:21:04,258 INFO  L156   ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2019-01-31 17:21:04,273 INFO  L168   ceAbstractionStarter]: Appying trace abstraction to program that has 87 error locations.
[2019-01-31 17:21:04,289 INFO  L257      AbstractCegarLoop]: Starting to check reachability of 87 error locations.
[2019-01-31 17:21:04,327 INFO  L382      AbstractCegarLoop]: Interprodecural is true
[2019-01-31 17:21:04,327 INFO  L383      AbstractCegarLoop]: Hoare is true
[2019-01-31 17:21:04,328 INFO  L384      AbstractCegarLoop]: Compute interpolants for FPandBP
[2019-01-31 17:21:04,328 INFO  L385      AbstractCegarLoop]: Backedges is STRAIGHT_LINE
[2019-01-31 17:21:04,328 INFO  L386      AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2019-01-31 17:21:04,328 INFO  L387      AbstractCegarLoop]: Difference is false
[2019-01-31 17:21:04,329 INFO  L388      AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA
[2019-01-31 17:21:04,329 INFO  L393      AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce========
[2019-01-31 17:21:04,358 INFO  L276                IsEmpty]: Start isEmpty. Operand 304 states.
[2019-01-31 17:21:04,364 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 3
[2019-01-31 17:21:04,365 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-31 17:21:04,366 INFO  L402         BasicCegarLoop]: trace histogram [1, 1]
[2019-01-31 17:21:04,371 INFO  L423      AbstractCegarLoop]: === Iteration 1 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-01-31 17:21:04,377 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-31 17:21:04,377 INFO  L82        PathProgramCache]: Analyzing trace with hash 10434, now seen corresponding path program 1 times
[2019-01-31 17:21:04,380 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-31 17:21:04,432 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:04,432 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-31 17:21:04,433 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:04,433 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-31 17:21:04,453 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-31 17:21:04,513 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-31 17:21:04,516 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-31 17:21:04,516 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1
[2019-01-31 17:21:04,516 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-31 17:21:04,522 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 3 states
[2019-01-31 17:21:04,536 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2019-01-31 17:21:04,537 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2019-01-31 17:21:04,540 INFO  L87              Difference]: Start difference. First operand 304 states. Second operand 3 states.
[2019-01-31 17:21:04,614 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-31 17:21:04,615 INFO  L93              Difference]: Finished difference Result 304 states and 306 transitions.
[2019-01-31 17:21:04,615 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2019-01-31 17:21:04,617 INFO  L78                 Accepts]: Start accepts. Automaton has 3 states. Word has length 2
[2019-01-31 17:21:04,618 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-31 17:21:04,636 INFO  L225             Difference]: With dead ends: 304
[2019-01-31 17:21:04,636 INFO  L226             Difference]: Without dead ends: 252
[2019-01-31 17:21:04,641 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2019-01-31 17:21:04,660 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 252 states.
[2019-01-31 17:21:04,694 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 252.
[2019-01-31 17:21:04,696 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 252 states.
[2019-01-31 17:21:04,700 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 252 states and 257 transitions.
[2019-01-31 17:21:04,702 INFO  L78                 Accepts]: Start accepts. Automaton has 252 states and 257 transitions. Word has length 2
[2019-01-31 17:21:04,702 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-31 17:21:04,702 INFO  L480      AbstractCegarLoop]: Abstraction has 252 states and 257 transitions.
[2019-01-31 17:21:04,702 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 3 states.
[2019-01-31 17:21:04,702 INFO  L276                IsEmpty]: Start isEmpty. Operand 252 states and 257 transitions.
[2019-01-31 17:21:04,703 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-01-31 17:21:04,703 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-31 17:21:04,703 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-01-31 17:21:04,709 INFO  L423      AbstractCegarLoop]: === Iteration 2 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-01-31 17:21:04,709 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-31 17:21:04,710 INFO  L82        PathProgramCache]: Analyzing trace with hash 168844, now seen corresponding path program 1 times
[2019-01-31 17:21:04,710 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-31 17:21:04,711 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:04,711 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-31 17:21:04,711 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:04,712 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-31 17:21:04,714 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-31 17:21:04,743 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-31 17:21:04,744 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-31 17:21:04,744 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-31 17:21:04,744 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-31 17:21:04,746 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-31 17:21:04,746 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-31 17:21:04,746 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-31 17:21:04,747 INFO  L87              Difference]: Start difference. First operand 252 states and 257 transitions. Second operand 4 states.
[2019-01-31 17:21:04,809 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-31 17:21:04,809 INFO  L93              Difference]: Finished difference Result 252 states and 257 transitions.
[2019-01-31 17:21:04,809 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-31 17:21:04,809 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-01-31 17:21:04,810 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-31 17:21:04,812 INFO  L225             Difference]: With dead ends: 252
[2019-01-31 17:21:04,812 INFO  L226             Difference]: Without dead ends: 248
[2019-01-31 17:21:04,814 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-31 17:21:04,815 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 248 states.
[2019-01-31 17:21:04,829 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248.
[2019-01-31 17:21:04,830 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 248 states.
[2019-01-31 17:21:04,831 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 254 transitions.
[2019-01-31 17:21:04,832 INFO  L78                 Accepts]: Start accepts. Automaton has 248 states and 254 transitions. Word has length 3
[2019-01-31 17:21:04,832 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-31 17:21:04,832 INFO  L480      AbstractCegarLoop]: Abstraction has 248 states and 254 transitions.
[2019-01-31 17:21:04,832 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-31 17:21:04,832 INFO  L276                IsEmpty]: Start isEmpty. Operand 248 states and 254 transitions.
[2019-01-31 17:21:04,833 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-01-31 17:21:04,833 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-31 17:21:04,833 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-01-31 17:21:04,836 INFO  L423      AbstractCegarLoop]: === Iteration 3 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-01-31 17:21:04,836 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-31 17:21:04,836 INFO  L82        PathProgramCache]: Analyzing trace with hash 181753, now seen corresponding path program 1 times
[2019-01-31 17:21:04,836 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-31 17:21:04,838 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:04,838 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-31 17:21:04,838 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:04,838 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-31 17:21:04,840 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-31 17:21:04,863 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-31 17:21:04,864 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-31 17:21:04,864 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-31 17:21:04,864 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-31 17:21:04,864 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-31 17:21:04,864 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-31 17:21:04,865 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-31 17:21:04,865 INFO  L87              Difference]: Start difference. First operand 248 states and 254 transitions. Second operand 4 states.
[2019-01-31 17:21:04,894 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-31 17:21:04,894 INFO  L93              Difference]: Finished difference Result 248 states and 254 transitions.
[2019-01-31 17:21:04,895 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-31 17:21:04,895 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-01-31 17:21:04,895 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-31 17:21:04,897 INFO  L225             Difference]: With dead ends: 248
[2019-01-31 17:21:04,897 INFO  L226             Difference]: Without dead ends: 244
[2019-01-31 17:21:04,898 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-31 17:21:04,899 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 244 states.
[2019-01-31 17:21:04,911 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 244.
[2019-01-31 17:21:04,912 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 244 states.
[2019-01-31 17:21:04,913 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 251 transitions.
[2019-01-31 17:21:04,914 INFO  L78                 Accepts]: Start accepts. Automaton has 244 states and 251 transitions. Word has length 3
[2019-01-31 17:21:04,914 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-31 17:21:04,914 INFO  L480      AbstractCegarLoop]: Abstraction has 244 states and 251 transitions.
[2019-01-31 17:21:04,914 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-31 17:21:04,914 INFO  L276                IsEmpty]: Start isEmpty. Operand 244 states and 251 transitions.
[2019-01-31 17:21:04,915 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-01-31 17:21:04,915 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-31 17:21:04,915 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-01-31 17:21:04,918 INFO  L423      AbstractCegarLoop]: === Iteration 4 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-01-31 17:21:04,918 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-31 17:21:04,919 INFO  L82        PathProgramCache]: Analyzing trace with hash 323784, now seen corresponding path program 1 times
[2019-01-31 17:21:04,919 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-31 17:21:04,920 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:04,920 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-31 17:21:04,921 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:04,921 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-31 17:21:04,923 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-31 17:21:04,974 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-31 17:21:04,974 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-31 17:21:04,974 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-31 17:21:04,974 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-31 17:21:04,975 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-31 17:21:04,975 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-31 17:21:04,975 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-31 17:21:04,976 INFO  L87              Difference]: Start difference. First operand 244 states and 251 transitions. Second operand 4 states.
[2019-01-31 17:21:05,004 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-31 17:21:05,004 INFO  L93              Difference]: Finished difference Result 244 states and 251 transitions.
[2019-01-31 17:21:05,005 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-31 17:21:05,005 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-01-31 17:21:05,005 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-31 17:21:05,008 INFO  L225             Difference]: With dead ends: 244
[2019-01-31 17:21:05,011 INFO  L226             Difference]: Without dead ends: 243
[2019-01-31 17:21:05,012 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-31 17:21:05,013 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 243 states.
[2019-01-31 17:21:05,038 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 243.
[2019-01-31 17:21:05,038 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 243 states.
[2019-01-31 17:21:05,039 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 250 transitions.
[2019-01-31 17:21:05,039 INFO  L78                 Accepts]: Start accepts. Automaton has 243 states and 250 transitions. Word has length 3
[2019-01-31 17:21:05,039 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-31 17:21:05,039 INFO  L480      AbstractCegarLoop]: Abstraction has 243 states and 250 transitions.
[2019-01-31 17:21:05,040 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-31 17:21:05,040 INFO  L276                IsEmpty]: Start isEmpty. Operand 243 states and 250 transitions.
[2019-01-31 17:21:05,040 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-01-31 17:21:05,040 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-31 17:21:05,040 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-01-31 17:21:05,046 INFO  L423      AbstractCegarLoop]: === Iteration 5 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-01-31 17:21:05,047 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-31 17:21:05,049 INFO  L82        PathProgramCache]: Analyzing trace with hash 161893, now seen corresponding path program 1 times
[2019-01-31 17:21:05,049 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-31 17:21:05,050 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:05,050 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-31 17:21:05,050 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:05,051 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-31 17:21:05,053 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-31 17:21:05,076 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-31 17:21:05,077 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-31 17:21:05,077 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-31 17:21:05,077 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-31 17:21:05,078 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-31 17:21:05,078 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-31 17:21:05,078 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-31 17:21:05,079 INFO  L87              Difference]: Start difference. First operand 243 states and 250 transitions. Second operand 4 states.
[2019-01-31 17:21:05,104 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-31 17:21:05,105 INFO  L93              Difference]: Finished difference Result 243 states and 250 transitions.
[2019-01-31 17:21:05,105 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-31 17:21:05,105 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-01-31 17:21:05,105 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-31 17:21:05,111 INFO  L225             Difference]: With dead ends: 243
[2019-01-31 17:21:05,112 INFO  L226             Difference]: Without dead ends: 239
[2019-01-31 17:21:05,113 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-31 17:21:05,114 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 239 states.
[2019-01-31 17:21:05,130 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 239.
[2019-01-31 17:21:05,131 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 239 states.
[2019-01-31 17:21:05,135 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 247 transitions.
[2019-01-31 17:21:05,136 INFO  L78                 Accepts]: Start accepts. Automaton has 239 states and 247 transitions. Word has length 3
[2019-01-31 17:21:05,136 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-31 17:21:05,136 INFO  L480      AbstractCegarLoop]: Abstraction has 239 states and 247 transitions.
[2019-01-31 17:21:05,136 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-31 17:21:05,136 INFO  L276                IsEmpty]: Start isEmpty. Operand 239 states and 247 transitions.
[2019-01-31 17:21:05,140 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-01-31 17:21:05,140 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-31 17:21:05,140 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-01-31 17:21:05,146 INFO  L423      AbstractCegarLoop]: === Iteration 6 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-01-31 17:21:05,147 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-31 17:21:05,147 INFO  L82        PathProgramCache]: Analyzing trace with hash 29824, now seen corresponding path program 1 times
[2019-01-31 17:21:05,147 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-31 17:21:05,152 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:05,152 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-31 17:21:05,152 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:05,152 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-31 17:21:05,158 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-31 17:21:05,311 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-31 17:21:05,311 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-31 17:21:05,311 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-31 17:21:05,311 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-31 17:21:05,312 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-31 17:21:05,314 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-31 17:21:05,314 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-31 17:21:05,315 INFO  L87              Difference]: Start difference. First operand 239 states and 247 transitions. Second operand 4 states.
[2019-01-31 17:21:05,373 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-31 17:21:05,373 INFO  L93              Difference]: Finished difference Result 239 states and 247 transitions.
[2019-01-31 17:21:05,373 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-31 17:21:05,373 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-01-31 17:21:05,373 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-31 17:21:05,375 INFO  L225             Difference]: With dead ends: 239
[2019-01-31 17:21:05,375 INFO  L226             Difference]: Without dead ends: 235
[2019-01-31 17:21:05,376 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-31 17:21:05,377 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 235 states.
[2019-01-31 17:21:05,382 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 235.
[2019-01-31 17:21:05,382 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 235 states.
[2019-01-31 17:21:05,383 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 244 transitions.
[2019-01-31 17:21:05,383 INFO  L78                 Accepts]: Start accepts. Automaton has 235 states and 244 transitions. Word has length 3
[2019-01-31 17:21:05,383 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-31 17:21:05,384 INFO  L480      AbstractCegarLoop]: Abstraction has 235 states and 244 transitions.
[2019-01-31 17:21:05,384 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-31 17:21:05,384 INFO  L276                IsEmpty]: Start isEmpty. Operand 235 states and 244 transitions.
[2019-01-31 17:21:05,384 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 5
[2019-01-31 17:21:05,385 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-31 17:21:05,385 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1]
[2019-01-31 17:21:05,387 INFO  L423      AbstractCegarLoop]: === Iteration 7 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-01-31 17:21:05,387 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-31 17:21:05,387 INFO  L82        PathProgramCache]: Analyzing trace with hash 1755747, now seen corresponding path program 1 times
[2019-01-31 17:21:05,388 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-31 17:21:05,390 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:05,390 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-31 17:21:05,390 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:05,390 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-31 17:21:05,397 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-31 17:21:05,555 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-31 17:21:05,556 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-31 17:21:05,556 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-31 17:21:05,556 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-31 17:21:05,556 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-31 17:21:05,557 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-31 17:21:05,557 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-31 17:21:05,557 INFO  L87              Difference]: Start difference. First operand 235 states and 244 transitions. Second operand 4 states.
[2019-01-31 17:21:05,755 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-31 17:21:05,755 INFO  L93              Difference]: Finished difference Result 235 states and 244 transitions.
[2019-01-31 17:21:05,757 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-31 17:21:05,757 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 4
[2019-01-31 17:21:05,757 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-31 17:21:05,758 INFO  L225             Difference]: With dead ends: 235
[2019-01-31 17:21:05,758 INFO  L226             Difference]: Without dead ends: 214
[2019-01-31 17:21:05,759 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-31 17:21:05,760 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 214 states.
[2019-01-31 17:21:05,764 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214.
[2019-01-31 17:21:05,765 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 214 states.
[2019-01-31 17:21:05,766 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 223 transitions.
[2019-01-31 17:21:05,766 INFO  L78                 Accepts]: Start accepts. Automaton has 214 states and 223 transitions. Word has length 4
[2019-01-31 17:21:05,766 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-31 17:21:05,766 INFO  L480      AbstractCegarLoop]: Abstraction has 214 states and 223 transitions.
[2019-01-31 17:21:05,766 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-31 17:21:05,766 INFO  L276                IsEmpty]: Start isEmpty. Operand 214 states and 223 transitions.
[2019-01-31 17:21:05,767 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 5
[2019-01-31 17:21:05,767 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-31 17:21:05,767 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1]
[2019-01-31 17:21:05,769 INFO  L423      AbstractCegarLoop]: === Iteration 8 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-01-31 17:21:05,769 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-31 17:21:05,769 INFO  L82        PathProgramCache]: Analyzing trace with hash 6127075, now seen corresponding path program 1 times
[2019-01-31 17:21:05,770 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-31 17:21:05,771 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:05,771 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-31 17:21:05,771 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:05,771 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-31 17:21:05,774 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-31 17:21:05,800 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-31 17:21:05,800 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-31 17:21:05,800 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-01-31 17:21:05,801 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-31 17:21:05,801 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 3 states
[2019-01-31 17:21:05,801 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2019-01-31 17:21:05,801 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2019-01-31 17:21:05,801 INFO  L87              Difference]: Start difference. First operand 214 states and 223 transitions. Second operand 3 states.
[2019-01-31 17:21:05,817 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-31 17:21:05,818 INFO  L93              Difference]: Finished difference Result 214 states and 223 transitions.
[2019-01-31 17:21:05,818 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2019-01-31 17:21:05,818 INFO  L78                 Accepts]: Start accepts. Automaton has 3 states. Word has length 4
[2019-01-31 17:21:05,818 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-31 17:21:05,819 INFO  L225             Difference]: With dead ends: 214
[2019-01-31 17:21:05,819 INFO  L226             Difference]: Without dead ends: 213
[2019-01-31 17:21:05,820 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2019-01-31 17:21:05,821 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 213 states.
[2019-01-31 17:21:05,826 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 213.
[2019-01-31 17:21:05,827 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 213 states.
[2019-01-31 17:21:05,828 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 222 transitions.
[2019-01-31 17:21:05,828 INFO  L78                 Accepts]: Start accepts. Automaton has 213 states and 222 transitions. Word has length 4
[2019-01-31 17:21:05,828 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-31 17:21:05,828 INFO  L480      AbstractCegarLoop]: Abstraction has 213 states and 222 transitions.
[2019-01-31 17:21:05,828 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 3 states.
[2019-01-31 17:21:05,828 INFO  L276                IsEmpty]: Start isEmpty. Operand 213 states and 222 transitions.
[2019-01-31 17:21:05,829 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-01-31 17:21:05,829 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-31 17:21:05,829 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-01-31 17:21:05,831 INFO  L423      AbstractCegarLoop]: === Iteration 9 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-01-31 17:21:05,831 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-31 17:21:05,831 INFO  L82        PathProgramCache]: Analyzing trace with hash 311167050, now seen corresponding path program 1 times
[2019-01-31 17:21:05,832 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-31 17:21:05,833 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:05,833 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-31 17:21:05,833 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:05,833 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-31 17:21:05,836 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-31 17:21:05,880 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-31 17:21:05,880 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-31 17:21:05,881 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2019-01-31 17:21:05,881 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-31 17:21:05,881 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 5 states
[2019-01-31 17:21:05,881 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2019-01-31 17:21:05,881 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2019-01-31 17:21:05,882 INFO  L87              Difference]: Start difference. First operand 213 states and 222 transitions. Second operand 5 states.
[2019-01-31 17:21:05,942 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-31 17:21:05,942 INFO  L93              Difference]: Finished difference Result 213 states and 222 transitions.
[2019-01-31 17:21:05,943 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2019-01-31 17:21:05,943 INFO  L78                 Accepts]: Start accepts. Automaton has 5 states. Word has length 5
[2019-01-31 17:21:05,943 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-31 17:21:05,944 INFO  L225             Difference]: With dead ends: 213
[2019-01-31 17:21:05,944 INFO  L226             Difference]: Without dead ends: 207
[2019-01-31 17:21:05,945 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2019-01-31 17:21:05,946 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 207 states.
[2019-01-31 17:21:05,951 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207.
[2019-01-31 17:21:05,951 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 207 states.
[2019-01-31 17:21:05,952 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 217 transitions.
[2019-01-31 17:21:05,952 INFO  L78                 Accepts]: Start accepts. Automaton has 207 states and 217 transitions. Word has length 5
[2019-01-31 17:21:05,952 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-31 17:21:05,952 INFO  L480      AbstractCegarLoop]: Abstraction has 207 states and 217 transitions.
[2019-01-31 17:21:05,953 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 5 states.
[2019-01-31 17:21:05,953 INFO  L276                IsEmpty]: Start isEmpty. Operand 207 states and 217 transitions.
[2019-01-31 17:21:05,953 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-01-31 17:21:05,953 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-31 17:21:05,953 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-01-31 17:21:05,954 INFO  L423      AbstractCegarLoop]: === Iteration 10 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-01-31 17:21:05,954 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-31 17:21:05,955 INFO  L82        PathProgramCache]: Analyzing trace with hash 54428221, now seen corresponding path program 1 times
[2019-01-31 17:21:05,955 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-31 17:21:05,956 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:05,956 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-31 17:21:05,956 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:05,956 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-31 17:21:05,959 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-31 17:21:06,200 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-31 17:21:06,200 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-31 17:21:06,201 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2019-01-31 17:21:06,201 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-31 17:21:06,201 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 5 states
[2019-01-31 17:21:06,201 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2019-01-31 17:21:06,201 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2019-01-31 17:21:06,202 INFO  L87              Difference]: Start difference. First operand 207 states and 217 transitions. Second operand 5 states.
[2019-01-31 17:21:06,654 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-31 17:21:06,655 INFO  L93              Difference]: Finished difference Result 207 states and 217 transitions.
[2019-01-31 17:21:06,655 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2019-01-31 17:21:06,655 INFO  L78                 Accepts]: Start accepts. Automaton has 5 states. Word has length 5
[2019-01-31 17:21:06,655 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-31 17:21:06,657 INFO  L225             Difference]: With dead ends: 207
[2019-01-31 17:21:06,657 INFO  L226             Difference]: Without dead ends: 206
[2019-01-31 17:21:06,657 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2019-01-31 17:21:06,658 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 206 states.
[2019-01-31 17:21:06,663 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 206.
[2019-01-31 17:21:06,664 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 206 states.
[2019-01-31 17:21:06,665 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 216 transitions.
[2019-01-31 17:21:06,665 INFO  L78                 Accepts]: Start accepts. Automaton has 206 states and 216 transitions. Word has length 5
[2019-01-31 17:21:06,665 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-31 17:21:06,665 INFO  L480      AbstractCegarLoop]: Abstraction has 206 states and 216 transitions.
[2019-01-31 17:21:06,665 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 5 states.
[2019-01-31 17:21:06,665 INFO  L276                IsEmpty]: Start isEmpty. Operand 206 states and 216 transitions.
[2019-01-31 17:21:06,666 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-01-31 17:21:06,666 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-31 17:21:06,666 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-01-31 17:21:06,667 INFO  L423      AbstractCegarLoop]: === Iteration 11 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-01-31 17:21:06,667 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-31 17:21:06,667 INFO  L82        PathProgramCache]: Analyzing trace with hash 189939531, now seen corresponding path program 1 times
[2019-01-31 17:21:06,667 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-31 17:21:06,669 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:06,669 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-31 17:21:06,669 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:06,669 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-31 17:21:06,672 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-01-31 17:21:06,807 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-01-31 17:21:06,808 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-01-31 17:21:06,808 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2019-01-31 17:21:06,808 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-01-31 17:21:06,809 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-01-31 17:21:06,809 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-01-31 17:21:06,809 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-01-31 17:21:06,810 INFO  L87              Difference]: Start difference. First operand 206 states and 216 transitions. Second operand 4 states.
[2019-01-31 17:21:06,974 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-01-31 17:21:06,974 INFO  L93              Difference]: Finished difference Result 206 states and 216 transitions.
[2019-01-31 17:21:06,974 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-01-31 17:21:06,974 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 5
[2019-01-31 17:21:06,975 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-01-31 17:21:06,976 INFO  L225             Difference]: With dead ends: 206
[2019-01-31 17:21:06,976 INFO  L226             Difference]: Without dead ends: 205
[2019-01-31 17:21:06,977 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-01-31 17:21:06,977 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 205 states.
[2019-01-31 17:21:06,983 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 205.
[2019-01-31 17:21:06,984 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 205 states.
[2019-01-31 17:21:06,984 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 215 transitions.
[2019-01-31 17:21:06,985 INFO  L78                 Accepts]: Start accepts. Automaton has 205 states and 215 transitions. Word has length 5
[2019-01-31 17:21:06,985 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-01-31 17:21:06,985 INFO  L480      AbstractCegarLoop]: Abstraction has 205 states and 215 transitions.
[2019-01-31 17:21:06,985 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-01-31 17:21:06,985 INFO  L276                IsEmpty]: Start isEmpty. Operand 205 states and 215 transitions.
[2019-01-31 17:21:06,986 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-01-31 17:21:06,986 INFO  L394         BasicCegarLoop]: Found error trace
[2019-01-31 17:21:06,986 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-01-31 17:21:06,987 INFO  L423      AbstractCegarLoop]: === Iteration 12 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-01-31 17:21:06,987 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-01-31 17:21:06,987 INFO  L82        PathProgramCache]: Analyzing trace with hash 179442176, now seen corresponding path program 1 times
[2019-01-31 17:21:06,987 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-01-31 17:21:06,988 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:06,988 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-01-31 17:21:06,988 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-01-31 17:21:06,989 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-01-31 17:21:06,991 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2019-01-31 17:21:06,994 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2019-01-31 17:21:07,008 INFO  L469         BasicCegarLoop]: Counterexample might be feasible
[2019-01-31 17:21:07,031 INFO  L202        PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 31.01 05:21:07 BoogieIcfgContainer
[2019-01-31 17:21:07,031 INFO  L132        PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2019-01-31 17:21:07,032 INFO  L168              Benchmark]: Toolchain (without parser) took 4909.87 ms. Allocated memory was 133.2 MB in the beginning and 196.1 MB in the end (delta: 62.9 MB). Free memory was 106.8 MB in the beginning and 119.3 MB in the end (delta: -12.5 MB). Peak memory consumption was 50.4 MB. Max. memory is 7.1 GB.
[2019-01-31 17:21:07,035 INFO  L168              Benchmark]: Boogie PL CUP Parser took 0.46 ms. Allocated memory is still 133.2 MB. Free memory is still 109.3 MB. There was no memory consumed. Max. memory is 7.1 GB.
[2019-01-31 17:21:07,035 INFO  L168              Benchmark]: Boogie Procedure Inliner took 118.14 ms. Allocated memory is still 133.2 MB. Free memory was 106.8 MB in the beginning and 102.5 MB in the end (delta: 4.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 7.1 GB.
[2019-01-31 17:21:07,036 INFO  L168              Benchmark]: Boogie Preprocessor took 55.40 ms. Allocated memory is still 133.2 MB. Free memory was 102.5 MB in the beginning and 100.0 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB.
[2019-01-31 17:21:07,037 INFO  L168              Benchmark]: RCFGBuilder took 1939.73 ms. Allocated memory was 133.2 MB in the beginning and 170.4 MB in the end (delta: 37.2 MB). Free memory was 100.0 MB in the beginning and 116.2 MB in the end (delta: -16.2 MB). Peak memory consumption was 47.3 MB. Max. memory is 7.1 GB.
[2019-01-31 17:21:07,038 INFO  L168              Benchmark]: TraceAbstraction took 2792.25 ms. Allocated memory was 170.4 MB in the beginning and 196.1 MB in the end (delta: 25.7 MB). Free memory was 116.2 MB in the beginning and 119.3 MB in the end (delta: -3.0 MB). Peak memory consumption was 22.7 MB. Max. memory is 7.1 GB.
[2019-01-31 17:21:07,043 INFO  L336   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * Boogie PL CUP Parser took 0.46 ms. Allocated memory is still 133.2 MB. Free memory is still 109.3 MB. There was no memory consumed. Max. memory is 7.1 GB.
 * Boogie Procedure Inliner took 118.14 ms. Allocated memory is still 133.2 MB. Free memory was 106.8 MB in the beginning and 102.5 MB in the end (delta: 4.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 7.1 GB.
 * Boogie Preprocessor took 55.40 ms. Allocated memory is still 133.2 MB. Free memory was 102.5 MB in the beginning and 100.0 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB.
 * RCFGBuilder took 1939.73 ms. Allocated memory was 133.2 MB in the beginning and 170.4 MB in the end (delta: 37.2 MB). Free memory was 100.0 MB in the beginning and 116.2 MB in the end (delta: -16.2 MB). Peak memory consumption was 47.3 MB. Max. memory is 7.1 GB.
 * TraceAbstraction took 2792.25 ms. Allocated memory was 170.4 MB in the beginning and 196.1 MB in the end (delta: 25.7 MB). Free memory was 116.2 MB in the beginning and 119.3 MB in the end (delta: -3.0 MB). Peak memory consumption was 22.7 MB. Max. memory is 7.1 GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - CounterExampleResult [Line: 658]: assertion can be violated
    assertion can be violated
We found a FailurePath: 
[L642]        requires void$SimpleFrame2Cons$4$actionPerformed$4888$__this != $null;
[L651]        r0125 := void$SimpleFrame2Cons$4$actionPerformed$4888$__this;
[L653]        r1126 := void$SimpleFrame2Cons$4$actionPerformed$4888$param_0;
[L655]        $r2129 := SimpleFrame2Cons$SimpleFrame2Cons$4$this$0763;
[L390]        r083 := $param_0;
[L392]        $r185 := javax.swing.JButton$SimpleFrame2Cons$event2227;
[L394]        __ret := $r185;
[L658]        assert $r3130 != $null;

  - StatisticsResult: Ultimate Automizer benchmark data
    CFG has 16 procedures, 304 locations, 87 error locations. UNSAFE Result, 2.7s OverallTime, 12 OverallIterations, 1 TraceHistogramMax, 1.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2614 SDtfs, 581 SDslu, 4627 SDs, 0 SdLazy, 50 SolverSat, 11 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=304occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 11 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 45 NumberOfCodeBlocks, 45 NumberOfCodeBlocksAsserted, 12 NumberOfCheckSat, 29 ConstructedInterpolants, 0 QuantifiedInterpolants, 306 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 11 InterpolantComputations, 11 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available
RESULT: Ultimate proved your program to be incorrect!
Received shutdown request...