java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -s ../../../trunk/examples/settings/ai/array-bench/reach_32bit_array_oct.epf -i ../../../trunk/examples/programs/real-life/GuiTestExampleUnsafe.bpl -------------------------------------------------------------------------------- This is Ultimate 0.1.24-a9d37a5-m [2019-02-28 10:37:48,304 INFO L170 SettingsManager]: Resetting all preferences to default values... [2019-02-28 10:37:48,306 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2019-02-28 10:37:48,321 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-02-28 10:37:48,322 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-02-28 10:37:48,323 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-02-28 10:37:48,324 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-02-28 10:37:48,326 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2019-02-28 10:37:48,328 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-02-28 10:37:48,329 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-02-28 10:37:48,330 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-02-28 10:37:48,330 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-02-28 10:37:48,331 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-02-28 10:37:48,332 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-02-28 10:37:48,333 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-02-28 10:37:48,334 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-02-28 10:37:48,335 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-02-28 10:37:48,337 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-02-28 10:37:48,339 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2019-02-28 10:37:48,341 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-02-28 10:37:48,342 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-02-28 10:37:48,343 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-02-28 10:37:48,346 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-02-28 10:37:48,346 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-02-28 10:37:48,346 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-02-28 10:37:48,347 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-02-28 10:37:48,352 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-02-28 10:37:48,353 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-02-28 10:37:48,353 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2019-02-28 10:37:48,355 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-02-28 10:37:48,357 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2019-02-28 10:37:48,358 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-02-28 10:37:48,358 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-02-28 10:37:48,358 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2019-02-28 10:37:48,360 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2019-02-28 10:37:48,361 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2019-02-28 10:37:48,361 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/array-bench/reach_32bit_array_oct.epf [2019-02-28 10:37:48,384 INFO L110 SettingsManager]: Loading preferences was successful [2019-02-28 10:37:48,384 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2019-02-28 10:37:48,385 INFO L131 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2019-02-28 10:37:48,385 INFO L133 SettingsManager]: * Show backtranslation warnings=false [2019-02-28 10:37:48,385 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-02-28 10:37:48,386 INFO L133 SettingsManager]: * User list type=DISABLED [2019-02-28 10:37:48,386 INFO L133 SettingsManager]: * Inline calls to unimplemented procedures=true [2019-02-28 10:37:48,386 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-02-28 10:37:48,386 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-02-28 10:37:48,387 INFO L133 SettingsManager]: * Underlying domain=OctagonDomain [2019-02-28 10:37:48,387 INFO L133 SettingsManager]: * Abstract domain=ArrayDomain [2019-02-28 10:37:48,387 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-02-28 10:37:48,387 INFO L133 SettingsManager]: * Interval Domain=false [2019-02-28 10:37:48,388 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-02-28 10:37:48,389 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2019-02-28 10:37:48,389 INFO L133 SettingsManager]: * Use SBE=true [2019-02-28 10:37:48,389 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-02-28 10:37:48,390 INFO L133 SettingsManager]: * sizeof long=4 [2019-02-28 10:37:48,391 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2019-02-28 10:37:48,391 INFO L133 SettingsManager]: * sizeof POINTER=4 [2019-02-28 10:37:48,391 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2019-02-28 10:37:48,391 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-02-28 10:37:48,392 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-02-28 10:37:48,392 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-02-28 10:37:48,392 INFO L133 SettingsManager]: * sizeof long double=12 [2019-02-28 10:37:48,392 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2019-02-28 10:37:48,392 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-02-28 10:37:48,393 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-02-28 10:37:48,393 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-02-28 10:37:48,393 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2019-02-28 10:37:48,393 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:16092 -smt2 -in -t:200000 [2019-02-28 10:37:48,394 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-02-28 10:37:48,394 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-02-28 10:37:48,394 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-02-28 10:37:48,394 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2019-02-28 10:37:48,395 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-02-28 10:37:48,395 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:16092 -smt2 -in [2019-02-28 10:37:48,395 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-02-28 10:37:48,395 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2019-02-28 10:37:48,433 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-02-28 10:37:48,445 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-02-28 10:37:48,448 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-02-28 10:37:48,450 INFO L271 PluginConnector]: Initializing Boogie PL CUP Parser... [2019-02-28 10:37:48,450 INFO L276 PluginConnector]: Boogie PL CUP Parser initialized [2019-02-28 10:37:48,451 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExampleUnsafe.bpl [2019-02-28 10:37:48,451 INFO L111 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExampleUnsafe.bpl' [2019-02-28 10:37:48,535 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-02-28 10:37:48,536 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-02-28 10:37:48,537 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-02-28 10:37:48,537 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-02-28 10:37:48,538 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2019-02-28 10:37:48,554 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:37:48" (1/1) ... [2019-02-28 10:37:48,579 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:37:48" (1/1) ... [2019-02-28 10:37:48,591 WARN L165 Inliner]: Program contained no entry procedure! [2019-02-28 10:37:48,592 WARN L168 Inliner]: Missing entry procedures: [ULTIMATE.start] [2019-02-28 10:37:48,592 WARN L175 Inliner]: Fallback enabled. All procedures will be processed. [2019-02-28 10:37:48,664 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-02-28 10:37:48,665 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-02-28 10:37:48,665 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-02-28 10:37:48,665 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2019-02-28 10:37:48,678 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:37:48" (1/1) ... [2019-02-28 10:37:48,678 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:37:48" (1/1) ... [2019-02-28 10:37:48,702 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:37:48" (1/1) ... [2019-02-28 10:37:48,702 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:37:48" (1/1) ... [2019-02-28 10:37:48,720 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:37:48" (1/1) ... [2019-02-28 10:37:48,724 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:37:48" (1/1) ... [2019-02-28 10:37:48,729 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:37:48" (1/1) ... [2019-02-28 10:37:48,737 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-02-28 10:37:48,738 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-02-28 10:37:48,738 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-02-28 10:37:48,738 INFO L276 PluginConnector]: RCFGBuilder initialized [2019-02-28 10:37:48,739 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:37:48" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:16092 -smt2 -in -t:200000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:16092 -smt2 -in -t:200000 [2019-02-28 10:37:48,814 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 given in one single declaration [2019-02-28 10:37:48,814 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 [2019-02-28 10:37:48,814 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 [2019-02-28 10:37:48,816 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 given in one single declaration [2019-02-28 10:37:48,816 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 [2019-02-28 10:37:48,817 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 [2019-02-28 10:37:48,817 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 given in one single declaration [2019-02-28 10:37:48,817 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 [2019-02-28 10:37:48,817 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 [2019-02-28 10:37:48,817 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 given in one single declaration [2019-02-28 10:37:48,818 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 [2019-02-28 10:37:48,818 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 [2019-02-28 10:37:48,818 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 given in one single declaration [2019-02-28 10:37:48,818 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 [2019-02-28 10:37:48,819 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 [2019-02-28 10:37:48,819 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.SwingUtilities$invokeLater$4940 [2019-02-28 10:37:48,819 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setLayout$1827 [2019-02-28 10:37:48,819 INFO L124 BoogieDeclarations]: Specification and implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 given in one single declaration [2019-02-28 10:37:48,819 INFO L130 BoogieDeclarations]: Found specification of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 [2019-02-28 10:37:48,820 INFO L138 BoogieDeclarations]: Found implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 [2019-02-28 10:37:48,820 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 given in one single declaration [2019-02-28 10:37:48,820 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 [2019-02-28 10:37:48,820 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 [2019-02-28 10:37:48,821 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setResizable$1858 [2019-02-28 10:37:48,826 INFO L124 BoogieDeclarations]: Specification and implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 given in one single declaration [2019-02-28 10:37:48,826 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 [2019-02-28 10:37:48,826 INFO L138 BoogieDeclarations]: Found implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 [2019-02-28 10:37:48,826 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 given in one single declaration [2019-02-28 10:37:48,826 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$$la$init$ra$$1809 [2019-02-28 10:37:48,827 INFO L138 BoogieDeclarations]: Found implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 [2019-02-28 10:37:48,827 INFO L124 BoogieDeclarations]: Specification and implementation of procedure int$SimpleFrame2Cons$access$2$1808 given in one single declaration [2019-02-28 10:37:48,827 INFO L130 BoogieDeclarations]: Found specification of procedure int$SimpleFrame2Cons$access$2$1808 [2019-02-28 10:37:48,827 INFO L138 BoogieDeclarations]: Found implementation of procedure int$SimpleFrame2Cons$access$2$1808 [2019-02-28 10:37:48,827 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setDefaultCloseOperation$1816 [2019-02-28 10:37:48,827 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$addActionListener$4123 [2019-02-28 10:37:48,827 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setLocation$1913 [2019-02-28 10:37:48,828 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 given in one single declaration [2019-02-28 10:37:48,828 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 [2019-02-28 10:37:48,828 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 [2019-02-28 10:37:48,828 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 given in one single declaration [2019-02-28 10:37:48,828 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 [2019-02-28 10:37:48,829 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 [2019-02-28 10:37:48,829 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$setEnabled$4131 [2019-02-28 10:37:48,829 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setVisible$1918 [2019-02-28 10:37:48,829 INFO L130 BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getHeight$2305 [2019-02-28 10:37:48,829 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$pack$1909 [2019-02-28 10:37:48,829 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Toolkit$java.awt.Toolkit$getDefaultToolkit$3255 [2019-02-28 10:37:48,830 INFO L130 BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getWidth$2304 [2019-02-28 10:37:48,830 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setTitle$1852 [2019-02-28 10:37:48,830 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$access$1$1807 given in one single declaration [2019-02-28 10:37:48,830 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$access$1$1807 [2019-02-28 10:37:48,831 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$access$1$1807 [2019-02-28 10:37:48,831 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.FlowLayout$$la$init$ra$$4889 [2019-02-28 10:37:48,831 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$run$1803 given in one single declaration [2019-02-28 10:37:48,831 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$run$1803 [2019-02-28 10:37:48,831 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$run$1803 [2019-02-28 10:37:48,832 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$main$1804 given in one single declaration [2019-02-28 10:37:48,832 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$main$1804 [2019-02-28 10:37:48,832 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$main$1804 [2019-02-28 10:37:48,832 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JButton$$la$init$ra$$2558 [2019-02-28 10:37:48,832 INFO L124 BoogieDeclarations]: Specification and implementation of procedure $EFG_Procedure given in one single declaration [2019-02-28 10:37:48,833 INFO L130 BoogieDeclarations]: Found specification of procedure $EFG_Procedure [2019-02-28 10:37:48,833 INFO L138 BoogieDeclarations]: Found implementation of procedure $EFG_Procedure [2019-02-28 10:37:48,833 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Component$java.awt.Container$add$2075 [2019-02-28 10:37:48,833 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.lang.Object$$la$init$ra$$38 [2019-02-28 10:37:49,192 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-02-28 10:37:49,251 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-02-28 10:37:49,290 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-02-28 10:37:49,314 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-02-28 10:37:49,622 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-02-28 10:37:49,651 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-02-28 10:37:49,659 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-02-28 10:37:49,693 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-02-28 10:37:49,752 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-02-28 10:37:49,790 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-02-28 10:37:49,811 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-02-28 10:37:50,449 INFO L278 CfgBuilder]: Using library mode [2019-02-28 10:37:50,449 INFO L286 CfgBuilder]: Removed 206 assue(true) statements. [2019-02-28 10:37:50,450 INFO L202 PluginConnector]: Adding new model GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.02 10:37:50 BoogieIcfgContainer [2019-02-28 10:37:50,451 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-02-28 10:37:50,451 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-02-28 10:37:50,452 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-02-28 10:37:50,455 INFO L276 PluginConnector]: TraceAbstraction initialized [2019-02-28 10:37:50,455 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:37:48" (1/2) ... [2019-02-28 10:37:50,456 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3d8b0cea and model type GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.02 10:37:50, skipping insertion in model container [2019-02-28 10:37:50,456 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.02 10:37:50" (2/2) ... [2019-02-28 10:37:50,458 INFO L112 eAbstractionObserver]: Analyzing ICFG GuiTestExampleUnsafe.bpl [2019-02-28 10:37:50,468 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-02-28 10:37:50,478 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 87 error locations. [2019-02-28 10:37:50,495 INFO L257 AbstractCegarLoop]: Starting to check reachability of 87 error locations. [2019-02-28 10:37:50,535 INFO L382 AbstractCegarLoop]: Interprodecural is true [2019-02-28 10:37:50,536 INFO L383 AbstractCegarLoop]: Hoare is true [2019-02-28 10:37:50,536 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-02-28 10:37:50,536 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-02-28 10:37:50,536 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-02-28 10:37:50,536 INFO L387 AbstractCegarLoop]: Difference is false [2019-02-28 10:37:50,537 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-02-28 10:37:50,537 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-02-28 10:37:50,564 INFO L276 IsEmpty]: Start isEmpty. Operand 304 states. [2019-02-28 10:37:50,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3 [2019-02-28 10:37:50,571 INFO L394 BasicCegarLoop]: Found error trace [2019-02-28 10:37:50,572 INFO L402 BasicCegarLoop]: trace histogram [1, 1] [2019-02-28 10:37:50,577 INFO L423 AbstractCegarLoop]: === Iteration 1 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT]=== [2019-02-28 10:37:50,583 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-02-28 10:37:50,584 INFO L82 PathProgramCache]: Analyzing trace with hash 10434, now seen corresponding path program 1 times [2019-02-28 10:37:50,586 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-02-28 10:37:50,631 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:50,631 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-02-28 10:37:50,631 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:50,631 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-02-28 10:37:50,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-02-28 10:37:50,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-02-28 10:37:50,709 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-02-28 10:37:50,709 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-02-28 10:37:50,709 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-02-28 10:37:50,713 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-02-28 10:37:50,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-02-28 10:37:50,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-02-28 10:37:50,726 INFO L87 Difference]: Start difference. First operand 304 states. Second operand 3 states. [2019-02-28 10:37:50,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-02-28 10:37:50,772 INFO L93 Difference]: Finished difference Result 304 states and 306 transitions. [2019-02-28 10:37:50,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-02-28 10:37:50,773 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 2 [2019-02-28 10:37:50,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-02-28 10:37:50,790 INFO L225 Difference]: With dead ends: 304 [2019-02-28 10:37:50,790 INFO L226 Difference]: Without dead ends: 252 [2019-02-28 10:37:50,793 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-02-28 10:37:50,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2019-02-28 10:37:50,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 252. [2019-02-28 10:37:50,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 252 states. [2019-02-28 10:37:50,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 252 states and 257 transitions. [2019-02-28 10:37:50,852 INFO L78 Accepts]: Start accepts. Automaton has 252 states and 257 transitions. Word has length 2 [2019-02-28 10:37:50,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-02-28 10:37:50,853 INFO L480 AbstractCegarLoop]: Abstraction has 252 states and 257 transitions. [2019-02-28 10:37:50,853 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-02-28 10:37:50,853 INFO L276 IsEmpty]: Start isEmpty. Operand 252 states and 257 transitions. [2019-02-28 10:37:50,853 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-02-28 10:37:50,854 INFO L394 BasicCegarLoop]: Found error trace [2019-02-28 10:37:50,854 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-02-28 10:37:50,857 INFO L423 AbstractCegarLoop]: === Iteration 2 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT]=== [2019-02-28 10:37:50,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-02-28 10:37:50,857 INFO L82 PathProgramCache]: Analyzing trace with hash 168844, now seen corresponding path program 1 times [2019-02-28 10:37:50,857 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-02-28 10:37:50,861 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:50,862 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-02-28 10:37:50,862 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:50,862 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-02-28 10:37:50,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-02-28 10:37:51,006 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-02-28 10:37:51,007 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-02-28 10:37:51,007 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-02-28 10:37:51,007 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-02-28 10:37:51,009 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-02-28 10:37:51,009 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-02-28 10:37:51,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-02-28 10:37:51,010 INFO L87 Difference]: Start difference. First operand 252 states and 257 transitions. Second operand 4 states. [2019-02-28 10:37:51,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-02-28 10:37:51,135 INFO L93 Difference]: Finished difference Result 252 states and 257 transitions. [2019-02-28 10:37:51,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-02-28 10:37:51,136 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2019-02-28 10:37:51,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-02-28 10:37:51,140 INFO L225 Difference]: With dead ends: 252 [2019-02-28 10:37:51,141 INFO L226 Difference]: Without dead ends: 248 [2019-02-28 10:37:51,142 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-02-28 10:37:51,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2019-02-28 10:37:51,158 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248. [2019-02-28 10:37:51,158 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2019-02-28 10:37:51,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 254 transitions. [2019-02-28 10:37:51,160 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 254 transitions. Word has length 3 [2019-02-28 10:37:51,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-02-28 10:37:51,160 INFO L480 AbstractCegarLoop]: Abstraction has 248 states and 254 transitions. [2019-02-28 10:37:51,161 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-02-28 10:37:51,161 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 254 transitions. [2019-02-28 10:37:51,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-02-28 10:37:51,161 INFO L394 BasicCegarLoop]: Found error trace [2019-02-28 10:37:51,161 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-02-28 10:37:51,164 INFO L423 AbstractCegarLoop]: === Iteration 3 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT]=== [2019-02-28 10:37:51,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-02-28 10:37:51,165 INFO L82 PathProgramCache]: Analyzing trace with hash 181753, now seen corresponding path program 1 times [2019-02-28 10:37:51,165 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-02-28 10:37:51,166 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:51,166 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-02-28 10:37:51,166 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:51,166 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-02-28 10:37:51,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-02-28 10:37:51,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-02-28 10:37:51,224 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-02-28 10:37:51,224 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-02-28 10:37:51,224 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-02-28 10:37:51,224 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-02-28 10:37:51,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-02-28 10:37:51,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-02-28 10:37:51,225 INFO L87 Difference]: Start difference. First operand 248 states and 254 transitions. Second operand 4 states. [2019-02-28 10:37:51,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-02-28 10:37:51,255 INFO L93 Difference]: Finished difference Result 248 states and 254 transitions. [2019-02-28 10:37:51,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-02-28 10:37:51,256 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2019-02-28 10:37:51,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-02-28 10:37:51,259 INFO L225 Difference]: With dead ends: 248 [2019-02-28 10:37:51,259 INFO L226 Difference]: Without dead ends: 244 [2019-02-28 10:37:51,261 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-02-28 10:37:51,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244 states. [2019-02-28 10:37:51,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 244. [2019-02-28 10:37:51,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2019-02-28 10:37:51,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 251 transitions. [2019-02-28 10:37:51,291 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 251 transitions. Word has length 3 [2019-02-28 10:37:51,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-02-28 10:37:51,292 INFO L480 AbstractCegarLoop]: Abstraction has 244 states and 251 transitions. [2019-02-28 10:37:51,292 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-02-28 10:37:51,292 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 251 transitions. [2019-02-28 10:37:51,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-02-28 10:37:51,293 INFO L394 BasicCegarLoop]: Found error trace [2019-02-28 10:37:51,293 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-02-28 10:37:51,298 INFO L423 AbstractCegarLoop]: === Iteration 4 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT]=== [2019-02-28 10:37:51,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-02-28 10:37:51,299 INFO L82 PathProgramCache]: Analyzing trace with hash 323784, now seen corresponding path program 1 times [2019-02-28 10:37:51,299 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-02-28 10:37:51,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:51,302 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-02-28 10:37:51,302 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:51,303 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-02-28 10:37:51,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-02-28 10:37:51,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-02-28 10:37:51,447 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-02-28 10:37:51,447 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-02-28 10:37:51,447 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-02-28 10:37:51,447 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-02-28 10:37:51,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-02-28 10:37:51,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-02-28 10:37:51,448 INFO L87 Difference]: Start difference. First operand 244 states and 251 transitions. Second operand 4 states. [2019-02-28 10:37:51,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-02-28 10:37:51,611 INFO L93 Difference]: Finished difference Result 244 states and 251 transitions. [2019-02-28 10:37:51,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-02-28 10:37:51,612 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2019-02-28 10:37:51,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-02-28 10:37:51,613 INFO L225 Difference]: With dead ends: 244 [2019-02-28 10:37:51,614 INFO L226 Difference]: Without dead ends: 243 [2019-02-28 10:37:51,614 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-02-28 10:37:51,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2019-02-28 10:37:51,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 243. [2019-02-28 10:37:51,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243 states. [2019-02-28 10:37:51,636 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 250 transitions. [2019-02-28 10:37:51,636 INFO L78 Accepts]: Start accepts. Automaton has 243 states and 250 transitions. Word has length 3 [2019-02-28 10:37:51,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-02-28 10:37:51,636 INFO L480 AbstractCegarLoop]: Abstraction has 243 states and 250 transitions. [2019-02-28 10:37:51,636 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-02-28 10:37:51,637 INFO L276 IsEmpty]: Start isEmpty. Operand 243 states and 250 transitions. [2019-02-28 10:37:51,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-02-28 10:37:51,637 INFO L394 BasicCegarLoop]: Found error trace [2019-02-28 10:37:51,637 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-02-28 10:37:51,641 INFO L423 AbstractCegarLoop]: === Iteration 5 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT]=== [2019-02-28 10:37:51,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-02-28 10:37:51,642 INFO L82 PathProgramCache]: Analyzing trace with hash 161893, now seen corresponding path program 1 times [2019-02-28 10:37:51,642 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-02-28 10:37:51,643 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:51,645 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-02-28 10:37:51,645 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:51,646 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-02-28 10:37:51,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-02-28 10:37:51,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-02-28 10:37:51,669 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-02-28 10:37:51,669 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-02-28 10:37:51,670 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-02-28 10:37:51,670 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-02-28 10:37:51,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-02-28 10:37:51,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-02-28 10:37:51,671 INFO L87 Difference]: Start difference. First operand 243 states and 250 transitions. Second operand 4 states. [2019-02-28 10:37:51,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-02-28 10:37:51,747 INFO L93 Difference]: Finished difference Result 243 states and 250 transitions. [2019-02-28 10:37:51,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-02-28 10:37:51,747 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2019-02-28 10:37:51,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-02-28 10:37:51,749 INFO L225 Difference]: With dead ends: 243 [2019-02-28 10:37:51,749 INFO L226 Difference]: Without dead ends: 239 [2019-02-28 10:37:51,750 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-02-28 10:37:51,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2019-02-28 10:37:51,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 239. [2019-02-28 10:37:51,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2019-02-28 10:37:51,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 247 transitions. [2019-02-28 10:37:51,777 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 247 transitions. Word has length 3 [2019-02-28 10:37:51,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-02-28 10:37:51,777 INFO L480 AbstractCegarLoop]: Abstraction has 239 states and 247 transitions. [2019-02-28 10:37:51,777 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-02-28 10:37:51,777 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 247 transitions. [2019-02-28 10:37:51,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-02-28 10:37:51,778 INFO L394 BasicCegarLoop]: Found error trace [2019-02-28 10:37:51,778 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-02-28 10:37:51,783 INFO L423 AbstractCegarLoop]: === Iteration 6 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT]=== [2019-02-28 10:37:51,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-02-28 10:37:51,783 INFO L82 PathProgramCache]: Analyzing trace with hash 29824, now seen corresponding path program 1 times [2019-02-28 10:37:51,783 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-02-28 10:37:51,785 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:51,785 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-02-28 10:37:51,785 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:51,785 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-02-28 10:37:51,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-02-28 10:37:51,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-02-28 10:37:51,914 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-02-28 10:37:51,914 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-02-28 10:37:51,915 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-02-28 10:37:51,916 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-02-28 10:37:51,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-02-28 10:37:51,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-02-28 10:37:51,917 INFO L87 Difference]: Start difference. First operand 239 states and 247 transitions. Second operand 4 states. [2019-02-28 10:37:52,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-02-28 10:37:52,041 INFO L93 Difference]: Finished difference Result 239 states and 247 transitions. [2019-02-28 10:37:52,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-02-28 10:37:52,041 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2019-02-28 10:37:52,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-02-28 10:37:52,044 INFO L225 Difference]: With dead ends: 239 [2019-02-28 10:37:52,044 INFO L226 Difference]: Without dead ends: 235 [2019-02-28 10:37:52,045 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-02-28 10:37:52,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2019-02-28 10:37:52,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 235. [2019-02-28 10:37:52,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 235 states. [2019-02-28 10:37:52,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 244 transitions. [2019-02-28 10:37:52,055 INFO L78 Accepts]: Start accepts. Automaton has 235 states and 244 transitions. Word has length 3 [2019-02-28 10:37:52,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-02-28 10:37:52,056 INFO L480 AbstractCegarLoop]: Abstraction has 235 states and 244 transitions. [2019-02-28 10:37:52,056 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-02-28 10:37:52,056 INFO L276 IsEmpty]: Start isEmpty. Operand 235 states and 244 transitions. [2019-02-28 10:37:52,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2019-02-28 10:37:52,057 INFO L394 BasicCegarLoop]: Found error trace [2019-02-28 10:37:52,057 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2019-02-28 10:37:52,060 INFO L423 AbstractCegarLoop]: === Iteration 7 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT]=== [2019-02-28 10:37:52,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-02-28 10:37:52,060 INFO L82 PathProgramCache]: Analyzing trace with hash 6127075, now seen corresponding path program 1 times [2019-02-28 10:37:52,061 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-02-28 10:37:52,062 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:52,063 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-02-28 10:37:52,063 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:52,063 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-02-28 10:37:52,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-02-28 10:37:52,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-02-28 10:37:52,101 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-02-28 10:37:52,102 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-02-28 10:37:52,102 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-02-28 10:37:52,102 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-02-28 10:37:52,102 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-02-28 10:37:52,102 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-02-28 10:37:52,103 INFO L87 Difference]: Start difference. First operand 235 states and 244 transitions. Second operand 3 states. [2019-02-28 10:37:52,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-02-28 10:37:52,144 INFO L93 Difference]: Finished difference Result 235 states and 244 transitions. [2019-02-28 10:37:52,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-02-28 10:37:52,144 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2019-02-28 10:37:52,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-02-28 10:37:52,146 INFO L225 Difference]: With dead ends: 235 [2019-02-28 10:37:52,146 INFO L226 Difference]: Without dead ends: 234 [2019-02-28 10:37:52,147 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-02-28 10:37:52,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234 states. [2019-02-28 10:37:52,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234 to 234. [2019-02-28 10:37:52,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 234 states. [2019-02-28 10:37:52,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 234 states to 234 states and 243 transitions. [2019-02-28 10:37:52,154 INFO L78 Accepts]: Start accepts. Automaton has 234 states and 243 transitions. Word has length 4 [2019-02-28 10:37:52,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-02-28 10:37:52,154 INFO L480 AbstractCegarLoop]: Abstraction has 234 states and 243 transitions. [2019-02-28 10:37:52,154 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-02-28 10:37:52,154 INFO L276 IsEmpty]: Start isEmpty. Operand 234 states and 243 transitions. [2019-02-28 10:37:52,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2019-02-28 10:37:52,155 INFO L394 BasicCegarLoop]: Found error trace [2019-02-28 10:37:52,155 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2019-02-28 10:37:52,157 INFO L423 AbstractCegarLoop]: === Iteration 8 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT]=== [2019-02-28 10:37:52,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-02-28 10:37:52,158 INFO L82 PathProgramCache]: Analyzing trace with hash 1755747, now seen corresponding path program 1 times [2019-02-28 10:37:52,158 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-02-28 10:37:52,159 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:52,159 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-02-28 10:37:52,160 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:52,160 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-02-28 10:37:52,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-02-28 10:37:52,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-02-28 10:37:52,201 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-02-28 10:37:52,201 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-02-28 10:37:52,201 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-02-28 10:37:52,202 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-02-28 10:37:52,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-02-28 10:37:52,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-02-28 10:37:52,203 INFO L87 Difference]: Start difference. First operand 234 states and 243 transitions. Second operand 4 states. [2019-02-28 10:37:52,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-02-28 10:37:52,564 INFO L93 Difference]: Finished difference Result 234 states and 243 transitions. [2019-02-28 10:37:52,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-02-28 10:37:52,565 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 4 [2019-02-28 10:37:52,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-02-28 10:37:52,566 INFO L225 Difference]: With dead ends: 234 [2019-02-28 10:37:52,567 INFO L226 Difference]: Without dead ends: 213 [2019-02-28 10:37:52,567 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-02-28 10:37:52,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2019-02-28 10:37:52,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 213. [2019-02-28 10:37:52,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2019-02-28 10:37:52,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 222 transitions. [2019-02-28 10:37:52,575 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 222 transitions. Word has length 4 [2019-02-28 10:37:52,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-02-28 10:37:52,575 INFO L480 AbstractCegarLoop]: Abstraction has 213 states and 222 transitions. [2019-02-28 10:37:52,576 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-02-28 10:37:52,576 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 222 transitions. [2019-02-28 10:37:52,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-02-28 10:37:52,576 INFO L394 BasicCegarLoop]: Found error trace [2019-02-28 10:37:52,576 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-02-28 10:37:52,578 INFO L423 AbstractCegarLoop]: === Iteration 9 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT]=== [2019-02-28 10:37:52,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-02-28 10:37:52,578 INFO L82 PathProgramCache]: Analyzing trace with hash 189939531, now seen corresponding path program 1 times [2019-02-28 10:37:52,578 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-02-28 10:37:52,580 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:52,580 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-02-28 10:37:52,580 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:52,580 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-02-28 10:37:52,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-02-28 10:37:52,600 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-02-28 10:37:52,601 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-02-28 10:37:52,601 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-02-28 10:37:52,601 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-02-28 10:37:52,601 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-02-28 10:37:52,601 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-02-28 10:37:52,601 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-02-28 10:37:52,602 INFO L87 Difference]: Start difference. First operand 213 states and 222 transitions. Second operand 4 states. [2019-02-28 10:37:52,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-02-28 10:37:52,689 INFO L93 Difference]: Finished difference Result 213 states and 222 transitions. [2019-02-28 10:37:52,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-02-28 10:37:52,690 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 5 [2019-02-28 10:37:52,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-02-28 10:37:52,691 INFO L225 Difference]: With dead ends: 213 [2019-02-28 10:37:52,692 INFO L226 Difference]: Without dead ends: 212 [2019-02-28 10:37:52,692 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-02-28 10:37:52,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2019-02-28 10:37:52,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 212. [2019-02-28 10:37:52,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212 states. [2019-02-28 10:37:52,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 221 transitions. [2019-02-28 10:37:52,701 INFO L78 Accepts]: Start accepts. Automaton has 212 states and 221 transitions. Word has length 5 [2019-02-28 10:37:52,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-02-28 10:37:52,702 INFO L480 AbstractCegarLoop]: Abstraction has 212 states and 221 transitions. [2019-02-28 10:37:52,702 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-02-28 10:37:52,702 INFO L276 IsEmpty]: Start isEmpty. Operand 212 states and 221 transitions. [2019-02-28 10:37:52,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-02-28 10:37:52,702 INFO L394 BasicCegarLoop]: Found error trace [2019-02-28 10:37:52,702 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-02-28 10:37:52,703 INFO L423 AbstractCegarLoop]: === Iteration 10 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT]=== [2019-02-28 10:37:52,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-02-28 10:37:52,704 INFO L82 PathProgramCache]: Analyzing trace with hash 311167050, now seen corresponding path program 1 times [2019-02-28 10:37:52,705 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-02-28 10:37:52,707 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:52,708 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-02-28 10:37:52,708 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:52,708 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-02-28 10:37:52,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-02-28 10:37:52,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-02-28 10:37:52,827 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-02-28 10:37:52,827 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-02-28 10:37:52,827 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-02-28 10:37:52,827 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-02-28 10:37:52,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-02-28 10:37:52,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-02-28 10:37:52,828 INFO L87 Difference]: Start difference. First operand 212 states and 221 transitions. Second operand 5 states. [2019-02-28 10:37:52,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-02-28 10:37:52,889 INFO L93 Difference]: Finished difference Result 212 states and 221 transitions. [2019-02-28 10:37:52,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-02-28 10:37:52,889 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 5 [2019-02-28 10:37:52,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-02-28 10:37:52,891 INFO L225 Difference]: With dead ends: 212 [2019-02-28 10:37:52,891 INFO L226 Difference]: Without dead ends: 206 [2019-02-28 10:37:52,892 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-02-28 10:37:52,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2019-02-28 10:37:52,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 206. [2019-02-28 10:37:52,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2019-02-28 10:37:52,899 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 216 transitions. [2019-02-28 10:37:52,899 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 216 transitions. Word has length 5 [2019-02-28 10:37:52,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-02-28 10:37:52,899 INFO L480 AbstractCegarLoop]: Abstraction has 206 states and 216 transitions. [2019-02-28 10:37:52,899 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-02-28 10:37:52,900 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 216 transitions. [2019-02-28 10:37:52,900 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-02-28 10:37:52,900 INFO L394 BasicCegarLoop]: Found error trace [2019-02-28 10:37:52,900 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-02-28 10:37:52,901 INFO L423 AbstractCegarLoop]: === Iteration 11 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT]=== [2019-02-28 10:37:52,901 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-02-28 10:37:52,901 INFO L82 PathProgramCache]: Analyzing trace with hash 54428221, now seen corresponding path program 1 times [2019-02-28 10:37:52,901 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-02-28 10:37:52,902 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:52,903 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-02-28 10:37:52,903 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:52,903 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-02-28 10:37:52,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-02-28 10:37:52,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-02-28 10:37:52,938 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-02-28 10:37:52,939 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-02-28 10:37:52,939 INFO L257 anRefinementStrategy]: Using the first perfect interpolant sequence [2019-02-28 10:37:52,939 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-02-28 10:37:52,939 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-02-28 10:37:52,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-02-28 10:37:52,940 INFO L87 Difference]: Start difference. First operand 206 states and 216 transitions. Second operand 5 states. [2019-02-28 10:37:53,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-02-28 10:37:53,128 INFO L93 Difference]: Finished difference Result 206 states and 216 transitions. [2019-02-28 10:37:53,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-02-28 10:37:53,129 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 5 [2019-02-28 10:37:53,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-02-28 10:37:53,130 INFO L225 Difference]: With dead ends: 206 [2019-02-28 10:37:53,130 INFO L226 Difference]: Without dead ends: 205 [2019-02-28 10:37:53,132 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-02-28 10:37:53,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2019-02-28 10:37:53,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 205. [2019-02-28 10:37:53,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2019-02-28 10:37:53,143 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 215 transitions. [2019-02-28 10:37:53,144 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 215 transitions. Word has length 5 [2019-02-28 10:37:53,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-02-28 10:37:53,144 INFO L480 AbstractCegarLoop]: Abstraction has 205 states and 215 transitions. [2019-02-28 10:37:53,144 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-02-28 10:37:53,144 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 215 transitions. [2019-02-28 10:37:53,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-02-28 10:37:53,145 INFO L394 BasicCegarLoop]: Found error trace [2019-02-28 10:37:53,145 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-02-28 10:37:53,145 INFO L423 AbstractCegarLoop]: === Iteration 12 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT]=== [2019-02-28 10:37:53,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-02-28 10:37:53,147 INFO L82 PathProgramCache]: Analyzing trace with hash 33433511, now seen corresponding path program 1 times [2019-02-28 10:37:53,147 INFO L69 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2019-02-28 10:37:53,148 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:53,148 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-02-28 10:37:53,148 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-02-28 10:37:53,150 INFO L289 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2019-02-28 10:37:53,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-02-28 10:37:53,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-02-28 10:37:53,192 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2019-02-28 10:37:53,215 INFO L202 PluginConnector]: Adding new model GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.02 10:37:53 BoogieIcfgContainer [2019-02-28 10:37:53,216 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-02-28 10:37:53,217 INFO L168 Benchmark]: Toolchain (without parser) took 4681.36 ms. Allocated memory was 139.5 MB in the beginning and 202.4 MB in the end (delta: 62.9 MB). Free memory was 105.8 MB in the beginning and 118.6 MB in the end (delta: -12.8 MB). Peak memory consumption was 50.1 MB. Max. memory is 7.1 GB. [2019-02-28 10:37:53,221 INFO L168 Benchmark]: Boogie PL CUP Parser took 0.20 ms. Allocated memory is still 139.5 MB. Free memory is still 108.0 MB. There was no memory consumed. Max. memory is 7.1 GB. [2019-02-28 10:37:53,221 INFO L168 Benchmark]: Boogie Procedure Inliner took 127.16 ms. Allocated memory is still 139.5 MB. Free memory was 105.4 MB in the beginning and 101.2 MB in the end (delta: 4.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 7.1 GB. [2019-02-28 10:37:53,222 INFO L168 Benchmark]: Boogie Preprocessor took 72.98 ms. Allocated memory is still 139.5 MB. Free memory was 101.2 MB in the beginning and 98.7 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB. [2019-02-28 10:37:53,223 INFO L168 Benchmark]: RCFGBuilder took 1712.51 ms. Allocated memory was 139.5 MB in the beginning and 177.7 MB in the end (delta: 38.3 MB). Free memory was 98.7 MB in the beginning and 119.0 MB in the end (delta: -20.3 MB). Peak memory consumption was 46.0 MB. Max. memory is 7.1 GB. [2019-02-28 10:37:53,225 INFO L168 Benchmark]: TraceAbstraction took 2764.28 ms. Allocated memory was 177.7 MB in the beginning and 202.4 MB in the end (delta: 24.6 MB). Free memory was 117.9 MB in the beginning and 118.6 MB in the end (delta: -719.8 kB). Peak memory consumption was 23.9 MB. Max. memory is 7.1 GB. [2019-02-28 10:37:53,238 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.20 ms. Allocated memory is still 139.5 MB. Free memory is still 108.0 MB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 127.16 ms. Allocated memory is still 139.5 MB. Free memory was 105.4 MB in the beginning and 101.2 MB in the end (delta: 4.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 72.98 ms. Allocated memory is still 139.5 MB. Free memory was 101.2 MB in the beginning and 98.7 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB. * RCFGBuilder took 1712.51 ms. Allocated memory was 139.5 MB in the beginning and 177.7 MB in the end (delta: 38.3 MB). Free memory was 98.7 MB in the beginning and 119.0 MB in the end (delta: -20.3 MB). Peak memory consumption was 46.0 MB. Max. memory is 7.1 GB. * TraceAbstraction took 2764.28 ms. Allocated memory was 177.7 MB in the beginning and 202.4 MB in the end (delta: 24.6 MB). Free memory was 117.9 MB in the beginning and 118.6 MB in the end (delta: -719.8 kB). Peak memory consumption was 23.9 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 481]: assertion can be violated assertion can be violated We found a FailurePath: [L462-L464] requires void$SimpleFrame2Cons$2$actionPerformed$4553$__this != $null; [L474] r098 := void$SimpleFrame2Cons$2$actionPerformed$4553$__this; [L476] r199 := void$SimpleFrame2Cons$2$actionPerformed$4553$param_0; [L478] $r2102 := SimpleFrame2Cons$SimpleFrame2Cons$2$this$0711; [L390] r083 := $param_0; [L392] $r185 := javax.swing.JButton$SimpleFrame2Cons$event2227; [L394] __ret := $r185; [L481] assert $r3103 != $null; - StatisticsResult: Ultimate Automizer benchmark data CFG has 16 procedures, 304 locations, 87 error locations. UNSAFE Result, 2.6s OverallTime, 12 OverallIterations, 1 TraceHistogramMax, 1.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2638 SDtfs, 581 SDslu, 4652 SDs, 0 SdLazy, 50 SolverSat, 11 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=304occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 11 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 45 NumberOfCodeBlocks, 45 NumberOfCodeBlocksAsserted, 12 NumberOfCheckSat, 29 ConstructedInterpolants, 0 QuantifiedInterpolants, 306 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 11 InterpolantComputations, 11 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...