java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -s ../../../trunk/examples/settings/ai/array-bench/reach_32bit_compound_exp_cong.epf -i ../../../trunk/examples/programs/real-life/GuiTestExample.bpl


--------------------------------------------------------------------------------


This is Ultimate 0.1.24-a9d37a5-m
[2019-02-28 10:10:11,219 INFO  L170        SettingsManager]: Resetting all preferences to default values...
[2019-02-28 10:10:11,221 INFO  L174        SettingsManager]: Resetting UltimateCore preferences to default values
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[2019-02-28 10:10:11,233 INFO  L174        SettingsManager]: Resetting Boogie Preprocessor preferences to default values
[2019-02-28 10:10:11,234 INFO  L174        SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values
[2019-02-28 10:10:11,236 INFO  L174        SettingsManager]: Resetting Abstract Interpretation preferences to default values
[2019-02-28 10:10:11,238 INFO  L174        SettingsManager]: Resetting LassoRanker preferences to default values
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[2019-02-28 10:10:11,245 INFO  L174        SettingsManager]: Resetting ChcToBoogie preferences to default values
[2019-02-28 10:10:11,246 INFO  L174        SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values
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[2019-02-28 10:10:11,249 INFO  L174        SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values
[2019-02-28 10:10:11,252 INFO  L174        SettingsManager]: Resetting CodeCheck preferences to default values
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[2019-02-28 10:10:11,259 INFO  L177        SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring...
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[2019-02-28 10:10:11,260 INFO  L174        SettingsManager]: Resetting TreeAutomizer preferences to default values
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[2019-02-28 10:10:11,266 INFO  L174        SettingsManager]: Resetting SmtParser preferences to default values
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[2019-02-28 10:10:11,269 INFO  L181        SettingsManager]: Finished resetting all preferences to default values...
[2019-02-28 10:10:11,269 INFO  L98         SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/array-bench/reach_32bit_compound_exp_cong.epf
[2019-02-28 10:10:11,283 INFO  L110        SettingsManager]: Loading preferences was successful
[2019-02-28 10:10:11,283 INFO  L112        SettingsManager]: Preferences different from defaults after loading the file:
[2019-02-28 10:10:11,284 INFO  L131        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2019-02-28 10:10:11,284 INFO  L133        SettingsManager]:  * Show backtranslation warnings=false
[2019-02-28 10:10:11,285 INFO  L131        SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults:
[2019-02-28 10:10:11,285 INFO  L133        SettingsManager]:  * User list type=DISABLED
[2019-02-28 10:10:11,285 INFO  L133        SettingsManager]:  * Inline calls to unimplemented procedures=true
[2019-02-28 10:10:11,285 INFO  L131        SettingsManager]: Preferences of Abstract Interpretation differ from their defaults:
[2019-02-28 10:10:11,286 INFO  L133        SettingsManager]:  * Explicit value domain=true
[2019-02-28 10:10:11,286 INFO  L133        SettingsManager]:  * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain
[2019-02-28 10:10:11,286 INFO  L133        SettingsManager]:  * Octagon Domain=false
[2019-02-28 10:10:11,287 INFO  L133        SettingsManager]:  * Abstract domain=CompoundDomain
[2019-02-28 10:10:11,287 INFO  L133        SettingsManager]:  * Check feasibility of abstract posts with an SMT solver=true
[2019-02-28 10:10:11,287 INFO  L133        SettingsManager]:  * Interval Domain=false
[2019-02-28 10:10:11,288 INFO  L131        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2019-02-28 10:10:11,288 INFO  L133        SettingsManager]:  * Create parallel compositions if possible=false
[2019-02-28 10:10:11,288 INFO  L133        SettingsManager]:  * Use SBE=true
[2019-02-28 10:10:11,289 INFO  L131        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2019-02-28 10:10:11,289 INFO  L133        SettingsManager]:  * sizeof long=4
[2019-02-28 10:10:11,289 INFO  L133        SettingsManager]:  * Overapproximate operations on floating types=true
[2019-02-28 10:10:11,289 INFO  L133        SettingsManager]:  * sizeof POINTER=4
[2019-02-28 10:10:11,290 INFO  L133        SettingsManager]:  * Check division by zero=IGNORE
[2019-02-28 10:10:11,290 INFO  L133        SettingsManager]:  * Pointer to allocated memory at dereference=IGNORE
[2019-02-28 10:10:11,290 INFO  L133        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=IGNORE
[2019-02-28 10:10:11,290 INFO  L133        SettingsManager]:  * Check array bounds for arrays that are off heap=IGNORE
[2019-02-28 10:10:11,290 INFO  L133        SettingsManager]:  * sizeof long double=12
[2019-02-28 10:10:11,291 INFO  L133        SettingsManager]:  * Check if freed pointer was valid=false
[2019-02-28 10:10:11,291 INFO  L133        SettingsManager]:  * Pointer base address is valid at dereference=IGNORE
[2019-02-28 10:10:11,291 INFO  L131        SettingsManager]: Preferences of RCFGBuilder differ from their defaults:
[2019-02-28 10:10:11,291 INFO  L133        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2019-02-28 10:10:11,292 INFO  L133        SettingsManager]:  * SMT solver=External_DefaultMode
[2019-02-28 10:10:11,292 INFO  L133        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:16092 -smt2 -in -t:200000
[2019-02-28 10:10:11,292 INFO  L131        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2019-02-28 10:10:11,292 INFO  L133        SettingsManager]:  * Compute Interpolants along a Counterexample=FPandBP
[2019-02-28 10:10:11,293 INFO  L133        SettingsManager]:  * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles
[2019-02-28 10:10:11,293 INFO  L133        SettingsManager]:  * Trace refinement strategy=TAIPAN
[2019-02-28 10:10:11,293 INFO  L133        SettingsManager]:  * SMT solver=External_ModelsAndUnsatCoreMode
[2019-02-28 10:10:11,293 INFO  L133        SettingsManager]:  * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:16092 -smt2 -in
[2019-02-28 10:10:11,293 INFO  L133        SettingsManager]:  * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true
[2019-02-28 10:10:11,294 INFO  L133        SettingsManager]:  * Abstract interpretation Mode=USE_PREDICATES
[2019-02-28 10:10:11,334 INFO  L81    nceAwareModelManager]: Repository-Root is: /tmp
[2019-02-28 10:10:11,347 INFO  L258   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2019-02-28 10:10:11,350 INFO  L214   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2019-02-28 10:10:11,352 INFO  L271        PluginConnector]: Initializing Boogie PL CUP Parser...
[2019-02-28 10:10:11,352 INFO  L276        PluginConnector]: Boogie PL CUP Parser initialized
[2019-02-28 10:10:11,353 INFO  L418   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExample.bpl
[2019-02-28 10:10:11,353 INFO  L111           BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExample.bpl'
[2019-02-28 10:10:11,420 INFO  L296   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2019-02-28 10:10:11,422 INFO  L131        ToolchainWalker]: Walking toolchain with 4 elements.
[2019-02-28 10:10:11,423 INFO  L113        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2019-02-28 10:10:11,423 INFO  L271        PluginConnector]: Initializing Boogie Procedure Inliner...
[2019-02-28 10:10:11,423 INFO  L276        PluginConnector]: Boogie Procedure Inliner initialized
[2019-02-28 10:10:11,439 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:10:11" (1/1) ...
[2019-02-28 10:10:11,456 INFO  L185        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:10:11" (1/1) ...
[2019-02-28 10:10:11,465 WARN  L165                Inliner]: Program contained no entry procedure!
[2019-02-28 10:10:11,465 WARN  L168                Inliner]: Missing entry procedures: [ULTIMATE.start]
[2019-02-28 10:10:11,465 WARN  L175                Inliner]: Fallback enabled. All procedures will be processed.
[2019-02-28 10:10:11,508 INFO  L132        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2019-02-28 10:10:11,509 INFO  L113        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2019-02-28 10:10:11,509 INFO  L271        PluginConnector]: Initializing Boogie Preprocessor...
[2019-02-28 10:10:11,510 INFO  L276        PluginConnector]: Boogie Preprocessor initialized
[2019-02-28 10:10:11,521 INFO  L185        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:10:11" (1/1) ...
[2019-02-28 10:10:11,522 INFO  L185        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:10:11" (1/1) ...
[2019-02-28 10:10:11,531 INFO  L185        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:10:11" (1/1) ...
[2019-02-28 10:10:11,532 INFO  L185        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:10:11" (1/1) ...
[2019-02-28 10:10:11,546 INFO  L185        PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:10:11" (1/1) ...
[2019-02-28 10:10:11,551 INFO  L185        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:10:11" (1/1) ...
[2019-02-28 10:10:11,556 INFO  L185        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:10:11" (1/1) ...
[2019-02-28 10:10:11,567 INFO  L132        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2019-02-28 10:10:11,571 INFO  L113        PluginConnector]: ------------------------RCFGBuilder----------------------------
[2019-02-28 10:10:11,571 INFO  L271        PluginConnector]: Initializing RCFGBuilder...
[2019-02-28 10:10:11,571 INFO  L276        PluginConnector]: RCFGBuilder initialized
[2019-02-28 10:10:11,574 INFO  L185        PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:10:11" (1/1) ...
No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3
Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:16092 -smt2 -in -t:200000 (exit command is (exit), workingDir is null)
Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:16092 -smt2 -in -t:200000
[2019-02-28 10:10:11,650 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 given in one single declaration
[2019-02-28 10:10:11,650 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885
[2019-02-28 10:10:11,651 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885
[2019-02-28 10:10:11,651 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 given in one single declaration
[2019-02-28 10:10:11,651 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$actionPerformed$4553
[2019-02-28 10:10:11,651 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553
[2019-02-28 10:10:11,652 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 given in one single declaration
[2019-02-28 10:10:11,652 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$actionPerformed$4886
[2019-02-28 10:10:11,652 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886
[2019-02-28 10:10:11,652 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 given in one single declaration
[2019-02-28 10:10:11,653 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$$la$init$ra$$1805
[2019-02-28 10:10:11,653 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805
[2019-02-28 10:10:11,653 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 given in one single declaration
[2019-02-28 10:10:11,653 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802
[2019-02-28 10:10:11,654 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802
[2019-02-28 10:10:11,658 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.SwingUtilities$invokeLater$4940
[2019-02-28 10:10:11,659 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setLayout$1827
[2019-02-28 10:10:11,659 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 given in one single declaration
[2019-02-28 10:10:11,659 INFO  L130     BoogieDeclarations]: Found specification of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806
[2019-02-28 10:10:11,660 INFO  L138     BoogieDeclarations]: Found implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806
[2019-02-28 10:10:11,660 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 given in one single declaration
[2019-02-28 10:10:11,660 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552
[2019-02-28 10:10:11,660 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552
[2019-02-28 10:10:11,660 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setResizable$1858
[2019-02-28 10:10:11,663 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 given in one single declaration
[2019-02-28 10:10:11,664 INFO  L130     BoogieDeclarations]: Found specification of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246
[2019-02-28 10:10:11,664 INFO  L138     BoogieDeclarations]: Found implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246
[2019-02-28 10:10:11,664 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 given in one single declaration
[2019-02-28 10:10:11,664 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$$la$init$ra$$1809
[2019-02-28 10:10:11,665 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809
[2019-02-28 10:10:11,665 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure int$SimpleFrame2Cons$access$2$1808 given in one single declaration
[2019-02-28 10:10:11,665 INFO  L130     BoogieDeclarations]: Found specification of procedure int$SimpleFrame2Cons$access$2$1808
[2019-02-28 10:10:11,665 INFO  L138     BoogieDeclarations]: Found implementation of procedure int$SimpleFrame2Cons$access$2$1808
[2019-02-28 10:10:11,665 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setDefaultCloseOperation$1816
[2019-02-28 10:10:11,666 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$addActionListener$4123
[2019-02-28 10:10:11,667 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setLocation$1913
[2019-02-28 10:10:11,668 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 given in one single declaration
[2019-02-28 10:10:11,668 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887
[2019-02-28 10:10:11,668 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887
[2019-02-28 10:10:11,669 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 given in one single declaration
[2019-02-28 10:10:11,669 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$actionPerformed$4888
[2019-02-28 10:10:11,669 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888
[2019-02-28 10:10:11,669 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$setEnabled$4131
[2019-02-28 10:10:11,669 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setVisible$1918
[2019-02-28 10:10:11,669 INFO  L130     BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getHeight$2305
[2019-02-28 10:10:11,670 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Window$pack$1909
[2019-02-28 10:10:11,670 INFO  L130     BoogieDeclarations]: Found specification of procedure java.awt.Toolkit$java.awt.Toolkit$getDefaultToolkit$3255
[2019-02-28 10:10:11,670 INFO  L130     BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getWidth$2304
[2019-02-28 10:10:11,670 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setTitle$1852
[2019-02-28 10:10:11,670 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$access$1$1807 given in one single declaration
[2019-02-28 10:10:11,671 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$access$1$1807
[2019-02-28 10:10:11,672 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$access$1$1807
[2019-02-28 10:10:11,672 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.awt.FlowLayout$$la$init$ra$$4889
[2019-02-28 10:10:11,672 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$run$1803 given in one single declaration
[2019-02-28 10:10:11,672 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$run$1803
[2019-02-28 10:10:11,672 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$run$1803
[2019-02-28 10:10:11,673 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$main$1804 given in one single declaration
[2019-02-28 10:10:11,673 INFO  L130     BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$main$1804
[2019-02-28 10:10:11,673 INFO  L138     BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$main$1804
[2019-02-28 10:10:11,673 INFO  L130     BoogieDeclarations]: Found specification of procedure void$javax.swing.JButton$$la$init$ra$$2558
[2019-02-28 10:10:11,674 INFO  L124     BoogieDeclarations]: Specification and implementation of procedure $EFG_Procedure given in one single declaration
[2019-02-28 10:10:11,675 INFO  L130     BoogieDeclarations]: Found specification of procedure $EFG_Procedure
[2019-02-28 10:10:11,675 INFO  L138     BoogieDeclarations]: Found implementation of procedure $EFG_Procedure
[2019-02-28 10:10:11,675 INFO  L130     BoogieDeclarations]: Found specification of procedure java.awt.Component$java.awt.Container$add$2075
[2019-02-28 10:10:11,675 INFO  L130     BoogieDeclarations]: Found specification of procedure void$java.lang.Object$$la$init$ra$$38
[2019-02-28 10:10:12,085 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-02-28 10:10:12,135 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-02-28 10:10:12,176 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-02-28 10:10:12,205 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-02-28 10:10:12,661 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-02-28 10:10:12,681 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-02-28 10:10:12,693 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-02-28 10:10:12,723 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-02-28 10:10:12,782 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-02-28 10:10:12,823 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-02-28 10:10:12,846 WARN  L745   $ProcedureCfgBuilder]: Label in the middle of a codeblock.
[2019-02-28 10:10:13,486 INFO  L278             CfgBuilder]: Using library mode
[2019-02-28 10:10:13,487 INFO  L286             CfgBuilder]: Removed 206 assue(true) statements.
[2019-02-28 10:10:13,488 INFO  L202        PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.02 10:10:13 BoogieIcfgContainer
[2019-02-28 10:10:13,488 INFO  L132        PluginConnector]: ------------------------ END RCFGBuilder----------------------------
[2019-02-28 10:10:13,490 INFO  L113        PluginConnector]: ------------------------TraceAbstraction----------------------------
[2019-02-28 10:10:13,490 INFO  L271        PluginConnector]: Initializing TraceAbstraction...
[2019-02-28 10:10:13,500 INFO  L276        PluginConnector]: TraceAbstraction initialized
[2019-02-28 10:10:13,501 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 28.02 10:10:11" (1/2) ...
[2019-02-28 10:10:13,502 INFO  L205        PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2afd7b59 and model type GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.02 10:10:13, skipping insertion in model container
[2019-02-28 10:10:13,503 INFO  L185        PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.02 10:10:13" (2/2) ...
[2019-02-28 10:10:13,505 INFO  L112   eAbstractionObserver]: Analyzing ICFG GuiTestExample.bpl
[2019-02-28 10:10:13,515 INFO  L156   ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION
[2019-02-28 10:10:13,525 INFO  L168   ceAbstractionStarter]: Appying trace abstraction to program that has 87 error locations.
[2019-02-28 10:10:13,544 INFO  L257      AbstractCegarLoop]: Starting to check reachability of 87 error locations.
[2019-02-28 10:10:13,587 INFO  L382      AbstractCegarLoop]: Interprodecural is true
[2019-02-28 10:10:13,587 INFO  L383      AbstractCegarLoop]: Hoare is true
[2019-02-28 10:10:13,587 INFO  L384      AbstractCegarLoop]: Compute interpolants for FPandBP
[2019-02-28 10:10:13,587 INFO  L385      AbstractCegarLoop]: Backedges is STRAIGHT_LINE
[2019-02-28 10:10:13,587 INFO  L386      AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2019-02-28 10:10:13,588 INFO  L387      AbstractCegarLoop]: Difference is false
[2019-02-28 10:10:13,588 INFO  L388      AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA
[2019-02-28 10:10:13,588 INFO  L393      AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce========
[2019-02-28 10:10:13,621 INFO  L276                IsEmpty]: Start isEmpty. Operand 304 states.
[2019-02-28 10:10:13,628 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 3
[2019-02-28 10:10:13,628 INFO  L394         BasicCegarLoop]: Found error trace
[2019-02-28 10:10:13,629 INFO  L402         BasicCegarLoop]: trace histogram [1, 1]
[2019-02-28 10:10:13,634 INFO  L423      AbstractCegarLoop]: === Iteration 1 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-02-28 10:10:13,640 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-02-28 10:10:13,640 INFO  L82        PathProgramCache]: Analyzing trace with hash 10434, now seen corresponding path program 1 times
[2019-02-28 10:10:13,642 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-02-28 10:10:13,686 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:13,686 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-02-28 10:10:13,686 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:13,686 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-02-28 10:10:13,707 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-02-28 10:10:13,770 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-02-28 10:10:13,772 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-02-28 10:10:13,772 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1
[2019-02-28 10:10:13,772 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-02-28 10:10:13,776 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 3 states
[2019-02-28 10:10:13,786 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2019-02-28 10:10:13,787 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2019-02-28 10:10:13,789 INFO  L87              Difference]: Start difference. First operand 304 states. Second operand 3 states.
[2019-02-28 10:10:13,856 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-02-28 10:10:13,857 INFO  L93              Difference]: Finished difference Result 304 states and 306 transitions.
[2019-02-28 10:10:13,859 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2019-02-28 10:10:13,861 INFO  L78                 Accepts]: Start accepts. Automaton has 3 states. Word has length 2
[2019-02-28 10:10:13,862 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-02-28 10:10:13,893 INFO  L225             Difference]: With dead ends: 304
[2019-02-28 10:10:13,899 INFO  L226             Difference]: Without dead ends: 252
[2019-02-28 10:10:13,906 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2019-02-28 10:10:13,930 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 252 states.
[2019-02-28 10:10:13,976 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 252.
[2019-02-28 10:10:13,978 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 252 states.
[2019-02-28 10:10:13,981 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 252 states and 257 transitions.
[2019-02-28 10:10:13,983 INFO  L78                 Accepts]: Start accepts. Automaton has 252 states and 257 transitions. Word has length 2
[2019-02-28 10:10:13,983 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-02-28 10:10:13,984 INFO  L480      AbstractCegarLoop]: Abstraction has 252 states and 257 transitions.
[2019-02-28 10:10:13,984 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 3 states.
[2019-02-28 10:10:13,984 INFO  L276                IsEmpty]: Start isEmpty. Operand 252 states and 257 transitions.
[2019-02-28 10:10:13,984 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-02-28 10:10:13,985 INFO  L394         BasicCegarLoop]: Found error trace
[2019-02-28 10:10:13,985 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-02-28 10:10:13,987 INFO  L423      AbstractCegarLoop]: === Iteration 2 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-02-28 10:10:13,988 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-02-28 10:10:13,988 INFO  L82        PathProgramCache]: Analyzing trace with hash 168844, now seen corresponding path program 1 times
[2019-02-28 10:10:13,988 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-02-28 10:10:13,989 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:13,989 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-02-28 10:10:13,990 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:13,990 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-02-28 10:10:13,993 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-02-28 10:10:14,016 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-02-28 10:10:14,017 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-02-28 10:10:14,017 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-02-28 10:10:14,017 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-02-28 10:10:14,019 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-02-28 10:10:14,019 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-02-28 10:10:14,020 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-02-28 10:10:14,020 INFO  L87              Difference]: Start difference. First operand 252 states and 257 transitions. Second operand 4 states.
[2019-02-28 10:10:14,067 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-02-28 10:10:14,067 INFO  L93              Difference]: Finished difference Result 252 states and 257 transitions.
[2019-02-28 10:10:14,068 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-02-28 10:10:14,068 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-02-28 10:10:14,068 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-02-28 10:10:14,072 INFO  L225             Difference]: With dead ends: 252
[2019-02-28 10:10:14,072 INFO  L226             Difference]: Without dead ends: 248
[2019-02-28 10:10:14,073 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-02-28 10:10:14,074 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 248 states.
[2019-02-28 10:10:14,088 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248.
[2019-02-28 10:10:14,088 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 248 states.
[2019-02-28 10:10:14,090 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 254 transitions.
[2019-02-28 10:10:14,090 INFO  L78                 Accepts]: Start accepts. Automaton has 248 states and 254 transitions. Word has length 3
[2019-02-28 10:10:14,090 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-02-28 10:10:14,090 INFO  L480      AbstractCegarLoop]: Abstraction has 248 states and 254 transitions.
[2019-02-28 10:10:14,090 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-02-28 10:10:14,090 INFO  L276                IsEmpty]: Start isEmpty. Operand 248 states and 254 transitions.
[2019-02-28 10:10:14,091 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-02-28 10:10:14,091 INFO  L394         BasicCegarLoop]: Found error trace
[2019-02-28 10:10:14,091 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-02-28 10:10:14,094 INFO  L423      AbstractCegarLoop]: === Iteration 3 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-02-28 10:10:14,094 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-02-28 10:10:14,094 INFO  L82        PathProgramCache]: Analyzing trace with hash 181753, now seen corresponding path program 1 times
[2019-02-28 10:10:14,094 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-02-28 10:10:14,096 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:14,096 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-02-28 10:10:14,096 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:14,096 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-02-28 10:10:14,098 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-02-28 10:10:14,180 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-02-28 10:10:14,181 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-02-28 10:10:14,181 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-02-28 10:10:14,181 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-02-28 10:10:14,181 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-02-28 10:10:14,181 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-02-28 10:10:14,182 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-02-28 10:10:14,182 INFO  L87              Difference]: Start difference. First operand 248 states and 254 transitions. Second operand 4 states.
[2019-02-28 10:10:14,207 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-02-28 10:10:14,208 INFO  L93              Difference]: Finished difference Result 248 states and 254 transitions.
[2019-02-28 10:10:14,208 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-02-28 10:10:14,208 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-02-28 10:10:14,208 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-02-28 10:10:14,210 INFO  L225             Difference]: With dead ends: 248
[2019-02-28 10:10:14,211 INFO  L226             Difference]: Without dead ends: 244
[2019-02-28 10:10:14,211 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-02-28 10:10:14,212 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 244 states.
[2019-02-28 10:10:14,235 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 244.
[2019-02-28 10:10:14,235 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 244 states.
[2019-02-28 10:10:14,236 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 251 transitions.
[2019-02-28 10:10:14,236 INFO  L78                 Accepts]: Start accepts. Automaton has 244 states and 251 transitions. Word has length 3
[2019-02-28 10:10:14,237 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-02-28 10:10:14,237 INFO  L480      AbstractCegarLoop]: Abstraction has 244 states and 251 transitions.
[2019-02-28 10:10:14,237 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-02-28 10:10:14,237 INFO  L276                IsEmpty]: Start isEmpty. Operand 244 states and 251 transitions.
[2019-02-28 10:10:14,238 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-02-28 10:10:14,238 INFO  L394         BasicCegarLoop]: Found error trace
[2019-02-28 10:10:14,238 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-02-28 10:10:14,241 INFO  L423      AbstractCegarLoop]: === Iteration 4 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-02-28 10:10:14,241 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-02-28 10:10:14,241 INFO  L82        PathProgramCache]: Analyzing trace with hash 323784, now seen corresponding path program 1 times
[2019-02-28 10:10:14,242 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-02-28 10:10:14,243 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:14,243 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-02-28 10:10:14,243 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:14,244 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-02-28 10:10:14,246 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-02-28 10:10:14,272 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-02-28 10:10:14,273 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-02-28 10:10:14,273 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-02-28 10:10:14,273 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-02-28 10:10:14,273 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-02-28 10:10:14,273 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-02-28 10:10:14,273 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-02-28 10:10:14,274 INFO  L87              Difference]: Start difference. First operand 244 states and 251 transitions. Second operand 4 states.
[2019-02-28 10:10:14,304 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-02-28 10:10:14,304 INFO  L93              Difference]: Finished difference Result 244 states and 251 transitions.
[2019-02-28 10:10:14,308 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-02-28 10:10:14,308 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-02-28 10:10:14,308 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-02-28 10:10:14,313 INFO  L225             Difference]: With dead ends: 244
[2019-02-28 10:10:14,314 INFO  L226             Difference]: Without dead ends: 243
[2019-02-28 10:10:14,314 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-02-28 10:10:14,317 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 243 states.
[2019-02-28 10:10:14,338 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 243.
[2019-02-28 10:10:14,338 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 243 states.
[2019-02-28 10:10:14,340 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 250 transitions.
[2019-02-28 10:10:14,341 INFO  L78                 Accepts]: Start accepts. Automaton has 243 states and 250 transitions. Word has length 3
[2019-02-28 10:10:14,342 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-02-28 10:10:14,342 INFO  L480      AbstractCegarLoop]: Abstraction has 243 states and 250 transitions.
[2019-02-28 10:10:14,342 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-02-28 10:10:14,342 INFO  L276                IsEmpty]: Start isEmpty. Operand 243 states and 250 transitions.
[2019-02-28 10:10:14,343 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-02-28 10:10:14,343 INFO  L394         BasicCegarLoop]: Found error trace
[2019-02-28 10:10:14,343 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-02-28 10:10:14,351 INFO  L423      AbstractCegarLoop]: === Iteration 5 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-02-28 10:10:14,351 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-02-28 10:10:14,352 INFO  L82        PathProgramCache]: Analyzing trace with hash 161893, now seen corresponding path program 1 times
[2019-02-28 10:10:14,352 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-02-28 10:10:14,354 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:14,354 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-02-28 10:10:14,354 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:14,355 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-02-28 10:10:14,358 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-02-28 10:10:14,488 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-02-28 10:10:14,489 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-02-28 10:10:14,489 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-02-28 10:10:14,489 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-02-28 10:10:14,494 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-02-28 10:10:14,494 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-02-28 10:10:14,494 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-02-28 10:10:14,495 INFO  L87              Difference]: Start difference. First operand 243 states and 250 transitions. Second operand 4 states.
[2019-02-28 10:10:14,583 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-02-28 10:10:14,584 INFO  L93              Difference]: Finished difference Result 243 states and 250 transitions.
[2019-02-28 10:10:14,584 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-02-28 10:10:14,584 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-02-28 10:10:14,584 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-02-28 10:10:14,586 INFO  L225             Difference]: With dead ends: 243
[2019-02-28 10:10:14,586 INFO  L226             Difference]: Without dead ends: 239
[2019-02-28 10:10:14,587 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-02-28 10:10:14,588 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 239 states.
[2019-02-28 10:10:14,596 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 239.
[2019-02-28 10:10:14,596 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 239 states.
[2019-02-28 10:10:14,597 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 247 transitions.
[2019-02-28 10:10:14,597 INFO  L78                 Accepts]: Start accepts. Automaton has 239 states and 247 transitions. Word has length 3
[2019-02-28 10:10:14,598 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-02-28 10:10:14,598 INFO  L480      AbstractCegarLoop]: Abstraction has 239 states and 247 transitions.
[2019-02-28 10:10:14,598 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-02-28 10:10:14,598 INFO  L276                IsEmpty]: Start isEmpty. Operand 239 states and 247 transitions.
[2019-02-28 10:10:14,599 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 4
[2019-02-28 10:10:14,599 INFO  L394         BasicCegarLoop]: Found error trace
[2019-02-28 10:10:14,599 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1]
[2019-02-28 10:10:14,601 INFO  L423      AbstractCegarLoop]: === Iteration 6 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-02-28 10:10:14,602 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-02-28 10:10:14,602 INFO  L82        PathProgramCache]: Analyzing trace with hash 29824, now seen corresponding path program 1 times
[2019-02-28 10:10:14,602 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-02-28 10:10:14,603 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:14,604 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-02-28 10:10:14,604 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:14,604 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-02-28 10:10:14,606 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-02-28 10:10:14,725 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-02-28 10:10:14,726 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-02-28 10:10:14,726 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-02-28 10:10:14,726 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-02-28 10:10:14,727 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-02-28 10:10:14,727 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-02-28 10:10:14,727 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-02-28 10:10:14,728 INFO  L87              Difference]: Start difference. First operand 239 states and 247 transitions. Second operand 4 states.
[2019-02-28 10:10:14,817 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-02-28 10:10:14,818 INFO  L93              Difference]: Finished difference Result 239 states and 247 transitions.
[2019-02-28 10:10:14,818 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-02-28 10:10:14,818 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 3
[2019-02-28 10:10:14,818 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-02-28 10:10:14,820 INFO  L225             Difference]: With dead ends: 239
[2019-02-28 10:10:14,820 INFO  L226             Difference]: Without dead ends: 235
[2019-02-28 10:10:14,821 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-02-28 10:10:14,822 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 235 states.
[2019-02-28 10:10:14,830 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 235.
[2019-02-28 10:10:14,830 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 235 states.
[2019-02-28 10:10:14,831 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 244 transitions.
[2019-02-28 10:10:14,832 INFO  L78                 Accepts]: Start accepts. Automaton has 235 states and 244 transitions. Word has length 3
[2019-02-28 10:10:14,832 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-02-28 10:10:14,833 INFO  L480      AbstractCegarLoop]: Abstraction has 235 states and 244 transitions.
[2019-02-28 10:10:14,833 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-02-28 10:10:14,857 INFO  L276                IsEmpty]: Start isEmpty. Operand 235 states and 244 transitions.
[2019-02-28 10:10:14,857 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 5
[2019-02-28 10:10:14,858 INFO  L394         BasicCegarLoop]: Found error trace
[2019-02-28 10:10:14,860 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1]
[2019-02-28 10:10:14,862 INFO  L423      AbstractCegarLoop]: === Iteration 7 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-02-28 10:10:14,863 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-02-28 10:10:14,863 INFO  L82        PathProgramCache]: Analyzing trace with hash 1755747, now seen corresponding path program 1 times
[2019-02-28 10:10:14,863 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-02-28 10:10:14,866 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:14,866 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-02-28 10:10:14,866 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:14,866 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-02-28 10:10:14,874 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-02-28 10:10:15,011 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-02-28 10:10:15,011 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-02-28 10:10:15,012 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-02-28 10:10:15,012 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-02-28 10:10:15,012 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 4 states
[2019-02-28 10:10:15,012 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants.
[2019-02-28 10:10:15,013 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12
[2019-02-28 10:10:15,013 INFO  L87              Difference]: Start difference. First operand 235 states and 244 transitions. Second operand 4 states.
[2019-02-28 10:10:15,268 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-02-28 10:10:15,268 INFO  L93              Difference]: Finished difference Result 235 states and 244 transitions.
[2019-02-28 10:10:15,268 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. 
[2019-02-28 10:10:15,268 INFO  L78                 Accepts]: Start accepts. Automaton has 4 states. Word has length 4
[2019-02-28 10:10:15,269 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-02-28 10:10:15,270 INFO  L225             Difference]: With dead ends: 235
[2019-02-28 10:10:15,270 INFO  L226             Difference]: Without dead ends: 214
[2019-02-28 10:10:15,270 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20
[2019-02-28 10:10:15,272 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 214 states.
[2019-02-28 10:10:15,276 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214.
[2019-02-28 10:10:15,276 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 214 states.
[2019-02-28 10:10:15,277 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 223 transitions.
[2019-02-28 10:10:15,277 INFO  L78                 Accepts]: Start accepts. Automaton has 214 states and 223 transitions. Word has length 4
[2019-02-28 10:10:15,278 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-02-28 10:10:15,278 INFO  L480      AbstractCegarLoop]: Abstraction has 214 states and 223 transitions.
[2019-02-28 10:10:15,278 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 4 states.
[2019-02-28 10:10:15,278 INFO  L276                IsEmpty]: Start isEmpty. Operand 214 states and 223 transitions.
[2019-02-28 10:10:15,278 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 5
[2019-02-28 10:10:15,279 INFO  L394         BasicCegarLoop]: Found error trace
[2019-02-28 10:10:15,279 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1]
[2019-02-28 10:10:15,281 INFO  L423      AbstractCegarLoop]: === Iteration 8 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-02-28 10:10:15,281 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-02-28 10:10:15,281 INFO  L82        PathProgramCache]: Analyzing trace with hash 6127075, now seen corresponding path program 1 times
[2019-02-28 10:10:15,281 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-02-28 10:10:15,283 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:15,283 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-02-28 10:10:15,283 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:15,283 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-02-28 10:10:15,286 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-02-28 10:10:15,302 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-02-28 10:10:15,303 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-02-28 10:10:15,303 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2019-02-28 10:10:15,303 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-02-28 10:10:15,303 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 3 states
[2019-02-28 10:10:15,303 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2019-02-28 10:10:15,304 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2019-02-28 10:10:15,304 INFO  L87              Difference]: Start difference. First operand 214 states and 223 transitions. Second operand 3 states.
[2019-02-28 10:10:15,312 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-02-28 10:10:15,312 INFO  L93              Difference]: Finished difference Result 214 states and 223 transitions.
[2019-02-28 10:10:15,312 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2019-02-28 10:10:15,312 INFO  L78                 Accepts]: Start accepts. Automaton has 3 states. Word has length 4
[2019-02-28 10:10:15,313 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-02-28 10:10:15,314 INFO  L225             Difference]: With dead ends: 214
[2019-02-28 10:10:15,314 INFO  L226             Difference]: Without dead ends: 213
[2019-02-28 10:10:15,315 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2019-02-28 10:10:15,316 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 213 states.
[2019-02-28 10:10:15,321 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 213.
[2019-02-28 10:10:15,321 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 213 states.
[2019-02-28 10:10:15,322 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 222 transitions.
[2019-02-28 10:10:15,322 INFO  L78                 Accepts]: Start accepts. Automaton has 213 states and 222 transitions. Word has length 4
[2019-02-28 10:10:15,323 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-02-28 10:10:15,323 INFO  L480      AbstractCegarLoop]: Abstraction has 213 states and 222 transitions.
[2019-02-28 10:10:15,323 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 3 states.
[2019-02-28 10:10:15,323 INFO  L276                IsEmpty]: Start isEmpty. Operand 213 states and 222 transitions.
[2019-02-28 10:10:15,323 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-02-28 10:10:15,324 INFO  L394         BasicCegarLoop]: Found error trace
[2019-02-28 10:10:15,324 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-02-28 10:10:15,326 INFO  L423      AbstractCegarLoop]: === Iteration 9 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-02-28 10:10:15,326 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-02-28 10:10:15,326 INFO  L82        PathProgramCache]: Analyzing trace with hash 54428221, now seen corresponding path program 1 times
[2019-02-28 10:10:15,326 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-02-28 10:10:15,327 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:15,328 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-02-28 10:10:15,328 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:15,328 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-02-28 10:10:15,331 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2019-02-28 10:10:15,366 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2019-02-28 10:10:15,367 INFO  L312   seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences.
[2019-02-28 10:10:15,367 INFO  L327   seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2019-02-28 10:10:15,367 INFO  L257   anRefinementStrategy]: Using the first perfect interpolant sequence
[2019-02-28 10:10:15,368 INFO  L459      AbstractCegarLoop]: Interpolant automaton has 5 states
[2019-02-28 10:10:15,368 INFO  L142   InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants.
[2019-02-28 10:10:15,368 INFO  L144   InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20
[2019-02-28 10:10:15,369 INFO  L87              Difference]: Start difference. First operand 213 states and 222 transitions. Second operand 5 states.
[2019-02-28 10:10:15,831 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2019-02-28 10:10:15,831 INFO  L93              Difference]: Finished difference Result 213 states and 222 transitions.
[2019-02-28 10:10:15,832 INFO  L142   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. 
[2019-02-28 10:10:15,832 INFO  L78                 Accepts]: Start accepts. Automaton has 5 states. Word has length 5
[2019-02-28 10:10:15,833 INFO  L84                 Accepts]: Finished accepts. some prefix is accepted.
[2019-02-28 10:10:15,835 INFO  L225             Difference]: With dead ends: 213
[2019-02-28 10:10:15,835 INFO  L226             Difference]: Without dead ends: 212
[2019-02-28 10:10:15,836 INFO  L631         BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42
[2019-02-28 10:10:15,837 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 212 states.
[2019-02-28 10:10:15,847 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 212.
[2019-02-28 10:10:15,848 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand 212 states.
[2019-02-28 10:10:15,849 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 212 states to 212 states and 221 transitions.
[2019-02-28 10:10:15,849 INFO  L78                 Accepts]: Start accepts. Automaton has 212 states and 221 transitions. Word has length 5
[2019-02-28 10:10:15,850 INFO  L84                 Accepts]: Finished accepts. word is rejected.
[2019-02-28 10:10:15,850 INFO  L480      AbstractCegarLoop]: Abstraction has 212 states and 221 transitions.
[2019-02-28 10:10:15,850 INFO  L481      AbstractCegarLoop]: Interpolant automaton has 5 states.
[2019-02-28 10:10:15,850 INFO  L276                IsEmpty]: Start isEmpty. Operand 212 states and 221 transitions.
[2019-02-28 10:10:15,851 INFO  L282                IsEmpty]: Finished isEmpty. Found accepting run of length 6
[2019-02-28 10:10:15,851 INFO  L394         BasicCegarLoop]: Found error trace
[2019-02-28 10:10:15,851 INFO  L402         BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1]
[2019-02-28 10:10:15,854 INFO  L423      AbstractCegarLoop]: === Iteration 10 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT]===
[2019-02-28 10:10:15,854 INFO  L144       PredicateUnifier]: Initialized classic predicate unifier
[2019-02-28 10:10:15,854 INFO  L82        PathProgramCache]: Analyzing trace with hash 179442176, now seen corresponding path program 1 times
[2019-02-28 10:10:15,855 INFO  L69    tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy
[2019-02-28 10:10:15,856 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:15,856 INFO  L103   rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2019-02-28 10:10:15,857 INFO  L119   rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY
[2019-02-28 10:10:15,857 INFO  L289   anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation)
[2019-02-28 10:10:15,871 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2019-02-28 10:10:15,878 INFO  L136    AnnotateAndAsserter]: Conjunction of SSA is sat
[2019-02-28 10:10:15,899 INFO  L469         BasicCegarLoop]: Counterexample might be feasible
[2019-02-28 10:10:15,927 INFO  L202        PluginConnector]: Adding new model GuiTestExample.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.02 10:10:15 BoogieIcfgContainer
[2019-02-28 10:10:15,928 INFO  L132        PluginConnector]: ------------------------ END TraceAbstraction----------------------------
[2019-02-28 10:10:15,929 INFO  L168              Benchmark]: Toolchain (without parser) took 4508.17 ms. Allocated memory was 140.5 MB in the beginning and 203.4 MB in the end (delta: 62.9 MB). Free memory was 104.3 MB in the beginning and 136.4 MB in the end (delta: -32.1 MB). Peak memory consumption was 30.8 MB. Max. memory is 7.1 GB.
[2019-02-28 10:10:15,931 INFO  L168              Benchmark]: Boogie PL CUP Parser took 0.18 ms. Allocated memory is still 140.5 MB. Free memory is still 106.4 MB. There was no memory consumed. Max. memory is 7.1 GB.
[2019-02-28 10:10:15,932 INFO  L168              Benchmark]: Boogie Procedure Inliner took 86.32 ms. Allocated memory is still 140.5 MB. Free memory was 103.9 MB in the beginning and 99.7 MB in the end (delta: 4.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 7.1 GB.
[2019-02-28 10:10:15,935 INFO  L168              Benchmark]: Boogie Preprocessor took 57.93 ms. Allocated memory is still 140.5 MB. Free memory was 99.7 MB in the beginning and 97.2 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB.
[2019-02-28 10:10:15,938 INFO  L168              Benchmark]: RCFGBuilder took 1917.80 ms. Allocated memory was 140.5 MB in the beginning and 176.7 MB in the end (delta: 36.2 MB). Free memory was 97.2 MB in the beginning and 114.6 MB in the end (delta: -17.4 MB). Peak memory consumption was 43.6 MB. Max. memory is 7.1 GB.
[2019-02-28 10:10:15,940 INFO  L168              Benchmark]: TraceAbstraction took 2438.12 ms. Allocated memory was 176.7 MB in the beginning and 203.4 MB in the end (delta: 26.7 MB). Free memory was 114.6 MB in the beginning and 136.4 MB in the end (delta: -21.8 MB). Peak memory consumption was 4.9 MB. Max. memory is 7.1 GB.
[2019-02-28 10:10:15,948 INFO  L336   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * Boogie PL CUP Parser took 0.18 ms. Allocated memory is still 140.5 MB. Free memory is still 106.4 MB. There was no memory consumed. Max. memory is 7.1 GB.
 * Boogie Procedure Inliner took 86.32 ms. Allocated memory is still 140.5 MB. Free memory was 103.9 MB in the beginning and 99.7 MB in the end (delta: 4.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 7.1 GB.
 * Boogie Preprocessor took 57.93 ms. Allocated memory is still 140.5 MB. Free memory was 99.7 MB in the beginning and 97.2 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB.
 * RCFGBuilder took 1917.80 ms. Allocated memory was 140.5 MB in the beginning and 176.7 MB in the end (delta: 36.2 MB). Free memory was 97.2 MB in the beginning and 114.6 MB in the end (delta: -17.4 MB). Peak memory consumption was 43.6 MB. Max. memory is 7.1 GB.
 * TraceAbstraction took 2438.12 ms. Allocated memory was 176.7 MB in the beginning and 203.4 MB in the end (delta: 26.7 MB). Free memory was 114.6 MB in the beginning and 136.4 MB in the end (delta: -21.8 MB). Peak memory consumption was 4.9 MB. Max. memory is 7.1 GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - CounterExampleResult [Line: 658]: assertion can be violated
    assertion can be violated
We found a FailurePath: 
[L642]        requires void$SimpleFrame2Cons$4$actionPerformed$4888$__this != $null;
[L651]        r0125 := void$SimpleFrame2Cons$4$actionPerformed$4888$__this;
[L653]        r1126 := void$SimpleFrame2Cons$4$actionPerformed$4888$param_0;
[L655]        $r2129 := SimpleFrame2Cons$SimpleFrame2Cons$4$this$0763;
[L390]        r083 := $param_0;
[L392]        $r185 := javax.swing.JButton$SimpleFrame2Cons$event2227;
[L394]        __ret := $r185;
[L658]        assert $r3130 != $null;

  - StatisticsResult: Ultimate Automizer benchmark data
    CFG has 16 procedures, 304 locations, 87 error locations. UNSAFE Result, 2.3s OverallTime, 10 OverallIterations, 1 TraceHistogramMax, 1.1s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2190 SDtfs, 400 SDslu, 3738 SDs, 0 SdLazy, 41 SolverSat, 11 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=304occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 9 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.6s InterpolantComputationTime, 35 NumberOfCodeBlocks, 35 NumberOfCodeBlocksAsserted, 10 NumberOfCheckSat, 21 ConstructedInterpolants, 0 QuantifiedInterpolants, 202 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 9 InterpolantComputations, 9 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available
RESULT: Ultimate proved your program to be incorrect!
Received shutdown request...