java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerBplInline.xml -s ../../../trunk/examples/settings/ai/array-bench/reach_32bit_camel.epf -i ../../../trunk/examples/programs/real-life/GuiTestExampleUnsafe.bpl -------------------------------------------------------------------------------- This is Ultimate 0.1.24-1ae3202 [2019-03-04 16:23:48,550 INFO L170 SettingsManager]: Resetting all preferences to default values... [2019-03-04 16:23:48,552 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2019-03-04 16:23:48,564 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-03-04 16:23:48,564 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-03-04 16:23:48,566 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-03-04 16:23:48,567 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-03-04 16:23:48,569 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2019-03-04 16:23:48,571 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-03-04 16:23:48,571 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-03-04 16:23:48,572 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-03-04 16:23:48,573 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-03-04 16:23:48,574 INFO L174 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-03-04 16:23:48,575 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-03-04 16:23:48,576 INFO L174 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-03-04 16:23:48,577 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-03-04 16:23:48,578 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-03-04 16:23:48,580 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-03-04 16:23:48,582 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2019-03-04 16:23:48,584 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-03-04 16:23:48,585 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-03-04 16:23:48,587 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-03-04 16:23:48,589 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-03-04 16:23:48,590 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-03-04 16:23:48,590 INFO L174 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-03-04 16:23:48,591 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-03-04 16:23:48,592 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-03-04 16:23:48,593 INFO L174 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-03-04 16:23:48,594 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2019-03-04 16:23:48,595 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-03-04 16:23:48,595 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2019-03-04 16:23:48,596 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-03-04 16:23:48,597 INFO L177 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-03-04 16:23:48,597 INFO L174 SettingsManager]: Resetting SmtParser preferences to default values [2019-03-04 16:23:48,598 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2019-03-04 16:23:48,599 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2019-03-04 16:23:48,599 INFO L98 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/array-bench/reach_32bit_camel.epf [2019-03-04 16:23:48,613 INFO L110 SettingsManager]: Loading preferences was successful [2019-03-04 16:23:48,614 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2019-03-04 16:23:48,619 INFO L131 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2019-03-04 16:23:48,619 INFO L133 SettingsManager]: * Show backtranslation warnings=false [2019-03-04 16:23:48,619 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-03-04 16:23:48,619 INFO L133 SettingsManager]: * User list type=DISABLED [2019-03-04 16:23:48,620 INFO L133 SettingsManager]: * Inline calls to unimplemented procedures=true [2019-03-04 16:23:48,620 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-03-04 16:23:48,620 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-03-04 16:23:48,620 INFO L133 SettingsManager]: * Underlying domain=OctagonDomain [2019-03-04 16:23:48,621 INFO L133 SettingsManager]: * Abstract domain=OctagonDomain [2019-03-04 16:23:48,621 INFO L133 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-03-04 16:23:48,622 INFO L133 SettingsManager]: * Interval Domain=false [2019-03-04 16:23:48,622 INFO L131 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-03-04 16:23:48,623 INFO L133 SettingsManager]: * Create parallel compositions if possible=false [2019-03-04 16:23:48,624 INFO L133 SettingsManager]: * Use SBE=true [2019-03-04 16:23:48,624 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-03-04 16:23:48,624 INFO L133 SettingsManager]: * sizeof long=4 [2019-03-04 16:23:48,624 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2019-03-04 16:23:48,625 INFO L133 SettingsManager]: * sizeof POINTER=4 [2019-03-04 16:23:48,625 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2019-03-04 16:23:48,625 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-03-04 16:23:48,625 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-03-04 16:23:48,625 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-03-04 16:23:48,625 INFO L133 SettingsManager]: * sizeof long double=12 [2019-03-04 16:23:48,627 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2019-03-04 16:23:48,627 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-03-04 16:23:48,628 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-03-04 16:23:48,628 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-03-04 16:23:48,628 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2019-03-04 16:23:48,628 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-03-04 16:23:48,629 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-03-04 16:23:48,629 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-03-04 16:23:48,629 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-03-04 16:23:48,629 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2019-03-04 16:23:48,629 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-03-04 16:23:48,630 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-03-04 16:23:48,630 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-03-04 16:23:48,630 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2019-03-04 16:23:48,682 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-03-04 16:23:48,697 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-03-04 16:23:48,703 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-03-04 16:23:48,704 INFO L271 PluginConnector]: Initializing Boogie PL CUP Parser... [2019-03-04 16:23:48,705 INFO L276 PluginConnector]: Boogie PL CUP Parser initialized [2019-03-04 16:23:48,706 INFO L418 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExampleUnsafe.bpl [2019-03-04 16:23:48,706 INFO L111 BoogieParser]: Parsing: '/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/programs/real-life/GuiTestExampleUnsafe.bpl' [2019-03-04 16:23:48,784 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-03-04 16:23:48,786 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2019-03-04 16:23:48,787 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-03-04 16:23:48,787 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-03-04 16:23:48,787 INFO L276 PluginConnector]: Boogie Procedure Inliner initialized [2019-03-04 16:23:48,804 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 04:23:48" (1/1) ... [2019-03-04 16:23:48,823 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 04:23:48" (1/1) ... [2019-03-04 16:23:48,831 WARN L165 Inliner]: Program contained no entry procedure! [2019-03-04 16:23:48,831 WARN L168 Inliner]: Missing entry procedures: [ULTIMATE.start] [2019-03-04 16:23:48,832 WARN L175 Inliner]: Fallback enabled. All procedures will be processed. [2019-03-04 16:23:48,900 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-03-04 16:23:48,900 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-03-04 16:23:48,901 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-03-04 16:23:48,901 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2019-03-04 16:23:48,915 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 04:23:48" (1/1) ... [2019-03-04 16:23:48,916 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 04:23:48" (1/1) ... [2019-03-04 16:23:48,939 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 04:23:48" (1/1) ... [2019-03-04 16:23:48,940 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 04:23:48" (1/1) ... [2019-03-04 16:23:48,952 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 04:23:48" (1/1) ... [2019-03-04 16:23:48,957 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 04:23:48" (1/1) ... [2019-03-04 16:23:48,962 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 04:23:48" (1/1) ... [2019-03-04 16:23:48,970 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-03-04 16:23:48,971 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-03-04 16:23:48,971 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-03-04 16:23:48,971 INFO L276 PluginConnector]: RCFGBuilder initialized [2019-03-04 16:23:48,974 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 04:23:48" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-03-04 16:23:49,053 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 given in one single declaration [2019-03-04 16:23:49,054 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 [2019-03-04 16:23:49,054 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$$la$init$ra$$4885 [2019-03-04 16:23:49,055 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 given in one single declaration [2019-03-04 16:23:49,055 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 [2019-03-04 16:23:49,055 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$actionPerformed$4553 [2019-03-04 16:23:49,055 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 given in one single declaration [2019-03-04 16:23:49,056 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 [2019-03-04 16:23:49,056 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$3$actionPerformed$4886 [2019-03-04 16:23:49,056 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 given in one single declaration [2019-03-04 16:23:49,056 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 [2019-03-04 16:23:49,056 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$$la$init$ra$$1805 [2019-03-04 16:23:49,058 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 given in one single declaration [2019-03-04 16:23:49,059 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 [2019-03-04 16:23:49,059 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$$la$init$ra$$1802 [2019-03-04 16:23:49,059 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.SwingUtilities$invokeLater$4940 [2019-03-04 16:23:49,059 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setLayout$1827 [2019-03-04 16:23:49,060 INFO L124 BoogieDeclarations]: Specification and implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 given in one single declaration [2019-03-04 16:23:49,060 INFO L130 BoogieDeclarations]: Found specification of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 [2019-03-04 16:23:49,060 INFO L138 BoogieDeclarations]: Found implementation of procedure javax.swing.JButton$SimpleFrame2Cons$access$0$1806 [2019-03-04 16:23:49,060 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 given in one single declaration [2019-03-04 16:23:49,061 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 [2019-03-04 16:23:49,061 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$2$$la$init$ra$$4552 [2019-03-04 16:23:49,061 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setResizable$1858 [2019-03-04 16:23:49,061 INFO L124 BoogieDeclarations]: Specification and implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 given in one single declaration [2019-03-04 16:23:49,061 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 [2019-03-04 16:23:49,061 INFO L138 BoogieDeclarations]: Found implementation of procedure java.awt.Dimension$java.awt.Toolkit$getScreenSize$3246 [2019-03-04 16:23:49,065 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 given in one single declaration [2019-03-04 16:23:49,065 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$$la$init$ra$$1809 [2019-03-04 16:23:49,065 INFO L138 BoogieDeclarations]: Found implementation of procedure void$javax.swing.JFrame$$la$init$ra$$1809 [2019-03-04 16:23:49,065 INFO L124 BoogieDeclarations]: Specification and implementation of procedure int$SimpleFrame2Cons$access$2$1808 given in one single declaration [2019-03-04 16:23:49,065 INFO L130 BoogieDeclarations]: Found specification of procedure int$SimpleFrame2Cons$access$2$1808 [2019-03-04 16:23:49,066 INFO L138 BoogieDeclarations]: Found implementation of procedure int$SimpleFrame2Cons$access$2$1808 [2019-03-04 16:23:49,066 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JFrame$setDefaultCloseOperation$1816 [2019-03-04 16:23:49,066 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$addActionListener$4123 [2019-03-04 16:23:49,066 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setLocation$1913 [2019-03-04 16:23:49,066 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 given in one single declaration [2019-03-04 16:23:49,067 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 [2019-03-04 16:23:49,067 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$$la$init$ra$$4887 [2019-03-04 16:23:49,067 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 given in one single declaration [2019-03-04 16:23:49,067 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 [2019-03-04 16:23:49,067 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$4$actionPerformed$4888 [2019-03-04 16:23:49,067 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.AbstractButton$setEnabled$4131 [2019-03-04 16:23:49,068 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$setVisible$1918 [2019-03-04 16:23:49,068 INFO L130 BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getHeight$2305 [2019-03-04 16:23:49,068 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Window$pack$1909 [2019-03-04 16:23:49,068 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Toolkit$java.awt.Toolkit$getDefaultToolkit$3255 [2019-03-04 16:23:49,068 INFO L130 BoogieDeclarations]: Found specification of procedure int$java.awt.Component$getWidth$2304 [2019-03-04 16:23:49,068 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.Frame$setTitle$1852 [2019-03-04 16:23:49,069 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$access$1$1807 given in one single declaration [2019-03-04 16:23:49,070 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$access$1$1807 [2019-03-04 16:23:49,071 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$access$1$1807 [2019-03-04 16:23:49,071 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.awt.FlowLayout$$la$init$ra$$4889 [2019-03-04 16:23:49,071 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$1$run$1803 given in one single declaration [2019-03-04 16:23:49,071 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$1$run$1803 [2019-03-04 16:23:49,071 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$1$run$1803 [2019-03-04 16:23:49,072 INFO L124 BoogieDeclarations]: Specification and implementation of procedure void$SimpleFrame2Cons$main$1804 given in one single declaration [2019-03-04 16:23:49,072 INFO L130 BoogieDeclarations]: Found specification of procedure void$SimpleFrame2Cons$main$1804 [2019-03-04 16:23:49,072 INFO L138 BoogieDeclarations]: Found implementation of procedure void$SimpleFrame2Cons$main$1804 [2019-03-04 16:23:49,072 INFO L130 BoogieDeclarations]: Found specification of procedure void$javax.swing.JButton$$la$init$ra$$2558 [2019-03-04 16:23:49,073 INFO L124 BoogieDeclarations]: Specification and implementation of procedure $EFG_Procedure given in one single declaration [2019-03-04 16:23:49,073 INFO L130 BoogieDeclarations]: Found specification of procedure $EFG_Procedure [2019-03-04 16:23:49,073 INFO L138 BoogieDeclarations]: Found implementation of procedure $EFG_Procedure [2019-03-04 16:23:49,073 INFO L130 BoogieDeclarations]: Found specification of procedure java.awt.Component$java.awt.Container$add$2075 [2019-03-04 16:23:49,073 INFO L130 BoogieDeclarations]: Found specification of procedure void$java.lang.Object$$la$init$ra$$38 [2019-03-04 16:23:49,397 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-03-04 16:23:49,471 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-03-04 16:23:49,514 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-03-04 16:23:49,546 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-03-04 16:23:49,968 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-03-04 16:23:50,060 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-03-04 16:23:50,122 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-03-04 16:23:50,160 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-03-04 16:23:50,225 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-03-04 16:23:50,283 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-03-04 16:23:50,307 WARN L745 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2019-03-04 16:23:50,912 INFO L278 CfgBuilder]: Using library mode [2019-03-04 16:23:50,913 INFO L286 CfgBuilder]: Removed 206 assue(true) statements. [2019-03-04 16:23:50,914 INFO L202 PluginConnector]: Adding new model GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.03 04:23:50 BoogieIcfgContainer [2019-03-04 16:23:50,915 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-03-04 16:23:50,916 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-03-04 16:23:50,916 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-03-04 16:23:50,919 INFO L276 PluginConnector]: TraceAbstraction initialized [2019-03-04 16:23:50,919 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.boogie.parser AST 04.03 04:23:48" (1/2) ... [2019-03-04 16:23:50,921 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@688d0b2e and model type GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 04.03 04:23:50, skipping insertion in model container [2019-03-04 16:23:50,921 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 04.03 04:23:50" (2/2) ... [2019-03-04 16:23:50,923 INFO L112 eAbstractionObserver]: Analyzing ICFG GuiTestExampleUnsafe.bpl [2019-03-04 16:23:50,933 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-03-04 16:23:50,942 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 87 error locations. [2019-03-04 16:23:50,959 INFO L257 AbstractCegarLoop]: Starting to check reachability of 87 error locations. [2019-03-04 16:23:50,999 INFO L133 ementStrategyFactory]: Using default assertion order modulation [2019-03-04 16:23:51,000 INFO L382 AbstractCegarLoop]: Interprodecural is true [2019-03-04 16:23:51,000 INFO L383 AbstractCegarLoop]: Hoare is true [2019-03-04 16:23:51,000 INFO L384 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-03-04 16:23:51,000 INFO L385 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-03-04 16:23:51,001 INFO L386 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-03-04 16:23:51,001 INFO L387 AbstractCegarLoop]: Difference is false [2019-03-04 16:23:51,001 INFO L388 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-03-04 16:23:51,001 INFO L393 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-03-04 16:23:51,039 INFO L276 IsEmpty]: Start isEmpty. Operand 304 states. [2019-03-04 16:23:51,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 3 [2019-03-04 16:23:51,046 INFO L394 BasicCegarLoop]: Found error trace [2019-03-04 16:23:51,047 INFO L402 BasicCegarLoop]: trace histogram [1, 1] [2019-03-04 16:23:51,052 INFO L423 AbstractCegarLoop]: === Iteration 1 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT]=== [2019-03-04 16:23:51,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-03-04 16:23:51,059 INFO L82 PathProgramCache]: Analyzing trace with hash 10434, now seen corresponding path program 1 times [2019-03-04 16:23:51,061 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-03-04 16:23:51,061 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-03-04 16:23:51,113 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:51,113 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-03-04 16:23:51,114 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:51,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-03-04 16:23:51,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-03-04 16:23:51,214 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-03-04 16:23:51,214 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-03-04 16:23:51,217 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-03-04 16:23:51,227 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-03-04 16:23:51,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-03-04 16:23:51,230 INFO L87 Difference]: Start difference. First operand 304 states. Second operand 3 states. [2019-03-04 16:23:51,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-03-04 16:23:51,287 INFO L93 Difference]: Finished difference Result 304 states and 306 transitions. [2019-03-04 16:23:51,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-03-04 16:23:51,289 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 2 [2019-03-04 16:23:51,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-03-04 16:23:51,305 INFO L225 Difference]: With dead ends: 304 [2019-03-04 16:23:51,305 INFO L226 Difference]: Without dead ends: 252 [2019-03-04 16:23:51,309 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-03-04 16:23:51,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 252 states. [2019-03-04 16:23:51,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 252 to 252. [2019-03-04 16:23:51,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 252 states. [2019-03-04 16:23:51,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 252 states to 252 states and 257 transitions. [2019-03-04 16:23:51,373 INFO L78 Accepts]: Start accepts. Automaton has 252 states and 257 transitions. Word has length 2 [2019-03-04 16:23:51,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-03-04 16:23:51,374 INFO L480 AbstractCegarLoop]: Abstraction has 252 states and 257 transitions. [2019-03-04 16:23:51,374 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-03-04 16:23:51,374 INFO L276 IsEmpty]: Start isEmpty. Operand 252 states and 257 transitions. [2019-03-04 16:23:51,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-03-04 16:23:51,375 INFO L394 BasicCegarLoop]: Found error trace [2019-03-04 16:23:51,375 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-03-04 16:23:51,378 INFO L423 AbstractCegarLoop]: === Iteration 2 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT]=== [2019-03-04 16:23:51,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-03-04 16:23:51,378 INFO L82 PathProgramCache]: Analyzing trace with hash 181753, now seen corresponding path program 1 times [2019-03-04 16:23:51,379 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-03-04 16:23:51,379 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-03-04 16:23:51,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:51,380 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-03-04 16:23:51,380 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:51,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-03-04 16:23:51,452 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-03-04 16:23:51,453 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-03-04 16:23:51,453 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-03-04 16:23:51,454 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-03-04 16:23:51,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-03-04 16:23:51,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-03-04 16:23:51,455 INFO L87 Difference]: Start difference. First operand 252 states and 257 transitions. Second operand 4 states. [2019-03-04 16:23:51,500 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-03-04 16:23:51,500 INFO L93 Difference]: Finished difference Result 252 states and 257 transitions. [2019-03-04 16:23:51,500 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-03-04 16:23:51,500 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2019-03-04 16:23:51,501 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-03-04 16:23:51,503 INFO L225 Difference]: With dead ends: 252 [2019-03-04 16:23:51,503 INFO L226 Difference]: Without dead ends: 248 [2019-03-04 16:23:51,504 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-03-04 16:23:51,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2019-03-04 16:23:51,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 248. [2019-03-04 16:23:51,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 248 states. [2019-03-04 16:23:51,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 248 states to 248 states and 254 transitions. [2019-03-04 16:23:51,523 INFO L78 Accepts]: Start accepts. Automaton has 248 states and 254 transitions. Word has length 3 [2019-03-04 16:23:51,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-03-04 16:23:51,524 INFO L480 AbstractCegarLoop]: Abstraction has 248 states and 254 transitions. [2019-03-04 16:23:51,524 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-03-04 16:23:51,524 INFO L276 IsEmpty]: Start isEmpty. Operand 248 states and 254 transitions. [2019-03-04 16:23:51,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-03-04 16:23:51,525 INFO L394 BasicCegarLoop]: Found error trace [2019-03-04 16:23:51,525 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-03-04 16:23:51,528 INFO L423 AbstractCegarLoop]: === Iteration 3 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT]=== [2019-03-04 16:23:51,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-03-04 16:23:51,528 INFO L82 PathProgramCache]: Analyzing trace with hash 168844, now seen corresponding path program 1 times [2019-03-04 16:23:51,528 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-03-04 16:23:51,528 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-03-04 16:23:51,530 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:51,530 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-03-04 16:23:51,530 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:51,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-03-04 16:23:51,568 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-03-04 16:23:51,568 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-03-04 16:23:51,569 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-03-04 16:23:51,569 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-03-04 16:23:51,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-03-04 16:23:51,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-03-04 16:23:51,570 INFO L87 Difference]: Start difference. First operand 248 states and 254 transitions. Second operand 4 states. [2019-03-04 16:23:51,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-03-04 16:23:51,598 INFO L93 Difference]: Finished difference Result 248 states and 254 transitions. [2019-03-04 16:23:51,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-03-04 16:23:51,598 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2019-03-04 16:23:51,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-03-04 16:23:51,600 INFO L225 Difference]: With dead ends: 248 [2019-03-04 16:23:51,601 INFO L226 Difference]: Without dead ends: 244 [2019-03-04 16:23:51,601 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-03-04 16:23:51,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 244 states. [2019-03-04 16:23:51,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 244 to 244. [2019-03-04 16:23:51,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 244 states. [2019-03-04 16:23:51,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 244 states to 244 states and 251 transitions. [2019-03-04 16:23:51,615 INFO L78 Accepts]: Start accepts. Automaton has 244 states and 251 transitions. Word has length 3 [2019-03-04 16:23:51,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-03-04 16:23:51,615 INFO L480 AbstractCegarLoop]: Abstraction has 244 states and 251 transitions. [2019-03-04 16:23:51,615 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-03-04 16:23:51,615 INFO L276 IsEmpty]: Start isEmpty. Operand 244 states and 251 transitions. [2019-03-04 16:23:51,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-03-04 16:23:51,616 INFO L394 BasicCegarLoop]: Found error trace [2019-03-04 16:23:51,616 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-03-04 16:23:51,619 INFO L423 AbstractCegarLoop]: === Iteration 4 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT]=== [2019-03-04 16:23:51,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-03-04 16:23:51,620 INFO L82 PathProgramCache]: Analyzing trace with hash 323784, now seen corresponding path program 1 times [2019-03-04 16:23:51,620 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-03-04 16:23:51,620 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-03-04 16:23:51,621 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:51,621 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-03-04 16:23:51,622 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:51,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-03-04 16:23:51,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-03-04 16:23:51,664 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-03-04 16:23:51,664 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-03-04 16:23:51,664 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-03-04 16:23:51,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-03-04 16:23:51,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-03-04 16:23:51,665 INFO L87 Difference]: Start difference. First operand 244 states and 251 transitions. Second operand 4 states. [2019-03-04 16:23:51,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-03-04 16:23:51,704 INFO L93 Difference]: Finished difference Result 244 states and 251 transitions. [2019-03-04 16:23:51,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-03-04 16:23:51,706 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2019-03-04 16:23:51,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-03-04 16:23:51,711 INFO L225 Difference]: With dead ends: 244 [2019-03-04 16:23:51,712 INFO L226 Difference]: Without dead ends: 243 [2019-03-04 16:23:51,712 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-03-04 16:23:51,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2019-03-04 16:23:51,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 243. [2019-03-04 16:23:51,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243 states. [2019-03-04 16:23:51,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 250 transitions. [2019-03-04 16:23:51,744 INFO L78 Accepts]: Start accepts. Automaton has 243 states and 250 transitions. Word has length 3 [2019-03-04 16:23:51,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-03-04 16:23:51,745 INFO L480 AbstractCegarLoop]: Abstraction has 243 states and 250 transitions. [2019-03-04 16:23:51,745 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-03-04 16:23:51,745 INFO L276 IsEmpty]: Start isEmpty. Operand 243 states and 250 transitions. [2019-03-04 16:23:51,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-03-04 16:23:51,746 INFO L394 BasicCegarLoop]: Found error trace [2019-03-04 16:23:51,746 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-03-04 16:23:51,753 INFO L423 AbstractCegarLoop]: === Iteration 5 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT]=== [2019-03-04 16:23:51,754 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-03-04 16:23:51,754 INFO L82 PathProgramCache]: Analyzing trace with hash 161893, now seen corresponding path program 1 times [2019-03-04 16:23:51,754 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-03-04 16:23:51,754 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-03-04 16:23:51,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:51,759 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-03-04 16:23:51,759 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:51,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-03-04 16:23:51,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-03-04 16:23:51,883 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-03-04 16:23:51,884 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-03-04 16:23:51,884 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-03-04 16:23:51,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-03-04 16:23:51,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-03-04 16:23:51,885 INFO L87 Difference]: Start difference. First operand 243 states and 250 transitions. Second operand 4 states. [2019-03-04 16:23:51,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-03-04 16:23:51,914 INFO L93 Difference]: Finished difference Result 243 states and 250 transitions. [2019-03-04 16:23:51,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-03-04 16:23:51,915 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2019-03-04 16:23:51,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-03-04 16:23:51,916 INFO L225 Difference]: With dead ends: 243 [2019-03-04 16:23:51,917 INFO L226 Difference]: Without dead ends: 239 [2019-03-04 16:23:51,917 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-03-04 16:23:51,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2019-03-04 16:23:51,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 239. [2019-03-04 16:23:51,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 239 states. [2019-03-04 16:23:51,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 239 states to 239 states and 247 transitions. [2019-03-04 16:23:51,927 INFO L78 Accepts]: Start accepts. Automaton has 239 states and 247 transitions. Word has length 3 [2019-03-04 16:23:51,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-03-04 16:23:51,927 INFO L480 AbstractCegarLoop]: Abstraction has 239 states and 247 transitions. [2019-03-04 16:23:51,927 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-03-04 16:23:51,927 INFO L276 IsEmpty]: Start isEmpty. Operand 239 states and 247 transitions. [2019-03-04 16:23:51,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-03-04 16:23:51,928 INFO L394 BasicCegarLoop]: Found error trace [2019-03-04 16:23:51,928 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-03-04 16:23:51,931 INFO L423 AbstractCegarLoop]: === Iteration 6 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT]=== [2019-03-04 16:23:51,932 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-03-04 16:23:51,932 INFO L82 PathProgramCache]: Analyzing trace with hash 29824, now seen corresponding path program 1 times [2019-03-04 16:23:51,932 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-03-04 16:23:51,932 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-03-04 16:23:51,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:51,934 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-03-04 16:23:51,934 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:51,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-03-04 16:23:52,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-03-04 16:23:52,053 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-03-04 16:23:52,053 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-03-04 16:23:52,053 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-03-04 16:23:52,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-03-04 16:23:52,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-03-04 16:23:52,054 INFO L87 Difference]: Start difference. First operand 239 states and 247 transitions. Second operand 4 states. [2019-03-04 16:23:52,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-03-04 16:23:52,118 INFO L93 Difference]: Finished difference Result 239 states and 247 transitions. [2019-03-04 16:23:52,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-03-04 16:23:52,118 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 3 [2019-03-04 16:23:52,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-03-04 16:23:52,120 INFO L225 Difference]: With dead ends: 239 [2019-03-04 16:23:52,120 INFO L226 Difference]: Without dead ends: 235 [2019-03-04 16:23:52,121 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-03-04 16:23:52,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2019-03-04 16:23:52,129 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 235. [2019-03-04 16:23:52,130 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 235 states. [2019-03-04 16:23:52,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 244 transitions. [2019-03-04 16:23:52,132 INFO L78 Accepts]: Start accepts. Automaton has 235 states and 244 transitions. Word has length 3 [2019-03-04 16:23:52,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-03-04 16:23:52,132 INFO L480 AbstractCegarLoop]: Abstraction has 235 states and 244 transitions. [2019-03-04 16:23:52,132 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-03-04 16:23:52,133 INFO L276 IsEmpty]: Start isEmpty. Operand 235 states and 244 transitions. [2019-03-04 16:23:52,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2019-03-04 16:23:52,133 INFO L394 BasicCegarLoop]: Found error trace [2019-03-04 16:23:52,134 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2019-03-04 16:23:52,136 INFO L423 AbstractCegarLoop]: === Iteration 7 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT]=== [2019-03-04 16:23:52,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-03-04 16:23:52,160 INFO L82 PathProgramCache]: Analyzing trace with hash 1755747, now seen corresponding path program 1 times [2019-03-04 16:23:52,160 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-03-04 16:23:52,160 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-03-04 16:23:52,161 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:52,161 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-03-04 16:23:52,162 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:52,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-03-04 16:23:52,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-03-04 16:23:52,309 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-03-04 16:23:52,309 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-03-04 16:23:52,311 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-03-04 16:23:52,311 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-03-04 16:23:52,311 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-03-04 16:23:52,311 INFO L87 Difference]: Start difference. First operand 235 states and 244 transitions. Second operand 4 states. [2019-03-04 16:23:52,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-03-04 16:23:52,575 INFO L93 Difference]: Finished difference Result 235 states and 244 transitions. [2019-03-04 16:23:52,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-03-04 16:23:52,577 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 4 [2019-03-04 16:23:52,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-03-04 16:23:52,580 INFO L225 Difference]: With dead ends: 235 [2019-03-04 16:23:52,580 INFO L226 Difference]: Without dead ends: 214 [2019-03-04 16:23:52,580 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-03-04 16:23:52,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2019-03-04 16:23:52,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2019-03-04 16:23:52,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2019-03-04 16:23:52,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 223 transitions. [2019-03-04 16:23:52,588 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 223 transitions. Word has length 4 [2019-03-04 16:23:52,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-03-04 16:23:52,588 INFO L480 AbstractCegarLoop]: Abstraction has 214 states and 223 transitions. [2019-03-04 16:23:52,588 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-03-04 16:23:52,588 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 223 transitions. [2019-03-04 16:23:52,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2019-03-04 16:23:52,589 INFO L394 BasicCegarLoop]: Found error trace [2019-03-04 16:23:52,589 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2019-03-04 16:23:52,594 INFO L423 AbstractCegarLoop]: === Iteration 8 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT]=== [2019-03-04 16:23:52,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-03-04 16:23:52,594 INFO L82 PathProgramCache]: Analyzing trace with hash 6127075, now seen corresponding path program 1 times [2019-03-04 16:23:52,595 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-03-04 16:23:52,595 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-03-04 16:23:52,596 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:52,596 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-03-04 16:23:52,597 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:52,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-03-04 16:23:52,637 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-03-04 16:23:52,638 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-03-04 16:23:52,638 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-03-04 16:23:52,638 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-03-04 16:23:52,639 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-03-04 16:23:52,639 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-03-04 16:23:52,639 INFO L87 Difference]: Start difference. First operand 214 states and 223 transitions. Second operand 3 states. [2019-03-04 16:23:52,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-03-04 16:23:52,667 INFO L93 Difference]: Finished difference Result 214 states and 223 transitions. [2019-03-04 16:23:52,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-03-04 16:23:52,668 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2019-03-04 16:23:52,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-03-04 16:23:52,669 INFO L225 Difference]: With dead ends: 214 [2019-03-04 16:23:52,669 INFO L226 Difference]: Without dead ends: 213 [2019-03-04 16:23:52,670 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-03-04 16:23:52,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2019-03-04 16:23:52,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 213. [2019-03-04 16:23:52,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213 states. [2019-03-04 16:23:52,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213 states to 213 states and 222 transitions. [2019-03-04 16:23:52,677 INFO L78 Accepts]: Start accepts. Automaton has 213 states and 222 transitions. Word has length 4 [2019-03-04 16:23:52,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-03-04 16:23:52,677 INFO L480 AbstractCegarLoop]: Abstraction has 213 states and 222 transitions. [2019-03-04 16:23:52,678 INFO L481 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-03-04 16:23:52,678 INFO L276 IsEmpty]: Start isEmpty. Operand 213 states and 222 transitions. [2019-03-04 16:23:52,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-03-04 16:23:52,678 INFO L394 BasicCegarLoop]: Found error trace [2019-03-04 16:23:52,678 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-03-04 16:23:52,680 INFO L423 AbstractCegarLoop]: === Iteration 9 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT]=== [2019-03-04 16:23:52,680 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-03-04 16:23:52,681 INFO L82 PathProgramCache]: Analyzing trace with hash 311167050, now seen corresponding path program 1 times [2019-03-04 16:23:52,681 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-03-04 16:23:52,681 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-03-04 16:23:52,682 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:52,682 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-03-04 16:23:52,683 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:52,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-03-04 16:23:52,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-03-04 16:23:52,734 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-03-04 16:23:52,734 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-03-04 16:23:52,735 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-03-04 16:23:52,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-03-04 16:23:52,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-03-04 16:23:52,735 INFO L87 Difference]: Start difference. First operand 213 states and 222 transitions. Second operand 5 states. [2019-03-04 16:23:52,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-03-04 16:23:52,893 INFO L93 Difference]: Finished difference Result 213 states and 222 transitions. [2019-03-04 16:23:52,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-03-04 16:23:52,896 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 5 [2019-03-04 16:23:52,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-03-04 16:23:52,897 INFO L225 Difference]: With dead ends: 213 [2019-03-04 16:23:52,898 INFO L226 Difference]: Without dead ends: 207 [2019-03-04 16:23:52,898 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-03-04 16:23:52,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2019-03-04 16:23:52,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 207. [2019-03-04 16:23:52,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 207 states. [2019-03-04 16:23:52,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 207 states to 207 states and 217 transitions. [2019-03-04 16:23:52,909 INFO L78 Accepts]: Start accepts. Automaton has 207 states and 217 transitions. Word has length 5 [2019-03-04 16:23:52,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-03-04 16:23:52,910 INFO L480 AbstractCegarLoop]: Abstraction has 207 states and 217 transitions. [2019-03-04 16:23:52,910 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-03-04 16:23:52,910 INFO L276 IsEmpty]: Start isEmpty. Operand 207 states and 217 transitions. [2019-03-04 16:23:52,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-03-04 16:23:52,911 INFO L394 BasicCegarLoop]: Found error trace [2019-03-04 16:23:52,911 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-03-04 16:23:52,914 INFO L423 AbstractCegarLoop]: === Iteration 10 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT]=== [2019-03-04 16:23:52,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-03-04 16:23:52,914 INFO L82 PathProgramCache]: Analyzing trace with hash 54428221, now seen corresponding path program 1 times [2019-03-04 16:23:52,915 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-03-04 16:23:52,915 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-03-04 16:23:52,916 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:52,916 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-03-04 16:23:52,917 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:52,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-03-04 16:23:53,159 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-03-04 16:23:53,159 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-03-04 16:23:53,159 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-03-04 16:23:53,160 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-03-04 16:23:53,160 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-03-04 16:23:53,160 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-03-04 16:23:53,163 INFO L87 Difference]: Start difference. First operand 207 states and 217 transitions. Second operand 5 states. [2019-03-04 16:23:53,465 WARN L181 SmtUtils]: Spent 105.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2019-03-04 16:23:53,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-03-04 16:23:53,637 INFO L93 Difference]: Finished difference Result 207 states and 217 transitions. [2019-03-04 16:23:53,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-03-04 16:23:53,637 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 5 [2019-03-04 16:23:53,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-03-04 16:23:53,639 INFO L225 Difference]: With dead ends: 207 [2019-03-04 16:23:53,640 INFO L226 Difference]: Without dead ends: 206 [2019-03-04 16:23:53,641 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-03-04 16:23:53,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2019-03-04 16:23:53,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 206. [2019-03-04 16:23:53,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2019-03-04 16:23:53,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 216 transitions. [2019-03-04 16:23:53,657 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 216 transitions. Word has length 5 [2019-03-04 16:23:53,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-03-04 16:23:53,658 INFO L480 AbstractCegarLoop]: Abstraction has 206 states and 216 transitions. [2019-03-04 16:23:53,658 INFO L481 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-03-04 16:23:53,658 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 216 transitions. [2019-03-04 16:23:53,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-03-04 16:23:53,659 INFO L394 BasicCegarLoop]: Found error trace [2019-03-04 16:23:53,662 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-03-04 16:23:53,664 INFO L423 AbstractCegarLoop]: === Iteration 11 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT]=== [2019-03-04 16:23:53,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-03-04 16:23:53,665 INFO L82 PathProgramCache]: Analyzing trace with hash 189939531, now seen corresponding path program 1 times [2019-03-04 16:23:53,665 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-03-04 16:23:53,665 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-03-04 16:23:53,669 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:53,669 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-03-04 16:23:53,669 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:53,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-03-04 16:23:53,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-03-04 16:23:53,811 INFO L312 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-03-04 16:23:53,812 INFO L327 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-03-04 16:23:53,812 INFO L459 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-03-04 16:23:53,812 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-03-04 16:23:53,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-03-04 16:23:53,813 INFO L87 Difference]: Start difference. First operand 206 states and 216 transitions. Second operand 4 states. [2019-03-04 16:23:53,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-03-04 16:23:53,979 INFO L93 Difference]: Finished difference Result 206 states and 216 transitions. [2019-03-04 16:23:53,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-03-04 16:23:53,980 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 5 [2019-03-04 16:23:53,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-03-04 16:23:53,981 INFO L225 Difference]: With dead ends: 206 [2019-03-04 16:23:53,982 INFO L226 Difference]: Without dead ends: 205 [2019-03-04 16:23:53,982 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-03-04 16:23:53,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2019-03-04 16:23:53,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 205. [2019-03-04 16:23:53,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 205 states. [2019-03-04 16:23:53,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 205 states to 205 states and 215 transitions. [2019-03-04 16:23:53,994 INFO L78 Accepts]: Start accepts. Automaton has 205 states and 215 transitions. Word has length 5 [2019-03-04 16:23:53,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-03-04 16:23:53,994 INFO L480 AbstractCegarLoop]: Abstraction has 205 states and 215 transitions. [2019-03-04 16:23:53,994 INFO L481 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-03-04 16:23:53,994 INFO L276 IsEmpty]: Start isEmpty. Operand 205 states and 215 transitions. [2019-03-04 16:23:53,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-03-04 16:23:53,995 INFO L394 BasicCegarLoop]: Found error trace [2019-03-04 16:23:53,995 INFO L402 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-03-04 16:23:53,996 INFO L423 AbstractCegarLoop]: === Iteration 12 === [void$SimpleFrame2Cons$3$$la$init$ra$$4885Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$actionPerformed$4553Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err4ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err3ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err6ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err11ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err27ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err16ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err9ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err14ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$$la$init$ra$$1805Err29ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$$la$init$ra$$1802Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err23ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err32ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err13ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err35ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err31ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err29ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err27ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err7ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err4ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err11ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err12ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err30ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err34ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err17ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err24ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err18ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err33ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err6ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err16ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$1$run$1803Err26ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err14ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err8ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err28ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err19ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err5ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err10ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err9ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err15ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err21ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err25ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err20ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$1$run$1803Err22ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$$la$init$ra$$4887Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$4$actionPerformed$4888Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, void$SimpleFrame2Cons$main$1804Err2ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$main$1804Err0ASSERT_VIOLATIONASSERT, void$SimpleFrame2Cons$2$$la$init$ra$$4552Err0ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr1ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr2ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr0ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr6ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr3ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr5ASSERT_VIOLATIONPRE_CONDITIONandASSERT, $EFG_ProcedureErr4ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr8ASSERT_VIOLATIONASSERT, $EFG_ProcedureErr7ASSERT_VIOLATIONPRE_CONDITIONandASSERT]=== [2019-03-04 16:23:53,996 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-03-04 16:23:53,997 INFO L82 PathProgramCache]: Analyzing trace with hash 33433511, now seen corresponding path program 1 times [2019-03-04 16:23:53,997 INFO L223 ckRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2019-03-04 16:23:53,997 INFO L69 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2019-03-04 16:23:53,998 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:53,998 INFO L103 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-03-04 16:23:53,999 INFO L119 rtionOrderModulation]: Craig_TreeInterpolation forces the order to NOT_INCREMENTALLY [2019-03-04 16:23:54,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-03-04 16:23:54,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-03-04 16:23:54,035 INFO L469 BasicCegarLoop]: Counterexample might be feasible [2019-03-04 16:23:54,055 INFO L202 PluginConnector]: Adding new model GuiTestExampleUnsafe.bpl de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 04.03 04:23:54 BoogieIcfgContainer [2019-03-04 16:23:54,056 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-03-04 16:23:54,057 INFO L168 Benchmark]: Toolchain (without parser) took 5271.98 ms. Allocated memory was 141.0 MB in the beginning and 203.9 MB in the end (delta: 62.9 MB). Free memory was 107.3 MB in the beginning and 118.1 MB in the end (delta: -10.9 MB). Peak memory consumption was 52.1 MB. Max. memory is 7.1 GB. [2019-03-04 16:23:54,058 INFO L168 Benchmark]: Boogie PL CUP Parser took 0.22 ms. Allocated memory is still 141.0 MB. Free memory is still 109.4 MB. There was no memory consumed. Max. memory is 7.1 GB. [2019-03-04 16:23:54,058 INFO L168 Benchmark]: Boogie Procedure Inliner took 113.42 ms. Allocated memory is still 141.0 MB. Free memory was 106.9 MB in the beginning and 102.7 MB in the end (delta: 4.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 7.1 GB. [2019-03-04 16:23:54,059 INFO L168 Benchmark]: Boogie Preprocessor took 70.05 ms. Allocated memory is still 141.0 MB. Free memory was 102.7 MB in the beginning and 100.1 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB. [2019-03-04 16:23:54,060 INFO L168 Benchmark]: RCFGBuilder took 1943.73 ms. Allocated memory was 141.0 MB in the beginning and 176.2 MB in the end (delta: 35.1 MB). Free memory was 100.1 MB in the beginning and 117.2 MB in the end (delta: -17.1 MB). Peak memory consumption was 46.1 MB. Max. memory is 7.1 GB. [2019-03-04 16:23:54,063 INFO L168 Benchmark]: TraceAbstraction took 3139.99 ms. Allocated memory was 176.2 MB in the beginning and 203.9 MB in the end (delta: 27.8 MB). Free memory was 116.2 MB in the beginning and 118.1 MB in the end (delta: -1.9 MB). Peak memory consumption was 25.8 MB. Max. memory is 7.1 GB. [2019-03-04 16:23:54,070 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * Boogie PL CUP Parser took 0.22 ms. Allocated memory is still 141.0 MB. Free memory is still 109.4 MB. There was no memory consumed. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 113.42 ms. Allocated memory is still 141.0 MB. Free memory was 106.9 MB in the beginning and 102.7 MB in the end (delta: 4.2 MB). Peak memory consumption was 4.2 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 70.05 ms. Allocated memory is still 141.0 MB. Free memory was 102.7 MB in the beginning and 100.1 MB in the end (delta: 2.5 MB). Peak memory consumption was 2.5 MB. Max. memory is 7.1 GB. * RCFGBuilder took 1943.73 ms. Allocated memory was 141.0 MB in the beginning and 176.2 MB in the end (delta: 35.1 MB). Free memory was 100.1 MB in the beginning and 117.2 MB in the end (delta: -17.1 MB). Peak memory consumption was 46.1 MB. Max. memory is 7.1 GB. * TraceAbstraction took 3139.99 ms. Allocated memory was 176.2 MB in the beginning and 203.9 MB in the end (delta: 27.8 MB). Free memory was 116.2 MB in the beginning and 118.1 MB in the end (delta: -1.9 MB). Peak memory consumption was 25.8 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 481]: assertion can be violated assertion can be violated We found a FailurePath: [L462-L464] requires void$SimpleFrame2Cons$2$actionPerformed$4553$__this != $null; [L474] r098 := void$SimpleFrame2Cons$2$actionPerformed$4553$__this; [L476] r199 := void$SimpleFrame2Cons$2$actionPerformed$4553$param_0; [L478] $r2102 := SimpleFrame2Cons$SimpleFrame2Cons$2$this$0711; [L390] r083 := $param_0; [L392] $r185 := javax.swing.JButton$SimpleFrame2Cons$event2227; [L394] __ret := $r185; [L481] assert $r3103 != $null; - StatisticsResult: Ultimate Automizer benchmark data CFG has 16 procedures, 304 locations, 87 error locations. UNSAFE Result, 3.0s OverallTime, 12 OverallIterations, 1 TraceHistogramMax, 1.4s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2614 SDtfs, 581 SDslu, 4627 SDs, 0 SdLazy, 50 SolverSat, 11 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=304occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 11 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 45 NumberOfCodeBlocks, 45 NumberOfCodeBlocksAsserted, 12 NumberOfCheckSat, 29 ConstructedInterpolants, 0 QuantifiedInterpolants, 306 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 11 InterpolantComputations, 11 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...