/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCInlineTransformed.xml -s ../../../trunk/examples/settings/automizer/BvToInt/svcomp-Reach-64bit-Automizer_BvToInt_LAZY.epf -i ../../../trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-a10ec3b [2022-01-10 20:04:34,341 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-01-10 20:04:34,342 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-01-10 20:04:34,373 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2022-01-10 20:04:34,374 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2022-01-10 20:04:34,374 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2022-01-10 20:04:34,375 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2022-01-10 20:04:34,377 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2022-01-10 20:04:34,378 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2022-01-10 20:04:34,385 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2022-01-10 20:04:34,386 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2022-01-10 20:04:34,387 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2022-01-10 20:04:34,387 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-01-10 20:04:34,388 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-01-10 20:04:34,388 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-01-10 20:04:34,389 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-01-10 20:04:34,400 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-01-10 20:04:34,402 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-01-10 20:04:34,405 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-01-10 20:04:34,406 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-01-10 20:04:34,407 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-01-10 20:04:34,408 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-01-10 20:04:34,408 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-01-10 20:04:34,409 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-01-10 20:04:34,410 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2022-01-10 20:04:34,410 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2022-01-10 20:04:34,411 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2022-01-10 20:04:34,411 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2022-01-10 20:04:34,411 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2022-01-10 20:04:34,412 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2022-01-10 20:04:34,412 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2022-01-10 20:04:34,413 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2022-01-10 20:04:34,413 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2022-01-10 20:04:34,413 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2022-01-10 20:04:34,414 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2022-01-10 20:04:34,414 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2022-01-10 20:04:34,415 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2022-01-10 20:04:34,415 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2022-01-10 20:04:34,415 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-01-10 20:04:34,416 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-01-10 20:04:34,416 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-01-10 20:04:34,420 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/BvToInt/svcomp-Reach-64bit-Automizer_BvToInt_LAZY.epf [2022-01-10 20:04:34,434 INFO L113 SettingsManager]: Loading preferences was successful [2022-01-10 20:04:34,434 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-01-10 20:04:34,434 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-01-10 20:04:34,434 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-01-10 20:04:34,435 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-01-10 20:04:34,435 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-01-10 20:04:34,435 INFO L138 SettingsManager]: * Use SBE=true [2022-01-10 20:04:34,435 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-01-10 20:04:34,436 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-01-10 20:04:34,436 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-01-10 20:04:34,436 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-01-10 20:04:34,436 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-01-10 20:04:34,436 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-01-10 20:04:34,436 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-01-10 20:04:34,436 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-01-10 20:04:34,436 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-01-10 20:04:34,436 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-01-10 20:04:34,436 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-01-10 20:04:34,437 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-01-10 20:04:34,437 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-01-10 20:04:34,437 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-01-10 20:04:34,437 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-01-10 20:04:34,437 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-01-10 20:04:34,437 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-01-10 20:04:34,437 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-01-10 20:04:34,437 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-01-10 20:04:34,437 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-01-10 20:04:34,437 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-01-10 20:04:34,438 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-01-10 20:04:34,438 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-01-10 20:04:34,438 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-01-10 20:04:34,438 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-01-10 20:04:34,438 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-01-10 20:04:34,438 INFO L138 SettingsManager]: * TransformationType=BV_TO_INT_LAZY WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-01-10 20:04:34,594 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-01-10 20:04:34,607 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-01-10 20:04:34,609 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-01-10 20:04:34,609 INFO L271 PluginConnector]: Initializing CDTParser... [2022-01-10 20:04:34,610 INFO L275 PluginConnector]: CDTParser initialized [2022-01-10 20:04:34,610 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c [2022-01-10 20:04:34,653 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/66321aa58/ad5dec27b1cb4e7db13b9d7c0ae26c5e/FLAGf64d64dcc [2022-01-10 20:04:35,052 INFO L306 CDTParser]: Found 1 translation units. [2022-01-10 20:04:35,053 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c [2022-01-10 20:04:35,069 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/66321aa58/ad5dec27b1cb4e7db13b9d7c0ae26c5e/FLAGf64d64dcc [2022-01-10 20:04:35,081 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/66321aa58/ad5dec27b1cb4e7db13b9d7c0ae26c5e [2022-01-10 20:04:35,084 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-01-10 20:04:35,086 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-01-10 20:04:35,089 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-01-10 20:04:35,090 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-01-10 20:04:35,092 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-01-10 20:04:35,092 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 08:04:35" (1/1) ... [2022-01-10 20:04:35,093 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4c1504b3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35, skipping insertion in model container [2022-01-10 20:04:35,093 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 08:04:35" (1/1) ... [2022-01-10 20:04:35,098 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-01-10 20:04:35,137 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-01-10 20:04:35,248 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[911,924] [2022-01-10 20:04:35,288 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[8416,8429] [2022-01-10 20:04:35,323 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-01-10 20:04:35,334 INFO L203 MainTranslator]: Completed pre-run [2022-01-10 20:04:35,341 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[911,924] [2022-01-10 20:04:35,354 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[8416,8429] [2022-01-10 20:04:35,385 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-01-10 20:04:35,397 INFO L208 MainTranslator]: Completed translation [2022-01-10 20:04:35,397 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35 WrapperNode [2022-01-10 20:04:35,397 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-01-10 20:04:35,398 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-01-10 20:04:35,398 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-01-10 20:04:35,398 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-01-10 20:04:35,402 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35" (1/1) ... [2022-01-10 20:04:35,419 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35" (1/1) ... [2022-01-10 20:04:35,455 INFO L137 Inliner]: procedures = 62, calls = 71, calls flagged for inlining = 66, calls inlined = 96, statements flattened = 1229 [2022-01-10 20:04:35,455 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-01-10 20:04:35,456 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-01-10 20:04:35,456 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-01-10 20:04:35,456 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-01-10 20:04:35,461 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35" (1/1) ... [2022-01-10 20:04:35,461 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35" (1/1) ... [2022-01-10 20:04:35,465 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35" (1/1) ... [2022-01-10 20:04:35,465 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35" (1/1) ... [2022-01-10 20:04:35,482 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35" (1/1) ... [2022-01-10 20:04:35,493 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35" (1/1) ... [2022-01-10 20:04:35,495 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35" (1/1) ... [2022-01-10 20:04:35,499 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-01-10 20:04:35,500 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-01-10 20:04:35,500 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-01-10 20:04:35,500 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-01-10 20:04:35,501 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35" (1/1) ... [2022-01-10 20:04:35,505 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-01-10 20:04:35,529 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-01-10 20:04:35,544 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-01-10 20:04:35,562 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-01-10 20:04:35,576 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-01-10 20:04:35,576 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2022-01-10 20:04:35,577 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-01-10 20:04:35,577 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-01-10 20:04:35,672 INFO L234 CfgBuilder]: Building ICFG [2022-01-10 20:04:35,673 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-01-10 20:04:36,256 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##107: assume !(1bv32 == ~q_free~0); [2022-01-10 20:04:36,256 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##106: assume 1bv32 == ~q_free~0;~c_dr_st~0 := 2bv32;~c_dr_pc~0 := 2bv32;~a_t~0 := do_read_c_~a~0#1; [2022-01-10 20:04:36,257 INFO L275 CfgBuilder]: Performing block encoding [2022-01-10 20:04:36,264 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-01-10 20:04:36,264 INFO L299 CfgBuilder]: Removed 10 assume(true) statements. [2022-01-10 20:04:36,265 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 08:04:36 BoogieIcfgContainer [2022-01-10 20:04:36,266 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-01-10 20:04:36,266 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-01-10 20:04:36,266 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-01-10 20:04:36,267 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-01-10 20:04:36,269 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 08:04:36" (1/1) ... [2022-01-10 20:04:36,449 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 10.01 08:04:36 BasicIcfg [2022-01-10 20:04:36,449 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-01-10 20:04:36,450 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-01-10 20:04:36,450 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-01-10 20:04:36,452 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-01-10 20:04:36,452 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 10.01 08:04:35" (1/4) ... [2022-01-10 20:04:36,453 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7ca77e33 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.01 08:04:36, skipping insertion in model container [2022-01-10 20:04:36,453 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:04:35" (2/4) ... [2022-01-10 20:04:36,453 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7ca77e33 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 10.01 08:04:36, skipping insertion in model container [2022-01-10 20:04:36,453 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 08:04:36" (3/4) ... [2022-01-10 20:04:36,453 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7ca77e33 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.01 08:04:36, skipping insertion in model container [2022-01-10 20:04:36,454 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 10.01 08:04:36" (4/4) ... [2022-01-10 20:04:36,454 INFO L111 eAbstractionObserver]: Analyzing ICFG pc_sfifo_3.cil+token_ring.03.cil-1.cTransformedIcfg [2022-01-10 20:04:36,458 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-01-10 20:04:36,458 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 4 error locations. [2022-01-10 20:04:36,503 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-01-10 20:04:36,507 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-01-10 20:04:36,507 INFO L340 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2022-01-10 20:04:36,538 INFO L276 IsEmpty]: Start isEmpty. Operand has 475 states, 470 states have (on average 1.5574468085106383) internal successors, (732), 474 states have internal predecessors, (732), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:36,545 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-01-10 20:04:36,545 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:36,546 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:36,547 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:36,553 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:36,554 INFO L85 PathProgramCache]: Analyzing trace with hash -656408781, now seen corresponding path program 1 times [2022-01-10 20:04:36,560 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:36,560 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [644882587] [2022-01-10 20:04:36,560 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:36,561 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:36,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:36,810 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:36,811 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:36,811 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [644882587] [2022-01-10 20:04:36,811 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [644882587] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:36,812 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:36,812 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:36,813 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [776277468] [2022-01-10 20:04:36,813 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:36,816 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:36,851 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:36,872 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:36,873 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:36,875 INFO L87 Difference]: Start difference. First operand has 475 states, 470 states have (on average 1.5574468085106383) internal successors, (732), 474 states have internal predecessors, (732), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:37,045 INFO L93 Difference]: Finished difference Result 1017 states and 1568 transitions. [2022-01-10 20:04:37,046 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:37,047 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-01-10 20:04:37,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:37,061 INFO L225 Difference]: With dead ends: 1017 [2022-01-10 20:04:37,061 INFO L226 Difference]: Without dead ends: 597 [2022-01-10 20:04:37,066 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:37,069 INFO L933 BasicCegarLoop]: 698 mSDtfsCounter, 185 mSDsluCounter, 666 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 185 SdHoareTripleChecker+Valid, 1364 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:37,070 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [185 Valid, 1364 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-01-10 20:04:37,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 597 states. [2022-01-10 20:04:37,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 597 to 593. [2022-01-10 20:04:37,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 593 states, 589 states have (on average 1.4923599320882852) internal successors, (879), 592 states have internal predecessors, (879), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 593 states to 593 states and 879 transitions. [2022-01-10 20:04:37,123 INFO L78 Accepts]: Start accepts. Automaton has 593 states and 879 transitions. Word has length 44 [2022-01-10 20:04:37,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:37,123 INFO L470 AbstractCegarLoop]: Abstraction has 593 states and 879 transitions. [2022-01-10 20:04:37,123 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,123 INFO L276 IsEmpty]: Start isEmpty. Operand 593 states and 879 transitions. [2022-01-10 20:04:37,124 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-01-10 20:04:37,125 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:37,125 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:37,125 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-01-10 20:04:37,125 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:37,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:37,126 INFO L85 PathProgramCache]: Analyzing trace with hash 841268019, now seen corresponding path program 1 times [2022-01-10 20:04:37,126 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:37,126 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1535034288] [2022-01-10 20:04:37,126 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:37,126 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:37,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:37,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:37,193 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:37,193 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1535034288] [2022-01-10 20:04:37,193 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1535034288] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:37,194 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:37,194 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:37,194 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1614647571] [2022-01-10 20:04:37,194 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:37,195 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:37,195 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:37,195 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:37,196 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:37,196 INFO L87 Difference]: Start difference. First operand 593 states and 879 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:37,245 INFO L93 Difference]: Finished difference Result 1011 states and 1484 transitions. [2022-01-10 20:04:37,246 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:37,246 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-01-10 20:04:37,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:37,249 INFO L225 Difference]: With dead ends: 1011 [2022-01-10 20:04:37,250 INFO L226 Difference]: Without dead ends: 771 [2022-01-10 20:04:37,251 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:37,252 INFO L933 BasicCegarLoop]: 683 mSDtfsCounter, 657 mSDsluCounter, 135 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 657 SdHoareTripleChecker+Valid, 818 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:37,253 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [657 Valid, 818 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:37,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 771 states. [2022-01-10 20:04:37,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 771 to 763. [2022-01-10 20:04:37,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 763 states, 759 states have (on average 1.4677206851119895) internal successors, (1114), 762 states have internal predecessors, (1114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 763 states to 763 states and 1114 transitions. [2022-01-10 20:04:37,292 INFO L78 Accepts]: Start accepts. Automaton has 763 states and 1114 transitions. Word has length 44 [2022-01-10 20:04:37,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:37,293 INFO L470 AbstractCegarLoop]: Abstraction has 763 states and 1114 transitions. [2022-01-10 20:04:37,294 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,296 INFO L276 IsEmpty]: Start isEmpty. Operand 763 states and 1114 transitions. [2022-01-10 20:04:37,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2022-01-10 20:04:37,305 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:37,305 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:37,305 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-01-10 20:04:37,305 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:37,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:37,306 INFO L85 PathProgramCache]: Analyzing trace with hash 2090937434, now seen corresponding path program 1 times [2022-01-10 20:04:37,306 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:37,306 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768643750] [2022-01-10 20:04:37,306 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:37,307 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:37,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:37,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:37,377 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:37,378 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1768643750] [2022-01-10 20:04:37,378 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1768643750] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:37,378 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:37,379 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:37,379 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [488603931] [2022-01-10 20:04:37,379 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:37,380 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:37,380 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:37,380 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:37,380 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:37,380 INFO L87 Difference]: Start difference. First operand 763 states and 1114 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:37,430 INFO L93 Difference]: Finished difference Result 1485 states and 2148 transitions. [2022-01-10 20:04:37,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:37,430 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 45 [2022-01-10 20:04:37,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:37,433 INFO L225 Difference]: With dead ends: 1485 [2022-01-10 20:04:37,433 INFO L226 Difference]: Without dead ends: 1089 [2022-01-10 20:04:37,437 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:37,439 INFO L933 BasicCegarLoop]: 677 mSDtfsCounter, 641 mSDsluCounter, 138 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 641 SdHoareTripleChecker+Valid, 815 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:37,440 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [641 Valid, 815 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:37,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1089 states. [2022-01-10 20:04:37,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1089 to 1081. [2022-01-10 20:04:37,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1081 states, 1077 states have (on average 1.436397400185701) internal successors, (1547), 1080 states have internal predecessors, (1547), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1081 states to 1081 states and 1547 transitions. [2022-01-10 20:04:37,467 INFO L78 Accepts]: Start accepts. Automaton has 1081 states and 1547 transitions. Word has length 45 [2022-01-10 20:04:37,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:37,467 INFO L470 AbstractCegarLoop]: Abstraction has 1081 states and 1547 transitions. [2022-01-10 20:04:37,468 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,468 INFO L276 IsEmpty]: Start isEmpty. Operand 1081 states and 1547 transitions. [2022-01-10 20:04:37,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-01-10 20:04:37,469 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:37,470 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:37,470 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-01-10 20:04:37,470 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:37,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:37,470 INFO L85 PathProgramCache]: Analyzing trace with hash -664596990, now seen corresponding path program 1 times [2022-01-10 20:04:37,470 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:37,471 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646365231] [2022-01-10 20:04:37,471 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:37,471 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:37,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:37,532 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-01-10 20:04:37,532 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:37,532 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [646365231] [2022-01-10 20:04:37,532 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [646365231] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:37,532 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:37,532 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:37,532 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [998526303] [2022-01-10 20:04:37,533 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:37,534 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:37,534 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:37,535 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:37,535 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:37,535 INFO L87 Difference]: Start difference. First operand 1081 states and 1547 transitions. Second operand has 3 states, 3 states have (on average 19.0) internal successors, (57), 3 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:37,594 INFO L93 Difference]: Finished difference Result 2449 states and 3449 transitions. [2022-01-10 20:04:37,595 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:37,595 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.0) internal successors, (57), 3 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 59 [2022-01-10 20:04:37,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:37,600 INFO L225 Difference]: With dead ends: 2449 [2022-01-10 20:04:37,600 INFO L226 Difference]: Without dead ends: 1753 [2022-01-10 20:04:37,603 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:37,608 INFO L933 BasicCegarLoop]: 680 mSDtfsCounter, 625 mSDsluCounter, 165 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 625 SdHoareTripleChecker+Valid, 845 SdHoareTripleChecker+Invalid, 26 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:37,609 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [625 Valid, 845 Invalid, 26 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:37,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1753 states. [2022-01-10 20:04:37,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1753 to 1749. [2022-01-10 20:04:37,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1749 states, 1745 states have (on average 1.394269340974212) internal successors, (2433), 1748 states have internal predecessors, (2433), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1749 states to 1749 states and 2433 transitions. [2022-01-10 20:04:37,713 INFO L78 Accepts]: Start accepts. Automaton has 1749 states and 2433 transitions. Word has length 59 [2022-01-10 20:04:37,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:37,714 INFO L470 AbstractCegarLoop]: Abstraction has 1749 states and 2433 transitions. [2022-01-10 20:04:37,714 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.0) internal successors, (57), 3 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,715 INFO L276 IsEmpty]: Start isEmpty. Operand 1749 states and 2433 transitions. [2022-01-10 20:04:37,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2022-01-10 20:04:37,716 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:37,716 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:37,716 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-01-10 20:04:37,716 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:37,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:37,717 INFO L85 PathProgramCache]: Analyzing trace with hash 289795486, now seen corresponding path program 1 times [2022-01-10 20:04:37,717 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:37,717 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1398042521] [2022-01-10 20:04:37,717 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:37,717 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:37,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:37,768 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:37,768 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:37,768 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1398042521] [2022-01-10 20:04:37,768 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1398042521] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:37,768 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:37,768 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:37,768 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178076321] [2022-01-10 20:04:37,769 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:37,769 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:37,769 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:37,769 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:37,769 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:37,769 INFO L87 Difference]: Start difference. First operand 1749 states and 2433 transitions. Second operand has 3 states, 3 states have (on average 20.333333333333332) internal successors, (61), 3 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,870 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:37,870 INFO L93 Difference]: Finished difference Result 4373 states and 6015 transitions. [2022-01-10 20:04:37,870 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:37,870 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.333333333333332) internal successors, (61), 3 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 61 [2022-01-10 20:04:37,871 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:37,879 INFO L225 Difference]: With dead ends: 4373 [2022-01-10 20:04:37,879 INFO L226 Difference]: Without dead ends: 3053 [2022-01-10 20:04:37,881 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:37,881 INFO L933 BasicCegarLoop]: 825 mSDtfsCounter, 146 mSDsluCounter, 667 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 146 SdHoareTripleChecker+Valid, 1492 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:37,881 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [146 Valid, 1492 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:37,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3053 states. [2022-01-10 20:04:37,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3053 to 3053. [2022-01-10 20:04:37,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3053 states, 3049 states have (on average 1.3647097408986553) internal successors, (4161), 3052 states have internal predecessors, (4161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3053 states to 3053 states and 4161 transitions. [2022-01-10 20:04:37,966 INFO L78 Accepts]: Start accepts. Automaton has 3053 states and 4161 transitions. Word has length 61 [2022-01-10 20:04:37,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:37,968 INFO L470 AbstractCegarLoop]: Abstraction has 3053 states and 4161 transitions. [2022-01-10 20:04:37,968 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.333333333333332) internal successors, (61), 3 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:37,968 INFO L276 IsEmpty]: Start isEmpty. Operand 3053 states and 4161 transitions. [2022-01-10 20:04:37,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-10 20:04:37,970 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:37,971 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:37,971 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-01-10 20:04:37,971 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:37,971 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:37,971 INFO L85 PathProgramCache]: Analyzing trace with hash -1863469026, now seen corresponding path program 1 times [2022-01-10 20:04:37,971 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:37,971 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [628122291] [2022-01-10 20:04:37,971 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:37,972 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:37,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:38,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:38,025 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:38,025 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [628122291] [2022-01-10 20:04:38,025 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [628122291] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:38,025 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:38,025 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-10 20:04:38,025 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [109352021] [2022-01-10 20:04:38,025 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:38,025 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:38,025 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:38,026 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:38,026 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:38,026 INFO L87 Difference]: Start difference. First operand 3053 states and 4161 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:38,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:38,147 INFO L93 Difference]: Finished difference Result 3612 states and 4996 transitions. [2022-01-10 20:04:38,147 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:38,148 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-10 20:04:38,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:38,158 INFO L225 Difference]: With dead ends: 3612 [2022-01-10 20:04:38,158 INFO L226 Difference]: Without dead ends: 3295 [2022-01-10 20:04:38,160 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:38,161 INFO L933 BasicCegarLoop]: 678 mSDtfsCounter, 626 mSDsluCounter, 396 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 626 SdHoareTripleChecker+Valid, 1074 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:38,161 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [626 Valid, 1074 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:38,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3295 states. [2022-01-10 20:04:38,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3295 to 3291. [2022-01-10 20:04:38,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.373592941892303) internal successors, (4515), 3290 states have internal predecessors, (4515), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:38,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4515 transitions. [2022-01-10 20:04:38,270 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4515 transitions. Word has length 66 [2022-01-10 20:04:38,272 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:38,272 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4515 transitions. [2022-01-10 20:04:38,272 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:38,272 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4515 transitions. [2022-01-10 20:04:38,274 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-10 20:04:38,274 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:38,275 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:38,275 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-01-10 20:04:38,275 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:38,275 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:38,275 INFO L85 PathProgramCache]: Analyzing trace with hash -598367170, now seen corresponding path program 1 times [2022-01-10 20:04:38,275 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:38,275 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [898364629] [2022-01-10 20:04:38,276 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:38,276 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:38,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:38,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:38,313 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:38,313 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [898364629] [2022-01-10 20:04:38,313 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [898364629] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:38,313 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:38,313 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-10 20:04:38,313 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [646159620] [2022-01-10 20:04:38,313 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:38,314 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:38,314 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:38,315 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:38,315 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:38,315 INFO L87 Difference]: Start difference. First operand 3291 states and 4515 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:38,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:38,423 INFO L93 Difference]: Finished difference Result 3845 states and 5343 transitions. [2022-01-10 20:04:38,424 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:38,424 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-10 20:04:38,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:38,433 INFO L225 Difference]: With dead ends: 3845 [2022-01-10 20:04:38,433 INFO L226 Difference]: Without dead ends: 3291 [2022-01-10 20:04:38,435 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:38,436 INFO L933 BasicCegarLoop]: 672 mSDtfsCounter, 666 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 666 SdHoareTripleChecker+Valid, 672 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:38,436 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [666 Valid, 672 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:38,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-10 20:04:38,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-10 20:04:38,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3711591116519624) internal successors, (4507), 3290 states have internal predecessors, (4507), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:38,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4507 transitions. [2022-01-10 20:04:38,531 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4507 transitions. Word has length 66 [2022-01-10 20:04:38,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:38,532 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4507 transitions. [2022-01-10 20:04:38,532 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:38,532 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4507 transitions. [2022-01-10 20:04:38,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-10 20:04:38,533 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:38,533 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:38,534 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-01-10 20:04:38,534 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:38,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:38,534 INFO L85 PathProgramCache]: Analyzing trace with hash -1943030754, now seen corresponding path program 1 times [2022-01-10 20:04:38,534 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:38,534 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1245812573] [2022-01-10 20:04:38,534 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:38,534 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:38,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:38,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:38,565 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:38,565 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1245812573] [2022-01-10 20:04:38,565 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1245812573] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:38,565 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:38,565 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-10 20:04:38,565 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2078250818] [2022-01-10 20:04:38,565 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:38,565 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:38,565 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:38,566 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:38,566 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:38,566 INFO L87 Difference]: Start difference. First operand 3291 states and 4507 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:38,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:38,676 INFO L93 Difference]: Finished difference Result 3844 states and 5326 transitions. [2022-01-10 20:04:38,676 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:38,677 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-10 20:04:38,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:38,685 INFO L225 Difference]: With dead ends: 3844 [2022-01-10 20:04:38,685 INFO L226 Difference]: Without dead ends: 3291 [2022-01-10 20:04:38,687 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:38,687 INFO L933 BasicCegarLoop]: 667 mSDtfsCounter, 660 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 660 SdHoareTripleChecker+Valid, 667 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:38,688 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [660 Valid, 667 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:38,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-10 20:04:38,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-10 20:04:38,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3687252814116215) internal successors, (4499), 3290 states have internal predecessors, (4499), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:38,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4499 transitions. [2022-01-10 20:04:38,805 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4499 transitions. Word has length 66 [2022-01-10 20:04:38,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:38,805 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4499 transitions. [2022-01-10 20:04:38,805 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:38,805 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4499 transitions. [2022-01-10 20:04:38,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-10 20:04:38,807 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:38,807 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:38,807 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-01-10 20:04:38,807 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:38,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:38,808 INFO L85 PathProgramCache]: Analyzing trace with hash -1293670338, now seen corresponding path program 1 times [2022-01-10 20:04:38,808 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:38,808 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [180133870] [2022-01-10 20:04:38,808 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:38,808 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:38,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:38,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:38,839 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:38,839 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [180133870] [2022-01-10 20:04:38,839 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [180133870] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:38,839 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:38,840 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-10 20:04:38,840 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1507448378] [2022-01-10 20:04:38,840 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:38,840 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:38,841 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:38,841 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:38,841 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:38,841 INFO L87 Difference]: Start difference. First operand 3291 states and 4499 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:38,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:38,936 INFO L93 Difference]: Finished difference Result 3843 states and 5309 transitions. [2022-01-10 20:04:38,936 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:38,936 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-10 20:04:38,936 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:38,944 INFO L225 Difference]: With dead ends: 3843 [2022-01-10 20:04:38,945 INFO L226 Difference]: Without dead ends: 3291 [2022-01-10 20:04:38,946 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:38,948 INFO L933 BasicCegarLoop]: 662 mSDtfsCounter, 654 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 654 SdHoareTripleChecker+Valid, 662 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:38,948 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [654 Valid, 662 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:38,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-10 20:04:39,051 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-10 20:04:39,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3662914511712807) internal successors, (4491), 3290 states have internal predecessors, (4491), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:39,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4491 transitions. [2022-01-10 20:04:39,060 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4491 transitions. Word has length 66 [2022-01-10 20:04:39,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:39,060 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4491 transitions. [2022-01-10 20:04:39,061 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:39,061 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4491 transitions. [2022-01-10 20:04:39,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-10 20:04:39,066 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:39,066 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:39,066 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-01-10 20:04:39,066 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:39,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:39,066 INFO L85 PathProgramCache]: Analyzing trace with hash 666939422, now seen corresponding path program 1 times [2022-01-10 20:04:39,066 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:39,067 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [510315143] [2022-01-10 20:04:39,067 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:39,067 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:39,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:39,091 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:39,091 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:39,091 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [510315143] [2022-01-10 20:04:39,091 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [510315143] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:39,091 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:39,091 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-10 20:04:39,091 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1090333401] [2022-01-10 20:04:39,091 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:39,092 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:39,092 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:39,092 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:39,092 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:39,092 INFO L87 Difference]: Start difference. First operand 3291 states and 4491 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:39,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:39,183 INFO L93 Difference]: Finished difference Result 3842 states and 5292 transitions. [2022-01-10 20:04:39,184 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:39,184 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-10 20:04:39,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:39,195 INFO L225 Difference]: With dead ends: 3842 [2022-01-10 20:04:39,195 INFO L226 Difference]: Without dead ends: 3291 [2022-01-10 20:04:39,196 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:39,198 INFO L933 BasicCegarLoop]: 645 mSDtfsCounter, 600 mSDsluCounter, 38 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 600 SdHoareTripleChecker+Valid, 683 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:39,198 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [600 Valid, 683 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:39,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-10 20:04:39,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-10 20:04:39,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3608153331305142) internal successors, (4473), 3290 states have internal predecessors, (4473), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:39,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4473 transitions. [2022-01-10 20:04:39,297 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4473 transitions. Word has length 66 [2022-01-10 20:04:39,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:39,298 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4473 transitions. [2022-01-10 20:04:39,298 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:39,298 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4473 transitions. [2022-01-10 20:04:39,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-10 20:04:39,299 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:39,300 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:39,300 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-01-10 20:04:39,300 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:39,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:39,301 INFO L85 PathProgramCache]: Analyzing trace with hash 195882429, now seen corresponding path program 1 times [2022-01-10 20:04:39,301 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:39,301 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481015693] [2022-01-10 20:04:39,301 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:39,301 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:39,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:39,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:39,323 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:39,323 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1481015693] [2022-01-10 20:04:39,323 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1481015693] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:39,323 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:39,324 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-10 20:04:39,324 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1592530268] [2022-01-10 20:04:39,324 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:39,324 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:39,324 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:39,325 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:39,325 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:39,325 INFO L87 Difference]: Start difference. First operand 3291 states and 4473 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:39,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:39,433 INFO L93 Difference]: Finished difference Result 3841 states and 5255 transitions. [2022-01-10 20:04:39,433 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:39,434 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-10 20:04:39,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:39,453 INFO L225 Difference]: With dead ends: 3841 [2022-01-10 20:04:39,453 INFO L226 Difference]: Without dead ends: 3291 [2022-01-10 20:04:39,455 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:39,456 INFO L933 BasicCegarLoop]: 634 mSDtfsCounter, 589 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 589 SdHoareTripleChecker+Valid, 671 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:39,456 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [589 Valid, 671 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:39,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-10 20:04:39,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-10 20:04:39,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3553392150897474) internal successors, (4455), 3290 states have internal predecessors, (4455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:39,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4455 transitions. [2022-01-10 20:04:39,566 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4455 transitions. Word has length 66 [2022-01-10 20:04:39,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:39,566 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4455 transitions. [2022-01-10 20:04:39,566 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:39,566 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4455 transitions. [2022-01-10 20:04:39,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-10 20:04:39,568 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:39,568 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:39,568 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-01-10 20:04:39,569 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:39,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:39,569 INFO L85 PathProgramCache]: Analyzing trace with hash 1319500380, now seen corresponding path program 1 times [2022-01-10 20:04:39,569 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:39,569 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757006783] [2022-01-10 20:04:39,569 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:39,569 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:39,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:39,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:39,591 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:39,591 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1757006783] [2022-01-10 20:04:39,591 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1757006783] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:39,591 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:39,591 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-10 20:04:39,591 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2070857590] [2022-01-10 20:04:39,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:39,591 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:39,592 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:39,592 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:39,592 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:39,592 INFO L87 Difference]: Start difference. First operand 3291 states and 4455 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:39,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:39,717 INFO L93 Difference]: Finished difference Result 3840 states and 5218 transitions. [2022-01-10 20:04:39,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:39,717 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-10 20:04:39,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:39,722 INFO L225 Difference]: With dead ends: 3840 [2022-01-10 20:04:39,722 INFO L226 Difference]: Without dead ends: 3291 [2022-01-10 20:04:39,723 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:39,724 INFO L933 BasicCegarLoop]: 623 mSDtfsCounter, 578 mSDsluCounter, 36 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 578 SdHoareTripleChecker+Valid, 659 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:39,724 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [578 Valid, 659 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:39,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-10 20:04:39,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-10 20:04:39,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3498630970489809) internal successors, (4437), 3290 states have internal predecessors, (4437), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:39,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4437 transitions. [2022-01-10 20:04:39,817 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4437 transitions. Word has length 66 [2022-01-10 20:04:39,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:39,818 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4437 transitions. [2022-01-10 20:04:39,818 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:39,818 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4437 transitions. [2022-01-10 20:04:39,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-10 20:04:39,820 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:39,820 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:39,820 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-01-10 20:04:39,820 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:39,820 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:39,820 INFO L85 PathProgramCache]: Analyzing trace with hash -1862697348, now seen corresponding path program 1 times [2022-01-10 20:04:39,820 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:39,820 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1844362159] [2022-01-10 20:04:39,821 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:39,821 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:39,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:39,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:39,846 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:39,846 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1844362159] [2022-01-10 20:04:39,846 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1844362159] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:39,846 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:39,846 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-10 20:04:39,847 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [495781223] [2022-01-10 20:04:39,847 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:39,847 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:39,847 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:39,847 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:39,847 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:39,847 INFO L87 Difference]: Start difference. First operand 3291 states and 4437 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:39,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:39,946 INFO L93 Difference]: Finished difference Result 3839 states and 5181 transitions. [2022-01-10 20:04:39,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:39,946 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-10 20:04:39,947 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:39,976 INFO L225 Difference]: With dead ends: 3839 [2022-01-10 20:04:39,977 INFO L226 Difference]: Without dead ends: 3291 [2022-01-10 20:04:39,978 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:39,978 INFO L933 BasicCegarLoop]: 612 mSDtfsCounter, 567 mSDsluCounter, 35 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 567 SdHoareTripleChecker+Valid, 647 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:39,979 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [567 Valid, 647 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:39,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-10 20:04:40,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-10 20:04:40,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3443869790082141) internal successors, (4419), 3290 states have internal predecessors, (4419), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:40,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4419 transitions. [2022-01-10 20:04:40,113 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4419 transitions. Word has length 66 [2022-01-10 20:04:40,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:40,114 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4419 transitions. [2022-01-10 20:04:40,114 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:40,114 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4419 transitions. [2022-01-10 20:04:40,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-10 20:04:40,116 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:40,116 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:40,116 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-01-10 20:04:40,116 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:40,117 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:40,117 INFO L85 PathProgramCache]: Analyzing trace with hash -1686828100, now seen corresponding path program 1 times [2022-01-10 20:04:40,117 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:40,117 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [398685287] [2022-01-10 20:04:40,117 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:40,117 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:40,129 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:40,158 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:40,158 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:40,158 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [398685287] [2022-01-10 20:04:40,158 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [398685287] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:40,159 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:40,159 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-01-10 20:04:40,159 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1243924786] [2022-01-10 20:04:40,159 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:40,159 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-01-10 20:04:40,159 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:40,159 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-01-10 20:04:40,160 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-01-10 20:04:40,160 INFO L87 Difference]: Start difference. First operand 3291 states and 4419 transitions. Second operand has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:40,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:40,314 INFO L93 Difference]: Finished difference Result 4162 states and 5599 transitions. [2022-01-10 20:04:40,314 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-01-10 20:04:40,314 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-10 20:04:40,315 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:40,320 INFO L225 Difference]: With dead ends: 4162 [2022-01-10 20:04:40,320 INFO L226 Difference]: Without dead ends: 3621 [2022-01-10 20:04:40,321 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-01-10 20:04:40,321 INFO L933 BasicCegarLoop]: 657 mSDtfsCounter, 1154 mSDsluCounter, 1280 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1154 SdHoareTripleChecker+Valid, 1937 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:40,322 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1154 Valid, 1937 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:40,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3621 states. [2022-01-10 20:04:40,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3621 to 3297. [2022-01-10 20:04:40,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3297 states, 3293 states have (on average 1.3407227452171273) internal successors, (4415), 3296 states have internal predecessors, (4415), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:40,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3297 states to 3297 states and 4415 transitions. [2022-01-10 20:04:40,437 INFO L78 Accepts]: Start accepts. Automaton has 3297 states and 4415 transitions. Word has length 66 [2022-01-10 20:04:40,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:40,438 INFO L470 AbstractCegarLoop]: Abstraction has 3297 states and 4415 transitions. [2022-01-10 20:04:40,438 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:40,438 INFO L276 IsEmpty]: Start isEmpty. Operand 3297 states and 4415 transitions. [2022-01-10 20:04:40,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-10 20:04:40,440 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:40,440 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:40,440 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-01-10 20:04:40,440 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:40,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:40,440 INFO L85 PathProgramCache]: Analyzing trace with hash -2135524739, now seen corresponding path program 1 times [2022-01-10 20:04:40,440 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:40,440 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1419813058] [2022-01-10 20:04:40,441 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:40,441 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:40,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:40,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:40,469 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:40,469 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1419813058] [2022-01-10 20:04:40,469 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1419813058] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:40,469 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:40,469 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-01-10 20:04:40,469 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1603693572] [2022-01-10 20:04:40,470 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:40,470 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-01-10 20:04:40,470 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:40,470 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-01-10 20:04:40,470 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-01-10 20:04:40,470 INFO L87 Difference]: Start difference. First operand 3297 states and 4415 transitions. Second operand has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:40,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:40,620 INFO L93 Difference]: Finished difference Result 4250 states and 5684 transitions. [2022-01-10 20:04:40,621 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-01-10 20:04:40,621 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-10 20:04:40,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:40,627 INFO L225 Difference]: With dead ends: 4250 [2022-01-10 20:04:40,627 INFO L226 Difference]: Without dead ends: 3717 [2022-01-10 20:04:40,629 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-01-10 20:04:40,629 INFO L933 BasicCegarLoop]: 615 mSDtfsCounter, 980 mSDsluCounter, 1532 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 980 SdHoareTripleChecker+Valid, 2147 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:40,629 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [980 Valid, 2147 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:40,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3717 states. [2022-01-10 20:04:40,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3717 to 3303. [2022-01-10 20:04:40,746 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3303 states, 3299 states have (on average 1.3370718399515005) internal successors, (4411), 3302 states have internal predecessors, (4411), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:40,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3303 states to 3303 states and 4411 transitions. [2022-01-10 20:04:40,750 INFO L78 Accepts]: Start accepts. Automaton has 3303 states and 4411 transitions. Word has length 66 [2022-01-10 20:04:40,750 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:40,750 INFO L470 AbstractCegarLoop]: Abstraction has 3303 states and 4411 transitions. [2022-01-10 20:04:40,750 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:40,750 INFO L276 IsEmpty]: Start isEmpty. Operand 3303 states and 4411 transitions. [2022-01-10 20:04:40,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-10 20:04:40,753 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:40,753 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:40,753 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-01-10 20:04:40,753 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:40,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:40,753 INFO L85 PathProgramCache]: Analyzing trace with hash -1784724802, now seen corresponding path program 1 times [2022-01-10 20:04:40,753 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:40,753 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [806538780] [2022-01-10 20:04:40,753 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:40,754 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:40,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:40,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:40,787 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:40,787 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [806538780] [2022-01-10 20:04:40,789 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [806538780] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:40,789 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:40,789 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-01-10 20:04:40,789 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1278820918] [2022-01-10 20:04:40,789 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:40,789 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-01-10 20:04:40,789 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:40,789 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-01-10 20:04:40,790 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-01-10 20:04:40,790 INFO L87 Difference]: Start difference. First operand 3303 states and 4411 transitions. Second operand has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:40,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:40,940 INFO L93 Difference]: Finished difference Result 4303 states and 5722 transitions. [2022-01-10 20:04:40,941 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-01-10 20:04:40,941 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-10 20:04:40,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:40,946 INFO L225 Difference]: With dead ends: 4303 [2022-01-10 20:04:40,947 INFO L226 Difference]: Without dead ends: 3771 [2022-01-10 20:04:40,948 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-01-10 20:04:40,948 INFO L933 BasicCegarLoop]: 589 mSDtfsCounter, 888 mSDsluCounter, 1469 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 888 SdHoareTripleChecker+Valid, 2058 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:40,949 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [888 Valid, 2058 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:40,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3771 states. [2022-01-10 20:04:41,073 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3771 to 3309. [2022-01-10 20:04:41,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3309 states, 3305 states have (on average 1.3334341906202722) internal successors, (4407), 3308 states have internal predecessors, (4407), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:41,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3309 states to 3309 states and 4407 transitions. [2022-01-10 20:04:41,079 INFO L78 Accepts]: Start accepts. Automaton has 3309 states and 4407 transitions. Word has length 66 [2022-01-10 20:04:41,079 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:41,079 INFO L470 AbstractCegarLoop]: Abstraction has 3309 states and 4407 transitions. [2022-01-10 20:04:41,080 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:41,080 INFO L276 IsEmpty]: Start isEmpty. Operand 3309 states and 4407 transitions. [2022-01-10 20:04:41,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-10 20:04:41,081 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:41,081 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:41,081 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-01-10 20:04:41,082 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:41,082 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:41,082 INFO L85 PathProgramCache]: Analyzing trace with hash 433033151, now seen corresponding path program 1 times [2022-01-10 20:04:41,082 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:41,082 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1072967646] [2022-01-10 20:04:41,082 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:41,082 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:41,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:41,122 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:41,123 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:41,123 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1072967646] [2022-01-10 20:04:41,123 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1072967646] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:41,123 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:41,123 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-10 20:04:41,123 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [547390827] [2022-01-10 20:04:41,123 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:41,123 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:41,123 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:41,124 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:41,124 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:41,124 INFO L87 Difference]: Start difference. First operand 3309 states and 4407 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:41,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:41,251 INFO L93 Difference]: Finished difference Result 4363 states and 5737 transitions. [2022-01-10 20:04:41,251 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:41,252 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-10 20:04:41,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:41,257 INFO L225 Difference]: With dead ends: 4363 [2022-01-10 20:04:41,257 INFO L226 Difference]: Without dead ends: 3799 [2022-01-10 20:04:41,259 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:41,259 INFO L933 BasicCegarLoop]: 595 mSDtfsCounter, 508 mSDsluCounter, 330 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 508 SdHoareTripleChecker+Valid, 925 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:41,259 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [508 Valid, 925 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:41,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3799 states. [2022-01-10 20:04:41,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3799 to 3745. [2022-01-10 20:04:41,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3745 states, 3741 states have (on average 1.322373696872494) internal successors, (4947), 3744 states have internal predecessors, (4947), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:41,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3745 states to 3745 states and 4947 transitions. [2022-01-10 20:04:41,413 INFO L78 Accepts]: Start accepts. Automaton has 3745 states and 4947 transitions. Word has length 66 [2022-01-10 20:04:41,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:41,414 INFO L470 AbstractCegarLoop]: Abstraction has 3745 states and 4947 transitions. [2022-01-10 20:04:41,414 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:41,414 INFO L276 IsEmpty]: Start isEmpty. Operand 3745 states and 4947 transitions. [2022-01-10 20:04:41,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2022-01-10 20:04:41,418 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:41,418 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:41,418 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-01-10 20:04:41,419 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:41,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:41,419 INFO L85 PathProgramCache]: Analyzing trace with hash -1440257348, now seen corresponding path program 1 times [2022-01-10 20:04:41,419 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:41,419 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [553052573] [2022-01-10 20:04:41,419 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:41,419 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:41,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:41,452 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-01-10 20:04:41,452 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:41,452 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [553052573] [2022-01-10 20:04:41,452 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [553052573] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:41,453 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:41,453 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:41,453 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1263760618] [2022-01-10 20:04:41,453 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:41,453 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:41,453 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:41,453 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:41,453 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:41,454 INFO L87 Difference]: Start difference. First operand 3745 states and 4947 transitions. Second operand has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:41,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:41,716 INFO L93 Difference]: Finished difference Result 8825 states and 11831 transitions. [2022-01-10 20:04:41,716 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:41,716 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 103 [2022-01-10 20:04:41,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:41,727 INFO L225 Difference]: With dead ends: 8825 [2022-01-10 20:04:41,727 INFO L226 Difference]: Without dead ends: 6285 [2022-01-10 20:04:41,732 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:41,732 INFO L933 BasicCegarLoop]: 600 mSDtfsCounter, 131 mSDsluCounter, 553 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 131 SdHoareTripleChecker+Valid, 1153 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:41,732 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [131 Valid, 1153 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:41,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6285 states. [2022-01-10 20:04:41,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6285 to 6281. [2022-01-10 20:04:41,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6281 states, 6277 states have (on average 1.3259518878445118) internal successors, (8323), 6280 states have internal predecessors, (8323), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:41,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6281 states to 6281 states and 8323 transitions. [2022-01-10 20:04:41,987 INFO L78 Accepts]: Start accepts. Automaton has 6281 states and 8323 transitions. Word has length 103 [2022-01-10 20:04:41,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:41,987 INFO L470 AbstractCegarLoop]: Abstraction has 6281 states and 8323 transitions. [2022-01-10 20:04:41,988 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:41,988 INFO L276 IsEmpty]: Start isEmpty. Operand 6281 states and 8323 transitions. [2022-01-10 20:04:41,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-01-10 20:04:41,994 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:41,994 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:41,994 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-01-10 20:04:41,994 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:41,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:41,994 INFO L85 PathProgramCache]: Analyzing trace with hash 1578774055, now seen corresponding path program 1 times [2022-01-10 20:04:41,994 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:41,995 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [655729011] [2022-01-10 20:04:41,995 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:41,995 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:42,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:42,022 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:42,022 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:42,023 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [655729011] [2022-01-10 20:04:42,023 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [655729011] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:42,023 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:42,023 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:42,023 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [806871191] [2022-01-10 20:04:42,023 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:42,023 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:42,023 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:42,023 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:42,023 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:42,024 INFO L87 Difference]: Start difference. First operand 6281 states and 8323 transitions. Second operand has 3 states, 3 states have (on average 34.666666666666664) internal successors, (104), 3 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:42,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:42,227 INFO L93 Difference]: Finished difference Result 8849 states and 11827 transitions. [2022-01-10 20:04:42,228 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:42,228 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 34.666666666666664) internal successors, (104), 3 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-01-10 20:04:42,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:42,230 INFO L225 Difference]: With dead ends: 8849 [2022-01-10 20:04:42,230 INFO L226 Difference]: Without dead ends: 1020 [2022-01-10 20:04:42,236 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:42,237 INFO L933 BasicCegarLoop]: 706 mSDtfsCounter, 112 mSDsluCounter, 569 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 112 SdHoareTripleChecker+Valid, 1275 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:42,237 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [112 Valid, 1275 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:42,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1020 states. [2022-01-10 20:04:42,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1020 to 1020. [2022-01-10 20:04:42,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1020 states, 1018 states have (on average 1.2544204322200392) internal successors, (1277), 1019 states have internal predecessors, (1277), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:42,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1020 states to 1020 states and 1277 transitions. [2022-01-10 20:04:42,279 INFO L78 Accepts]: Start accepts. Automaton has 1020 states and 1277 transitions. Word has length 104 [2022-01-10 20:04:42,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:42,279 INFO L470 AbstractCegarLoop]: Abstraction has 1020 states and 1277 transitions. [2022-01-10 20:04:42,279 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 34.666666666666664) internal successors, (104), 3 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:42,279 INFO L276 IsEmpty]: Start isEmpty. Operand 1020 states and 1277 transitions. [2022-01-10 20:04:42,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2022-01-10 20:04:42,280 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:42,280 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:42,280 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-01-10 20:04:42,280 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:42,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:42,281 INFO L85 PathProgramCache]: Analyzing trace with hash 460040544, now seen corresponding path program 1 times [2022-01-10 20:04:42,281 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:42,281 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [744328851] [2022-01-10 20:04:42,282 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:42,282 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:42,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:42,321 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:42,321 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:42,321 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [744328851] [2022-01-10 20:04:42,321 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [744328851] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:42,321 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:42,321 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:42,321 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [159433262] [2022-01-10 20:04:42,321 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:42,322 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:42,322 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:42,322 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:42,322 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:42,322 INFO L87 Difference]: Start difference. First operand 1020 states and 1277 transitions. Second operand has 3 states, 3 states have (on average 35.333333333333336) internal successors, (106), 3 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:42,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:42,427 INFO L93 Difference]: Finished difference Result 2920 states and 3670 transitions. [2022-01-10 20:04:42,427 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:42,428 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 35.333333333333336) internal successors, (106), 3 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 106 [2022-01-10 20:04:42,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:42,430 INFO L225 Difference]: With dead ends: 2920 [2022-01-10 20:04:42,430 INFO L226 Difference]: Without dead ends: 1926 [2022-01-10 20:04:42,431 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:42,432 INFO L933 BasicCegarLoop]: 399 mSDtfsCounter, 335 mSDsluCounter, 330 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 335 SdHoareTripleChecker+Valid, 729 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:42,432 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [335 Valid, 729 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:42,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1926 states. [2022-01-10 20:04:42,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1926 to 1822. [2022-01-10 20:04:42,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1822 states, 1820 states have (on average 1.2532967032967033) internal successors, (2281), 1821 states have internal predecessors, (2281), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:42,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1822 states to 1822 states and 2281 transitions. [2022-01-10 20:04:42,512 INFO L78 Accepts]: Start accepts. Automaton has 1822 states and 2281 transitions. Word has length 106 [2022-01-10 20:04:42,512 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:42,512 INFO L470 AbstractCegarLoop]: Abstraction has 1822 states and 2281 transitions. [2022-01-10 20:04:42,513 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 35.333333333333336) internal successors, (106), 3 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:42,513 INFO L276 IsEmpty]: Start isEmpty. Operand 1822 states and 2281 transitions. [2022-01-10 20:04:42,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2022-01-10 20:04:42,514 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:42,514 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:42,514 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-01-10 20:04:42,514 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:42,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:42,514 INFO L85 PathProgramCache]: Analyzing trace with hash -58461857, now seen corresponding path program 1 times [2022-01-10 20:04:42,514 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:42,514 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1295445397] [2022-01-10 20:04:42,514 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:42,515 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:42,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:42,546 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:42,546 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:42,546 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1295445397] [2022-01-10 20:04:42,546 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1295445397] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:42,546 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:42,546 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:42,546 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [503364602] [2022-01-10 20:04:42,546 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:42,547 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:42,547 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:42,548 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:42,548 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:42,548 INFO L87 Difference]: Start difference. First operand 1822 states and 2281 transitions. Second operand has 3 states, 3 states have (on average 35.333333333333336) internal successors, (106), 3 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:42,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:42,705 INFO L93 Difference]: Finished difference Result 5275 states and 6565 transitions. [2022-01-10 20:04:42,705 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:42,705 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 35.333333333333336) internal successors, (106), 3 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 106 [2022-01-10 20:04:42,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:42,715 INFO L225 Difference]: With dead ends: 5275 [2022-01-10 20:04:42,715 INFO L226 Difference]: Without dead ends: 3507 [2022-01-10 20:04:42,718 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:42,719 INFO L933 BasicCegarLoop]: 490 mSDtfsCounter, 344 mSDsluCounter, 381 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 344 SdHoareTripleChecker+Valid, 871 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:42,719 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [344 Valid, 871 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:42,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3507 states. [2022-01-10 20:04:42,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3507 to 3419. [2022-01-10 20:04:42,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3419 states, 3417 states have (on average 1.2323675738952298) internal successors, (4211), 3418 states have internal predecessors, (4211), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:42,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3419 states to 3419 states and 4211 transitions. [2022-01-10 20:04:42,906 INFO L78 Accepts]: Start accepts. Automaton has 3419 states and 4211 transitions. Word has length 106 [2022-01-10 20:04:42,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:42,906 INFO L470 AbstractCegarLoop]: Abstraction has 3419 states and 4211 transitions. [2022-01-10 20:04:42,906 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 35.333333333333336) internal successors, (106), 3 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:42,907 INFO L276 IsEmpty]: Start isEmpty. Operand 3419 states and 4211 transitions. [2022-01-10 20:04:42,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2022-01-10 20:04:42,908 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:42,908 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:42,908 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-01-10 20:04:42,909 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:42,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:42,909 INFO L85 PathProgramCache]: Analyzing trace with hash -892864384, now seen corresponding path program 1 times [2022-01-10 20:04:42,909 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:42,909 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100720843] [2022-01-10 20:04:42,909 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:42,909 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:42,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:42,928 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-01-10 20:04:42,928 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:42,929 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1100720843] [2022-01-10 20:04:42,929 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1100720843] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:42,929 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:42,929 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:42,929 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [232113526] [2022-01-10 20:04:42,929 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:42,929 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:42,929 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:42,929 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:42,930 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:42,930 INFO L87 Difference]: Start difference. First operand 3419 states and 4211 transitions. Second operand has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:43,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:43,072 INFO L93 Difference]: Finished difference Result 6761 states and 8335 transitions. [2022-01-10 20:04:43,073 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:43,073 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 106 [2022-01-10 20:04:43,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:43,079 INFO L225 Difference]: With dead ends: 6761 [2022-01-10 20:04:43,079 INFO L226 Difference]: Without dead ends: 3372 [2022-01-10 20:04:43,082 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:43,083 INFO L933 BasicCegarLoop]: 406 mSDtfsCounter, 401 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 401 SdHoareTripleChecker+Valid, 407 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:43,083 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [401 Valid, 407 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:43,085 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3372 states. [2022-01-10 20:04:43,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3372 to 3372. [2022-01-10 20:04:43,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3372 states, 3370 states have (on average 1.2338278931750741) internal successors, (4158), 3371 states have internal predecessors, (4158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:43,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3372 states to 3372 states and 4158 transitions. [2022-01-10 20:04:43,239 INFO L78 Accepts]: Start accepts. Automaton has 3372 states and 4158 transitions. Word has length 106 [2022-01-10 20:04:43,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:43,239 INFO L470 AbstractCegarLoop]: Abstraction has 3372 states and 4158 transitions. [2022-01-10 20:04:43,240 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:43,240 INFO L276 IsEmpty]: Start isEmpty. Operand 3372 states and 4158 transitions. [2022-01-10 20:04:43,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2022-01-10 20:04:43,241 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:43,241 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:43,241 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-01-10 20:04:43,242 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:43,242 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:43,242 INFO L85 PathProgramCache]: Analyzing trace with hash 1797032049, now seen corresponding path program 1 times [2022-01-10 20:04:43,242 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:43,242 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905383451] [2022-01-10 20:04:43,242 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:43,242 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:43,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:43,272 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:43,272 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:43,273 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905383451] [2022-01-10 20:04:43,273 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [905383451] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:43,273 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:43,273 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:43,273 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1496123158] [2022-01-10 20:04:43,274 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:43,274 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:43,274 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:43,274 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:43,274 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:43,274 INFO L87 Difference]: Start difference. First operand 3372 states and 4158 transitions. Second operand has 3 states, 3 states have (on average 35.666666666666664) internal successors, (107), 3 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:43,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:43,612 INFO L93 Difference]: Finished difference Result 9422 states and 11604 transitions. [2022-01-10 20:04:43,612 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:43,612 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 35.666666666666664) internal successors, (107), 3 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 107 [2022-01-10 20:04:43,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:43,621 INFO L225 Difference]: With dead ends: 9422 [2022-01-10 20:04:43,621 INFO L226 Difference]: Without dead ends: 6104 [2022-01-10 20:04:43,625 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:43,625 INFO L933 BasicCegarLoop]: 516 mSDtfsCounter, 260 mSDsluCounter, 385 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 260 SdHoareTripleChecker+Valid, 901 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:43,626 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [260 Valid, 901 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:43,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6104 states. [2022-01-10 20:04:43,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6104 to 6100. [2022-01-10 20:04:43,978 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6100 states, 6098 states have (on average 1.2240078714332567) internal successors, (7464), 6099 states have internal predecessors, (7464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:43,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6100 states to 6100 states and 7464 transitions. [2022-01-10 20:04:43,984 INFO L78 Accepts]: Start accepts. Automaton has 6100 states and 7464 transitions. Word has length 107 [2022-01-10 20:04:43,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:43,985 INFO L470 AbstractCegarLoop]: Abstraction has 6100 states and 7464 transitions. [2022-01-10 20:04:43,985 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 35.666666666666664) internal successors, (107), 3 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:43,985 INFO L276 IsEmpty]: Start isEmpty. Operand 6100 states and 7464 transitions. [2022-01-10 20:04:43,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2022-01-10 20:04:43,987 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:43,987 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:43,988 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-01-10 20:04:43,988 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:43,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:43,988 INFO L85 PathProgramCache]: Analyzing trace with hash 598296784, now seen corresponding path program 1 times [2022-01-10 20:04:43,988 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:43,988 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1974899051] [2022-01-10 20:04:43,988 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:43,989 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:43,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:44,008 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-01-10 20:04:44,008 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:44,008 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1974899051] [2022-01-10 20:04:44,008 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1974899051] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:44,008 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:44,008 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:44,009 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [237361811] [2022-01-10 20:04:44,009 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:44,009 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:44,009 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:44,009 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:44,009 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:44,009 INFO L87 Difference]: Start difference. First operand 6100 states and 7464 transitions. Second operand has 3 states, 3 states have (on average 33.0) internal successors, (99), 3 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:44,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:44,306 INFO L93 Difference]: Finished difference Result 12100 states and 14818 transitions. [2022-01-10 20:04:44,306 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:44,306 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 33.0) internal successors, (99), 3 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 107 [2022-01-10 20:04:44,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:44,315 INFO L225 Difference]: With dead ends: 12100 [2022-01-10 20:04:44,316 INFO L226 Difference]: Without dead ends: 6054 [2022-01-10 20:04:44,320 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:44,321 INFO L933 BasicCegarLoop]: 405 mSDtfsCounter, 399 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 399 SdHoareTripleChecker+Valid, 406 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:44,321 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [399 Valid, 406 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:44,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6054 states. [2022-01-10 20:04:44,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6054 to 6054. [2022-01-10 20:04:44,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6054 states, 6052 states have (on average 1.2248843357567747) internal successors, (7413), 6053 states have internal predecessors, (7413), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:44,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6054 states to 6054 states and 7413 transitions. [2022-01-10 20:04:44,585 INFO L78 Accepts]: Start accepts. Automaton has 6054 states and 7413 transitions. Word has length 107 [2022-01-10 20:04:44,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:44,586 INFO L470 AbstractCegarLoop]: Abstraction has 6054 states and 7413 transitions. [2022-01-10 20:04:44,586 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 33.0) internal successors, (99), 3 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:44,586 INFO L276 IsEmpty]: Start isEmpty. Operand 6054 states and 7413 transitions. [2022-01-10 20:04:44,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2022-01-10 20:04:44,588 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:44,588 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:44,588 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-01-10 20:04:44,588 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:44,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:44,588 INFO L85 PathProgramCache]: Analyzing trace with hash -2092476206, now seen corresponding path program 1 times [2022-01-10 20:04:44,588 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:44,589 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [110919774] [2022-01-10 20:04:44,589 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:44,589 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:44,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:44,615 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:44,615 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:44,615 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [110919774] [2022-01-10 20:04:44,615 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [110919774] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:44,616 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:44,616 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:44,616 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [186518558] [2022-01-10 20:04:44,616 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:44,616 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:44,616 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:44,616 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:44,616 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:44,616 INFO L87 Difference]: Start difference. First operand 6054 states and 7413 transitions. Second operand has 3 states, 3 states have (on average 36.0) internal successors, (108), 3 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:45,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:45,125 INFO L93 Difference]: Finished difference Result 16931 states and 20745 transitions. [2022-01-10 20:04:45,126 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:45,126 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 36.0) internal successors, (108), 3 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 108 [2022-01-10 20:04:45,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:45,139 INFO L225 Difference]: With dead ends: 16931 [2022-01-10 20:04:45,139 INFO L226 Difference]: Without dead ends: 10931 [2022-01-10 20:04:45,145 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:45,146 INFO L933 BasicCegarLoop]: 484 mSDtfsCounter, 264 mSDsluCounter, 383 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 264 SdHoareTripleChecker+Valid, 867 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:45,146 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [264 Valid, 867 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:45,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10931 states. [2022-01-10 20:04:45,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10931 to 10927. [2022-01-10 20:04:45,639 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10927 states, 10925 states have (on average 1.2204118993135011) internal successors, (13333), 10926 states have internal predecessors, (13333), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:45,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10927 states to 10927 states and 13333 transitions. [2022-01-10 20:04:45,652 INFO L78 Accepts]: Start accepts. Automaton has 10927 states and 13333 transitions. Word has length 108 [2022-01-10 20:04:45,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:45,652 INFO L470 AbstractCegarLoop]: Abstraction has 10927 states and 13333 transitions. [2022-01-10 20:04:45,652 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 36.0) internal successors, (108), 3 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:45,652 INFO L276 IsEmpty]: Start isEmpty. Operand 10927 states and 13333 transitions. [2022-01-10 20:04:45,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2022-01-10 20:04:45,656 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:45,656 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:45,656 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2022-01-10 20:04:45,656 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:45,656 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:45,657 INFO L85 PathProgramCache]: Analyzing trace with hash 1003755825, now seen corresponding path program 1 times [2022-01-10 20:04:45,657 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:45,657 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1966729532] [2022-01-10 20:04:45,657 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:45,657 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:45,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:45,676 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-01-10 20:04:45,676 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:45,676 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1966729532] [2022-01-10 20:04:45,676 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1966729532] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:45,676 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:45,676 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:45,676 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1662398243] [2022-01-10 20:04:45,677 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:45,678 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:45,678 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:45,678 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:45,678 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:45,678 INFO L87 Difference]: Start difference. First operand 10927 states and 13333 transitions. Second operand has 3 states, 3 states have (on average 33.333333333333336) internal successors, (100), 3 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:46,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:46,185 INFO L93 Difference]: Finished difference Result 21755 states and 26559 transitions. [2022-01-10 20:04:46,185 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:46,186 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 33.333333333333336) internal successors, (100), 3 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 108 [2022-01-10 20:04:46,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:46,197 INFO L225 Difference]: With dead ends: 21755 [2022-01-10 20:04:46,197 INFO L226 Difference]: Without dead ends: 10882 [2022-01-10 20:04:46,208 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:46,209 INFO L933 BasicCegarLoop]: 404 mSDtfsCounter, 397 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 397 SdHoareTripleChecker+Valid, 405 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:46,209 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [397 Valid, 405 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:46,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10882 states. [2022-01-10 20:04:46,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10882 to 10882. [2022-01-10 20:04:46,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10882 states, 10880 states have (on average 1.2209558823529412) internal successors, (13284), 10881 states have internal predecessors, (13284), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:46,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10882 states to 10882 states and 13284 transitions. [2022-01-10 20:04:46,833 INFO L78 Accepts]: Start accepts. Automaton has 10882 states and 13284 transitions. Word has length 108 [2022-01-10 20:04:46,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:46,833 INFO L470 AbstractCegarLoop]: Abstraction has 10882 states and 13284 transitions. [2022-01-10 20:04:46,834 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 33.333333333333336) internal successors, (100), 3 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:46,834 INFO L276 IsEmpty]: Start isEmpty. Operand 10882 states and 13284 transitions. [2022-01-10 20:04:46,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2022-01-10 20:04:46,837 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:46,837 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:46,837 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-01-10 20:04:46,837 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:46,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:46,837 INFO L85 PathProgramCache]: Analyzing trace with hash 1609122820, now seen corresponding path program 1 times [2022-01-10 20:04:46,837 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:46,838 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100268094] [2022-01-10 20:04:46,838 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:46,838 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:46,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:46,866 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:46,866 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:46,866 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1100268094] [2022-01-10 20:04:46,866 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1100268094] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:46,866 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:46,866 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:46,866 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [422385710] [2022-01-10 20:04:46,866 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:46,867 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:46,867 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:46,867 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:46,867 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:46,867 INFO L87 Difference]: Start difference. First operand 10882 states and 13284 transitions. Second operand has 3 states, 3 states have (on average 36.333333333333336) internal successors, (109), 3 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:47,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:47,927 INFO L93 Difference]: Finished difference Result 31126 states and 37849 transitions. [2022-01-10 20:04:47,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:47,928 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 36.333333333333336) internal successors, (109), 3 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 109 [2022-01-10 20:04:47,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:47,945 INFO L225 Difference]: With dead ends: 31126 [2022-01-10 20:04:47,946 INFO L226 Difference]: Without dead ends: 15634 [2022-01-10 20:04:47,957 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:47,958 INFO L933 BasicCegarLoop]: 725 mSDtfsCounter, 327 mSDsluCounter, 390 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 327 SdHoareTripleChecker+Valid, 1115 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:47,958 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [327 Valid, 1115 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:47,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15634 states. [2022-01-10 20:04:48,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15634 to 15634. [2022-01-10 20:04:48,701 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15634 states, 15632 states have (on average 1.2107855680655066) internal successors, (18927), 15633 states have internal predecessors, (18927), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:48,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15634 states to 15634 states and 18927 transitions. [2022-01-10 20:04:48,721 INFO L78 Accepts]: Start accepts. Automaton has 15634 states and 18927 transitions. Word has length 109 [2022-01-10 20:04:48,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:48,722 INFO L470 AbstractCegarLoop]: Abstraction has 15634 states and 18927 transitions. [2022-01-10 20:04:48,722 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 36.333333333333336) internal successors, (109), 3 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:48,722 INFO L276 IsEmpty]: Start isEmpty. Operand 15634 states and 18927 transitions. [2022-01-10 20:04:48,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2022-01-10 20:04:48,728 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:48,728 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:48,728 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2022-01-10 20:04:48,729 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:48,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:48,729 INFO L85 PathProgramCache]: Analyzing trace with hash -1045246435, now seen corresponding path program 1 times [2022-01-10 20:04:48,729 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:48,729 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1282271165] [2022-01-10 20:04:48,729 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:48,729 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:48,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:48,760 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:48,760 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:48,760 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1282271165] [2022-01-10 20:04:48,761 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1282271165] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:48,761 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:48,761 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-10 20:04:48,761 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1159596449] [2022-01-10 20:04:48,761 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:48,761 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:48,761 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:48,761 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:48,761 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:48,762 INFO L87 Difference]: Start difference. First operand 15634 states and 18927 transitions. Second operand has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 2 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:49,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:49,724 INFO L93 Difference]: Finished difference Result 35872 states and 43307 transitions. [2022-01-10 20:04:49,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:49,725 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 2 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2022-01-10 20:04:49,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:49,754 INFO L225 Difference]: With dead ends: 35872 [2022-01-10 20:04:49,754 INFO L226 Difference]: Without dead ends: 20277 [2022-01-10 20:04:49,772 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:49,773 INFO L933 BasicCegarLoop]: 395 mSDtfsCounter, 228 mSDsluCounter, 330 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 228 SdHoareTripleChecker+Valid, 725 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:49,773 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [228 Valid, 725 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:49,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20277 states. [2022-01-10 20:04:50,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20277 to 20181. [2022-01-10 20:04:50,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20181 states, 20179 states have (on average 1.1995143465979483) internal successors, (24205), 20180 states have internal predecessors, (24205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:50,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20181 states to 20181 states and 24205 transitions. [2022-01-10 20:04:50,792 INFO L78 Accepts]: Start accepts. Automaton has 20181 states and 24205 transitions. Word has length 140 [2022-01-10 20:04:50,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:50,792 INFO L470 AbstractCegarLoop]: Abstraction has 20181 states and 24205 transitions. [2022-01-10 20:04:50,793 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 2 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:50,793 INFO L276 IsEmpty]: Start isEmpty. Operand 20181 states and 24205 transitions. [2022-01-10 20:04:50,803 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2022-01-10 20:04:50,803 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:50,803 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:50,803 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2022-01-10 20:04:50,803 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:50,803 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:50,804 INFO L85 PathProgramCache]: Analyzing trace with hash -1303733245, now seen corresponding path program 1 times [2022-01-10 20:04:50,804 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:50,804 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1439523850] [2022-01-10 20:04:50,804 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:50,804 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:50,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:50,828 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2022-01-10 20:04:50,829 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:50,829 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1439523850] [2022-01-10 20:04:50,829 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1439523850] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:50,829 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:50,829 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:50,829 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [451730561] [2022-01-10 20:04:50,829 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:50,829 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:50,829 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:50,830 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:50,830 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:50,830 INFO L87 Difference]: Start difference. First operand 20181 states and 24205 transitions. Second operand has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 3 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:51,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:51,970 INFO L93 Difference]: Finished difference Result 39889 states and 47731 transitions. [2022-01-10 20:04:51,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:51,970 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 3 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 157 [2022-01-10 20:04:51,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:51,994 INFO L225 Difference]: With dead ends: 39889 [2022-01-10 20:04:51,994 INFO L226 Difference]: Without dead ends: 19761 [2022-01-10 20:04:52,012 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:52,013 INFO L933 BasicCegarLoop]: 410 mSDtfsCounter, 266 mSDsluCounter, 335 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 266 SdHoareTripleChecker+Valid, 745 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:52,013 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [266 Valid, 745 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:52,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19761 states. [2022-01-10 20:04:53,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19761 to 19761. [2022-01-10 20:04:53,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19761 states, 19759 states have (on average 1.1772356900652867) internal successors, (23261), 19760 states have internal predecessors, (23261), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:53,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19761 states to 19761 states and 23261 transitions. [2022-01-10 20:04:53,078 INFO L78 Accepts]: Start accepts. Automaton has 19761 states and 23261 transitions. Word has length 157 [2022-01-10 20:04:53,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:53,078 INFO L470 AbstractCegarLoop]: Abstraction has 19761 states and 23261 transitions. [2022-01-10 20:04:53,078 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 3 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:53,078 INFO L276 IsEmpty]: Start isEmpty. Operand 19761 states and 23261 transitions. [2022-01-10 20:04:53,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2022-01-10 20:04:53,088 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:53,088 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:53,089 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2022-01-10 20:04:53,089 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:53,089 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:53,089 INFO L85 PathProgramCache]: Analyzing trace with hash -1811308674, now seen corresponding path program 1 times [2022-01-10 20:04:53,089 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:53,089 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2078086215] [2022-01-10 20:04:53,089 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:53,089 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:53,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:53,119 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:53,120 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:53,120 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2078086215] [2022-01-10 20:04:53,120 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2078086215] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:53,120 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:53,120 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:53,120 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1026631778] [2022-01-10 20:04:53,120 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:53,120 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:53,120 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:53,121 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:53,121 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:53,121 INFO L87 Difference]: Start difference. First operand 19761 states and 23261 transitions. Second operand has 3 states, 3 states have (on average 52.666666666666664) internal successors, (158), 3 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:54,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:54,179 INFO L93 Difference]: Finished difference Result 35009 states and 41373 transitions. [2022-01-10 20:04:54,179 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:54,179 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 52.666666666666664) internal successors, (158), 3 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 158 [2022-01-10 20:04:54,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:54,204 INFO L225 Difference]: With dead ends: 35009 [2022-01-10 20:04:54,204 INFO L226 Difference]: Without dead ends: 19765 [2022-01-10 20:04:54,213 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:54,214 INFO L933 BasicCegarLoop]: 660 mSDtfsCounter, 284 mSDsluCounter, 388 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 284 SdHoareTripleChecker+Valid, 1048 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:54,214 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [284 Valid, 1048 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:54,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19765 states. [2022-01-10 20:04:55,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19765 to 19761. [2022-01-10 20:04:55,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19761 states, 19759 states have (on average 1.1741990991446936) internal successors, (23201), 19760 states have internal predecessors, (23201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:55,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19761 states to 19761 states and 23201 transitions. [2022-01-10 20:04:55,210 INFO L78 Accepts]: Start accepts. Automaton has 19761 states and 23201 transitions. Word has length 158 [2022-01-10 20:04:55,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:55,210 INFO L470 AbstractCegarLoop]: Abstraction has 19761 states and 23201 transitions. [2022-01-10 20:04:55,210 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 52.666666666666664) internal successors, (158), 3 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:55,210 INFO L276 IsEmpty]: Start isEmpty. Operand 19761 states and 23201 transitions. [2022-01-10 20:04:55,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2022-01-10 20:04:55,222 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:55,222 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:55,222 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2022-01-10 20:04:55,222 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:55,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:55,222 INFO L85 PathProgramCache]: Analyzing trace with hash 1459229981, now seen corresponding path program 1 times [2022-01-10 20:04:55,222 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:55,223 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1838471292] [2022-01-10 20:04:55,223 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:55,223 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:55,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:55,257 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-01-10 20:04:55,257 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:55,257 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1838471292] [2022-01-10 20:04:55,257 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1838471292] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:55,257 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:55,257 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-10 20:04:55,257 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2120364062] [2022-01-10 20:04:55,258 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:55,258 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:55,258 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:55,258 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:55,258 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:55,258 INFO L87 Difference]: Start difference. First operand 19761 states and 23201 transitions. Second operand has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 2 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:56,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:56,458 INFO L93 Difference]: Finished difference Result 43545 states and 50999 transitions. [2022-01-10 20:04:56,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:56,459 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 2 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 189 [2022-01-10 20:04:56,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:56,493 INFO L225 Difference]: With dead ends: 43545 [2022-01-10 20:04:56,493 INFO L226 Difference]: Without dead ends: 23816 [2022-01-10 20:04:56,512 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:56,512 INFO L933 BasicCegarLoop]: 394 mSDtfsCounter, 174 mSDsluCounter, 330 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 174 SdHoareTripleChecker+Valid, 724 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:56,513 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [174 Valid, 724 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:56,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23816 states. [2022-01-10 20:04:57,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23816 to 23688. [2022-01-10 20:04:57,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23688 states, 23686 states have (on average 1.1652030735455543) internal successors, (27599), 23687 states have internal predecessors, (27599), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:57,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 27599 transitions. [2022-01-10 20:04:57,797 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 27599 transitions. Word has length 189 [2022-01-10 20:04:57,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:04:57,798 INFO L470 AbstractCegarLoop]: Abstraction has 23688 states and 27599 transitions. [2022-01-10 20:04:57,798 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 2 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:57,798 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 27599 transitions. [2022-01-10 20:04:57,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2022-01-10 20:04:57,812 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:04:57,812 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:04:57,812 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2022-01-10 20:04:57,812 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:04:57,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:04:57,812 INFO L85 PathProgramCache]: Analyzing trace with hash 952041103, now seen corresponding path program 1 times [2022-01-10 20:04:57,812 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:04:57,812 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1059980627] [2022-01-10 20:04:57,813 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:04:57,813 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:04:57,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:04:57,851 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:04:57,851 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:04:57,851 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1059980627] [2022-01-10 20:04:57,851 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1059980627] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:04:57,851 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:04:57,852 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:04:57,852 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1151651108] [2022-01-10 20:04:57,852 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:04:57,852 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:04:57,852 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:04:57,852 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:04:57,852 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:57,852 INFO L87 Difference]: Start difference. First operand 23688 states and 27599 transitions. Second operand has 3 states, 3 states have (on average 64.33333333333333) internal successors, (193), 3 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:04:59,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:04:59,231 INFO L93 Difference]: Finished difference Result 43400 states and 50747 transitions. [2022-01-10 20:04:59,231 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:04:59,231 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 64.33333333333333) internal successors, (193), 3 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 193 [2022-01-10 20:04:59,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:04:59,262 INFO L225 Difference]: With dead ends: 43400 [2022-01-10 20:04:59,263 INFO L226 Difference]: Without dead ends: 23692 [2022-01-10 20:04:59,281 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:04:59,282 INFO L933 BasicCegarLoop]: 614 mSDtfsCounter, 280 mSDsluCounter, 380 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 280 SdHoareTripleChecker+Valid, 994 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:04:59,282 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [280 Valid, 994 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:04:59,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23692 states. [2022-01-10 20:05:00,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23692 to 23688. [2022-01-10 20:05:00,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23688 states, 23686 states have (on average 1.1609811703115764) internal successors, (27499), 23687 states have internal predecessors, (27499), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:00,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 27499 transitions. [2022-01-10 20:05:00,591 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 27499 transitions. Word has length 193 [2022-01-10 20:05:00,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:05:00,592 INFO L470 AbstractCegarLoop]: Abstraction has 23688 states and 27499 transitions. [2022-01-10 20:05:00,592 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 64.33333333333333) internal successors, (193), 3 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:00,592 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 27499 transitions. [2022-01-10 20:05:00,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2022-01-10 20:05:00,605 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:05:00,605 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:05:00,606 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2022-01-10 20:05:00,606 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:05:00,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:05:00,606 INFO L85 PathProgramCache]: Analyzing trace with hash 708123611, now seen corresponding path program 1 times [2022-01-10 20:05:00,606 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:05:00,606 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2040228934] [2022-01-10 20:05:00,606 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:05:00,606 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:05:00,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:05:00,662 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-01-10 20:05:00,662 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:05:00,662 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2040228934] [2022-01-10 20:05:00,662 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2040228934] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:05:00,662 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:05:00,662 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:05:00,663 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [857263697] [2022-01-10 20:05:00,663 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:05:00,663 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:05:00,663 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:05:00,663 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:05:00,663 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:05:00,663 INFO L87 Difference]: Start difference. First operand 23688 states and 27499 transitions. Second operand has 3 states, 3 states have (on average 75.0) internal successors, (225), 3 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:01,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:05:01,973 INFO L93 Difference]: Finished difference Result 47328 states and 54947 transitions. [2022-01-10 20:05:01,973 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:05:01,973 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 75.0) internal successors, (225), 3 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 228 [2022-01-10 20:05:01,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:05:02,009 INFO L225 Difference]: With dead ends: 47328 [2022-01-10 20:05:02,009 INFO L226 Difference]: Without dead ends: 23692 [2022-01-10 20:05:02,022 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:05:02,024 INFO L933 BasicCegarLoop]: 652 mSDtfsCounter, 277 mSDsluCounter, 368 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 277 SdHoareTripleChecker+Valid, 1020 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:05:02,024 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [277 Valid, 1020 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:05:02,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23692 states. [2022-01-10 20:05:03,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23692 to 23688. [2022-01-10 20:05:03,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23688 states, 23686 states have (on average 1.1535506206197754) internal successors, (27323), 23687 states have internal predecessors, (27323), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:03,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 27323 transitions. [2022-01-10 20:05:03,255 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 27323 transitions. Word has length 228 [2022-01-10 20:05:03,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:05:03,256 INFO L470 AbstractCegarLoop]: Abstraction has 23688 states and 27323 transitions. [2022-01-10 20:05:03,256 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 75.0) internal successors, (225), 3 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:03,256 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 27323 transitions. [2022-01-10 20:05:03,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2022-01-10 20:05:03,267 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:05:03,267 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:05:03,267 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2022-01-10 20:05:03,267 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:05:03,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:05:03,268 INFO L85 PathProgramCache]: Analyzing trace with hash -2008601058, now seen corresponding path program 1 times [2022-01-10 20:05:03,268 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:05:03,268 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248575550] [2022-01-10 20:05:03,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:05:03,268 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:05:03,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:05:03,303 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:05:03,304 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:05:03,304 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1248575550] [2022-01-10 20:05:03,304 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1248575550] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:05:03,304 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:05:03,304 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:05:03,304 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [583021056] [2022-01-10 20:05:03,304 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:05:03,304 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:05:03,305 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:05:03,305 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:05:03,305 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:05:03,305 INFO L87 Difference]: Start difference. First operand 23688 states and 27323 transitions. Second operand has 3 states, 3 states have (on average 76.0) internal successors, (228), 3 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:04,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:05:04,660 INFO L93 Difference]: Finished difference Result 43460 states and 50297 transitions. [2022-01-10 20:05:04,660 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:05:04,660 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 76.0) internal successors, (228), 3 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 228 [2022-01-10 20:05:04,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:05:04,693 INFO L225 Difference]: With dead ends: 43460 [2022-01-10 20:05:04,693 INFO L226 Difference]: Without dead ends: 23752 [2022-01-10 20:05:04,713 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:05:04,714 INFO L933 BasicCegarLoop]: 611 mSDtfsCounter, 308 mSDsluCounter, 272 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 308 SdHoareTripleChecker+Valid, 883 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:05:04,714 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [308 Valid, 883 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:05:04,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23752 states. [2022-01-10 20:05:06,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23752 to 23688. [2022-01-10 20:05:06,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23688 states, 23686 states have (on average 1.1319344760618086) internal successors, (26811), 23687 states have internal predecessors, (26811), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:06,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 26811 transitions. [2022-01-10 20:05:06,088 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 26811 transitions. Word has length 228 [2022-01-10 20:05:06,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:05:06,088 INFO L470 AbstractCegarLoop]: Abstraction has 23688 states and 26811 transitions. [2022-01-10 20:05:06,088 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 76.0) internal successors, (228), 3 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:06,088 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 26811 transitions. [2022-01-10 20:05:06,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2022-01-10 20:05:06,100 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:05:06,100 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:05:06,100 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2022-01-10 20:05:06,101 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:05:06,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:05:06,101 INFO L85 PathProgramCache]: Analyzing trace with hash -784555017, now seen corresponding path program 1 times [2022-01-10 20:05:06,101 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:05:06,101 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130234091] [2022-01-10 20:05:06,101 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:05:06,101 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:05:06,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:05:06,137 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:05:06,137 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:05:06,137 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [130234091] [2022-01-10 20:05:06,137 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [130234091] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:05:06,137 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:05:06,137 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:05:06,137 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1259415468] [2022-01-10 20:05:06,137 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:05:06,138 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:05:06,138 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:05:06,138 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:05:06,138 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:05:06,138 INFO L87 Difference]: Start difference. First operand 23688 states and 26811 transitions. Second operand has 3 states, 3 states have (on average 77.0) internal successors, (231), 3 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:07,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:05:07,520 INFO L93 Difference]: Finished difference Result 40938 states and 46533 transitions. [2022-01-10 20:05:07,521 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:05:07,521 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 77.0) internal successors, (231), 3 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 231 [2022-01-10 20:05:07,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:05:07,552 INFO L225 Difference]: With dead ends: 40938 [2022-01-10 20:05:07,552 INFO L226 Difference]: Without dead ends: 23752 [2022-01-10 20:05:07,569 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:05:07,570 INFO L933 BasicCegarLoop]: 650 mSDtfsCounter, 304 mSDsluCounter, 313 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 304 SdHoareTripleChecker+Valid, 963 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:05:07,570 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [304 Valid, 963 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:05:07,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23752 states. [2022-01-10 20:05:08,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23752 to 23688. [2022-01-10 20:05:08,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23688 states, 23686 states have (on average 1.1138647302203835) internal successors, (26383), 23687 states have internal predecessors, (26383), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:08,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 26383 transitions. [2022-01-10 20:05:08,941 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 26383 transitions. Word has length 231 [2022-01-10 20:05:08,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:05:08,941 INFO L470 AbstractCegarLoop]: Abstraction has 23688 states and 26383 transitions. [2022-01-10 20:05:08,941 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 77.0) internal successors, (231), 3 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:08,941 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 26383 transitions. [2022-01-10 20:05:08,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2022-01-10 20:05:08,952 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:05:08,952 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:05:08,953 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2022-01-10 20:05:08,953 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:05:08,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:05:08,953 INFO L85 PathProgramCache]: Analyzing trace with hash -918971093, now seen corresponding path program 1 times [2022-01-10 20:05:08,953 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:05:08,953 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [294907825] [2022-01-10 20:05:08,953 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:05:08,953 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:05:08,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:05:08,988 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-01-10 20:05:08,988 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:05:08,988 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [294907825] [2022-01-10 20:05:08,988 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [294907825] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:05:08,988 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:05:08,988 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:05:08,988 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [528314418] [2022-01-10 20:05:08,988 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:05:08,989 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:05:08,989 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:05:08,989 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:05:08,989 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:05:08,989 INFO L87 Difference]: Start difference. First operand 23688 states and 26383 transitions. Second operand has 3 states, 3 states have (on average 75.66666666666667) internal successors, (227), 3 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:10,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:05:10,399 INFO L93 Difference]: Finished difference Result 39074 states and 43659 transitions. [2022-01-10 20:05:10,400 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:05:10,400 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 75.66666666666667) internal successors, (227), 3 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 234 [2022-01-10 20:05:10,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:05:10,428 INFO L225 Difference]: With dead ends: 39074 [2022-01-10 20:05:10,428 INFO L226 Difference]: Without dead ends: 24536 [2022-01-10 20:05:10,439 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:05:10,439 INFO L933 BasicCegarLoop]: 563 mSDtfsCounter, 325 mSDsluCounter, 331 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 325 SdHoareTripleChecker+Valid, 894 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:05:10,440 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [325 Valid, 894 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:05:10,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24536 states. [2022-01-10 20:05:11,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24536 to 23688. [2022-01-10 20:05:11,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23688 states, 23686 states have (on average 1.0996791353542177) internal successors, (26047), 23687 states have internal predecessors, (26047), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:11,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 26047 transitions. [2022-01-10 20:05:11,741 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 26047 transitions. Word has length 234 [2022-01-10 20:05:11,741 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:05:11,741 INFO L470 AbstractCegarLoop]: Abstraction has 23688 states and 26047 transitions. [2022-01-10 20:05:11,742 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 75.66666666666667) internal successors, (227), 3 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:11,742 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 26047 transitions. [2022-01-10 20:05:11,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2022-01-10 20:05:11,753 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:05:11,753 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:05:11,753 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2022-01-10 20:05:11,753 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:05:11,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:05:11,753 INFO L85 PathProgramCache]: Analyzing trace with hash 568116127, now seen corresponding path program 1 times [2022-01-10 20:05:11,754 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:05:11,754 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [938249084] [2022-01-10 20:05:11,754 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:05:11,754 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:05:11,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:05:11,795 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-10 20:05:11,795 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:05:11,795 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [938249084] [2022-01-10 20:05:11,795 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [938249084] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:05:11,795 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:05:11,795 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:05:11,796 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [880561172] [2022-01-10 20:05:11,796 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:05:11,796 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:05:11,796 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:05:11,796 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:05:11,796 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:05:11,796 INFO L87 Difference]: Start difference. First operand 23688 states and 26047 transitions. Second operand has 3 states, 3 states have (on average 78.66666666666667) internal successors, (236), 3 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:12,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:05:12,722 INFO L93 Difference]: Finished difference Result 38194 states and 42103 transitions. [2022-01-10 20:05:12,723 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:05:12,723 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 78.66666666666667) internal successors, (236), 3 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 236 [2022-01-10 20:05:12,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:05:12,744 INFO L225 Difference]: With dead ends: 38194 [2022-01-10 20:05:12,745 INFO L226 Difference]: Without dead ends: 14558 [2022-01-10 20:05:12,765 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:05:12,765 INFO L933 BasicCegarLoop]: 564 mSDtfsCounter, 268 mSDsluCounter, 230 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 268 SdHoareTripleChecker+Valid, 794 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:05:12,765 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [268 Valid, 794 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:05:12,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14558 states. [2022-01-10 20:05:13,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14558 to 14526. [2022-01-10 20:05:13,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14526 states, 14524 states have (on average 1.0843431561553292) internal successors, (15749), 14525 states have internal predecessors, (15749), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:13,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14526 states to 14526 states and 15749 transitions. [2022-01-10 20:05:13,574 INFO L78 Accepts]: Start accepts. Automaton has 14526 states and 15749 transitions. Word has length 236 [2022-01-10 20:05:13,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:05:13,575 INFO L470 AbstractCegarLoop]: Abstraction has 14526 states and 15749 transitions. [2022-01-10 20:05:13,575 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 78.66666666666667) internal successors, (236), 3 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:13,575 INFO L276 IsEmpty]: Start isEmpty. Operand 14526 states and 15749 transitions. [2022-01-10 20:05:13,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2022-01-10 20:05:13,584 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:05:13,584 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:05:13,584 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2022-01-10 20:05:13,585 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:05:13,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:05:13,585 INFO L85 PathProgramCache]: Analyzing trace with hash 66543114, now seen corresponding path program 1 times [2022-01-10 20:05:13,585 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:05:13,585 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210256624] [2022-01-10 20:05:13,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:05:13,585 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:05:13,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:05:13,662 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2022-01-10 20:05:13,663 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:05:13,663 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210256624] [2022-01-10 20:05:13,663 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [210256624] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:05:13,663 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:05:13,663 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-01-10 20:05:13,663 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [249616499] [2022-01-10 20:05:13,663 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:05:13,664 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-01-10 20:05:13,664 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:05:13,664 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-01-10 20:05:13,664 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-01-10 20:05:13,664 INFO L87 Difference]: Start difference. First operand 14526 states and 15749 transitions. Second operand has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:14,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:05:14,265 INFO L93 Difference]: Finished difference Result 21495 states and 23234 transitions. [2022-01-10 20:05:14,265 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-01-10 20:05:14,265 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 239 [2022-01-10 20:05:14,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:05:14,270 INFO L225 Difference]: With dead ends: 21495 [2022-01-10 20:05:14,270 INFO L226 Difference]: Without dead ends: 4151 [2022-01-10 20:05:14,285 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-01-10 20:05:14,286 INFO L933 BasicCegarLoop]: 370 mSDtfsCounter, 970 mSDsluCounter, 487 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 970 SdHoareTripleChecker+Valid, 857 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-01-10 20:05:14,286 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [970 Valid, 857 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-01-10 20:05:14,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4151 states. [2022-01-10 20:05:14,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4151 to 3831. [2022-01-10 20:05:14,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3831 states, 3829 states have (on average 1.0564115957168974) internal successors, (4045), 3830 states have internal predecessors, (4045), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:14,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3831 states to 3831 states and 4045 transitions. [2022-01-10 20:05:14,511 INFO L78 Accepts]: Start accepts. Automaton has 3831 states and 4045 transitions. Word has length 239 [2022-01-10 20:05:14,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:05:14,511 INFO L470 AbstractCegarLoop]: Abstraction has 3831 states and 4045 transitions. [2022-01-10 20:05:14,511 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:14,512 INFO L276 IsEmpty]: Start isEmpty. Operand 3831 states and 4045 transitions. [2022-01-10 20:05:14,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2022-01-10 20:05:14,514 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:05:14,514 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:05:14,514 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2022-01-10 20:05:14,515 INFO L402 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:05:14,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:05:14,515 INFO L85 PathProgramCache]: Analyzing trace with hash 1837105930, now seen corresponding path program 1 times [2022-01-10 20:05:14,515 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:05:14,515 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1747111925] [2022-01-10 20:05:14,515 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:05:14,515 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:05:14,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:05:14,764 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-01-10 20:05:14,764 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:05:14,764 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1747111925] [2022-01-10 20:05:14,764 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1747111925] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:05:14,764 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:05:14,764 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-01-10 20:05:14,764 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002496213] [2022-01-10 20:05:14,764 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:05:14,765 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-01-10 20:05:14,765 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:05:14,765 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-01-10 20:05:14,765 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-01-10 20:05:14,766 INFO L87 Difference]: Start difference. First operand 3831 states and 4045 transitions. Second operand has 6 states, 6 states have (on average 38.666666666666664) internal successors, (232), 6 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:15,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:05:15,105 INFO L93 Difference]: Finished difference Result 3831 states and 4045 transitions. [2022-01-10 20:05:15,105 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-01-10 20:05:15,105 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 38.666666666666664) internal successors, (232), 6 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 239 [2022-01-10 20:05:15,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:05:15,110 INFO L225 Difference]: With dead ends: 3831 [2022-01-10 20:05:15,110 INFO L226 Difference]: Without dead ends: 3829 [2022-01-10 20:05:15,111 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-01-10 20:05:15,112 INFO L933 BasicCegarLoop]: 735 mSDtfsCounter, 590 mSDsluCounter, 2196 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 590 SdHoareTripleChecker+Valid, 2931 SdHoareTripleChecker+Invalid, 26 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:05:15,112 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [590 Valid, 2931 Invalid, 26 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 25 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:05:15,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3829 states. [2022-01-10 20:05:15,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3829 to 3829. [2022-01-10 20:05:15,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3829 states, 3828 states have (on average 1.055903866248694) internal successors, (4042), 3828 states have internal predecessors, (4042), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:15,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3829 states to 3829 states and 4042 transitions. [2022-01-10 20:05:15,438 INFO L78 Accepts]: Start accepts. Automaton has 3829 states and 4042 transitions. Word has length 239 [2022-01-10 20:05:15,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:05:15,438 INFO L470 AbstractCegarLoop]: Abstraction has 3829 states and 4042 transitions. [2022-01-10 20:05:15,438 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 38.666666666666664) internal successors, (232), 6 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:15,439 INFO L276 IsEmpty]: Start isEmpty. Operand 3829 states and 4042 transitions. [2022-01-10 20:05:15,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2022-01-10 20:05:15,441 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:05:15,442 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:05:15,442 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2022-01-10 20:05:15,443 INFO L402 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:05:15,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:05:15,443 INFO L85 PathProgramCache]: Analyzing trace with hash -564507989, now seen corresponding path program 1 times [2022-01-10 20:05:15,443 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:05:15,443 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [141094876] [2022-01-10 20:05:15,443 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:05:15,443 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:05:15,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-10 20:05:15,497 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2022-01-10 20:05:15,497 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-10 20:05:15,497 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [141094876] [2022-01-10 20:05:15,497 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [141094876] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-10 20:05:15,497 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-10 20:05:15,497 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-10 20:05:15,498 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182769964] [2022-01-10 20:05:15,498 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-10 20:05:15,499 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-10 20:05:15,499 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-10 20:05:15,499 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-10 20:05:15,499 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:05:15,499 INFO L87 Difference]: Start difference. First operand 3829 states and 4042 transitions. Second operand has 3 states, 3 states have (on average 71.0) internal successors, (213), 3 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:16,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-10 20:05:16,047 INFO L93 Difference]: Finished difference Result 5989 states and 6301 transitions. [2022-01-10 20:05:16,048 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-10 20:05:16,048 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 71.0) internal successors, (213), 3 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 243 [2022-01-10 20:05:16,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-10 20:05:16,052 INFO L225 Difference]: With dead ends: 5989 [2022-01-10 20:05:16,052 INFO L226 Difference]: Without dead ends: 4901 [2022-01-10 20:05:16,054 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-10 20:05:16,055 INFO L933 BasicCegarLoop]: 638 mSDtfsCounter, 279 mSDsluCounter, 351 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 279 SdHoareTripleChecker+Valid, 989 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-10 20:05:16,055 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [279 Valid, 989 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-10 20:05:16,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4901 states. [2022-01-10 20:05:16,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4901 to 3831. [2022-01-10 20:05:16,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3831 states, 3830 states have (on average 1.0558746736292428) internal successors, (4044), 3830 states have internal predecessors, (4044), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:16,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3831 states to 3831 states and 4044 transitions. [2022-01-10 20:05:16,364 INFO L78 Accepts]: Start accepts. Automaton has 3831 states and 4044 transitions. Word has length 243 [2022-01-10 20:05:16,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-10 20:05:16,365 INFO L470 AbstractCegarLoop]: Abstraction has 3831 states and 4044 transitions. [2022-01-10 20:05:16,365 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 71.0) internal successors, (213), 3 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-10 20:05:16,365 INFO L276 IsEmpty]: Start isEmpty. Operand 3831 states and 4044 transitions. [2022-01-10 20:05:16,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2022-01-10 20:05:16,368 INFO L506 BasicCegarLoop]: Found error trace [2022-01-10 20:05:16,368 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:05:16,368 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2022-01-10 20:05:16,369 INFO L402 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-10 20:05:16,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-10 20:05:16,369 INFO L85 PathProgramCache]: Analyzing trace with hash -350901494, now seen corresponding path program 1 times [2022-01-10 20:05:16,369 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-10 20:05:16,369 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [563795665] [2022-01-10 20:05:16,369 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-10 20:05:16,369 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-10 20:05:16,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-01-10 20:05:16,404 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-01-10 20:05:16,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-01-10 20:05:16,532 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-01-10 20:05:16,532 INFO L628 BasicCegarLoop]: Counterexample is feasible [2022-01-10 20:05:16,533 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION (3 of 4 remaining) [2022-01-10 20:05:16,534 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION (2 of 4 remaining) [2022-01-10 20:05:16,535 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (1 of 4 remaining) [2022-01-10 20:05:16,535 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (0 of 4 remaining) [2022-01-10 20:05:16,535 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2022-01-10 20:05:16,537 INFO L732 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-10 20:05:16,540 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2022-01-10 20:05:17,157 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 10.01 08:05:17 BasicIcfg [2022-01-10 20:05:17,157 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-01-10 20:05:17,157 INFO L158 Benchmark]: Toolchain (without parser) took 42071.47ms. Allocated memory was 198.2MB in the beginning and 3.1GB in the end (delta: 2.9GB). Free memory was 147.5MB in the beginning and 2.2GB in the end (delta: -2.1GB). Peak memory consumption was 871.0MB. Max. memory is 8.0GB. [2022-01-10 20:05:17,157 INFO L158 Benchmark]: CDTParser took 0.11ms. Allocated memory is still 198.2MB. Free memory is still 164.3MB. There was no memory consumed. Max. memory is 8.0GB. [2022-01-10 20:05:17,158 INFO L158 Benchmark]: CACSL2BoogieTranslator took 307.81ms. Allocated memory is still 198.2MB. Free memory was 147.2MB in the beginning and 166.8MB in the end (delta: -19.5MB). Peak memory consumption was 12.2MB. Max. memory is 8.0GB. [2022-01-10 20:05:17,158 INFO L158 Benchmark]: Boogie Procedure Inliner took 57.37ms. Allocated memory is still 198.2MB. Free memory was 166.8MB in the beginning and 161.5MB in the end (delta: 5.2MB). Peak memory consumption was 5.2MB. Max. memory is 8.0GB. [2022-01-10 20:05:17,158 INFO L158 Benchmark]: Boogie Preprocessor took 43.98ms. Allocated memory is still 198.2MB. Free memory was 161.5MB in the beginning and 157.3MB in the end (delta: 4.2MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. [2022-01-10 20:05:17,158 INFO L158 Benchmark]: RCFGBuilder took 765.59ms. Allocated memory is still 198.2MB. Free memory was 157.3MB in the beginning and 112.3MB in the end (delta: 45.1MB). Peak memory consumption was 45.1MB. Max. memory is 8.0GB. [2022-01-10 20:05:17,158 INFO L158 Benchmark]: IcfgTransformer took 183.04ms. Allocated memory is still 198.2MB. Free memory was 112.3MB in the beginning and 88.1MB in the end (delta: 24.1MB). Peak memory consumption was 24.1MB. Max. memory is 8.0GB. [2022-01-10 20:05:17,158 INFO L158 Benchmark]: TraceAbstraction took 40707.06ms. Allocated memory was 198.2MB in the beginning and 3.1GB in the end (delta: 2.9GB). Free memory was 87.6MB in the beginning and 2.2GB in the end (delta: -2.1GB). Peak memory consumption was 810.6MB. Max. memory is 8.0GB. [2022-01-10 20:05:17,158 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11ms. Allocated memory is still 198.2MB. Free memory is still 164.3MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 307.81ms. Allocated memory is still 198.2MB. Free memory was 147.2MB in the beginning and 166.8MB in the end (delta: -19.5MB). Peak memory consumption was 12.2MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 57.37ms. Allocated memory is still 198.2MB. Free memory was 166.8MB in the beginning and 161.5MB in the end (delta: 5.2MB). Peak memory consumption was 5.2MB. Max. memory is 8.0GB. * Boogie Preprocessor took 43.98ms. Allocated memory is still 198.2MB. Free memory was 161.5MB in the beginning and 157.3MB in the end (delta: 4.2MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. * RCFGBuilder took 765.59ms. Allocated memory is still 198.2MB. Free memory was 157.3MB in the beginning and 112.3MB in the end (delta: 45.1MB). Peak memory consumption was 45.1MB. Max. memory is 8.0GB. * IcfgTransformer took 183.04ms. Allocated memory is still 198.2MB. Free memory was 112.3MB in the beginning and 88.1MB in the end (delta: 24.1MB). Peak memory consumption was 24.1MB. Max. memory is 8.0GB. * TraceAbstraction took 40707.06ms. Allocated memory was 198.2MB in the beginning and 3.1GB in the end (delta: 2.9GB). Free memory was 87.6MB in the beginning and 2.2GB in the end (delta: -2.1GB). Peak memory consumption was 810.6MB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 599]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L32] int fast_clk_edge ; [L33] int slow_clk_edge ; [L34] int q_buf_0 ; [L35] int q_free ; [L36] int q_read_ev ; [L37] int q_write_ev ; [L38] int q_req_up ; [L39] int q_ev ; [L60] int p_num_write ; [L61] int p_last_write ; [L62] int p_dw_st ; [L63] int p_dw_pc ; [L64] int p_dw_i ; [L65] int c_num_read ; [L66] int c_last_read ; [L67] int c_dr_st ; [L68] int c_dr_pc ; [L69] int c_dr_i ; [L202] static int a_t ; [L352] static int t = 0; [L603] int m_pc = 0; [L604] int t1_pc = 0; [L605] int t2_pc = 0; [L606] int t3_pc = 0; [L607] int m_st ; [L608] int t1_st ; [L609] int t2_st ; [L610] int t3_st ; [L611] int m_i ; [L612] int t1_i ; [L613] int t2_i ; [L614] int t3_i ; [L615] int M_E = 2; [L616] int T1_E = 2; [L617] int T2_E = 2; [L618] int T3_E = 2; [L619] int E_M = 2; [L620] int E_1 = 2; [L621] int E_2 = 2; [L622] int E_3 = 2; [L628] int token ; [L630] int local ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=0, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, token=0] [L1327] COND FALSE !(__VERIFIER_nondet_int()) [L1330] CALL main2() [L1314] int __retres1 ; [L1318] CALL init_model2() [L1227] m_i = 1 [L1228] t1_i = 1 [L1229] t2_i = 1 [L1230] t3_i = 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1318] RET init_model2() [L1319] CALL start_simulation2() [L1255] int kernel_st ; [L1256] int tmp ; [L1257] int tmp___0 ; [L1261] kernel_st = 0 [L1262] FCALL update_channels2() [L1263] CALL init_threads2() [L883] COND TRUE m_i == 1 [L884] m_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L888] COND TRUE t1_i == 1 [L889] t1_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L893] COND TRUE t2_i == 1 [L894] t2_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L898] COND TRUE t3_i == 1 [L899] t3_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1263] RET init_threads2() [L1264] CALL fire_delta_events2() [L1020] COND FALSE !(M_E == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1025] COND FALSE !(T1_E == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1030] COND FALSE !(T2_E == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1035] COND FALSE !(T3_E == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1040] COND FALSE !(E_M == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1045] COND FALSE !(E_1 == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1050] COND FALSE !(E_2 == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1055] COND FALSE !(E_3 == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1264] RET fire_delta_events2() [L1265] CALL activate_threads2() [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L799] COND FALSE !(m_pc == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L809] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L811] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, token=0] [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L818] COND FALSE !(t1_pc == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L828] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L830] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, token=0] [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L837] COND FALSE !(t2_pc == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L847] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L849] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0, token=0] [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L856] COND FALSE !(t3_pc == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L866] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L868] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0, token=0] [L1265] RET activate_threads2() [L1266] CALL reset_delta_events2() [L1068] COND FALSE !(M_E == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1073] COND FALSE !(T1_E == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1078] COND FALSE !(T2_E == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1083] COND FALSE !(T3_E == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1088] COND FALSE !(E_M == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1093] COND FALSE !(E_1 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1098] COND FALSE !(E_2 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1103] COND FALSE !(E_3 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1266] RET reset_delta_events2() [L1269] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, kernel_st=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1272] kernel_st = 1 [L1273] CALL eval2() [L939] int tmp ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L943] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L946] CALL, EXPR exists_runnable_thread2() [L908] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L911] COND TRUE m_st == 0 [L912] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L934] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L946] RET, EXPR exists_runnable_thread2() [L946] tmp = exists_runnable_thread2() [L948] COND TRUE \read(tmp) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, token=0] [L953] COND TRUE m_st == 0 [L954] int tmp_ndt_1; [L955] tmp_ndt_1 = __VERIFIER_nondet_int() [L956] COND FALSE !(\read(tmp_ndt_1)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, token=0] [L967] COND TRUE t1_st == 0 [L968] int tmp_ndt_2; [L969] tmp_ndt_2 = __VERIFIER_nondet_int() [L970] COND TRUE \read(tmp_ndt_2) [L972] t1_st = 1 [L973] CALL transmit1() [L691] COND TRUE t1_pc == 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L702] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L704] t1_pc = 1 [L705] t1_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L973] RET transmit1() [L981] COND TRUE t2_st == 0 [L982] int tmp_ndt_3; [L983] tmp_ndt_3 = __VERIFIER_nondet_int() [L984] COND TRUE \read(tmp_ndt_3) [L986] t2_st = 1 [L987] CALL transmit2() [L727] COND TRUE t2_pc == 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L738] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L740] t2_pc = 1 [L741] t2_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L987] RET transmit2() [L995] COND TRUE t3_st == 0 [L996] int tmp_ndt_4; [L997] tmp_ndt_4 = __VERIFIER_nondet_int() [L998] COND TRUE \read(tmp_ndt_4) [L1000] t3_st = 1 [L1001] CALL transmit3() [L763] COND TRUE t3_pc == 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, token=0] [L774] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, token=0] [L776] t3_pc = 1 [L777] t3_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L1001] RET transmit3() [L943] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=4, tmp_ndt_3=1, tmp_ndt_4=1, token=0] [L946] CALL, EXPR exists_runnable_thread2() [L908] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L911] COND TRUE m_st == 0 [L912] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L934] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L946] RET, EXPR exists_runnable_thread2() [L946] tmp = exists_runnable_thread2() [L948] COND TRUE \read(tmp) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=4, tmp_ndt_3=1, tmp_ndt_4=1, token=0] [L953] COND TRUE m_st == 0 [L954] int tmp_ndt_1; [L955] tmp_ndt_1 = __VERIFIER_nondet_int() [L956] COND TRUE \read(tmp_ndt_1) [L958] m_st = 1 [L959] CALL master() [L633] int tmp_var = __VERIFIER_nondet_int(); [L635] COND TRUE m_pc == 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L646] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L649] token = __VERIFIER_nondet_int() [L650] local = token [L651] E_1 = 1 [L652] CALL immediate_notify() [L1160] CALL activate_threads2() [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L799] COND FALSE !(m_pc == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L809] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L811] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, token=0] [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L818] COND TRUE t1_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L819] COND TRUE E_1 == 1 [L820] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L830] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND TRUE \read(tmp___0) [L1131] t1_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, token=0] [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L837] COND TRUE t2_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L838] COND FALSE !(E_2 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L847] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L849] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0, token=0] [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L856] COND TRUE t3_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L857] COND FALSE !(E_3 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L866] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L868] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0, token=0] [L1160] RET activate_threads2() [L652] RET immediate_notify() [L653] E_1 = 2 [L654] m_pc = 1 [L655] m_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L959] RET master() [L967] COND TRUE t1_st == 0 [L968] int tmp_ndt_2; [L969] tmp_ndt_2 = __VERIFIER_nondet_int() [L970] COND TRUE \read(tmp_ndt_2) [L972] t1_st = 1 [L973] CALL transmit1() [L691] COND FALSE !(t1_pc == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L694] COND TRUE t1_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L710] token += 1 [L711] E_2 = 1 [L712] CALL immediate_notify() [L1160] CALL activate_threads2() [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L799] COND TRUE m_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L800] COND FALSE !(E_M == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L809] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L811] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, token=1] [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L818] COND TRUE t1_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L819] COND FALSE !(E_1 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L828] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L830] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, token=1] [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L837] COND TRUE t2_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L838] COND TRUE E_2 == 1 [L839] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L849] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND TRUE \read(tmp___1) [L1139] t2_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1, token=1] [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L856] COND TRUE t3_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L857] COND FALSE !(E_3 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L866] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L868] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0, token=1] [L1160] RET activate_threads2() [L712] RET immediate_notify() [L713] E_2 = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L702] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L704] t1_pc = 1 [L705] t1_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L973] RET transmit1() [L981] COND TRUE t2_st == 0 [L982] int tmp_ndt_3; [L983] tmp_ndt_3 = __VERIFIER_nondet_int() [L984] COND TRUE \read(tmp_ndt_3) [L986] t2_st = 1 [L987] CALL transmit2() [L727] COND FALSE !(t2_pc == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L730] COND TRUE t2_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L746] token += 1 [L747] E_3 = 1 [L748] CALL immediate_notify() [L1160] CALL activate_threads2() [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L799] COND TRUE m_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L800] COND FALSE !(E_M == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L809] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L811] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, token=2] [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L818] COND TRUE t1_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L819] COND FALSE !(E_1 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L828] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L830] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, token=2] [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L837] COND TRUE t2_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L838] COND FALSE !(E_2 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L847] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L849] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=0, token=2] [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L856] COND TRUE t3_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L857] COND TRUE E_3 == 1 [L858] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L868] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND TRUE \read(tmp___2) [L1147] t3_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1, token=2] [L1160] RET activate_threads2() [L748] RET immediate_notify() [L749] E_3 = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=2] [L738] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=2] [L740] t2_pc = 1 [L741] t2_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=2] [L987] RET transmit2() [L995] COND TRUE t3_st == 0 [L996] int tmp_ndt_4; [L997] tmp_ndt_4 = __VERIFIER_nondet_int() [L998] COND TRUE \read(tmp_ndt_4) [L1000] t3_st = 1 [L1001] CALL transmit3() [L763] COND FALSE !(t3_pc == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=2] [L766] COND TRUE t3_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=2] [L782] token += 1 [L783] E_M = 1 [L784] CALL immediate_notify() [L1160] CALL activate_threads2() [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L799] COND TRUE m_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L800] COND TRUE E_M == 1 [L801] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L811] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND TRUE \read(tmp) [L1123] m_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, tmp=1, token=3] [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L818] COND TRUE t1_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L819] COND FALSE !(E_1 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L828] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L830] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, tmp=1, tmp___0=0, token=3] [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L837] COND TRUE t2_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L838] COND FALSE !(E_2 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L847] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L849] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, tmp=1, tmp___0=0, tmp___1=0, token=3] [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L856] COND TRUE t3_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L857] COND FALSE !(E_3 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L866] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L868] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, tmp=1, tmp___0=0, tmp___1=0, tmp___2=0, token=3] [L1160] RET activate_threads2() [L784] RET immediate_notify() [L785] E_M = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L774] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L776] t3_pc = 1 [L777] t3_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L1001] RET transmit3() [L943] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=5, tmp_ndt_3=1, tmp_ndt_4=1, token=3] [L946] CALL, EXPR exists_runnable_thread2() [L908] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L911] COND TRUE m_st == 0 [L912] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L934] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L946] RET, EXPR exists_runnable_thread2() [L946] tmp = exists_runnable_thread2() [L948] COND TRUE \read(tmp) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=5, tmp_ndt_3=1, tmp_ndt_4=1, token=3] [L953] COND TRUE m_st == 0 [L954] int tmp_ndt_1; [L955] tmp_ndt_1 = __VERIFIER_nondet_int() [L956] COND TRUE \read(tmp_ndt_1) [L958] m_st = 1 [L959] CALL master() [L633] int tmp_var = __VERIFIER_nondet_int(); [L635] COND FALSE !(m_pc == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L638] COND TRUE m_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L660] COND FALSE !(token != local + 3) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L665] COND TRUE tmp_var <= 5 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L666] COND TRUE tmp_var >= 5 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L671] COND TRUE tmp_var <= 5 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L672] COND TRUE tmp_var >= 5 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L673] COND TRUE tmp_var == 5 [L674] CALL error2() [L599] reach_error() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] - UnprovableResult [Line: 27]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 27]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 599]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 475 locations, 4 error locations. Started 1 CEGAR loops. OverallTime: 40.0s, OverallIterations: 41, TraceHistogramMax: 3, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.2s, AutomataDifference: 20.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 18247 SdHoareTripleChecker+Valid, 0.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 18247 mSDsluCounter, 39832 SdHoareTripleChecker+Invalid, 0.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 16229 mSDsCounter, 337 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 750 IncrementalHoareTripleChecker+Invalid, 1087 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 337 mSolverCounterUnsat, 23603 mSDtfsCounter, 750 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 128 GetRequests, 69 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=23688occurred in iteration=31, InterpolantAutomatonStates: 135, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 17.5s AutomataMinimizationTime, 40 MinimizatonAttempts, 4120 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 5068 NumberOfCodeBlocks, 5068 NumberOfCodeBlocksAsserted, 41 NumberOfCheckSat, 4784 ConstructedInterpolants, 0 QuantifiedInterpolants, 10493 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 40 InterpolantComputations, 40 PerfectInterpolantSequences, 630/630 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-01-10 20:05:17,184 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Ended with exit code 0 Received shutdown request...