/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.5.800.v20200727-1323.jar -data @noDefault -ultimatedata ./data --core.log.level.for.class de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN -tc ../../../trunk/examples/toolchains/AutomizerCInlineTransformed.xml -s ../../../trunk/examples/settings/automizer/BvToInt/svcomp-Reach-64bit-Automizer_BvToInt_NONE.epf -i ../../../trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c -------------------------------------------------------------------------------- This is Ultimate 0.2.2-dev-a10ec3b [2022-01-11 01:50:49,893 INFO L177 SettingsManager]: Resetting all preferences to default values... [2022-01-11 01:50:49,895 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2022-01-11 01:50:49,958 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... 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[2022-01-11 01:50:49,965 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2022-01-11 01:50:49,965 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2022-01-11 01:50:49,966 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2022-01-11 01:50:49,971 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2022-01-11 01:50:49,971 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2022-01-11 01:50:49,976 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2022-01-11 01:50:49,980 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2022-01-11 01:50:49,985 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2022-01-11 01:50:49,987 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2022-01-11 01:50:49,988 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2022-01-11 01:50:49,990 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2022-01-11 01:50:49,990 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2022-01-11 01:50:49,992 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2022-01-11 01:50:49,996 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2022-01-11 01:50:49,997 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2022-01-11 01:50:49,997 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2022-01-11 01:50:50,002 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/BvToInt/svcomp-Reach-64bit-Automizer_BvToInt_NONE.epf [2022-01-11 01:50:50,030 INFO L113 SettingsManager]: Loading preferences was successful [2022-01-11 01:50:50,030 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2022-01-11 01:50:50,031 INFO L136 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2022-01-11 01:50:50,031 INFO L138 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2022-01-11 01:50:50,032 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2022-01-11 01:50:50,032 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2022-01-11 01:50:50,032 INFO L138 SettingsManager]: * Use SBE=true [2022-01-11 01:50:50,033 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2022-01-11 01:50:50,033 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2022-01-11 01:50:50,033 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2022-01-11 01:50:50,033 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2022-01-11 01:50:50,034 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2022-01-11 01:50:50,034 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2022-01-11 01:50:50,034 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2022-01-11 01:50:50,034 INFO L138 SettingsManager]: * Use bitvectors instead of ints=true [2022-01-11 01:50:50,034 INFO L138 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2022-01-11 01:50:50,034 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2022-01-11 01:50:50,034 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2022-01-11 01:50:50,034 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2022-01-11 01:50:50,034 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2022-01-11 01:50:50,034 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2022-01-11 01:50:50,034 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-01-11 01:50:50,034 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2022-01-11 01:50:50,035 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2022-01-11 01:50:50,035 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2022-01-11 01:50:50,035 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2022-01-11 01:50:50,035 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2022-01-11 01:50:50,035 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2022-01-11 01:50:50,035 INFO L138 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2022-01-11 01:50:50,035 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2022-01-11 01:50:50,035 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2022-01-11 01:50:50,036 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2022-01-11 01:50:50,036 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2022-01-11 01:50:50,036 INFO L138 SettingsManager]: * TransformationType=BV_TO_INT_NONE WARNING: An illegal reflective access operation has occurred WARNING: Illegal reflective access by com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 (file:/storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/plugins/com.sun.xml.bind_2.2.0.v201505121915.jar) to method java.lang.ClassLoader.defineClass(java.lang.String,byte[],int,int) WARNING: Please consider reporting this to the maintainers of com.sun.xml.bind.v2.runtime.reflect.opt.Injector$1 WARNING: Use --illegal-access=warn to enable warnings of further illegal reflective access operations WARNING: All illegal access operations will be denied in a future release Applying setting for plugin de.uni_freiburg.informatik.ultimate.core: Log level for class -> de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=WARN; [2022-01-11 01:50:50,181 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2022-01-11 01:50:50,212 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2022-01-11 01:50:50,214 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2022-01-11 01:50:50,215 INFO L271 PluginConnector]: Initializing CDTParser... [2022-01-11 01:50:50,222 INFO L275 PluginConnector]: CDTParser initialized [2022-01-11 01:50:50,223 INFO L432 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c [2022-01-11 01:50:50,288 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/db59d5c73/a3a7ad45af204d10894c1ca330ed7132/FLAGaa1d60815 [2022-01-11 01:50:50,729 INFO L306 CDTParser]: Found 1 translation units. [2022-01-11 01:50:50,730 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c [2022-01-11 01:50:50,738 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/db59d5c73/a3a7ad45af204d10894c1ca330ed7132/FLAGaa1d60815 [2022-01-11 01:50:50,751 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/db59d5c73/a3a7ad45af204d10894c1ca330ed7132 [2022-01-11 01:50:50,753 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2022-01-11 01:50:50,756 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2022-01-11 01:50:50,757 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2022-01-11 01:50:50,757 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2022-01-11 01:50:50,759 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2022-01-11 01:50:50,760 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.01 01:50:50" (1/1) ... [2022-01-11 01:50:50,761 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4484d80f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:50, skipping insertion in model container [2022-01-11 01:50:50,761 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 11.01 01:50:50" (1/1) ... [2022-01-11 01:50:50,765 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2022-01-11 01:50:50,800 INFO L178 MainTranslator]: Built tables and reachable declarations [2022-01-11 01:50:50,950 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[911,924] [2022-01-11 01:50:50,981 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[8416,8429] [2022-01-11 01:50:51,006 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-01-11 01:50:51,015 INFO L203 MainTranslator]: Completed pre-run [2022-01-11 01:50:51,024 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[911,924] [2022-01-11 01:50:51,040 WARN L230 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate/trunk/examples/svcomp/combinations/pc_sfifo_3.cil+token_ring.03.cil-1.c[8416,8429] [2022-01-11 01:50:51,057 INFO L210 PostProcessor]: Analyzing one entry point: main [2022-01-11 01:50:51,071 INFO L208 MainTranslator]: Completed translation [2022-01-11 01:50:51,072 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:51 WrapperNode [2022-01-11 01:50:51,072 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2022-01-11 01:50:51,073 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2022-01-11 01:50:51,073 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2022-01-11 01:50:51,073 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2022-01-11 01:50:51,078 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:51" (1/1) ... [2022-01-11 01:50:51,087 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:51" (1/1) ... [2022-01-11 01:50:51,118 INFO L137 Inliner]: procedures = 62, calls = 71, calls flagged for inlining = 66, calls inlined = 96, statements flattened = 1229 [2022-01-11 01:50:51,118 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2022-01-11 01:50:51,119 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2022-01-11 01:50:51,119 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2022-01-11 01:50:51,119 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2022-01-11 01:50:51,127 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:51" (1/1) ... [2022-01-11 01:50:51,127 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:51" (1/1) ... [2022-01-11 01:50:51,133 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:51" (1/1) ... [2022-01-11 01:50:51,134 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:51" (1/1) ... [2022-01-11 01:50:51,147 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:51" (1/1) ... [2022-01-11 01:50:51,157 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:51" (1/1) ... [2022-01-11 01:50:51,160 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:51" (1/1) ... [2022-01-11 01:50:51,165 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2022-01-11 01:50:51,165 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2022-01-11 01:50:51,166 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2022-01-11 01:50:51,166 INFO L275 PluginConnector]: RCFGBuilder initialized [2022-01-11 01:50:51,166 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:51" (1/1) ... [2022-01-11 01:50:51,185 INFO L168 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2022-01-11 01:50:51,194 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 [2022-01-11 01:50:51,205 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) [2022-01-11 01:50:51,221 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Waiting until timeout for monitored process [2022-01-11 01:50:51,243 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2022-01-11 01:50:51,243 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~intINTTYPE1 [2022-01-11 01:50:51,243 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2022-01-11 01:50:51,243 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2022-01-11 01:50:51,309 INFO L234 CfgBuilder]: Building ICFG [2022-01-11 01:50:51,310 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2022-01-11 01:50:51,946 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##107: assume !(1bv32 == ~q_free~0); [2022-01-11 01:50:51,946 INFO L766 $ProcedureCfgBuilder]: dead code at ProgramPoint $Ultimate##106: assume 1bv32 == ~q_free~0;~c_dr_st~0 := 2bv32;~c_dr_pc~0 := 2bv32;~a_t~0 := do_read_c_~a~0#1; [2022-01-11 01:50:51,947 INFO L275 CfgBuilder]: Performing block encoding [2022-01-11 01:50:51,959 INFO L294 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2022-01-11 01:50:51,959 INFO L299 CfgBuilder]: Removed 10 assume(true) statements. [2022-01-11 01:50:51,961 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.01 01:50:51 BoogieIcfgContainer [2022-01-11 01:50:51,961 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2022-01-11 01:50:51,962 INFO L113 PluginConnector]: ------------------------IcfgTransformer---------------------------- [2022-01-11 01:50:51,962 INFO L271 PluginConnector]: Initializing IcfgTransformer... [2022-01-11 01:50:51,963 INFO L275 PluginConnector]: IcfgTransformer initialized [2022-01-11 01:50:51,965 INFO L185 PluginConnector]: Executing the observer IcfgTransformationObserver from plugin IcfgTransformer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.01 01:50:51" (1/1) ... [2022-01-11 01:50:52,169 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 11.01 01:50:52 BasicIcfg [2022-01-11 01:50:52,170 INFO L132 PluginConnector]: ------------------------ END IcfgTransformer---------------------------- [2022-01-11 01:50:52,171 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2022-01-11 01:50:52,171 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2022-01-11 01:50:52,172 INFO L275 PluginConnector]: TraceAbstraction initialized [2022-01-11 01:50:52,173 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 11.01 01:50:50" (1/4) ... [2022-01-11 01:50:52,173 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@622b150a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.01 01:50:52, skipping insertion in model container [2022-01-11 01:50:52,173 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 11.01 01:50:51" (2/4) ... [2022-01-11 01:50:52,173 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@622b150a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 11.01 01:50:52, skipping insertion in model container [2022-01-11 01:50:52,173 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 11.01 01:50:51" (3/4) ... [2022-01-11 01:50:52,174 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@622b150a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 11.01 01:50:52, skipping insertion in model container [2022-01-11 01:50:52,174 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.icfgtransformation CFG 11.01 01:50:52" (4/4) ... [2022-01-11 01:50:52,174 INFO L111 eAbstractionObserver]: Analyzing ICFG pc_sfifo_3.cil+token_ring.03.cil-1.cTransformedIcfg [2022-01-11 01:50:52,178 INFO L204 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2022-01-11 01:50:52,178 INFO L163 ceAbstractionStarter]: Applying trace abstraction to program that has 4 error locations. [2022-01-11 01:50:52,228 INFO L338 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2022-01-11 01:50:52,232 INFO L339 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mHoare=true, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopsAndPotentialCycles, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mLoopAccelerationTechnique=FAST_UPR [2022-01-11 01:50:52,233 INFO L340 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2022-01-11 01:50:52,255 INFO L276 IsEmpty]: Start isEmpty. Operand has 475 states, 470 states have (on average 1.5574468085106383) internal successors, (732), 474 states have internal predecessors, (732), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:52,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-01-11 01:50:52,262 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:52,262 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:52,263 INFO L402 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:52,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:52,267 INFO L85 PathProgramCache]: Analyzing trace with hash -656408781, now seen corresponding path program 1 times [2022-01-11 01:50:52,272 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:52,272 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1349227439] [2022-01-11 01:50:52,273 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:52,273 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:52,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:52,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:52,514 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:52,514 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1349227439] [2022-01-11 01:50:52,515 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1349227439] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:52,515 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:52,515 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:50:52,516 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [543352919] [2022-01-11 01:50:52,517 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:52,520 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:52,521 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:52,543 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:52,543 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:52,546 INFO L87 Difference]: Start difference. First operand has 475 states, 470 states have (on average 1.5574468085106383) internal successors, (732), 474 states have internal predecessors, (732), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:52,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:52,693 INFO L93 Difference]: Finished difference Result 1017 states and 1568 transitions. [2022-01-11 01:50:52,694 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:52,695 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-01-11 01:50:52,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:52,710 INFO L225 Difference]: With dead ends: 1017 [2022-01-11 01:50:52,710 INFO L226 Difference]: Without dead ends: 597 [2022-01-11 01:50:52,760 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:52,763 INFO L933 BasicCegarLoop]: 698 mSDtfsCounter, 185 mSDsluCounter, 666 mSDsCounter, 0 mSdLazyCounter, 49 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 185 SdHoareTripleChecker+Valid, 1364 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 49 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:52,763 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [185 Valid, 1364 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 49 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2022-01-11 01:50:52,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 597 states. [2022-01-11 01:50:52,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 597 to 593. [2022-01-11 01:50:52,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 593 states, 589 states have (on average 1.4923599320882852) internal successors, (879), 592 states have internal predecessors, (879), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:52,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 593 states to 593 states and 879 transitions. [2022-01-11 01:50:52,846 INFO L78 Accepts]: Start accepts. Automaton has 593 states and 879 transitions. Word has length 44 [2022-01-11 01:50:52,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:52,850 INFO L470 AbstractCegarLoop]: Abstraction has 593 states and 879 transitions. [2022-01-11 01:50:52,850 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:52,850 INFO L276 IsEmpty]: Start isEmpty. Operand 593 states and 879 transitions. [2022-01-11 01:50:52,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2022-01-11 01:50:52,854 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:52,854 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:52,854 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2022-01-11 01:50:52,855 INFO L402 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:52,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:52,855 INFO L85 PathProgramCache]: Analyzing trace with hash 841268019, now seen corresponding path program 1 times [2022-01-11 01:50:52,855 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:52,856 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1253176408] [2022-01-11 01:50:52,856 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:52,856 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:52,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:52,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:52,941 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:52,941 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1253176408] [2022-01-11 01:50:52,941 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1253176408] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:52,941 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:52,941 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:50:52,942 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1093177286] [2022-01-11 01:50:52,942 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:52,943 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:52,943 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:52,943 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:52,943 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:52,944 INFO L87 Difference]: Start difference. First operand 593 states and 879 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:52,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:52,997 INFO L93 Difference]: Finished difference Result 1011 states and 1484 transitions. [2022-01-11 01:50:52,997 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:52,998 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 44 [2022-01-11 01:50:52,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:53,000 INFO L225 Difference]: With dead ends: 1011 [2022-01-11 01:50:53,001 INFO L226 Difference]: Without dead ends: 771 [2022-01-11 01:50:53,003 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:53,004 INFO L933 BasicCegarLoop]: 683 mSDtfsCounter, 657 mSDsluCounter, 135 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 657 SdHoareTripleChecker+Valid, 818 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:53,005 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [657 Valid, 818 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:53,007 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 771 states. [2022-01-11 01:50:53,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 771 to 763. [2022-01-11 01:50:53,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 763 states, 759 states have (on average 1.4677206851119895) internal successors, (1114), 762 states have internal predecessors, (1114), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:53,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 763 states to 763 states and 1114 transitions. [2022-01-11 01:50:53,034 INFO L78 Accepts]: Start accepts. Automaton has 763 states and 1114 transitions. Word has length 44 [2022-01-11 01:50:53,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:53,034 INFO L470 AbstractCegarLoop]: Abstraction has 763 states and 1114 transitions. [2022-01-11 01:50:53,035 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:53,037 INFO L276 IsEmpty]: Start isEmpty. Operand 763 states and 1114 transitions. [2022-01-11 01:50:53,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2022-01-11 01:50:53,043 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:53,043 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:53,044 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2022-01-11 01:50:53,044 INFO L402 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:53,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:53,044 INFO L85 PathProgramCache]: Analyzing trace with hash 2090937434, now seen corresponding path program 1 times [2022-01-11 01:50:53,045 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:53,045 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [841005065] [2022-01-11 01:50:53,045 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:53,046 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:53,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:53,119 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:53,119 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:53,121 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [841005065] [2022-01-11 01:50:53,121 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [841005065] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:53,121 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:53,121 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:50:53,121 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1246018680] [2022-01-11 01:50:53,121 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:53,122 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:53,122 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:53,123 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:53,123 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:53,123 INFO L87 Difference]: Start difference. First operand 763 states and 1114 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:53,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:53,202 INFO L93 Difference]: Finished difference Result 1485 states and 2148 transitions. [2022-01-11 01:50:53,202 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:53,202 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 45 [2022-01-11 01:50:53,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:53,207 INFO L225 Difference]: With dead ends: 1485 [2022-01-11 01:50:53,207 INFO L226 Difference]: Without dead ends: 1089 [2022-01-11 01:50:53,210 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:53,213 INFO L933 BasicCegarLoop]: 677 mSDtfsCounter, 641 mSDsluCounter, 138 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 641 SdHoareTripleChecker+Valid, 815 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:53,214 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [641 Valid, 815 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:53,216 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1089 states. [2022-01-11 01:50:53,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1089 to 1081. [2022-01-11 01:50:53,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1081 states, 1077 states have (on average 1.436397400185701) internal successors, (1547), 1080 states have internal predecessors, (1547), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:53,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1081 states to 1081 states and 1547 transitions. [2022-01-11 01:50:53,250 INFO L78 Accepts]: Start accepts. Automaton has 1081 states and 1547 transitions. Word has length 45 [2022-01-11 01:50:53,250 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:53,250 INFO L470 AbstractCegarLoop]: Abstraction has 1081 states and 1547 transitions. [2022-01-11 01:50:53,250 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:53,250 INFO L276 IsEmpty]: Start isEmpty. Operand 1081 states and 1547 transitions. [2022-01-11 01:50:53,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2022-01-11 01:50:53,251 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:53,251 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:53,251 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2022-01-11 01:50:53,252 INFO L402 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:53,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:53,252 INFO L85 PathProgramCache]: Analyzing trace with hash -664596990, now seen corresponding path program 1 times [2022-01-11 01:50:53,252 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:53,253 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [747772282] [2022-01-11 01:50:53,253 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:53,253 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:53,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:53,306 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 7 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2022-01-11 01:50:53,307 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:53,307 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [747772282] [2022-01-11 01:50:53,307 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [747772282] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:53,307 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:53,307 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:50:53,307 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1159454880] [2022-01-11 01:50:53,307 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:53,308 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:53,308 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:53,308 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:53,308 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:53,309 INFO L87 Difference]: Start difference. First operand 1081 states and 1547 transitions. Second operand has 3 states, 3 states have (on average 19.0) internal successors, (57), 3 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:53,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:53,382 INFO L93 Difference]: Finished difference Result 2449 states and 3449 transitions. [2022-01-11 01:50:53,382 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:53,382 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.0) internal successors, (57), 3 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 59 [2022-01-11 01:50:53,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:53,399 INFO L225 Difference]: With dead ends: 2449 [2022-01-11 01:50:53,399 INFO L226 Difference]: Without dead ends: 1753 [2022-01-11 01:50:53,402 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:53,408 INFO L933 BasicCegarLoop]: 680 mSDtfsCounter, 625 mSDsluCounter, 165 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 625 SdHoareTripleChecker+Valid, 845 SdHoareTripleChecker+Invalid, 26 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:53,409 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [625 Valid, 845 Invalid, 26 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:53,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1753 states. [2022-01-11 01:50:53,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1753 to 1749. [2022-01-11 01:50:53,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1749 states, 1745 states have (on average 1.394269340974212) internal successors, (2433), 1748 states have internal predecessors, (2433), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:53,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1749 states to 1749 states and 2433 transitions. [2022-01-11 01:50:53,503 INFO L78 Accepts]: Start accepts. Automaton has 1749 states and 2433 transitions. Word has length 59 [2022-01-11 01:50:53,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:53,503 INFO L470 AbstractCegarLoop]: Abstraction has 1749 states and 2433 transitions. [2022-01-11 01:50:53,503 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.0) internal successors, (57), 3 states have internal predecessors, (57), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:53,503 INFO L276 IsEmpty]: Start isEmpty. Operand 1749 states and 2433 transitions. [2022-01-11 01:50:53,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2022-01-11 01:50:53,505 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:53,505 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:53,505 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2022-01-11 01:50:53,505 INFO L402 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:53,506 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:53,506 INFO L85 PathProgramCache]: Analyzing trace with hash 289795486, now seen corresponding path program 1 times [2022-01-11 01:50:53,506 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:53,506 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371654315] [2022-01-11 01:50:53,506 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:53,506 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:53,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:53,540 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:53,540 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:53,540 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1371654315] [2022-01-11 01:50:53,540 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1371654315] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:53,540 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:53,541 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:50:53,541 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2119376388] [2022-01-11 01:50:53,541 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:53,541 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:53,541 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:53,541 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:53,541 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:53,542 INFO L87 Difference]: Start difference. First operand 1749 states and 2433 transitions. Second operand has 3 states, 3 states have (on average 20.333333333333332) internal successors, (61), 3 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:53,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:53,636 INFO L93 Difference]: Finished difference Result 4373 states and 6015 transitions. [2022-01-11 01:50:53,636 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:53,636 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 20.333333333333332) internal successors, (61), 3 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 61 [2022-01-11 01:50:53,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:53,644 INFO L225 Difference]: With dead ends: 4373 [2022-01-11 01:50:53,644 INFO L226 Difference]: Without dead ends: 3053 [2022-01-11 01:50:53,646 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:53,646 INFO L933 BasicCegarLoop]: 825 mSDtfsCounter, 146 mSDsluCounter, 667 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 146 SdHoareTripleChecker+Valid, 1492 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:53,647 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [146 Valid, 1492 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:53,649 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3053 states. [2022-01-11 01:50:53,722 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3053 to 3053. [2022-01-11 01:50:53,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3053 states, 3049 states have (on average 1.3647097408986553) internal successors, (4161), 3052 states have internal predecessors, (4161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:53,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3053 states to 3053 states and 4161 transitions. [2022-01-11 01:50:53,735 INFO L78 Accepts]: Start accepts. Automaton has 3053 states and 4161 transitions. Word has length 61 [2022-01-11 01:50:53,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:53,737 INFO L470 AbstractCegarLoop]: Abstraction has 3053 states and 4161 transitions. [2022-01-11 01:50:53,737 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 20.333333333333332) internal successors, (61), 3 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:53,737 INFO L276 IsEmpty]: Start isEmpty. Operand 3053 states and 4161 transitions. [2022-01-11 01:50:53,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-11 01:50:53,739 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:53,740 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:53,740 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2022-01-11 01:50:53,740 INFO L402 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:53,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:53,740 INFO L85 PathProgramCache]: Analyzing trace with hash -1863469026, now seen corresponding path program 1 times [2022-01-11 01:50:53,740 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:53,740 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1825707553] [2022-01-11 01:50:53,741 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:53,741 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:53,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:53,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:53,797 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:53,797 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1825707553] [2022-01-11 01:50:53,798 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1825707553] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:53,798 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:53,798 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-11 01:50:53,798 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [928152297] [2022-01-11 01:50:53,798 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:53,798 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:53,798 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:53,800 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:53,800 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:53,800 INFO L87 Difference]: Start difference. First operand 3053 states and 4161 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:53,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:53,928 INFO L93 Difference]: Finished difference Result 3612 states and 4996 transitions. [2022-01-11 01:50:53,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:53,929 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-11 01:50:53,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:53,937 INFO L225 Difference]: With dead ends: 3612 [2022-01-11 01:50:53,937 INFO L226 Difference]: Without dead ends: 3295 [2022-01-11 01:50:53,940 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:53,941 INFO L933 BasicCegarLoop]: 678 mSDtfsCounter, 626 mSDsluCounter, 396 mSDsCounter, 0 mSdLazyCounter, 9 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 626 SdHoareTripleChecker+Valid, 1074 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 9 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:53,941 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [626 Valid, 1074 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 9 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:53,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3295 states. [2022-01-11 01:50:54,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3295 to 3291. [2022-01-11 01:50:54,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.373592941892303) internal successors, (4515), 3290 states have internal predecessors, (4515), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:54,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4515 transitions. [2022-01-11 01:50:54,054 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4515 transitions. Word has length 66 [2022-01-11 01:50:54,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:54,056 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4515 transitions. [2022-01-11 01:50:54,056 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:54,056 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4515 transitions. [2022-01-11 01:50:54,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-11 01:50:54,058 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:54,059 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:54,059 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2022-01-11 01:50:54,059 INFO L402 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:54,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:54,059 INFO L85 PathProgramCache]: Analyzing trace with hash -598367170, now seen corresponding path program 1 times [2022-01-11 01:50:54,059 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:54,060 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [925372344] [2022-01-11 01:50:54,060 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:54,060 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:54,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:54,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:54,099 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:54,099 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [925372344] [2022-01-11 01:50:54,099 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [925372344] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:54,099 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:54,099 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-11 01:50:54,099 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1758083104] [2022-01-11 01:50:54,100 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:54,100 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:54,100 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:54,100 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:54,100 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:54,100 INFO L87 Difference]: Start difference. First operand 3291 states and 4515 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:54,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:54,189 INFO L93 Difference]: Finished difference Result 3845 states and 5343 transitions. [2022-01-11 01:50:54,189 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:54,190 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-11 01:50:54,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:54,215 INFO L225 Difference]: With dead ends: 3845 [2022-01-11 01:50:54,215 INFO L226 Difference]: Without dead ends: 3291 [2022-01-11 01:50:54,216 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:54,217 INFO L933 BasicCegarLoop]: 672 mSDtfsCounter, 666 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 666 SdHoareTripleChecker+Valid, 672 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:54,217 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [666 Valid, 672 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:54,219 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-11 01:50:54,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-11 01:50:54,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3711591116519624) internal successors, (4507), 3290 states have internal predecessors, (4507), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:54,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4507 transitions. [2022-01-11 01:50:54,316 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4507 transitions. Word has length 66 [2022-01-11 01:50:54,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:54,316 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4507 transitions. [2022-01-11 01:50:54,316 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:54,316 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4507 transitions. [2022-01-11 01:50:54,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-11 01:50:54,319 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:54,319 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:54,319 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2022-01-11 01:50:54,319 INFO L402 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:54,320 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:54,320 INFO L85 PathProgramCache]: Analyzing trace with hash -1943030754, now seen corresponding path program 1 times [2022-01-11 01:50:54,320 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:54,320 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [219612458] [2022-01-11 01:50:54,320 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:54,320 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:54,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:54,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:54,341 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:54,341 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [219612458] [2022-01-11 01:50:54,341 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [219612458] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:54,341 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:54,342 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-11 01:50:54,342 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [660581452] [2022-01-11 01:50:54,342 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:54,342 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:54,342 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:54,342 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:54,342 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:54,343 INFO L87 Difference]: Start difference. First operand 3291 states and 4507 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:54,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:54,430 INFO L93 Difference]: Finished difference Result 3844 states and 5326 transitions. [2022-01-11 01:50:54,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:54,430 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-11 01:50:54,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:54,438 INFO L225 Difference]: With dead ends: 3844 [2022-01-11 01:50:54,439 INFO L226 Difference]: Without dead ends: 3291 [2022-01-11 01:50:54,440 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:54,440 INFO L933 BasicCegarLoop]: 667 mSDtfsCounter, 660 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 660 SdHoareTripleChecker+Valid, 667 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:54,441 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [660 Valid, 667 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:54,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-11 01:50:54,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-11 01:50:54,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3687252814116215) internal successors, (4499), 3290 states have internal predecessors, (4499), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:54,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4499 transitions. [2022-01-11 01:50:54,582 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4499 transitions. Word has length 66 [2022-01-11 01:50:54,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:54,582 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4499 transitions. [2022-01-11 01:50:54,582 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:54,582 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4499 transitions. [2022-01-11 01:50:54,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-11 01:50:54,584 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:54,584 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:54,584 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2022-01-11 01:50:54,584 INFO L402 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:54,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:54,585 INFO L85 PathProgramCache]: Analyzing trace with hash -1293670338, now seen corresponding path program 1 times [2022-01-11 01:50:54,585 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:54,585 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [867850856] [2022-01-11 01:50:54,585 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:54,585 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:54,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:54,608 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:54,608 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:54,608 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [867850856] [2022-01-11 01:50:54,608 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [867850856] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:54,608 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:54,608 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-11 01:50:54,608 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [410775545] [2022-01-11 01:50:54,609 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:54,609 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:54,609 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:54,609 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:54,609 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:54,609 INFO L87 Difference]: Start difference. First operand 3291 states and 4499 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:54,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:54,714 INFO L93 Difference]: Finished difference Result 3843 states and 5309 transitions. [2022-01-11 01:50:54,714 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:54,714 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-11 01:50:54,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:54,722 INFO L225 Difference]: With dead ends: 3843 [2022-01-11 01:50:54,722 INFO L226 Difference]: Without dead ends: 3291 [2022-01-11 01:50:54,724 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:54,726 INFO L933 BasicCegarLoop]: 662 mSDtfsCounter, 654 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 654 SdHoareTripleChecker+Valid, 662 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:54,726 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [654 Valid, 662 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:54,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-11 01:50:54,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-11 01:50:54,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3662914511712807) internal successors, (4491), 3290 states have internal predecessors, (4491), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:54,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4491 transitions. [2022-01-11 01:50:54,848 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4491 transitions. Word has length 66 [2022-01-11 01:50:54,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:54,848 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4491 transitions. [2022-01-11 01:50:54,848 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:54,849 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4491 transitions. [2022-01-11 01:50:54,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-11 01:50:54,854 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:54,854 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:54,854 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2022-01-11 01:50:54,855 INFO L402 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:54,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:54,857 INFO L85 PathProgramCache]: Analyzing trace with hash 666939422, now seen corresponding path program 1 times [2022-01-11 01:50:54,857 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:54,857 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2003567703] [2022-01-11 01:50:54,857 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:54,857 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:54,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:54,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:54,899 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:54,899 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2003567703] [2022-01-11 01:50:54,900 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2003567703] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:54,900 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:54,900 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-11 01:50:54,900 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1277656126] [2022-01-11 01:50:54,900 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:54,900 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:54,900 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:54,900 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:54,901 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:54,901 INFO L87 Difference]: Start difference. First operand 3291 states and 4491 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:55,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:55,016 INFO L93 Difference]: Finished difference Result 3842 states and 5292 transitions. [2022-01-11 01:50:55,016 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:55,016 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-11 01:50:55,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:55,026 INFO L225 Difference]: With dead ends: 3842 [2022-01-11 01:50:55,026 INFO L226 Difference]: Without dead ends: 3291 [2022-01-11 01:50:55,027 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:55,028 INFO L933 BasicCegarLoop]: 645 mSDtfsCounter, 600 mSDsluCounter, 38 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 600 SdHoareTripleChecker+Valid, 683 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:55,029 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [600 Valid, 683 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:55,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-11 01:50:55,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-11 01:50:55,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3608153331305142) internal successors, (4473), 3290 states have internal predecessors, (4473), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:55,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4473 transitions. [2022-01-11 01:50:55,165 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4473 transitions. Word has length 66 [2022-01-11 01:50:55,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:55,165 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4473 transitions. [2022-01-11 01:50:55,165 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:55,165 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4473 transitions. [2022-01-11 01:50:55,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-11 01:50:55,167 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:55,167 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:55,167 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2022-01-11 01:50:55,168 INFO L402 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:55,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:55,168 INFO L85 PathProgramCache]: Analyzing trace with hash 195882429, now seen corresponding path program 1 times [2022-01-11 01:50:55,168 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:55,168 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [358300982] [2022-01-11 01:50:55,168 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:55,169 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:55,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:55,194 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:55,194 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:55,194 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [358300982] [2022-01-11 01:50:55,194 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [358300982] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:55,194 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:55,194 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-11 01:50:55,195 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [654505801] [2022-01-11 01:50:55,195 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:55,195 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:55,195 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:55,195 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:55,195 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:55,196 INFO L87 Difference]: Start difference. First operand 3291 states and 4473 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:55,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:55,332 INFO L93 Difference]: Finished difference Result 3841 states and 5255 transitions. [2022-01-11 01:50:55,332 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:55,333 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-11 01:50:55,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:55,363 INFO L225 Difference]: With dead ends: 3841 [2022-01-11 01:50:55,363 INFO L226 Difference]: Without dead ends: 3291 [2022-01-11 01:50:55,364 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:55,365 INFO L933 BasicCegarLoop]: 634 mSDtfsCounter, 589 mSDsluCounter, 37 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 589 SdHoareTripleChecker+Valid, 671 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:55,365 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [589 Valid, 671 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:55,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-11 01:50:55,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-11 01:50:55,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3553392150897474) internal successors, (4455), 3290 states have internal predecessors, (4455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:55,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4455 transitions. [2022-01-11 01:50:55,464 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4455 transitions. Word has length 66 [2022-01-11 01:50:55,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:55,464 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4455 transitions. [2022-01-11 01:50:55,464 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:55,464 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4455 transitions. [2022-01-11 01:50:55,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-11 01:50:55,466 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:55,466 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:55,466 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2022-01-11 01:50:55,466 INFO L402 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:55,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:55,467 INFO L85 PathProgramCache]: Analyzing trace with hash 1319500380, now seen corresponding path program 1 times [2022-01-11 01:50:55,467 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:55,467 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608073553] [2022-01-11 01:50:55,467 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:55,467 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:55,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:55,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:55,485 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:55,486 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608073553] [2022-01-11 01:50:55,486 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1608073553] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:55,486 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:55,486 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-11 01:50:55,486 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [114171233] [2022-01-11 01:50:55,486 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:55,486 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:55,486 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:55,486 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:55,487 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:55,487 INFO L87 Difference]: Start difference. First operand 3291 states and 4455 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:55,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:55,604 INFO L93 Difference]: Finished difference Result 3840 states and 5218 transitions. [2022-01-11 01:50:55,604 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:55,604 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-11 01:50:55,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:55,609 INFO L225 Difference]: With dead ends: 3840 [2022-01-11 01:50:55,609 INFO L226 Difference]: Without dead ends: 3291 [2022-01-11 01:50:55,610 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:55,611 INFO L933 BasicCegarLoop]: 623 mSDtfsCounter, 578 mSDsluCounter, 36 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 578 SdHoareTripleChecker+Valid, 659 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:55,611 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [578 Valid, 659 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:55,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-11 01:50:55,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-11 01:50:55,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3498630970489809) internal successors, (4437), 3290 states have internal predecessors, (4437), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:55,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4437 transitions. [2022-01-11 01:50:55,742 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4437 transitions. Word has length 66 [2022-01-11 01:50:55,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:55,742 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4437 transitions. [2022-01-11 01:50:55,743 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:55,743 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4437 transitions. [2022-01-11 01:50:55,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-11 01:50:55,745 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:55,745 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:55,745 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2022-01-11 01:50:55,745 INFO L402 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:55,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:55,745 INFO L85 PathProgramCache]: Analyzing trace with hash -1862697348, now seen corresponding path program 1 times [2022-01-11 01:50:55,745 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:55,746 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [404777895] [2022-01-11 01:50:55,746 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:55,746 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:55,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:55,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:55,776 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:55,776 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [404777895] [2022-01-11 01:50:55,776 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [404777895] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:55,776 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:55,776 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-11 01:50:55,776 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1048478803] [2022-01-11 01:50:55,776 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:55,776 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:55,776 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:55,777 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:55,777 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:55,777 INFO L87 Difference]: Start difference. First operand 3291 states and 4437 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:55,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:55,894 INFO L93 Difference]: Finished difference Result 3839 states and 5181 transitions. [2022-01-11 01:50:55,895 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:55,895 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-11 01:50:55,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:55,901 INFO L225 Difference]: With dead ends: 3839 [2022-01-11 01:50:55,901 INFO L226 Difference]: Without dead ends: 3291 [2022-01-11 01:50:55,902 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:55,903 INFO L933 BasicCegarLoop]: 612 mSDtfsCounter, 567 mSDsluCounter, 35 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 567 SdHoareTripleChecker+Valid, 647 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:55,904 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [567 Valid, 647 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:55,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3291 states. [2022-01-11 01:50:56,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3291 to 3291. [2022-01-11 01:50:56,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3291 states, 3287 states have (on average 1.3443869790082141) internal successors, (4419), 3290 states have internal predecessors, (4419), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:56,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3291 states to 3291 states and 4419 transitions. [2022-01-11 01:50:56,093 INFO L78 Accepts]: Start accepts. Automaton has 3291 states and 4419 transitions. Word has length 66 [2022-01-11 01:50:56,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:56,093 INFO L470 AbstractCegarLoop]: Abstraction has 3291 states and 4419 transitions. [2022-01-11 01:50:56,094 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:56,094 INFO L276 IsEmpty]: Start isEmpty. Operand 3291 states and 4419 transitions. [2022-01-11 01:50:56,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-11 01:50:56,095 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:56,096 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:56,096 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2022-01-11 01:50:56,096 INFO L402 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:56,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:56,096 INFO L85 PathProgramCache]: Analyzing trace with hash -1686828100, now seen corresponding path program 1 times [2022-01-11 01:50:56,096 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:56,096 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633595110] [2022-01-11 01:50:56,097 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:56,097 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:56,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:56,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:56,146 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:56,146 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1633595110] [2022-01-11 01:50:56,146 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1633595110] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:56,146 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:56,147 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-01-11 01:50:56,147 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [572728532] [2022-01-11 01:50:56,147 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:56,147 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-01-11 01:50:56,147 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:56,147 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-01-11 01:50:56,147 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-01-11 01:50:56,148 INFO L87 Difference]: Start difference. First operand 3291 states and 4419 transitions. Second operand has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:56,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:56,335 INFO L93 Difference]: Finished difference Result 4162 states and 5599 transitions. [2022-01-11 01:50:56,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-01-11 01:50:56,336 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-11 01:50:56,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:56,342 INFO L225 Difference]: With dead ends: 4162 [2022-01-11 01:50:56,343 INFO L226 Difference]: Without dead ends: 3621 [2022-01-11 01:50:56,344 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-01-11 01:50:56,345 INFO L933 BasicCegarLoop]: 657 mSDtfsCounter, 1154 mSDsluCounter, 1280 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1154 SdHoareTripleChecker+Valid, 1937 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:56,345 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [1154 Valid, 1937 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:56,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3621 states. [2022-01-11 01:50:56,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3621 to 3297. [2022-01-11 01:50:56,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3297 states, 3293 states have (on average 1.3407227452171273) internal successors, (4415), 3296 states have internal predecessors, (4415), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:56,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3297 states to 3297 states and 4415 transitions. [2022-01-11 01:50:56,495 INFO L78 Accepts]: Start accepts. Automaton has 3297 states and 4415 transitions. Word has length 66 [2022-01-11 01:50:56,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:56,495 INFO L470 AbstractCegarLoop]: Abstraction has 3297 states and 4415 transitions. [2022-01-11 01:50:56,495 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:56,495 INFO L276 IsEmpty]: Start isEmpty. Operand 3297 states and 4415 transitions. [2022-01-11 01:50:56,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-11 01:50:56,497 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:56,497 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:56,497 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2022-01-11 01:50:56,497 INFO L402 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:56,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:56,498 INFO L85 PathProgramCache]: Analyzing trace with hash -2135524739, now seen corresponding path program 1 times [2022-01-11 01:50:56,498 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:56,498 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [454727837] [2022-01-11 01:50:56,498 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:56,498 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:56,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:56,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:56,527 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:56,527 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [454727837] [2022-01-11 01:50:56,527 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [454727837] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:56,527 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:56,527 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-01-11 01:50:56,527 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1464519391] [2022-01-11 01:50:56,527 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:56,527 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-01-11 01:50:56,527 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:56,528 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-01-11 01:50:56,528 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-01-11 01:50:56,528 INFO L87 Difference]: Start difference. First operand 3297 states and 4415 transitions. Second operand has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:56,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:56,690 INFO L93 Difference]: Finished difference Result 4250 states and 5684 transitions. [2022-01-11 01:50:56,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-01-11 01:50:56,691 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-11 01:50:56,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:56,696 INFO L225 Difference]: With dead ends: 4250 [2022-01-11 01:50:56,696 INFO L226 Difference]: Without dead ends: 3717 [2022-01-11 01:50:56,697 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-01-11 01:50:56,697 INFO L933 BasicCegarLoop]: 615 mSDtfsCounter, 980 mSDsluCounter, 1532 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 980 SdHoareTripleChecker+Valid, 2147 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:56,698 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [980 Valid, 2147 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:56,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3717 states. [2022-01-11 01:50:56,802 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3717 to 3303. [2022-01-11 01:50:56,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3303 states, 3299 states have (on average 1.3370718399515005) internal successors, (4411), 3302 states have internal predecessors, (4411), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:56,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3303 states to 3303 states and 4411 transitions. [2022-01-11 01:50:56,808 INFO L78 Accepts]: Start accepts. Automaton has 3303 states and 4411 transitions. Word has length 66 [2022-01-11 01:50:56,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:56,809 INFO L470 AbstractCegarLoop]: Abstraction has 3303 states and 4411 transitions. [2022-01-11 01:50:56,809 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:56,809 INFO L276 IsEmpty]: Start isEmpty. Operand 3303 states and 4411 transitions. [2022-01-11 01:50:56,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-11 01:50:56,811 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:56,811 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:56,811 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2022-01-11 01:50:56,811 INFO L402 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:56,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:56,811 INFO L85 PathProgramCache]: Analyzing trace with hash -1784724802, now seen corresponding path program 1 times [2022-01-11 01:50:56,812 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:56,812 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [195616444] [2022-01-11 01:50:56,812 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:56,812 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:56,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:56,861 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:56,861 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:56,861 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [195616444] [2022-01-11 01:50:56,861 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [195616444] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:56,861 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:56,861 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-01-11 01:50:56,861 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1215175423] [2022-01-11 01:50:56,861 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:56,862 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-01-11 01:50:56,862 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:56,862 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-01-11 01:50:56,862 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-01-11 01:50:56,862 INFO L87 Difference]: Start difference. First operand 3303 states and 4411 transitions. Second operand has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:57,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:57,044 INFO L93 Difference]: Finished difference Result 4303 states and 5722 transitions. [2022-01-11 01:50:57,044 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-01-11 01:50:57,044 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-11 01:50:57,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:57,050 INFO L225 Difference]: With dead ends: 4303 [2022-01-11 01:50:57,050 INFO L226 Difference]: Without dead ends: 3771 [2022-01-11 01:50:57,052 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-01-11 01:50:57,052 INFO L933 BasicCegarLoop]: 589 mSDtfsCounter, 888 mSDsluCounter, 1469 mSDsCounter, 0 mSdLazyCounter, 55 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 888 SdHoareTripleChecker+Valid, 2058 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 55 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:57,052 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [888 Valid, 2058 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 55 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:57,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3771 states. [2022-01-11 01:50:57,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3771 to 3309. [2022-01-11 01:50:57,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3309 states, 3305 states have (on average 1.3334341906202722) internal successors, (4407), 3308 states have internal predecessors, (4407), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:57,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3309 states to 3309 states and 4407 transitions. [2022-01-11 01:50:57,175 INFO L78 Accepts]: Start accepts. Automaton has 3309 states and 4407 transitions. Word has length 66 [2022-01-11 01:50:57,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:57,175 INFO L470 AbstractCegarLoop]: Abstraction has 3309 states and 4407 transitions. [2022-01-11 01:50:57,175 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 13.2) internal successors, (66), 5 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:57,175 INFO L276 IsEmpty]: Start isEmpty. Operand 3309 states and 4407 transitions. [2022-01-11 01:50:57,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2022-01-11 01:50:57,177 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:57,177 INFO L514 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:57,177 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2022-01-11 01:50:57,177 INFO L402 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:57,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:57,178 INFO L85 PathProgramCache]: Analyzing trace with hash 433033151, now seen corresponding path program 1 times [2022-01-11 01:50:57,178 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:57,178 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1784280519] [2022-01-11 01:50:57,178 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:57,178 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:57,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:57,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:57,207 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:57,207 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1784280519] [2022-01-11 01:50:57,207 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1784280519] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:57,207 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:57,207 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-11 01:50:57,207 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [800300524] [2022-01-11 01:50:57,207 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:57,207 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:57,207 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:57,208 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:57,208 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:57,208 INFO L87 Difference]: Start difference. First operand 3309 states and 4407 transitions. Second operand has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:57,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:57,361 INFO L93 Difference]: Finished difference Result 4363 states and 5737 transitions. [2022-01-11 01:50:57,361 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:57,361 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 66 [2022-01-11 01:50:57,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:57,367 INFO L225 Difference]: With dead ends: 4363 [2022-01-11 01:50:57,367 INFO L226 Difference]: Without dead ends: 3799 [2022-01-11 01:50:57,368 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:57,369 INFO L933 BasicCegarLoop]: 595 mSDtfsCounter, 508 mSDsluCounter, 330 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 508 SdHoareTripleChecker+Valid, 925 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:57,369 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [508 Valid, 925 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:57,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3799 states. [2022-01-11 01:50:57,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3799 to 3745. [2022-01-11 01:50:57,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3745 states, 3741 states have (on average 1.322373696872494) internal successors, (4947), 3744 states have internal predecessors, (4947), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:57,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3745 states to 3745 states and 4947 transitions. [2022-01-11 01:50:57,502 INFO L78 Accepts]: Start accepts. Automaton has 3745 states and 4947 transitions. Word has length 66 [2022-01-11 01:50:57,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:57,502 INFO L470 AbstractCegarLoop]: Abstraction has 3745 states and 4947 transitions. [2022-01-11 01:50:57,502 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 22.0) internal successors, (66), 2 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:57,502 INFO L276 IsEmpty]: Start isEmpty. Operand 3745 states and 4947 transitions. [2022-01-11 01:50:57,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2022-01-11 01:50:57,506 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:57,506 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:57,506 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2022-01-11 01:50:57,506 INFO L402 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:57,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:57,507 INFO L85 PathProgramCache]: Analyzing trace with hash -1440257348, now seen corresponding path program 1 times [2022-01-11 01:50:57,507 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:57,507 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [467761963] [2022-01-11 01:50:57,507 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:57,507 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:57,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:57,539 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 19 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2022-01-11 01:50:57,540 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:57,540 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [467761963] [2022-01-11 01:50:57,540 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [467761963] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:57,540 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:57,540 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:50:57,540 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [822033457] [2022-01-11 01:50:57,540 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:57,540 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:57,540 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:57,541 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:57,541 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:57,541 INFO L87 Difference]: Start difference. First operand 3745 states and 4947 transitions. Second operand has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:57,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:57,838 INFO L93 Difference]: Finished difference Result 8825 states and 11831 transitions. [2022-01-11 01:50:57,839 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:57,839 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 103 [2022-01-11 01:50:57,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:57,850 INFO L225 Difference]: With dead ends: 8825 [2022-01-11 01:50:57,850 INFO L226 Difference]: Without dead ends: 6285 [2022-01-11 01:50:57,854 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:57,854 INFO L933 BasicCegarLoop]: 600 mSDtfsCounter, 131 mSDsluCounter, 553 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 131 SdHoareTripleChecker+Valid, 1153 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:57,856 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [131 Valid, 1153 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:57,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6285 states. [2022-01-11 01:50:58,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6285 to 6281. [2022-01-11 01:50:58,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6281 states, 6277 states have (on average 1.3259518878445118) internal successors, (8323), 6280 states have internal predecessors, (8323), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:58,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6281 states to 6281 states and 8323 transitions. [2022-01-11 01:50:58,101 INFO L78 Accepts]: Start accepts. Automaton has 6281 states and 8323 transitions. Word has length 103 [2022-01-11 01:50:58,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:58,101 INFO L470 AbstractCegarLoop]: Abstraction has 6281 states and 8323 transitions. [2022-01-11 01:50:58,102 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:58,102 INFO L276 IsEmpty]: Start isEmpty. Operand 6281 states and 8323 transitions. [2022-01-11 01:50:58,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2022-01-11 01:50:58,108 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:58,108 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:58,108 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2022-01-11 01:50:58,108 INFO L402 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:58,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:58,109 INFO L85 PathProgramCache]: Analyzing trace with hash 1578774055, now seen corresponding path program 1 times [2022-01-11 01:50:58,109 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:58,109 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1610359331] [2022-01-11 01:50:58,109 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:58,109 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:58,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:58,168 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 25 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:58,168 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:58,168 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1610359331] [2022-01-11 01:50:58,168 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1610359331] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:58,168 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:58,168 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:50:58,168 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781036638] [2022-01-11 01:50:58,168 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:58,169 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:58,169 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:58,169 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:58,169 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:58,169 INFO L87 Difference]: Start difference. First operand 6281 states and 8323 transitions. Second operand has 3 states, 3 states have (on average 34.666666666666664) internal successors, (104), 3 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:58,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:58,374 INFO L93 Difference]: Finished difference Result 8849 states and 11827 transitions. [2022-01-11 01:50:58,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:58,375 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 34.666666666666664) internal successors, (104), 3 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 104 [2022-01-11 01:50:58,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:58,376 INFO L225 Difference]: With dead ends: 8849 [2022-01-11 01:50:58,376 INFO L226 Difference]: Without dead ends: 1020 [2022-01-11 01:50:58,383 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:58,383 INFO L933 BasicCegarLoop]: 706 mSDtfsCounter, 112 mSDsluCounter, 569 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 112 SdHoareTripleChecker+Valid, 1275 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:58,385 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [112 Valid, 1275 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:58,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1020 states. [2022-01-11 01:50:58,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1020 to 1020. [2022-01-11 01:50:58,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1020 states, 1018 states have (on average 1.2544204322200392) internal successors, (1277), 1019 states have internal predecessors, (1277), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:58,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1020 states to 1020 states and 1277 transitions. [2022-01-11 01:50:58,428 INFO L78 Accepts]: Start accepts. Automaton has 1020 states and 1277 transitions. Word has length 104 [2022-01-11 01:50:58,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:58,428 INFO L470 AbstractCegarLoop]: Abstraction has 1020 states and 1277 transitions. [2022-01-11 01:50:58,428 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 34.666666666666664) internal successors, (104), 3 states have internal predecessors, (104), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:58,428 INFO L276 IsEmpty]: Start isEmpty. Operand 1020 states and 1277 transitions. [2022-01-11 01:50:58,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2022-01-11 01:50:58,429 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:58,429 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:58,429 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2022-01-11 01:50:58,429 INFO L402 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:58,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:58,429 INFO L85 PathProgramCache]: Analyzing trace with hash 460040544, now seen corresponding path program 1 times [2022-01-11 01:50:58,429 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:58,430 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [661296602] [2022-01-11 01:50:58,430 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:58,430 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:58,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:58,474 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:58,475 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:58,475 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [661296602] [2022-01-11 01:50:58,475 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [661296602] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:58,475 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:58,475 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:50:58,475 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1543155233] [2022-01-11 01:50:58,475 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:58,475 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:58,475 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:58,476 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:58,476 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:58,476 INFO L87 Difference]: Start difference. First operand 1020 states and 1277 transitions. Second operand has 3 states, 3 states have (on average 35.333333333333336) internal successors, (106), 3 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:58,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:58,608 INFO L93 Difference]: Finished difference Result 2920 states and 3670 transitions. [2022-01-11 01:50:58,608 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:58,608 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 35.333333333333336) internal successors, (106), 3 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 106 [2022-01-11 01:50:58,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:58,612 INFO L225 Difference]: With dead ends: 2920 [2022-01-11 01:50:58,612 INFO L226 Difference]: Without dead ends: 1926 [2022-01-11 01:50:58,614 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:58,615 INFO L933 BasicCegarLoop]: 399 mSDtfsCounter, 335 mSDsluCounter, 330 mSDsCounter, 0 mSdLazyCounter, 18 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 335 SdHoareTripleChecker+Valid, 729 SdHoareTripleChecker+Invalid, 33 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 18 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:58,615 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [335 Valid, 729 Invalid, 33 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 18 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:58,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1926 states. [2022-01-11 01:50:58,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1926 to 1822. [2022-01-11 01:50:58,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1822 states, 1820 states have (on average 1.2532967032967033) internal successors, (2281), 1821 states have internal predecessors, (2281), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:58,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1822 states to 1822 states and 2281 transitions. [2022-01-11 01:50:58,742 INFO L78 Accepts]: Start accepts. Automaton has 1822 states and 2281 transitions. Word has length 106 [2022-01-11 01:50:58,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:58,742 INFO L470 AbstractCegarLoop]: Abstraction has 1822 states and 2281 transitions. [2022-01-11 01:50:58,743 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 35.333333333333336) internal successors, (106), 3 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:58,743 INFO L276 IsEmpty]: Start isEmpty. Operand 1822 states and 2281 transitions. [2022-01-11 01:50:58,744 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2022-01-11 01:50:58,744 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:58,744 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:58,744 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2022-01-11 01:50:58,744 INFO L402 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:58,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:58,744 INFO L85 PathProgramCache]: Analyzing trace with hash -58461857, now seen corresponding path program 1 times [2022-01-11 01:50:58,745 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:58,745 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1720624543] [2022-01-11 01:50:58,745 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:58,745 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:58,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:58,777 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:58,778 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:58,778 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1720624543] [2022-01-11 01:50:58,778 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1720624543] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:58,778 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:58,778 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:50:58,778 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [413486883] [2022-01-11 01:50:58,778 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:58,778 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:58,779 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:58,779 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:58,779 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:58,779 INFO L87 Difference]: Start difference. First operand 1822 states and 2281 transitions. Second operand has 3 states, 3 states have (on average 35.333333333333336) internal successors, (106), 3 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:58,969 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:58,969 INFO L93 Difference]: Finished difference Result 5275 states and 6565 transitions. [2022-01-11 01:50:58,969 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:58,970 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 35.333333333333336) internal successors, (106), 3 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 106 [2022-01-11 01:50:58,970 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:58,975 INFO L225 Difference]: With dead ends: 5275 [2022-01-11 01:50:58,975 INFO L226 Difference]: Without dead ends: 3507 [2022-01-11 01:50:58,977 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:58,978 INFO L933 BasicCegarLoop]: 490 mSDtfsCounter, 344 mSDsluCounter, 381 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 18 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 344 SdHoareTripleChecker+Valid, 871 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 18 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:58,978 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [344 Valid, 871 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [18 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:58,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3507 states. [2022-01-11 01:50:59,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3507 to 3419. [2022-01-11 01:50:59,127 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3419 states, 3417 states have (on average 1.2323675738952298) internal successors, (4211), 3418 states have internal predecessors, (4211), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:59,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3419 states to 3419 states and 4211 transitions. [2022-01-11 01:50:59,131 INFO L78 Accepts]: Start accepts. Automaton has 3419 states and 4211 transitions. Word has length 106 [2022-01-11 01:50:59,131 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:59,132 INFO L470 AbstractCegarLoop]: Abstraction has 3419 states and 4211 transitions. [2022-01-11 01:50:59,132 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 35.333333333333336) internal successors, (106), 3 states have internal predecessors, (106), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:59,132 INFO L276 IsEmpty]: Start isEmpty. Operand 3419 states and 4211 transitions. [2022-01-11 01:50:59,134 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2022-01-11 01:50:59,134 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:59,134 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:59,134 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2022-01-11 01:50:59,134 INFO L402 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:59,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:59,134 INFO L85 PathProgramCache]: Analyzing trace with hash -892864384, now seen corresponding path program 1 times [2022-01-11 01:50:59,135 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:59,135 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [142902488] [2022-01-11 01:50:59,135 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:59,135 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:59,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:59,159 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-01-11 01:50:59,159 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:59,159 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [142902488] [2022-01-11 01:50:59,159 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [142902488] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:59,159 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:59,159 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:50:59,159 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1142619208] [2022-01-11 01:50:59,159 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:59,160 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:59,160 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:59,160 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:59,160 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:59,160 INFO L87 Difference]: Start difference. First operand 3419 states and 4211 transitions. Second operand has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:59,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:59,328 INFO L93 Difference]: Finished difference Result 6761 states and 8335 transitions. [2022-01-11 01:50:59,328 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:59,328 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 106 [2022-01-11 01:50:59,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:59,332 INFO L225 Difference]: With dead ends: 6761 [2022-01-11 01:50:59,333 INFO L226 Difference]: Without dead ends: 3372 [2022-01-11 01:50:59,335 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:59,336 INFO L933 BasicCegarLoop]: 406 mSDtfsCounter, 401 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 401 SdHoareTripleChecker+Valid, 407 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:59,336 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [401 Valid, 407 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:59,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3372 states. [2022-01-11 01:50:59,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3372 to 3372. [2022-01-11 01:50:59,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3372 states, 3370 states have (on average 1.2338278931750741) internal successors, (4158), 3371 states have internal predecessors, (4158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:59,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3372 states to 3372 states and 4158 transitions. [2022-01-11 01:50:59,492 INFO L78 Accepts]: Start accepts. Automaton has 3372 states and 4158 transitions. Word has length 106 [2022-01-11 01:50:59,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:50:59,492 INFO L470 AbstractCegarLoop]: Abstraction has 3372 states and 4158 transitions. [2022-01-11 01:50:59,492 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 32.666666666666664) internal successors, (98), 3 states have internal predecessors, (98), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:59,492 INFO L276 IsEmpty]: Start isEmpty. Operand 3372 states and 4158 transitions. [2022-01-11 01:50:59,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2022-01-11 01:50:59,493 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:50:59,493 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:50:59,494 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2022-01-11 01:50:59,494 INFO L402 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:50:59,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:50:59,494 INFO L85 PathProgramCache]: Analyzing trace with hash 1797032049, now seen corresponding path program 1 times [2022-01-11 01:50:59,494 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:50:59,494 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973248356] [2022-01-11 01:50:59,495 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:50:59,495 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:50:59,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:50:59,526 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:50:59,527 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:50:59,527 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1973248356] [2022-01-11 01:50:59,527 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1973248356] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:50:59,527 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:50:59,527 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:50:59,527 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1015971030] [2022-01-11 01:50:59,527 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:50:59,527 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:50:59,527 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:50:59,527 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:50:59,527 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:59,528 INFO L87 Difference]: Start difference. First operand 3372 states and 4158 transitions. Second operand has 3 states, 3 states have (on average 35.666666666666664) internal successors, (107), 3 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:50:59,877 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:50:59,877 INFO L93 Difference]: Finished difference Result 9422 states and 11604 transitions. [2022-01-11 01:50:59,878 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:50:59,878 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 35.666666666666664) internal successors, (107), 3 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 107 [2022-01-11 01:50:59,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:50:59,887 INFO L225 Difference]: With dead ends: 9422 [2022-01-11 01:50:59,887 INFO L226 Difference]: Without dead ends: 6104 [2022-01-11 01:50:59,891 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:50:59,891 INFO L933 BasicCegarLoop]: 516 mSDtfsCounter, 260 mSDsluCounter, 385 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 260 SdHoareTripleChecker+Valid, 901 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:50:59,891 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [260 Valid, 901 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:50:59,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6104 states. [2022-01-11 01:51:00,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6104 to 6100. [2022-01-11 01:51:00,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6100 states, 6098 states have (on average 1.2240078714332567) internal successors, (7464), 6099 states have internal predecessors, (7464), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:00,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6100 states to 6100 states and 7464 transitions. [2022-01-11 01:51:00,225 INFO L78 Accepts]: Start accepts. Automaton has 6100 states and 7464 transitions. Word has length 107 [2022-01-11 01:51:00,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:00,225 INFO L470 AbstractCegarLoop]: Abstraction has 6100 states and 7464 transitions. [2022-01-11 01:51:00,225 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 35.666666666666664) internal successors, (107), 3 states have internal predecessors, (107), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:00,225 INFO L276 IsEmpty]: Start isEmpty. Operand 6100 states and 7464 transitions. [2022-01-11 01:51:00,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2022-01-11 01:51:00,227 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:00,227 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:00,227 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2022-01-11 01:51:00,227 INFO L402 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:00,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:00,228 INFO L85 PathProgramCache]: Analyzing trace with hash 598296784, now seen corresponding path program 1 times [2022-01-11 01:51:00,228 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:00,228 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2124402944] [2022-01-11 01:51:00,228 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:00,228 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:00,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:00,245 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-01-11 01:51:00,245 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:00,245 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2124402944] [2022-01-11 01:51:00,245 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2124402944] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:00,245 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:00,245 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:00,245 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1978951173] [2022-01-11 01:51:00,245 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:00,246 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:00,246 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:00,246 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:00,246 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:00,246 INFO L87 Difference]: Start difference. First operand 6100 states and 7464 transitions. Second operand has 3 states, 3 states have (on average 33.0) internal successors, (99), 3 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:00,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:00,529 INFO L93 Difference]: Finished difference Result 12100 states and 14818 transitions. [2022-01-11 01:51:00,529 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:00,529 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 33.0) internal successors, (99), 3 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 107 [2022-01-11 01:51:00,529 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:00,537 INFO L225 Difference]: With dead ends: 12100 [2022-01-11 01:51:00,537 INFO L226 Difference]: Without dead ends: 6054 [2022-01-11 01:51:00,542 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:00,542 INFO L933 BasicCegarLoop]: 405 mSDtfsCounter, 399 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 399 SdHoareTripleChecker+Valid, 406 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:00,543 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [399 Valid, 406 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:00,545 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6054 states. [2022-01-11 01:51:00,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6054 to 6054. [2022-01-11 01:51:00,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6054 states, 6052 states have (on average 1.2248843357567747) internal successors, (7413), 6053 states have internal predecessors, (7413), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:00,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6054 states to 6054 states and 7413 transitions. [2022-01-11 01:51:00,834 INFO L78 Accepts]: Start accepts. Automaton has 6054 states and 7413 transitions. Word has length 107 [2022-01-11 01:51:00,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:00,835 INFO L470 AbstractCegarLoop]: Abstraction has 6054 states and 7413 transitions. [2022-01-11 01:51:00,835 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 33.0) internal successors, (99), 3 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:00,835 INFO L276 IsEmpty]: Start isEmpty. Operand 6054 states and 7413 transitions. [2022-01-11 01:51:00,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2022-01-11 01:51:00,836 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:00,836 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:00,836 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2022-01-11 01:51:00,837 INFO L402 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:00,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:00,837 INFO L85 PathProgramCache]: Analyzing trace with hash -2092476206, now seen corresponding path program 1 times [2022-01-11 01:51:00,837 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:00,837 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560446718] [2022-01-11 01:51:00,837 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:00,837 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:00,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:00,874 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:51:00,875 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:00,875 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1560446718] [2022-01-11 01:51:00,875 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1560446718] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:00,875 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:00,875 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:00,875 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [568862882] [2022-01-11 01:51:00,875 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:00,875 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:00,875 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:00,876 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:00,876 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:00,876 INFO L87 Difference]: Start difference. First operand 6054 states and 7413 transitions. Second operand has 3 states, 3 states have (on average 36.0) internal successors, (108), 3 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:01,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:01,397 INFO L93 Difference]: Finished difference Result 16931 states and 20745 transitions. [2022-01-11 01:51:01,397 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:01,397 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 36.0) internal successors, (108), 3 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 108 [2022-01-11 01:51:01,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:01,410 INFO L225 Difference]: With dead ends: 16931 [2022-01-11 01:51:01,410 INFO L226 Difference]: Without dead ends: 10931 [2022-01-11 01:51:01,417 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:01,418 INFO L933 BasicCegarLoop]: 484 mSDtfsCounter, 264 mSDsluCounter, 383 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 10 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 264 SdHoareTripleChecker+Valid, 867 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 10 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:01,418 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [264 Valid, 867 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [10 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:01,423 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10931 states. [2022-01-11 01:51:01,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10931 to 10927. [2022-01-11 01:51:01,956 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10927 states, 10925 states have (on average 1.2204118993135011) internal successors, (13333), 10926 states have internal predecessors, (13333), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:01,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10927 states to 10927 states and 13333 transitions. [2022-01-11 01:51:01,968 INFO L78 Accepts]: Start accepts. Automaton has 10927 states and 13333 transitions. Word has length 108 [2022-01-11 01:51:01,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:01,968 INFO L470 AbstractCegarLoop]: Abstraction has 10927 states and 13333 transitions. [2022-01-11 01:51:01,969 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 36.0) internal successors, (108), 3 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:01,969 INFO L276 IsEmpty]: Start isEmpty. Operand 10927 states and 13333 transitions. [2022-01-11 01:51:01,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2022-01-11 01:51:01,972 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:01,972 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:01,972 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2022-01-11 01:51:01,972 INFO L402 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:01,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:01,972 INFO L85 PathProgramCache]: Analyzing trace with hash 1003755825, now seen corresponding path program 1 times [2022-01-11 01:51:01,972 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:01,972 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264417409] [2022-01-11 01:51:01,972 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:01,973 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:01,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:01,991 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2022-01-11 01:51:01,991 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:01,991 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1264417409] [2022-01-11 01:51:01,991 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1264417409] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:01,991 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:01,991 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:01,991 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2019105342] [2022-01-11 01:51:01,991 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:01,992 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:01,992 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:01,992 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:01,992 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:01,992 INFO L87 Difference]: Start difference. First operand 10927 states and 13333 transitions. Second operand has 3 states, 3 states have (on average 33.333333333333336) internal successors, (100), 3 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:02,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:02,648 INFO L93 Difference]: Finished difference Result 21755 states and 26559 transitions. [2022-01-11 01:51:02,649 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:02,649 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 33.333333333333336) internal successors, (100), 3 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 108 [2022-01-11 01:51:02,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:02,660 INFO L225 Difference]: With dead ends: 21755 [2022-01-11 01:51:02,661 INFO L226 Difference]: Without dead ends: 10882 [2022-01-11 01:51:02,671 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:02,671 INFO L933 BasicCegarLoop]: 404 mSDtfsCounter, 397 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 397 SdHoareTripleChecker+Valid, 405 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:02,671 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [397 Valid, 405 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:02,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10882 states. [2022-01-11 01:51:03,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10882 to 10882. [2022-01-11 01:51:03,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10882 states, 10880 states have (on average 1.2209558823529412) internal successors, (13284), 10881 states have internal predecessors, (13284), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:03,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10882 states to 10882 states and 13284 transitions. [2022-01-11 01:51:03,321 INFO L78 Accepts]: Start accepts. Automaton has 10882 states and 13284 transitions. Word has length 108 [2022-01-11 01:51:03,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:03,321 INFO L470 AbstractCegarLoop]: Abstraction has 10882 states and 13284 transitions. [2022-01-11 01:51:03,322 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 33.333333333333336) internal successors, (100), 3 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:03,322 INFO L276 IsEmpty]: Start isEmpty. Operand 10882 states and 13284 transitions. [2022-01-11 01:51:03,325 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2022-01-11 01:51:03,325 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:03,325 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:03,325 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2022-01-11 01:51:03,325 INFO L402 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:03,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:03,326 INFO L85 PathProgramCache]: Analyzing trace with hash 1609122820, now seen corresponding path program 1 times [2022-01-11 01:51:03,326 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:03,326 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1040055445] [2022-01-11 01:51:03,326 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:03,326 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:03,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:03,359 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:51:03,359 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:03,359 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1040055445] [2022-01-11 01:51:03,359 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1040055445] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:03,359 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:03,359 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:03,359 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1483604571] [2022-01-11 01:51:03,359 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:03,359 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:03,360 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:03,360 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:03,360 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:03,360 INFO L87 Difference]: Start difference. First operand 10882 states and 13284 transitions. Second operand has 3 states, 3 states have (on average 36.333333333333336) internal successors, (109), 3 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:04,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:04,370 INFO L93 Difference]: Finished difference Result 31126 states and 37849 transitions. [2022-01-11 01:51:04,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:04,370 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 36.333333333333336) internal successors, (109), 3 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 109 [2022-01-11 01:51:04,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:04,394 INFO L225 Difference]: With dead ends: 31126 [2022-01-11 01:51:04,394 INFO L226 Difference]: Without dead ends: 15634 [2022-01-11 01:51:04,407 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:04,407 INFO L933 BasicCegarLoop]: 725 mSDtfsCounter, 327 mSDsluCounter, 390 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 327 SdHoareTripleChecker+Valid, 1115 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:04,407 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [327 Valid, 1115 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:04,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15634 states. [2022-01-11 01:51:05,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15634 to 15634. [2022-01-11 01:51:05,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15634 states, 15632 states have (on average 1.2107855680655066) internal successors, (18927), 15633 states have internal predecessors, (18927), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:05,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15634 states to 15634 states and 18927 transitions. [2022-01-11 01:51:05,261 INFO L78 Accepts]: Start accepts. Automaton has 15634 states and 18927 transitions. Word has length 109 [2022-01-11 01:51:05,261 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:05,261 INFO L470 AbstractCegarLoop]: Abstraction has 15634 states and 18927 transitions. [2022-01-11 01:51:05,261 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 36.333333333333336) internal successors, (109), 3 states have internal predecessors, (109), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:05,261 INFO L276 IsEmpty]: Start isEmpty. Operand 15634 states and 18927 transitions. [2022-01-11 01:51:05,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2022-01-11 01:51:05,267 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:05,267 INFO L514 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:05,267 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2022-01-11 01:51:05,268 INFO L402 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:05,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:05,268 INFO L85 PathProgramCache]: Analyzing trace with hash -1045246435, now seen corresponding path program 1 times [2022-01-11 01:51:05,268 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:05,268 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [929216416] [2022-01-11 01:51:05,268 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:05,268 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:05,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:05,304 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:51:05,304 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:05,304 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [929216416] [2022-01-11 01:51:05,304 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [929216416] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:05,304 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:05,305 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-11 01:51:05,305 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [300205714] [2022-01-11 01:51:05,305 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:05,305 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:05,305 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:05,305 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:05,305 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:05,305 INFO L87 Difference]: Start difference. First operand 15634 states and 18927 transitions. Second operand has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 2 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:06,602 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:06,603 INFO L93 Difference]: Finished difference Result 35872 states and 43307 transitions. [2022-01-11 01:51:06,603 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:06,603 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 2 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 140 [2022-01-11 01:51:06,604 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:06,635 INFO L225 Difference]: With dead ends: 35872 [2022-01-11 01:51:06,635 INFO L226 Difference]: Without dead ends: 20277 [2022-01-11 01:51:06,655 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:06,655 INFO L933 BasicCegarLoop]: 395 mSDtfsCounter, 228 mSDsluCounter, 330 mSDsCounter, 0 mSdLazyCounter, 23 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 228 SdHoareTripleChecker+Valid, 725 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 23 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:06,656 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [228 Valid, 725 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 23 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:06,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20277 states. [2022-01-11 01:51:07,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20277 to 20181. [2022-01-11 01:51:07,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20181 states, 20179 states have (on average 1.1995143465979483) internal successors, (24205), 20180 states have internal predecessors, (24205), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:07,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20181 states to 20181 states and 24205 transitions. [2022-01-11 01:51:07,942 INFO L78 Accepts]: Start accepts. Automaton has 20181 states and 24205 transitions. Word has length 140 [2022-01-11 01:51:07,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:07,943 INFO L470 AbstractCegarLoop]: Abstraction has 20181 states and 24205 transitions. [2022-01-11 01:51:07,943 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 2 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:07,943 INFO L276 IsEmpty]: Start isEmpty. Operand 20181 states and 24205 transitions. [2022-01-11 01:51:07,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 158 [2022-01-11 01:51:07,953 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:07,953 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:07,953 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2022-01-11 01:51:07,953 INFO L402 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:07,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:07,954 INFO L85 PathProgramCache]: Analyzing trace with hash -1303733245, now seen corresponding path program 1 times [2022-01-11 01:51:07,954 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:07,954 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [934290774] [2022-01-11 01:51:07,954 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:07,954 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:07,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:07,986 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2022-01-11 01:51:07,987 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:07,987 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [934290774] [2022-01-11 01:51:07,987 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [934290774] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:07,987 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:07,987 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:07,987 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [219399646] [2022-01-11 01:51:07,987 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:07,987 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:07,987 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:07,988 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:07,988 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:07,988 INFO L87 Difference]: Start difference. First operand 20181 states and 24205 transitions. Second operand has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 3 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:09,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:09,063 INFO L93 Difference]: Finished difference Result 39889 states and 47731 transitions. [2022-01-11 01:51:09,063 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:09,063 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 3 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 157 [2022-01-11 01:51:09,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:09,088 INFO L225 Difference]: With dead ends: 39889 [2022-01-11 01:51:09,089 INFO L226 Difference]: Without dead ends: 19761 [2022-01-11 01:51:09,101 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:09,101 INFO L933 BasicCegarLoop]: 410 mSDtfsCounter, 266 mSDsluCounter, 335 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 266 SdHoareTripleChecker+Valid, 745 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:09,102 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [266 Valid, 745 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:09,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19761 states. [2022-01-11 01:51:10,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19761 to 19761. [2022-01-11 01:51:10,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19761 states, 19759 states have (on average 1.1772356900652867) internal successors, (23261), 19760 states have internal predecessors, (23261), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:10,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19761 states to 19761 states and 23261 transitions. [2022-01-11 01:51:10,149 INFO L78 Accepts]: Start accepts. Automaton has 19761 states and 23261 transitions. Word has length 157 [2022-01-11 01:51:10,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:10,150 INFO L470 AbstractCegarLoop]: Abstraction has 19761 states and 23261 transitions. [2022-01-11 01:51:10,150 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 46.666666666666664) internal successors, (140), 3 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:10,150 INFO L276 IsEmpty]: Start isEmpty. Operand 19761 states and 23261 transitions. [2022-01-11 01:51:10,160 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 159 [2022-01-11 01:51:10,160 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:10,160 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:10,161 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2022-01-11 01:51:10,161 INFO L402 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:10,161 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:10,161 INFO L85 PathProgramCache]: Analyzing trace with hash -1811308674, now seen corresponding path program 1 times [2022-01-11 01:51:10,161 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:10,161 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1774191462] [2022-01-11 01:51:10,161 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:10,161 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:10,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:10,196 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:51:10,197 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:10,197 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1774191462] [2022-01-11 01:51:10,197 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1774191462] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:10,197 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:10,197 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:10,197 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [264345653] [2022-01-11 01:51:10,197 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:10,197 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:10,197 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:10,198 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:10,198 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:10,198 INFO L87 Difference]: Start difference. First operand 19761 states and 23261 transitions. Second operand has 3 states, 3 states have (on average 52.666666666666664) internal successors, (158), 3 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:11,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:11,272 INFO L93 Difference]: Finished difference Result 35009 states and 41373 transitions. [2022-01-11 01:51:11,272 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:11,273 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 52.666666666666664) internal successors, (158), 3 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 158 [2022-01-11 01:51:11,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:11,305 INFO L225 Difference]: With dead ends: 35009 [2022-01-11 01:51:11,305 INFO L226 Difference]: Without dead ends: 19765 [2022-01-11 01:51:11,321 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:11,322 INFO L933 BasicCegarLoop]: 660 mSDtfsCounter, 284 mSDsluCounter, 388 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 284 SdHoareTripleChecker+Valid, 1048 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.1s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:11,322 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [284 Valid, 1048 Invalid, 15 Unknown, 0 Unchecked, 0.1s Time], IncrementalHoareTripleChecker [3 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:11,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19765 states. [2022-01-11 01:51:12,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19765 to 19761. [2022-01-11 01:51:12,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19761 states, 19759 states have (on average 1.1741990991446936) internal successors, (23201), 19760 states have internal predecessors, (23201), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:12,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19761 states to 19761 states and 23201 transitions. [2022-01-11 01:51:12,638 INFO L78 Accepts]: Start accepts. Automaton has 19761 states and 23201 transitions. Word has length 158 [2022-01-11 01:51:12,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:12,638 INFO L470 AbstractCegarLoop]: Abstraction has 19761 states and 23201 transitions. [2022-01-11 01:51:12,638 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 52.666666666666664) internal successors, (158), 3 states have internal predecessors, (158), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:12,638 INFO L276 IsEmpty]: Start isEmpty. Operand 19761 states and 23201 transitions. [2022-01-11 01:51:12,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2022-01-11 01:51:12,650 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:12,650 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:12,650 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2022-01-11 01:51:12,650 INFO L402 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:12,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:12,651 INFO L85 PathProgramCache]: Analyzing trace with hash 1459229981, now seen corresponding path program 1 times [2022-01-11 01:51:12,651 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:12,651 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1724367274] [2022-01-11 01:51:12,651 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:12,651 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:12,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:12,688 INFO L134 CoverageAnalysis]: Checked inductivity of 33 backedges. 22 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2022-01-11 01:51:12,689 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:12,689 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1724367274] [2022-01-11 01:51:12,689 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1724367274] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:12,689 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:12,689 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2022-01-11 01:51:12,689 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1595558227] [2022-01-11 01:51:12,689 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:12,689 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:12,689 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:12,690 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:12,690 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:12,690 INFO L87 Difference]: Start difference. First operand 19761 states and 23201 transitions. Second operand has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 2 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:14,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:14,048 INFO L93 Difference]: Finished difference Result 43545 states and 50999 transitions. [2022-01-11 01:51:14,048 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:14,048 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 2 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 189 [2022-01-11 01:51:14,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:14,082 INFO L225 Difference]: With dead ends: 43545 [2022-01-11 01:51:14,083 INFO L226 Difference]: Without dead ends: 23816 [2022-01-11 01:51:14,102 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:14,103 INFO L933 BasicCegarLoop]: 394 mSDtfsCounter, 174 mSDsluCounter, 330 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 174 SdHoareTripleChecker+Valid, 724 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:14,103 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [174 Valid, 724 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:14,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23816 states. [2022-01-11 01:51:15,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23816 to 23688. [2022-01-11 01:51:15,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23688 states, 23686 states have (on average 1.1652030735455543) internal successors, (27599), 23687 states have internal predecessors, (27599), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:15,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 27599 transitions. [2022-01-11 01:51:15,450 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 27599 transitions. Word has length 189 [2022-01-11 01:51:15,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:15,450 INFO L470 AbstractCegarLoop]: Abstraction has 23688 states and 27599 transitions. [2022-01-11 01:51:15,450 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 2 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:15,450 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 27599 transitions. [2022-01-11 01:51:15,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 194 [2022-01-11 01:51:15,465 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:15,465 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:15,465 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2022-01-11 01:51:15,465 INFO L402 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:15,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:15,465 INFO L85 PathProgramCache]: Analyzing trace with hash 952041103, now seen corresponding path program 1 times [2022-01-11 01:51:15,466 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:15,466 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [382255747] [2022-01-11 01:51:15,466 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:15,466 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:15,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:15,500 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:51:15,500 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:15,500 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [382255747] [2022-01-11 01:51:15,500 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [382255747] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:15,500 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:15,500 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:15,500 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1854316375] [2022-01-11 01:51:15,500 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:15,501 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:15,501 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:15,501 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:15,501 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:15,501 INFO L87 Difference]: Start difference. First operand 23688 states and 27599 transitions. Second operand has 3 states, 3 states have (on average 64.33333333333333) internal successors, (193), 3 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:16,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:16,847 INFO L93 Difference]: Finished difference Result 43400 states and 50747 transitions. [2022-01-11 01:51:16,847 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:16,847 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 64.33333333333333) internal successors, (193), 3 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 193 [2022-01-11 01:51:16,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:16,877 INFO L225 Difference]: With dead ends: 43400 [2022-01-11 01:51:16,877 INFO L226 Difference]: Without dead ends: 23692 [2022-01-11 01:51:16,891 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:16,891 INFO L933 BasicCegarLoop]: 614 mSDtfsCounter, 280 mSDsluCounter, 380 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 280 SdHoareTripleChecker+Valid, 994 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:16,892 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [280 Valid, 994 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:16,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23692 states. [2022-01-11 01:51:18,099 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23692 to 23688. [2022-01-11 01:51:18,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23688 states, 23686 states have (on average 1.1609811703115764) internal successors, (27499), 23687 states have internal predecessors, (27499), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:18,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 27499 transitions. [2022-01-11 01:51:18,156 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 27499 transitions. Word has length 193 [2022-01-11 01:51:18,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:18,156 INFO L470 AbstractCegarLoop]: Abstraction has 23688 states and 27499 transitions. [2022-01-11 01:51:18,156 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 64.33333333333333) internal successors, (193), 3 states have internal predecessors, (193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:18,156 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 27499 transitions. [2022-01-11 01:51:18,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2022-01-11 01:51:18,170 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:18,170 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:18,170 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2022-01-11 01:51:18,170 INFO L402 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:18,170 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:18,171 INFO L85 PathProgramCache]: Analyzing trace with hash 708123611, now seen corresponding path program 1 times [2022-01-11 01:51:18,171 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:18,171 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1229112882] [2022-01-11 01:51:18,171 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:18,171 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:18,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:18,207 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2022-01-11 01:51:18,208 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:18,208 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1229112882] [2022-01-11 01:51:18,208 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1229112882] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:18,208 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:18,208 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:18,208 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1809466956] [2022-01-11 01:51:18,208 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:18,208 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:18,208 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:18,209 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:18,209 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:18,209 INFO L87 Difference]: Start difference. First operand 23688 states and 27499 transitions. Second operand has 3 states, 3 states have (on average 75.0) internal successors, (225), 3 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:19,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:19,706 INFO L93 Difference]: Finished difference Result 47328 states and 54947 transitions. [2022-01-11 01:51:19,706 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:19,706 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 75.0) internal successors, (225), 3 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 228 [2022-01-11 01:51:19,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:19,741 INFO L225 Difference]: With dead ends: 47328 [2022-01-11 01:51:19,742 INFO L226 Difference]: Without dead ends: 23692 [2022-01-11 01:51:19,766 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:19,766 INFO L933 BasicCegarLoop]: 652 mSDtfsCounter, 277 mSDsluCounter, 368 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 277 SdHoareTripleChecker+Valid, 1020 SdHoareTripleChecker+Invalid, 25 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:19,767 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [277 Valid, 1020 Invalid, 25 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:19,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23692 states. [2022-01-11 01:51:21,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23692 to 23688. [2022-01-11 01:51:21,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23688 states, 23686 states have (on average 1.1535506206197754) internal successors, (27323), 23687 states have internal predecessors, (27323), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:21,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 27323 transitions. [2022-01-11 01:51:21,176 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 27323 transitions. Word has length 228 [2022-01-11 01:51:21,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:21,176 INFO L470 AbstractCegarLoop]: Abstraction has 23688 states and 27323 transitions. [2022-01-11 01:51:21,176 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 75.0) internal successors, (225), 3 states have internal predecessors, (225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:21,176 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 27323 transitions. [2022-01-11 01:51:21,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2022-01-11 01:51:21,189 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:21,190 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:21,190 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2022-01-11 01:51:21,190 INFO L402 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:21,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:21,190 INFO L85 PathProgramCache]: Analyzing trace with hash -2008601058, now seen corresponding path program 1 times [2022-01-11 01:51:21,191 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:21,191 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [986223041] [2022-01-11 01:51:21,191 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:21,191 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:21,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:21,229 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:51:21,229 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:21,229 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [986223041] [2022-01-11 01:51:21,229 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [986223041] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:21,229 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:21,229 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:21,229 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [47236040] [2022-01-11 01:51:21,229 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:21,230 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:21,230 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:21,230 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:21,230 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:21,230 INFO L87 Difference]: Start difference. First operand 23688 states and 27323 transitions. Second operand has 3 states, 3 states have (on average 76.0) internal successors, (228), 3 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:22,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:22,573 INFO L93 Difference]: Finished difference Result 43460 states and 50297 transitions. [2022-01-11 01:51:22,574 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:22,574 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 76.0) internal successors, (228), 3 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 228 [2022-01-11 01:51:22,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:22,603 INFO L225 Difference]: With dead ends: 43460 [2022-01-11 01:51:22,604 INFO L226 Difference]: Without dead ends: 23752 [2022-01-11 01:51:22,619 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:22,620 INFO L933 BasicCegarLoop]: 611 mSDtfsCounter, 308 mSDsluCounter, 272 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 308 SdHoareTripleChecker+Valid, 883 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:22,620 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [308 Valid, 883 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:22,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23752 states. [2022-01-11 01:51:23,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23752 to 23688. [2022-01-11 01:51:24,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23688 states, 23686 states have (on average 1.1319344760618086) internal successors, (26811), 23687 states have internal predecessors, (26811), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:24,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 26811 transitions. [2022-01-11 01:51:24,026 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 26811 transitions. Word has length 228 [2022-01-11 01:51:24,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:24,026 INFO L470 AbstractCegarLoop]: Abstraction has 23688 states and 26811 transitions. [2022-01-11 01:51:24,027 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 76.0) internal successors, (228), 3 states have internal predecessors, (228), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:24,027 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 26811 transitions. [2022-01-11 01:51:24,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 232 [2022-01-11 01:51:24,037 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:24,037 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:24,037 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2022-01-11 01:51:24,038 INFO L402 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:24,038 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:24,038 INFO L85 PathProgramCache]: Analyzing trace with hash -784555017, now seen corresponding path program 1 times [2022-01-11 01:51:24,038 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:24,038 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2127416585] [2022-01-11 01:51:24,038 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:24,038 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:24,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:24,072 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:51:24,072 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:24,073 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2127416585] [2022-01-11 01:51:24,073 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2127416585] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:24,073 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:24,073 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:24,073 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1465113560] [2022-01-11 01:51:24,073 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:24,073 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:24,073 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:24,073 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:24,074 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:24,074 INFO L87 Difference]: Start difference. First operand 23688 states and 26811 transitions. Second operand has 3 states, 3 states have (on average 77.0) internal successors, (231), 3 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:25,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:25,362 INFO L93 Difference]: Finished difference Result 40938 states and 46533 transitions. [2022-01-11 01:51:25,363 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:25,363 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 77.0) internal successors, (231), 3 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 231 [2022-01-11 01:51:25,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:25,397 INFO L225 Difference]: With dead ends: 40938 [2022-01-11 01:51:25,398 INFO L226 Difference]: Without dead ends: 23752 [2022-01-11 01:51:25,417 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:25,418 INFO L933 BasicCegarLoop]: 650 mSDtfsCounter, 304 mSDsluCounter, 313 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 304 SdHoareTripleChecker+Valid, 963 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:25,418 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [304 Valid, 963 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:25,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23752 states. [2022-01-11 01:51:26,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23752 to 23688. [2022-01-11 01:51:26,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23688 states, 23686 states have (on average 1.1138647302203835) internal successors, (26383), 23687 states have internal predecessors, (26383), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:26,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 26383 transitions. [2022-01-11 01:51:26,836 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 26383 transitions. Word has length 231 [2022-01-11 01:51:26,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:26,836 INFO L470 AbstractCegarLoop]: Abstraction has 23688 states and 26383 transitions. [2022-01-11 01:51:26,836 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 77.0) internal successors, (231), 3 states have internal predecessors, (231), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:26,836 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 26383 transitions. [2022-01-11 01:51:26,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 235 [2022-01-11 01:51:26,848 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:26,848 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:26,849 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2022-01-11 01:51:26,849 INFO L402 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:26,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:26,849 INFO L85 PathProgramCache]: Analyzing trace with hash -918971093, now seen corresponding path program 1 times [2022-01-11 01:51:26,849 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:26,849 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [672559420] [2022-01-11 01:51:26,849 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:26,849 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:26,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:26,884 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-01-11 01:51:26,884 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:26,884 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [672559420] [2022-01-11 01:51:26,884 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [672559420] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:26,884 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:26,884 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:26,884 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [58286698] [2022-01-11 01:51:26,884 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:26,884 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:26,885 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:26,885 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:26,885 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:26,885 INFO L87 Difference]: Start difference. First operand 23688 states and 26383 transitions. Second operand has 3 states, 3 states have (on average 75.66666666666667) internal successors, (227), 3 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:28,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:28,399 INFO L93 Difference]: Finished difference Result 39074 states and 43659 transitions. [2022-01-11 01:51:28,399 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:28,400 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 75.66666666666667) internal successors, (227), 3 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 234 [2022-01-11 01:51:28,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:28,430 INFO L225 Difference]: With dead ends: 39074 [2022-01-11 01:51:28,430 INFO L226 Difference]: Without dead ends: 24536 [2022-01-11 01:51:28,447 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:28,448 INFO L933 BasicCegarLoop]: 563 mSDtfsCounter, 325 mSDsluCounter, 331 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 325 SdHoareTripleChecker+Valid, 894 SdHoareTripleChecker+Invalid, 24 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:28,448 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [325 Valid, 894 Invalid, 24 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:28,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24536 states. [2022-01-11 01:51:29,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24536 to 23688. [2022-01-11 01:51:29,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23688 states, 23686 states have (on average 1.0996791353542177) internal successors, (26047), 23687 states have internal predecessors, (26047), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:29,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23688 states to 23688 states and 26047 transitions. [2022-01-11 01:51:29,847 INFO L78 Accepts]: Start accepts. Automaton has 23688 states and 26047 transitions. Word has length 234 [2022-01-11 01:51:29,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:29,847 INFO L470 AbstractCegarLoop]: Abstraction has 23688 states and 26047 transitions. [2022-01-11 01:51:29,847 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 75.66666666666667) internal successors, (227), 3 states have internal predecessors, (227), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:29,848 INFO L276 IsEmpty]: Start isEmpty. Operand 23688 states and 26047 transitions. [2022-01-11 01:51:29,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 237 [2022-01-11 01:51:29,859 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:29,859 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:29,859 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2022-01-11 01:51:29,859 INFO L402 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:29,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:29,860 INFO L85 PathProgramCache]: Analyzing trace with hash 568116127, now seen corresponding path program 1 times [2022-01-11 01:51:29,860 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:29,860 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33098610] [2022-01-11 01:51:29,860 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:29,860 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:29,879 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:29,901 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2022-01-11 01:51:29,902 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:29,902 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [33098610] [2022-01-11 01:51:29,902 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [33098610] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:29,902 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:29,902 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:29,902 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [971531416] [2022-01-11 01:51:29,902 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:29,902 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:29,902 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:29,903 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:29,903 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:29,903 INFO L87 Difference]: Start difference. First operand 23688 states and 26047 transitions. Second operand has 3 states, 3 states have (on average 78.66666666666667) internal successors, (236), 3 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:30,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:30,742 INFO L93 Difference]: Finished difference Result 38194 states and 42103 transitions. [2022-01-11 01:51:30,742 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:30,742 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 78.66666666666667) internal successors, (236), 3 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 236 [2022-01-11 01:51:30,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:30,760 INFO L225 Difference]: With dead ends: 38194 [2022-01-11 01:51:30,760 INFO L226 Difference]: Without dead ends: 14558 [2022-01-11 01:51:30,779 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:30,779 INFO L933 BasicCegarLoop]: 564 mSDtfsCounter, 268 mSDsluCounter, 230 mSDsCounter, 0 mSdLazyCounter, 16 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 268 SdHoareTripleChecker+Valid, 794 SdHoareTripleChecker+Invalid, 23 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 16 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:30,779 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [268 Valid, 794 Invalid, 23 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 16 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:30,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14558 states. [2022-01-11 01:51:31,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14558 to 14526. [2022-01-11 01:51:31,709 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14526 states, 14524 states have (on average 1.0843431561553292) internal successors, (15749), 14525 states have internal predecessors, (15749), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:31,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14526 states to 14526 states and 15749 transitions. [2022-01-11 01:51:31,726 INFO L78 Accepts]: Start accepts. Automaton has 14526 states and 15749 transitions. Word has length 236 [2022-01-11 01:51:31,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:31,726 INFO L470 AbstractCegarLoop]: Abstraction has 14526 states and 15749 transitions. [2022-01-11 01:51:31,727 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 78.66666666666667) internal successors, (236), 3 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:31,727 INFO L276 IsEmpty]: Start isEmpty. Operand 14526 states and 15749 transitions. [2022-01-11 01:51:31,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2022-01-11 01:51:31,735 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:31,735 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:31,735 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2022-01-11 01:51:31,735 INFO L402 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:31,736 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:31,736 INFO L85 PathProgramCache]: Analyzing trace with hash 66543114, now seen corresponding path program 1 times [2022-01-11 01:51:31,736 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:31,736 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1778755855] [2022-01-11 01:51:31,736 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:31,736 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:31,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:31,793 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2022-01-11 01:51:31,793 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:31,793 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1778755855] [2022-01-11 01:51:31,794 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1778755855] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:31,794 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:31,794 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2022-01-11 01:51:31,794 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1137893536] [2022-01-11 01:51:31,794 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:31,794 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2022-01-11 01:51:31,794 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:31,794 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2022-01-11 01:51:31,794 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2022-01-11 01:51:31,795 INFO L87 Difference]: Start difference. First operand 14526 states and 15749 transitions. Second operand has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:32,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:32,313 INFO L93 Difference]: Finished difference Result 21495 states and 23234 transitions. [2022-01-11 01:51:32,313 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-01-11 01:51:32,313 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 239 [2022-01-11 01:51:32,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:32,318 INFO L225 Difference]: With dead ends: 21495 [2022-01-11 01:51:32,318 INFO L226 Difference]: Without dead ends: 4151 [2022-01-11 01:51:32,336 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2022-01-11 01:51:32,336 INFO L933 BasicCegarLoop]: 370 mSDtfsCounter, 970 mSDsluCounter, 487 mSDsCounter, 0 mSdLazyCounter, 58 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 970 SdHoareTripleChecker+Valid, 857 SdHoareTripleChecker+Invalid, 83 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 58 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:32,337 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [970 Valid, 857 Invalid, 83 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 58 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:32,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4151 states. [2022-01-11 01:51:32,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4151 to 3831. [2022-01-11 01:51:32,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3831 states, 3829 states have (on average 1.0564115957168974) internal successors, (4045), 3830 states have internal predecessors, (4045), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:32,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3831 states to 3831 states and 4045 transitions. [2022-01-11 01:51:32,574 INFO L78 Accepts]: Start accepts. Automaton has 3831 states and 4045 transitions. Word has length 239 [2022-01-11 01:51:32,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:32,575 INFO L470 AbstractCegarLoop]: Abstraction has 3831 states and 4045 transitions. [2022-01-11 01:51:32,575 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 41.8) internal successors, (209), 5 states have internal predecessors, (209), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:32,575 INFO L276 IsEmpty]: Start isEmpty. Operand 3831 states and 4045 transitions. [2022-01-11 01:51:32,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 240 [2022-01-11 01:51:32,577 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:32,578 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:32,578 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2022-01-11 01:51:32,578 INFO L402 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:32,578 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:32,578 INFO L85 PathProgramCache]: Analyzing trace with hash 1837105930, now seen corresponding path program 1 times [2022-01-11 01:51:32,578 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:32,578 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [339530864] [2022-01-11 01:51:32,578 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:32,578 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:32,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:32,850 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 35 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2022-01-11 01:51:32,850 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:32,850 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [339530864] [2022-01-11 01:51:32,850 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [339530864] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:32,851 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:32,851 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2022-01-11 01:51:32,851 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [525158494] [2022-01-11 01:51:32,851 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:32,851 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2022-01-11 01:51:32,851 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:32,851 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2022-01-11 01:51:32,851 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-01-11 01:51:32,852 INFO L87 Difference]: Start difference. First operand 3831 states and 4045 transitions. Second operand has 6 states, 6 states have (on average 38.666666666666664) internal successors, (232), 6 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:33,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:33,411 INFO L93 Difference]: Finished difference Result 3831 states and 4045 transitions. [2022-01-11 01:51:33,412 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2022-01-11 01:51:33,412 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 38.666666666666664) internal successors, (232), 6 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 239 [2022-01-11 01:51:33,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:33,416 INFO L225 Difference]: With dead ends: 3831 [2022-01-11 01:51:33,416 INFO L226 Difference]: Without dead ends: 3829 [2022-01-11 01:51:33,416 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2022-01-11 01:51:33,417 INFO L933 BasicCegarLoop]: 735 mSDtfsCounter, 590 mSDsluCounter, 2196 mSDsCounter, 0 mSdLazyCounter, 25 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 590 SdHoareTripleChecker+Valid, 2931 SdHoareTripleChecker+Invalid, 26 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 25 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:33,417 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [590 Valid, 2931 Invalid, 26 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 25 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:33,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3829 states. [2022-01-11 01:51:33,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3829 to 3829. [2022-01-11 01:51:33,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3829 states, 3828 states have (on average 1.055903866248694) internal successors, (4042), 3828 states have internal predecessors, (4042), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:33,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3829 states to 3829 states and 4042 transitions. [2022-01-11 01:51:33,780 INFO L78 Accepts]: Start accepts. Automaton has 3829 states and 4042 transitions. Word has length 239 [2022-01-11 01:51:33,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:33,780 INFO L470 AbstractCegarLoop]: Abstraction has 3829 states and 4042 transitions. [2022-01-11 01:51:33,780 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 38.666666666666664) internal successors, (232), 6 states have internal predecessors, (232), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:33,780 INFO L276 IsEmpty]: Start isEmpty. Operand 3829 states and 4042 transitions. [2022-01-11 01:51:33,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2022-01-11 01:51:33,783 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:33,783 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:33,783 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2022-01-11 01:51:33,784 INFO L402 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:33,785 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:33,785 INFO L85 PathProgramCache]: Analyzing trace with hash -564507989, now seen corresponding path program 1 times [2022-01-11 01:51:33,785 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:33,785 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [9615277] [2022-01-11 01:51:33,785 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:33,785 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:33,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2022-01-11 01:51:33,838 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 43 trivial. 0 not checked. [2022-01-11 01:51:33,838 INFO L139 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2022-01-11 01:51:33,838 INFO L333 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [9615277] [2022-01-11 01:51:33,838 INFO L160 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [9615277] provided 1 perfect and 0 imperfect interpolant sequences [2022-01-11 01:51:33,838 INFO L186 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2022-01-11 01:51:33,838 INFO L199 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2022-01-11 01:51:33,839 INFO L115 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [250912391] [2022-01-11 01:51:33,839 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2022-01-11 01:51:33,839 INFO L546 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2022-01-11 01:51:33,840 INFO L103 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2022-01-11 01:51:33,840 INFO L143 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2022-01-11 01:51:33,840 INFO L145 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:33,840 INFO L87 Difference]: Start difference. First operand 3829 states and 4042 transitions. Second operand has 3 states, 3 states have (on average 71.0) internal successors, (213), 3 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:34,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2022-01-11 01:51:34,251 INFO L93 Difference]: Finished difference Result 5989 states and 6301 transitions. [2022-01-11 01:51:34,252 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2022-01-11 01:51:34,252 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 71.0) internal successors, (213), 3 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 243 [2022-01-11 01:51:34,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2022-01-11 01:51:34,257 INFO L225 Difference]: With dead ends: 5989 [2022-01-11 01:51:34,257 INFO L226 Difference]: Without dead ends: 4901 [2022-01-11 01:51:34,259 INFO L932 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2022-01-11 01:51:34,260 INFO L933 BasicCegarLoop]: 638 mSDtfsCounter, 279 mSDsluCounter, 351 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 279 SdHoareTripleChecker+Valid, 989 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2022-01-11 01:51:34,261 INFO L934 BasicCegarLoop]: SdHoareTripleChecker [279 Valid, 989 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2022-01-11 01:51:34,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4901 states. [2022-01-11 01:51:34,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4901 to 3831. [2022-01-11 01:51:34,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3831 states, 3830 states have (on average 1.0558746736292428) internal successors, (4044), 3830 states have internal predecessors, (4044), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:34,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3831 states to 3831 states and 4044 transitions. [2022-01-11 01:51:34,606 INFO L78 Accepts]: Start accepts. Automaton has 3831 states and 4044 transitions. Word has length 243 [2022-01-11 01:51:34,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2022-01-11 01:51:34,606 INFO L470 AbstractCegarLoop]: Abstraction has 3831 states and 4044 transitions. [2022-01-11 01:51:34,606 INFO L471 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 71.0) internal successors, (213), 3 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2022-01-11 01:51:34,607 INFO L276 IsEmpty]: Start isEmpty. Operand 3831 states and 4044 transitions. [2022-01-11 01:51:34,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 245 [2022-01-11 01:51:34,610 INFO L506 BasicCegarLoop]: Found error trace [2022-01-11 01:51:34,610 INFO L514 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:34,610 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2022-01-11 01:51:34,611 INFO L402 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (and 1 more)] === [2022-01-11 01:51:34,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2022-01-11 01:51:34,611 INFO L85 PathProgramCache]: Analyzing trace with hash -350901494, now seen corresponding path program 1 times [2022-01-11 01:51:34,611 INFO L121 FreeRefinementEngine]: Executing refinement strategy CAMEL [2022-01-11 01:51:34,611 INFO L333 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62467989] [2022-01-11 01:51:34,611 INFO L95 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2022-01-11 01:51:34,611 INFO L126 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2022-01-11 01:51:34,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-01-11 01:51:34,665 INFO L352 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2022-01-11 01:51:34,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2022-01-11 01:51:34,814 INFO L133 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2022-01-11 01:51:34,815 INFO L628 BasicCegarLoop]: Counterexample is feasible [2022-01-11 01:51:34,816 INFO L764 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr3ASSERT_VIOLATIONERROR_FUNCTION (3 of 4 remaining) [2022-01-11 01:51:34,817 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION (2 of 4 remaining) [2022-01-11 01:51:34,817 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (1 of 4 remaining) [2022-01-11 01:51:34,817 INFO L764 garLoopResultBuilder]: Registering result UNKNOWN for location ULTIMATE.startErr2ASSERT_VIOLATIONERROR_FUNCTION (0 of 4 remaining) [2022-01-11 01:51:34,817 WARN L452 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2022-01-11 01:51:34,819 INFO L732 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2022-01-11 01:51:34,822 INFO L179 ceAbstractionStarter]: Computing trace abstraction results [2022-01-11 01:51:35,582 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 11.01 01:51:35 BasicIcfg [2022-01-11 01:51:35,582 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2022-01-11 01:51:35,583 INFO L158 Benchmark]: Toolchain (without parser) took 44827.10ms. Allocated memory was 222.3MB in the beginning and 3.3GB in the end (delta: 3.1GB). Free memory was 167.0MB in the beginning and 1.6GB in the end (delta: -1.5GB). Peak memory consumption was 1.6GB. Max. memory is 8.0GB. [2022-01-11 01:51:35,585 INFO L158 Benchmark]: CDTParser took 0.10ms. Allocated memory is still 222.3MB. Free memory is still 183.9MB. There was no memory consumed. Max. memory is 8.0GB. [2022-01-11 01:51:35,585 INFO L158 Benchmark]: CACSL2BoogieTranslator took 315.59ms. Allocated memory is still 222.3MB. Free memory was 166.7MB in the beginning and 186.1MB in the end (delta: -19.4MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. [2022-01-11 01:51:35,585 INFO L158 Benchmark]: Boogie Procedure Inliner took 45.53ms. Allocated memory is still 222.3MB. Free memory was 186.1MB in the beginning and 180.8MB in the end (delta: 5.2MB). Peak memory consumption was 5.2MB. Max. memory is 8.0GB. [2022-01-11 01:51:35,585 INFO L158 Benchmark]: Boogie Preprocessor took 45.98ms. Allocated memory is still 222.3MB. Free memory was 180.8MB in the beginning and 176.6MB in the end (delta: 4.2MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. [2022-01-11 01:51:35,585 INFO L158 Benchmark]: RCFGBuilder took 795.89ms. Allocated memory is still 222.3MB. Free memory was 176.6MB in the beginning and 131.0MB in the end (delta: 45.6MB). Peak memory consumption was 46.1MB. Max. memory is 8.0GB. [2022-01-11 01:51:35,585 INFO L158 Benchmark]: IcfgTransformer took 207.71ms. Allocated memory is still 222.3MB. Free memory was 131.0MB in the beginning and 106.9MB in the end (delta: 24.1MB). Peak memory consumption was 24.1MB. Max. memory is 8.0GB. [2022-01-11 01:51:35,585 INFO L158 Benchmark]: TraceAbstraction took 43411.89ms. Allocated memory was 222.3MB in the beginning and 3.3GB in the end (delta: 3.1GB). Free memory was 106.4MB in the beginning and 1.6GB in the end (delta: -1.5GB). Peak memory consumption was 1.6GB. Max. memory is 8.0GB. [2022-01-11 01:51:35,585 INFO L339 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.10ms. Allocated memory is still 222.3MB. Free memory is still 183.9MB. There was no memory consumed. Max. memory is 8.0GB. * CACSL2BoogieTranslator took 315.59ms. Allocated memory is still 222.3MB. Free memory was 166.7MB in the beginning and 186.1MB in the end (delta: -19.4MB). Peak memory consumption was 12.6MB. Max. memory is 8.0GB. * Boogie Procedure Inliner took 45.53ms. Allocated memory is still 222.3MB. Free memory was 186.1MB in the beginning and 180.8MB in the end (delta: 5.2MB). Peak memory consumption was 5.2MB. Max. memory is 8.0GB. * Boogie Preprocessor took 45.98ms. Allocated memory is still 222.3MB. Free memory was 180.8MB in the beginning and 176.6MB in the end (delta: 4.2MB). Peak memory consumption was 4.2MB. Max. memory is 8.0GB. * RCFGBuilder took 795.89ms. Allocated memory is still 222.3MB. Free memory was 176.6MB in the beginning and 131.0MB in the end (delta: 45.6MB). Peak memory consumption was 46.1MB. Max. memory is 8.0GB. * IcfgTransformer took 207.71ms. Allocated memory is still 222.3MB. Free memory was 131.0MB in the beginning and 106.9MB in the end (delta: 24.1MB). Peak memory consumption was 24.1MB. Max. memory is 8.0GB. * TraceAbstraction took 43411.89ms. Allocated memory was 222.3MB in the beginning and 3.3GB in the end (delta: 3.1GB). Free memory was 106.4MB in the beginning and 1.6GB in the end (delta: -1.5GB). Peak memory consumption was 1.6GB. Max. memory is 8.0GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 599]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L32] int fast_clk_edge ; [L33] int slow_clk_edge ; [L34] int q_buf_0 ; [L35] int q_free ; [L36] int q_read_ev ; [L37] int q_write_ev ; [L38] int q_req_up ; [L39] int q_ev ; [L60] int p_num_write ; [L61] int p_last_write ; [L62] int p_dw_st ; [L63] int p_dw_pc ; [L64] int p_dw_i ; [L65] int c_num_read ; [L66] int c_last_read ; [L67] int c_dr_st ; [L68] int c_dr_pc ; [L69] int c_dr_i ; [L202] static int a_t ; [L352] static int t = 0; [L603] int m_pc = 0; [L604] int t1_pc = 0; [L605] int t2_pc = 0; [L606] int t3_pc = 0; [L607] int m_st ; [L608] int t1_st ; [L609] int t2_st ; [L610] int t3_st ; [L611] int m_i ; [L612] int t1_i ; [L613] int t2_i ; [L614] int t3_i ; [L615] int M_E = 2; [L616] int T1_E = 2; [L617] int T2_E = 2; [L618] int T3_E = 2; [L619] int E_M = 2; [L620] int E_1 = 2; [L621] int E_2 = 2; [L622] int E_3 = 2; [L628] int token ; [L630] int local ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=0, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, token=0] [L1327] COND FALSE !(__VERIFIER_nondet_int()) [L1330] CALL main2() [L1314] int __retres1 ; [L1318] CALL init_model2() [L1227] m_i = 1 [L1228] t1_i = 1 [L1229] t2_i = 1 [L1230] t3_i = 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1318] RET init_model2() [L1319] CALL start_simulation2() [L1255] int kernel_st ; [L1256] int tmp ; [L1257] int tmp___0 ; [L1261] kernel_st = 0 [L1262] FCALL update_channels2() [L1263] CALL init_threads2() [L883] COND TRUE m_i == 1 [L884] m_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L888] COND TRUE t1_i == 1 [L889] t1_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L893] COND TRUE t2_i == 1 [L894] t2_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L898] COND TRUE t3_i == 1 [L899] t3_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1263] RET init_threads2() [L1264] CALL fire_delta_events2() [L1020] COND FALSE !(M_E == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1025] COND FALSE !(T1_E == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1030] COND FALSE !(T2_E == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1035] COND FALSE !(T3_E == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1040] COND FALSE !(E_M == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1045] COND FALSE !(E_1 == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1050] COND FALSE !(E_2 == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1055] COND FALSE !(E_3 == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1264] RET fire_delta_events2() [L1265] CALL activate_threads2() [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L799] COND FALSE !(m_pc == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L809] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L811] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, token=0] [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L818] COND FALSE !(t1_pc == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L828] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L830] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, token=0] [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L837] COND FALSE !(t2_pc == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L847] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L849] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0, token=0] [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L856] COND FALSE !(t3_pc == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L866] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L868] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=0, token=0] [L1265] RET activate_threads2() [L1266] CALL reset_delta_events2() [L1068] COND FALSE !(M_E == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1073] COND FALSE !(T1_E == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1078] COND FALSE !(T2_E == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1083] COND FALSE !(T3_E == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1088] COND FALSE !(E_M == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1093] COND FALSE !(E_1 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1098] COND FALSE !(E_2 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1103] COND FALSE !(E_3 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1266] RET reset_delta_events2() [L1269] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, kernel_st=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L1272] kernel_st = 1 [L1273] CALL eval2() [L939] int tmp ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L943] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L946] CALL, EXPR exists_runnable_thread2() [L908] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L911] COND TRUE m_st == 0 [L912] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L934] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L946] RET, EXPR exists_runnable_thread2() [L946] tmp = exists_runnable_thread2() [L948] COND TRUE \read(tmp) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, token=0] [L953] COND TRUE m_st == 0 [L954] int tmp_ndt_1; [L955] tmp_ndt_1 = __VERIFIER_nondet_int() [L956] COND FALSE !(\read(tmp_ndt_1)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, tmp=1, tmp_ndt_1=0, token=0] [L967] COND TRUE t1_st == 0 [L968] int tmp_ndt_2; [L969] tmp_ndt_2 = __VERIFIER_nondet_int() [L970] COND TRUE \read(tmp_ndt_2) [L972] t1_st = 1 [L973] CALL transmit1() [L691] COND TRUE t1_pc == 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L702] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L704] t1_pc = 1 [L705] t1_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L973] RET transmit1() [L981] COND TRUE t2_st == 0 [L982] int tmp_ndt_3; [L983] tmp_ndt_3 = __VERIFIER_nondet_int() [L984] COND TRUE \read(tmp_ndt_3) [L986] t2_st = 1 [L987] CALL transmit2() [L727] COND TRUE t2_pc == 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L738] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L740] t2_pc = 1 [L741] t2_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L987] RET transmit2() [L995] COND TRUE t3_st == 0 [L996] int tmp_ndt_4; [L997] tmp_ndt_4 = __VERIFIER_nondet_int() [L998] COND TRUE \read(tmp_ndt_4) [L1000] t3_st = 1 [L1001] CALL transmit3() [L763] COND TRUE t3_pc == 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, token=0] [L774] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, token=0] [L776] t3_pc = 1 [L777] t3_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L1001] RET transmit3() [L943] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=4, tmp_ndt_3=1, tmp_ndt_4=1, token=0] [L946] CALL, EXPR exists_runnable_thread2() [L908] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L911] COND TRUE m_st == 0 [L912] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L934] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L946] RET, EXPR exists_runnable_thread2() [L946] tmp = exists_runnable_thread2() [L948] COND TRUE \read(tmp) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=0, tmp_ndt_2=4, tmp_ndt_3=1, tmp_ndt_4=1, token=0] [L953] COND TRUE m_st == 0 [L954] int tmp_ndt_1; [L955] tmp_ndt_1 = __VERIFIER_nondet_int() [L956] COND TRUE \read(tmp_ndt_1) [L958] m_st = 1 [L959] CALL master() [L633] int tmp_var = __VERIFIER_nondet_int(); [L635] COND TRUE m_pc == 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L646] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L649] token = __VERIFIER_nondet_int() [L650] local = token [L651] E_1 = 1 [L652] CALL immediate_notify() [L1160] CALL activate_threads2() [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L799] COND FALSE !(m_pc == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L809] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L811] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, token=0] [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L818] COND TRUE t1_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L819] COND TRUE E_1 == 1 [L820] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L830] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND TRUE \read(tmp___0) [L1131] t1_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, token=0] [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L837] COND TRUE t2_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L838] COND FALSE !(E_2 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L847] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L849] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0, token=0] [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L856] COND TRUE t3_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L857] COND FALSE !(E_3 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L866] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L868] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=1, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=1, tmp___1=0, tmp___2=0, token=0] [L1160] RET activate_threads2() [L652] RET immediate_notify() [L653] E_1 = 2 [L654] m_pc = 1 [L655] m_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L959] RET master() [L967] COND TRUE t1_st == 0 [L968] int tmp_ndt_2; [L969] tmp_ndt_2 = __VERIFIER_nondet_int() [L970] COND TRUE \read(tmp_ndt_2) [L972] t1_st = 1 [L973] CALL transmit1() [L691] COND FALSE !(t1_pc == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L694] COND TRUE t1_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L710] token += 1 [L711] E_2 = 1 [L712] CALL immediate_notify() [L1160] CALL activate_threads2() [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L799] COND TRUE m_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L800] COND FALSE !(E_M == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L809] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L811] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, token=1] [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L818] COND TRUE t1_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L819] COND FALSE !(E_1 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L828] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L830] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, token=1] [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L837] COND TRUE t2_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L838] COND TRUE E_2 == 1 [L839] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L849] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND TRUE \read(tmp___1) [L1139] t2_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1, token=1] [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L856] COND TRUE t3_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L857] COND FALSE !(E_3 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L866] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L868] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=1, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=1, tmp___2=0, token=1] [L1160] RET activate_threads2() [L712] RET immediate_notify() [L713] E_2 = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L702] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L704] t1_pc = 1 [L705] t1_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L973] RET transmit1() [L981] COND TRUE t2_st == 0 [L982] int tmp_ndt_3; [L983] tmp_ndt_3 = __VERIFIER_nondet_int() [L984] COND TRUE \read(tmp_ndt_3) [L986] t2_st = 1 [L987] CALL transmit2() [L727] COND FALSE !(t2_pc == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L730] COND TRUE t2_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=1] [L746] token += 1 [L747] E_3 = 1 [L748] CALL immediate_notify() [L1160] CALL activate_threads2() [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L799] COND TRUE m_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L800] COND FALSE !(E_M == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L809] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L811] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND FALSE !(\read(tmp)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, token=2] [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L818] COND TRUE t1_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L819] COND FALSE !(E_1 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L828] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L830] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, token=2] [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L837] COND TRUE t2_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L838] COND FALSE !(E_2 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L847] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L849] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=0, tmp___0=0, tmp___1=0, token=2] [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L856] COND TRUE t3_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L857] COND TRUE E_3 == 1 [L858] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L868] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=2] [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND TRUE \read(tmp___2) [L1147] t3_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=1, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, tmp=0, tmp___0=0, tmp___1=0, tmp___2=1, token=2] [L1160] RET activate_threads2() [L748] RET immediate_notify() [L749] E_3 = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=2] [L738] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=2] [L740] t2_pc = 1 [L741] t2_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=2] [L987] RET transmit2() [L995] COND TRUE t3_st == 0 [L996] int tmp_ndt_4; [L997] tmp_ndt_4 = __VERIFIER_nondet_int() [L998] COND TRUE \read(tmp_ndt_4) [L1000] t3_st = 1 [L1001] CALL transmit3() [L763] COND FALSE !(t3_pc == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=2] [L766] COND TRUE t3_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=2] [L782] token += 1 [L783] E_M = 1 [L784] CALL immediate_notify() [L1160] CALL activate_threads2() [L1113] int tmp ; [L1114] int tmp___0 ; [L1115] int tmp___1 ; [L1116] int tmp___2 ; [L1120] CALL, EXPR is_master_triggered() [L796] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L799] COND TRUE m_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L800] COND TRUE E_M == 1 [L801] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L811] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L1120] RET, EXPR is_master_triggered() [L1120] tmp = is_master_triggered() [L1122] COND TRUE \read(tmp) [L1123] m_st = 0 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, tmp=1, token=3] [L1128] CALL, EXPR is_transmit1_triggered() [L815] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L818] COND TRUE t1_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L819] COND FALSE !(E_1 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L828] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L830] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L1128] RET, EXPR is_transmit1_triggered() [L1128] tmp___0 = is_transmit1_triggered() [L1130] COND FALSE !(\read(tmp___0)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, tmp=1, tmp___0=0, token=3] [L1136] CALL, EXPR is_transmit2_triggered() [L834] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L837] COND TRUE t2_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L838] COND FALSE !(E_2 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L847] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L849] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L1136] RET, EXPR is_transmit2_triggered() [L1136] tmp___1 = is_transmit2_triggered() [L1138] COND FALSE !(\read(tmp___1)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, tmp=1, tmp___0=0, tmp___1=0, token=3] [L1144] CALL, EXPR is_transmit3_triggered() [L853] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L856] COND TRUE t3_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L857] COND FALSE !(E_3 == 1) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L866] __retres1 = 0 VAL [__retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L868] return (__retres1); VAL [\result=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L1144] RET, EXPR is_transmit3_triggered() [L1144] tmp___2 = is_transmit3_triggered() [L1146] COND FALSE !(\read(tmp___2)) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=1, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, tmp=1, tmp___0=0, tmp___1=0, tmp___2=0, token=3] [L1160] RET activate_threads2() [L784] RET immediate_notify() [L785] E_M = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L774] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=3] [L776] t3_pc = 1 [L777] t3_st = 2 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L1001] RET transmit3() [L943] COND TRUE 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=5, tmp_ndt_3=1, tmp_ndt_4=1, token=3] [L946] CALL, EXPR exists_runnable_thread2() [L908] int __retres1 ; VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L911] COND TRUE m_st == 0 [L912] __retres1 = 1 VAL [__retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L934] return (__retres1); VAL [\result=-1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L946] RET, EXPR exists_runnable_thread2() [L946] tmp = exists_runnable_thread2() [L948] COND TRUE \read(tmp) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp=1, tmp_ndt_1=1, tmp_ndt_2=5, tmp_ndt_3=1, tmp_ndt_4=1, token=3] [L953] COND TRUE m_st == 0 [L954] int tmp_ndt_1; [L955] tmp_ndt_1 = __VERIFIER_nondet_int() [L956] COND TRUE \read(tmp_ndt_1) [L958] m_st = 1 [L959] CALL master() [L633] int tmp_var = __VERIFIER_nondet_int(); [L635] COND FALSE !(m_pc == 0) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L638] COND TRUE m_pc == 1 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L660] COND FALSE !(token != local + 3) VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] [L665] COND TRUE tmp_var <= 5 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L666] COND TRUE tmp_var >= 5 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L671] COND TRUE tmp_var <= 5 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L672] COND TRUE tmp_var >= 5 VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, tmp_var=5, token=3] [L673] COND TRUE tmp_var == 5 [L674] CALL error2() [L599] reach_error() VAL [a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, E_1=2, E_2=2, E_3=2, E_M=2, fast_clk_edge=0, local=0, M_E=2, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=3] - UnprovableResult [Line: 27]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 27]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - UnprovableResult [Line: 599]: Unable to prove that call to reach_error is unreachable Unable to prove that call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 475 locations, 4 error locations. Started 1 CEGAR loops. OverallTime: 42.6s, OverallIterations: 41, TraceHistogramMax: 3, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.2s, AutomataDifference: 21.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, PartialOrderReductionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 18247 SdHoareTripleChecker+Valid, 0.8s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 18247 mSDsluCounter, 39832 SdHoareTripleChecker+Invalid, 0.7s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 16229 mSDsCounter, 337 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 750 IncrementalHoareTripleChecker+Invalid, 1087 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 337 mSolverCounterUnsat, 23603 mSDtfsCounter, 750 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 128 GetRequests, 69 SyntacticMatches, 0 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=23688occurred in iteration=31, InterpolantAutomatonStates: 135, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 19.0s AutomataMinimizationTime, 40 MinimizatonAttempts, 4120 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 5068 NumberOfCodeBlocks, 5068 NumberOfCodeBlocksAsserted, 41 NumberOfCheckSat, 4784 ConstructedInterpolants, 0 QuantifiedInterpolants, 10493 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 40 InterpolantComputations, 40 PerfectInterpolantSequences, 630/630 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2022-01-11 01:51:35,616 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (1)] Forceful destruction successful, exit code 0 Received shutdown request...