/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf -i ../../../trunk/examples/svcomp/pthread-wmm/mix054_pso.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-4336eb1 [2019-12-28 03:19:17,057 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-28 03:19:17,059 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-28 03:19:17,077 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-28 03:19:17,078 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-28 03:19:17,079 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-28 03:19:17,081 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-28 03:19:17,090 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-28 03:19:17,094 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-28 03:19:17,097 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-28 03:19:17,099 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-28 03:19:17,101 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-28 03:19:17,102 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-28 03:19:17,103 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-28 03:19:17,105 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-28 03:19:17,107 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-28 03:19:17,108 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-28 03:19:17,109 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-28 03:19:17,110 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-28 03:19:17,114 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-28 03:19:17,118 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-28 03:19:17,122 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-28 03:19:17,123 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-28 03:19:17,123 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-28 03:19:17,126 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-12-28 03:19:17,130 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-28 03:19:17,130 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-28 03:19:17,131 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-28 03:19:17,132 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-28 03:19:17,133 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-28 03:19:17,134 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-28 03:19:17,134 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-28 03:19:17,134 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-28 03:19:17,135 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-28 03:19:17,135 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-28 03:19:17,137 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-28 03:19:17,138 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf [2019-12-28 03:19:17,160 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-28 03:19:17,160 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-28 03:19:17,161 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-28 03:19:17,161 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-28 03:19:17,162 INFO L138 SettingsManager]: * Use SBE=true [2019-12-28 03:19:17,162 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-28 03:19:17,162 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-28 03:19:17,162 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-28 03:19:17,162 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-28 03:19:17,163 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-28 03:19:17,165 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-28 03:19:17,165 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-28 03:19:17,165 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-28 03:19:17,165 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-28 03:19:17,165 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-28 03:19:17,167 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-28 03:19:17,167 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-28 03:19:17,167 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-28 03:19:17,167 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-28 03:19:17,168 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-28 03:19:17,168 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-28 03:19:17,168 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 03:19:17,168 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-28 03:19:17,168 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-28 03:19:17,168 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-28 03:19:17,169 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-28 03:19:17,169 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-28 03:19:17,169 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2019-12-28 03:19:17,169 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2019-12-28 03:19:17,169 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-28 03:19:17,169 INFO L138 SettingsManager]: * Interpolant automaton=MCR [2019-12-28 03:19:17,170 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-28 03:19:17,469 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-28 03:19:17,483 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-28 03:19:17,487 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-28 03:19:17,488 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-28 03:19:17,488 INFO L275 PluginConnector]: CDTParser initialized [2019-12-28 03:19:17,489 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/mix054_pso.opt.i [2019-12-28 03:19:17,550 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/99d23079e/d55cdce7535f420484feb09d6bf3f34d/FLAG99c669760 [2019-12-28 03:19:18,136 INFO L306 CDTParser]: Found 1 translation units. [2019-12-28 03:19:18,137 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/mix054_pso.opt.i [2019-12-28 03:19:18,160 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/99d23079e/d55cdce7535f420484feb09d6bf3f34d/FLAG99c669760 [2019-12-28 03:19:18,408 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/99d23079e/d55cdce7535f420484feb09d6bf3f34d [2019-12-28 03:19:18,416 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-28 03:19:18,418 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-12-28 03:19:18,419 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-28 03:19:18,419 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-28 03:19:18,423 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-28 03:19:18,424 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 03:19:18" (1/1) ... [2019-12-28 03:19:18,427 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3661cc76 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:18, skipping insertion in model container [2019-12-28 03:19:18,427 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 03:19:18" (1/1) ... [2019-12-28 03:19:18,434 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-28 03:19:18,488 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-28 03:19:19,044 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 03:19:19,061 INFO L203 MainTranslator]: Completed pre-run [2019-12-28 03:19:19,145 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 03:19:19,223 INFO L208 MainTranslator]: Completed translation [2019-12-28 03:19:19,223 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:19 WrapperNode [2019-12-28 03:19:19,223 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-28 03:19:19,224 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-28 03:19:19,225 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-28 03:19:19,227 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-28 03:19:19,236 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:19" (1/1) ... [2019-12-28 03:19:19,262 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:19" (1/1) ... [2019-12-28 03:19:19,313 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-28 03:19:19,316 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-28 03:19:19,316 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-28 03:19:19,316 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-28 03:19:19,324 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:19" (1/1) ... [2019-12-28 03:19:19,325 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:19" (1/1) ... [2019-12-28 03:19:19,329 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:19" (1/1) ... [2019-12-28 03:19:19,329 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:19" (1/1) ... [2019-12-28 03:19:19,339 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:19" (1/1) ... [2019-12-28 03:19:19,342 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:19" (1/1) ... [2019-12-28 03:19:19,346 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:19" (1/1) ... [2019-12-28 03:19:19,352 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-28 03:19:19,352 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-28 03:19:19,352 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-28 03:19:19,352 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-28 03:19:19,353 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:19" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 03:19:19,421 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-28 03:19:19,421 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-28 03:19:19,421 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-28 03:19:19,422 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-28 03:19:19,422 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-28 03:19:19,423 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-28 03:19:19,423 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-28 03:19:19,424 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-28 03:19:19,424 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-28 03:19:19,424 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-28 03:19:19,424 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-28 03:19:19,427 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-28 03:19:20,183 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-28 03:19:20,183 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-28 03:19:20,185 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 03:19:20 BoogieIcfgContainer [2019-12-28 03:19:20,185 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-28 03:19:20,186 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-28 03:19:20,188 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-28 03:19:20,191 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-28 03:19:20,191 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.12 03:19:18" (1/3) ... [2019-12-28 03:19:20,193 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f76681e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 03:19:20, skipping insertion in model container [2019-12-28 03:19:20,194 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:19" (2/3) ... [2019-12-28 03:19:20,194 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f76681e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 03:19:20, skipping insertion in model container [2019-12-28 03:19:20,194 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 03:19:20" (3/3) ... [2019-12-28 03:19:20,197 INFO L109 eAbstractionObserver]: Analyzing ICFG mix054_pso.opt.i [2019-12-28 03:19:20,208 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-28 03:19:20,208 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-28 03:19:20,220 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-28 03:19:20,221 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-28 03:19:20,261 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,262 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,262 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,262 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,263 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,263 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,263 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,263 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,264 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,264 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,264 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,265 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,265 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,265 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,265 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,266 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,266 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,266 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,267 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,267 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,267 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,267 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,268 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,268 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,268 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,269 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,269 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,269 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,269 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,270 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,271 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,271 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,271 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,271 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,271 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,272 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,272 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,272 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,273 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,273 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,273 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,273 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,274 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,274 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,274 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,275 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,275 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,275 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,275 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,276 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,276 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,276 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,276 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,277 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,277 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,277 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,278 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,278 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,278 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,279 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,279 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,279 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,279 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,280 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,284 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,284 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,284 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,285 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,285 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,285 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,285 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,286 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,286 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,286 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,289 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,289 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,290 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,290 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,290 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,290 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,291 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,291 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,291 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,291 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,291 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,292 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:20,309 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-28 03:19:20,328 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-28 03:19:20,328 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-28 03:19:20,328 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-28 03:19:20,329 INFO L376 AbstractCegarLoop]: Backedges is MCR [2019-12-28 03:19:20,329 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-28 03:19:20,344 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-28 03:19:20,345 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-28 03:19:20,345 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-28 03:19:20,367 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 146 places, 180 transitions [2019-12-28 03:19:21,639 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22494 states. [2019-12-28 03:19:21,641 INFO L276 IsEmpty]: Start isEmpty. Operand 22494 states. [2019-12-28 03:19:21,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-28 03:19:21,650 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:21,651 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:21,652 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:21,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:21,658 INFO L82 PathProgramCache]: Analyzing trace with hash 718983594, now seen corresponding path program 1 times [2019-12-28 03:19:21,669 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:21,670 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [123821208] [2019-12-28 03:19:21,670 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:21,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:22,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:22,001 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [123821208] [2019-12-28 03:19:22,002 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:22,002 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 03:19:22,003 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1428480564] [2019-12-28 03:19:22,004 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:22,011 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:22,032 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 38 states and 37 transitions. [2019-12-28 03:19:22,032 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:22,040 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:19:22,041 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 03:19:22,041 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:22,053 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 03:19:22,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:19:22,055 INFO L87 Difference]: Start difference. First operand 22494 states. Second operand 4 states. [2019-12-28 03:19:22,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:22,744 INFO L93 Difference]: Finished difference Result 23446 states and 91747 transitions. [2019-12-28 03:19:22,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 03:19:22,746 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2019-12-28 03:19:22,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:22,966 INFO L225 Difference]: With dead ends: 23446 [2019-12-28 03:19:22,967 INFO L226 Difference]: Without dead ends: 21270 [2019-12-28 03:19:22,970 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:19:24,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21270 states. [2019-12-28 03:19:24,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21270 to 21270. [2019-12-28 03:19:24,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21270 states. [2019-12-28 03:19:24,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21270 states to 21270 states and 83771 transitions. [2019-12-28 03:19:24,904 INFO L78 Accepts]: Start accepts. Automaton has 21270 states and 83771 transitions. Word has length 37 [2019-12-28 03:19:24,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:19:24,905 INFO L462 AbstractCegarLoop]: Abstraction has 21270 states and 83771 transitions. [2019-12-28 03:19:24,905 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 03:19:24,905 INFO L276 IsEmpty]: Start isEmpty. Operand 21270 states and 83771 transitions. [2019-12-28 03:19:24,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-28 03:19:24,918 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:24,918 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:24,919 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:24,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:24,919 INFO L82 PathProgramCache]: Analyzing trace with hash -580973517, now seen corresponding path program 1 times [2019-12-28 03:19:24,920 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:24,920 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257816323] [2019-12-28 03:19:24,920 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:24,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:25,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:25,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [257816323] [2019-12-28 03:19:25,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:25,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:19:25,100 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [545766245] [2019-12-28 03:19:25,101 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:25,106 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:25,113 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 73 states and 100 transitions. [2019-12-28 03:19:25,113 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:25,178 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 03:19:25,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:19:25,180 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:25,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:19:25,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:19:25,181 INFO L87 Difference]: Start difference. First operand 21270 states and 83771 transitions. Second operand 6 states. [2019-12-28 03:19:26,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:26,256 INFO L93 Difference]: Finished difference Result 34704 states and 129063 transitions. [2019-12-28 03:19:26,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 03:19:26,257 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2019-12-28 03:19:26,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:26,426 INFO L225 Difference]: With dead ends: 34704 [2019-12-28 03:19:26,427 INFO L226 Difference]: Without dead ends: 34560 [2019-12-28 03:19:26,429 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-28 03:19:27,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34560 states. [2019-12-28 03:19:28,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34560 to 33060. [2019-12-28 03:19:28,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33060 states. [2019-12-28 03:19:28,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33060 states to 33060 states and 123951 transitions. [2019-12-28 03:19:28,845 INFO L78 Accepts]: Start accepts. Automaton has 33060 states and 123951 transitions. Word has length 44 [2019-12-28 03:19:28,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:19:28,861 INFO L462 AbstractCegarLoop]: Abstraction has 33060 states and 123951 transitions. [2019-12-28 03:19:28,861 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:19:28,861 INFO L276 IsEmpty]: Start isEmpty. Operand 33060 states and 123951 transitions. [2019-12-28 03:19:28,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-28 03:19:28,869 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:28,869 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:28,869 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:28,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:28,869 INFO L82 PathProgramCache]: Analyzing trace with hash -1894481532, now seen corresponding path program 1 times [2019-12-28 03:19:28,873 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:28,874 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [356012727] [2019-12-28 03:19:28,874 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:28,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:28,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:28,998 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [356012727] [2019-12-28 03:19:28,999 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:28,999 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:19:28,999 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1257943823] [2019-12-28 03:19:28,999 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:29,003 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:29,007 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 46 states and 45 transitions. [2019-12-28 03:19:29,007 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:29,008 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:19:29,008 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:19:29,008 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:29,009 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:19:29,009 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:19:29,009 INFO L87 Difference]: Start difference. First operand 33060 states and 123951 transitions. Second operand 5 states. [2019-12-28 03:19:29,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:29,880 INFO L93 Difference]: Finished difference Result 40212 states and 148620 transitions. [2019-12-28 03:19:29,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 03:19:29,881 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-12-28 03:19:29,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:30,055 INFO L225 Difference]: With dead ends: 40212 [2019-12-28 03:19:30,056 INFO L226 Difference]: Without dead ends: 40052 [2019-12-28 03:19:30,056 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:19:30,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40052 states. [2019-12-28 03:19:32,400 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40052 to 34633. [2019-12-28 03:19:32,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34633 states. [2019-12-28 03:19:32,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34633 states to 34633 states and 129247 transitions. [2019-12-28 03:19:32,533 INFO L78 Accepts]: Start accepts. Automaton has 34633 states and 129247 transitions. Word has length 45 [2019-12-28 03:19:32,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:19:32,534 INFO L462 AbstractCegarLoop]: Abstraction has 34633 states and 129247 transitions. [2019-12-28 03:19:32,534 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:19:32,534 INFO L276 IsEmpty]: Start isEmpty. Operand 34633 states and 129247 transitions. [2019-12-28 03:19:32,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-28 03:19:32,550 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:32,551 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:32,551 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:32,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:32,552 INFO L82 PathProgramCache]: Analyzing trace with hash 1517466393, now seen corresponding path program 1 times [2019-12-28 03:19:32,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:32,552 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1113812965] [2019-12-28 03:19:32,553 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:32,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:32,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:32,641 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1113812965] [2019-12-28 03:19:32,642 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:32,643 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:19:32,643 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1117172918] [2019-12-28 03:19:32,643 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:32,650 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:32,658 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 65 states and 76 transitions. [2019-12-28 03:19:32,658 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:32,660 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:19:32,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:19:32,660 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:32,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:19:32,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:19:32,661 INFO L87 Difference]: Start difference. First operand 34633 states and 129247 transitions. Second operand 6 states. [2019-12-28 03:19:33,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:33,824 INFO L93 Difference]: Finished difference Result 45661 states and 166141 transitions. [2019-12-28 03:19:33,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-28 03:19:33,825 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-28 03:19:33,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:33,996 INFO L225 Difference]: With dead ends: 45661 [2019-12-28 03:19:33,996 INFO L226 Difference]: Without dead ends: 45517 [2019-12-28 03:19:33,997 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-12-28 03:19:34,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45517 states. [2019-12-28 03:19:36,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45517 to 33596. [2019-12-28 03:19:36,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33596 states. [2019-12-28 03:19:36,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33596 states to 33596 states and 125402 transitions. [2019-12-28 03:19:36,380 INFO L78 Accepts]: Start accepts. Automaton has 33596 states and 125402 transitions. Word has length 52 [2019-12-28 03:19:36,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:19:36,381 INFO L462 AbstractCegarLoop]: Abstraction has 33596 states and 125402 transitions. [2019-12-28 03:19:36,381 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:19:36,381 INFO L276 IsEmpty]: Start isEmpty. Operand 33596 states and 125402 transitions. [2019-12-28 03:19:36,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-28 03:19:36,415 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:36,415 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:36,415 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:36,416 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:36,416 INFO L82 PathProgramCache]: Analyzing trace with hash 588960950, now seen corresponding path program 1 times [2019-12-28 03:19:36,416 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:36,417 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [412964035] [2019-12-28 03:19:36,417 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:36,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:36,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:36,515 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [412964035] [2019-12-28 03:19:36,516 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:36,516 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:19:36,516 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1272065385] [2019-12-28 03:19:36,517 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:36,524 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:36,534 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 60 states and 59 transitions. [2019-12-28 03:19:36,534 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:36,535 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:19:36,535 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:19:36,535 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:36,536 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:19:36,536 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:19:36,536 INFO L87 Difference]: Start difference. First operand 33596 states and 125402 transitions. Second operand 6 states. [2019-12-28 03:19:37,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:37,472 INFO L93 Difference]: Finished difference Result 46068 states and 167835 transitions. [2019-12-28 03:19:37,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 03:19:37,472 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2019-12-28 03:19:37,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:37,586 INFO L225 Difference]: With dead ends: 46068 [2019-12-28 03:19:37,587 INFO L226 Difference]: Without dead ends: 45828 [2019-12-28 03:19:37,587 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-28 03:19:37,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45828 states. [2019-12-28 03:19:40,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45828 to 39957. [2019-12-28 03:19:40,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39957 states. [2019-12-28 03:19:40,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39957 states to 39957 states and 147326 transitions. [2019-12-28 03:19:40,216 INFO L78 Accepts]: Start accepts. Automaton has 39957 states and 147326 transitions. Word has length 59 [2019-12-28 03:19:40,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:19:40,216 INFO L462 AbstractCegarLoop]: Abstraction has 39957 states and 147326 transitions. [2019-12-28 03:19:40,217 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:19:40,217 INFO L276 IsEmpty]: Start isEmpty. Operand 39957 states and 147326 transitions. [2019-12-28 03:19:40,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-28 03:19:40,243 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:40,244 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:40,244 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:40,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:40,244 INFO L82 PathProgramCache]: Analyzing trace with hash 801616715, now seen corresponding path program 1 times [2019-12-28 03:19:40,245 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:40,245 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1691691650] [2019-12-28 03:19:40,245 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:40,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:40,289 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:40,290 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1691691650] [2019-12-28 03:19:40,290 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:40,290 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 03:19:40,290 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [542290524] [2019-12-28 03:19:40,290 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:40,299 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:40,309 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 62 states and 61 transitions. [2019-12-28 03:19:40,309 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:40,310 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:19:40,310 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 03:19:40,310 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:40,311 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 03:19:40,311 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 03:19:40,311 INFO L87 Difference]: Start difference. First operand 39957 states and 147326 transitions. Second operand 3 states. [2019-12-28 03:19:40,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:40,526 INFO L93 Difference]: Finished difference Result 50255 states and 182161 transitions. [2019-12-28 03:19:40,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 03:19:40,527 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-28 03:19:40,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:40,623 INFO L225 Difference]: With dead ends: 50255 [2019-12-28 03:19:40,623 INFO L226 Difference]: Without dead ends: 50255 [2019-12-28 03:19:40,624 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 03:19:40,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50255 states. [2019-12-28 03:19:41,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50255 to 43887. [2019-12-28 03:19:41,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43887 states. [2019-12-28 03:19:41,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43887 states to 43887 states and 160764 transitions. [2019-12-28 03:19:41,736 INFO L78 Accepts]: Start accepts. Automaton has 43887 states and 160764 transitions. Word has length 61 [2019-12-28 03:19:41,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:19:41,736 INFO L462 AbstractCegarLoop]: Abstraction has 43887 states and 160764 transitions. [2019-12-28 03:19:41,736 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 03:19:41,736 INFO L276 IsEmpty]: Start isEmpty. Operand 43887 states and 160764 transitions. [2019-12-28 03:19:41,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-28 03:19:41,770 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:41,770 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:41,770 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:41,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:41,771 INFO L82 PathProgramCache]: Analyzing trace with hash 1777012394, now seen corresponding path program 1 times [2019-12-28 03:19:41,771 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:41,772 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1489218070] [2019-12-28 03:19:41,772 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:41,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:41,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:41,885 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1489218070] [2019-12-28 03:19:41,885 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:41,885 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:19:41,885 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2067134590] [2019-12-28 03:19:41,886 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:41,898 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:41,911 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 66 states and 65 transitions. [2019-12-28 03:19:41,912 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:41,912 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:19:41,912 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 03:19:41,913 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:41,913 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 03:19:41,913 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:19:41,913 INFO L87 Difference]: Start difference. First operand 43887 states and 160764 transitions. Second operand 7 states. [2019-12-28 03:19:43,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:43,212 INFO L93 Difference]: Finished difference Result 55883 states and 200498 transitions. [2019-12-28 03:19:43,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-28 03:19:43,213 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-28 03:19:43,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:43,331 INFO L225 Difference]: With dead ends: 55883 [2019-12-28 03:19:43,332 INFO L226 Difference]: Without dead ends: 55643 [2019-12-28 03:19:43,332 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-12-28 03:19:43,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55643 states. [2019-12-28 03:19:45,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55643 to 45113. [2019-12-28 03:19:45,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45113 states. [2019-12-28 03:19:46,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45113 states to 45113 states and 164931 transitions. [2019-12-28 03:19:46,042 INFO L78 Accepts]: Start accepts. Automaton has 45113 states and 164931 transitions. Word has length 65 [2019-12-28 03:19:46,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:19:46,043 INFO L462 AbstractCegarLoop]: Abstraction has 45113 states and 164931 transitions. [2019-12-28 03:19:46,043 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 03:19:46,043 INFO L276 IsEmpty]: Start isEmpty. Operand 45113 states and 164931 transitions. [2019-12-28 03:19:46,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-28 03:19:46,080 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:46,080 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:46,080 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:46,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:46,080 INFO L82 PathProgramCache]: Analyzing trace with hash -1623997529, now seen corresponding path program 1 times [2019-12-28 03:19:46,081 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:46,081 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865300686] [2019-12-28 03:19:46,081 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:46,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:46,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:46,170 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [865300686] [2019-12-28 03:19:46,171 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:46,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 03:19:46,171 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2023479314] [2019-12-28 03:19:46,171 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:46,182 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:46,206 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 93 states and 109 transitions. [2019-12-28 03:19:46,207 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:46,207 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:19:46,208 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 03:19:46,208 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:46,208 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 03:19:46,208 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:19:46,209 INFO L87 Difference]: Start difference. First operand 45113 states and 164931 transitions. Second operand 4 states. [2019-12-28 03:19:46,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:46,802 INFO L93 Difference]: Finished difference Result 69395 states and 251987 transitions. [2019-12-28 03:19:46,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 03:19:46,803 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-28 03:19:46,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:46,977 INFO L225 Difference]: With dead ends: 69395 [2019-12-28 03:19:46,977 INFO L226 Difference]: Without dead ends: 69395 [2019-12-28 03:19:46,977 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:19:47,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69395 states. [2019-12-28 03:19:48,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69395 to 53603. [2019-12-28 03:19:48,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53603 states. [2019-12-28 03:19:48,437 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53603 states to 53603 states and 195396 transitions. [2019-12-28 03:19:48,437 INFO L78 Accepts]: Start accepts. Automaton has 53603 states and 195396 transitions. Word has length 66 [2019-12-28 03:19:48,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:19:48,438 INFO L462 AbstractCegarLoop]: Abstraction has 53603 states and 195396 transitions. [2019-12-28 03:19:48,438 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 03:19:48,438 INFO L276 IsEmpty]: Start isEmpty. Operand 53603 states and 195396 transitions. [2019-12-28 03:19:48,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-28 03:19:48,962 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:48,962 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:48,963 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:48,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:48,963 INFO L82 PathProgramCache]: Analyzing trace with hash 811914503, now seen corresponding path program 1 times [2019-12-28 03:19:48,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:48,964 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1618534352] [2019-12-28 03:19:48,964 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:48,978 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:49,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:49,049 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1618534352] [2019-12-28 03:19:49,049 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:49,049 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:19:49,050 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2040672192] [2019-12-28 03:19:49,050 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:49,060 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:49,078 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 76 states and 82 transitions. [2019-12-28 03:19:49,078 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:49,078 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:19:49,079 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 03:19:49,079 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:49,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 03:19:49,079 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:19:49,079 INFO L87 Difference]: Start difference. First operand 53603 states and 195396 transitions. Second operand 7 states. [2019-12-28 03:19:50,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:50,214 INFO L93 Difference]: Finished difference Result 63814 states and 228863 transitions. [2019-12-28 03:19:50,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-28 03:19:50,215 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-28 03:19:50,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:50,337 INFO L225 Difference]: With dead ends: 63814 [2019-12-28 03:19:50,337 INFO L226 Difference]: Without dead ends: 63614 [2019-12-28 03:19:50,337 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-12-28 03:19:50,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63614 states. [2019-12-28 03:19:53,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63614 to 54372. [2019-12-28 03:19:53,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54372 states. [2019-12-28 03:19:53,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54372 states to 54372 states and 197926 transitions. [2019-12-28 03:19:53,368 INFO L78 Accepts]: Start accepts. Automaton has 54372 states and 197926 transitions. Word has length 66 [2019-12-28 03:19:53,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:19:53,368 INFO L462 AbstractCegarLoop]: Abstraction has 54372 states and 197926 transitions. [2019-12-28 03:19:53,368 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 03:19:53,368 INFO L276 IsEmpty]: Start isEmpty. Operand 54372 states and 197926 transitions. [2019-12-28 03:19:53,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-28 03:19:53,432 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:53,432 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:53,432 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:53,433 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:53,433 INFO L82 PathProgramCache]: Analyzing trace with hash -2098261969, now seen corresponding path program 1 times [2019-12-28 03:19:53,434 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:53,434 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [784511843] [2019-12-28 03:19:53,434 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:53,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:53,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:53,550 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [784511843] [2019-12-28 03:19:53,550 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:53,550 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:19:53,551 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [640040968] [2019-12-28 03:19:53,551 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:53,561 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:53,574 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 71 states and 72 transitions. [2019-12-28 03:19:53,574 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:53,575 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:19:53,575 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:19:53,575 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:53,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:19:53,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:19:53,576 INFO L87 Difference]: Start difference. First operand 54372 states and 197926 transitions. Second operand 6 states. [2019-12-28 03:19:54,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:54,387 INFO L93 Difference]: Finished difference Result 75809 states and 274644 transitions. [2019-12-28 03:19:54,388 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 03:19:54,388 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-12-28 03:19:54,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:54,540 INFO L225 Difference]: With dead ends: 75809 [2019-12-28 03:19:54,541 INFO L226 Difference]: Without dead ends: 75165 [2019-12-28 03:19:54,541 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:19:55,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75165 states. [2019-12-28 03:19:56,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75165 to 65272. [2019-12-28 03:19:56,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65272 states. [2019-12-28 03:19:56,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65272 states to 65272 states and 238097 transitions. [2019-12-28 03:19:56,301 INFO L78 Accepts]: Start accepts. Automaton has 65272 states and 238097 transitions. Word has length 68 [2019-12-28 03:19:56,302 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:19:56,302 INFO L462 AbstractCegarLoop]: Abstraction has 65272 states and 238097 transitions. [2019-12-28 03:19:56,302 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:19:56,302 INFO L276 IsEmpty]: Start isEmpty. Operand 65272 states and 238097 transitions. [2019-12-28 03:19:56,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-28 03:19:56,358 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:56,358 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:56,358 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:56,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:56,358 INFO L82 PathProgramCache]: Analyzing trace with hash -1136647952, now seen corresponding path program 1 times [2019-12-28 03:19:56,359 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:56,359 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2090410518] [2019-12-28 03:19:56,359 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:56,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:56,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:56,462 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2090410518] [2019-12-28 03:19:56,462 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:56,462 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:19:56,462 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1207912399] [2019-12-28 03:19:56,462 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:56,474 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:57,044 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 71 states and 72 transitions. [2019-12-28 03:19:57,045 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:57,045 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:19:57,046 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 03:19:57,046 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:57,046 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 03:19:57,046 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:19:57,046 INFO L87 Difference]: Start difference. First operand 65272 states and 238097 transitions. Second operand 7 states. [2019-12-28 03:19:58,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:58,226 INFO L93 Difference]: Finished difference Result 92233 states and 326439 transitions. [2019-12-28 03:19:58,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-28 03:19:58,226 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 68 [2019-12-28 03:19:58,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:58,421 INFO L225 Difference]: With dead ends: 92233 [2019-12-28 03:19:58,422 INFO L226 Difference]: Without dead ends: 92233 [2019-12-28 03:19:58,422 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-28 03:19:58,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92233 states. [2019-12-28 03:20:02,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92233 to 84342. [2019-12-28 03:20:02,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84342 states. [2019-12-28 03:20:02,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84342 states to 84342 states and 301206 transitions. [2019-12-28 03:20:02,552 INFO L78 Accepts]: Start accepts. Automaton has 84342 states and 301206 transitions. Word has length 68 [2019-12-28 03:20:02,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:02,552 INFO L462 AbstractCegarLoop]: Abstraction has 84342 states and 301206 transitions. [2019-12-28 03:20:02,552 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 03:20:02,552 INFO L276 IsEmpty]: Start isEmpty. Operand 84342 states and 301206 transitions. [2019-12-28 03:20:02,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-28 03:20:02,640 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:02,640 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:02,641 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:02,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:02,641 INFO L82 PathProgramCache]: Analyzing trace with hash 108116529, now seen corresponding path program 1 times [2019-12-28 03:20:02,641 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:02,642 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2145461166] [2019-12-28 03:20:02,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:02,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:02,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:02,708 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2145461166] [2019-12-28 03:20:02,708 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:02,708 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 03:20:02,709 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1593150572] [2019-12-28 03:20:02,709 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:02,719 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:02,731 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 71 states and 72 transitions. [2019-12-28 03:20:02,732 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:02,737 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 03:20:02,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 03:20:02,738 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:02,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 03:20:02,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:20:02,738 INFO L87 Difference]: Start difference. First operand 84342 states and 301206 transitions. Second operand 4 states. [2019-12-28 03:20:02,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:02,861 INFO L93 Difference]: Finished difference Result 19353 states and 61112 transitions. [2019-12-28 03:20:02,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 03:20:02,862 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 68 [2019-12-28 03:20:02,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:02,903 INFO L225 Difference]: With dead ends: 19353 [2019-12-28 03:20:02,903 INFO L226 Difference]: Without dead ends: 18875 [2019-12-28 03:20:02,903 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:02,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18875 states. [2019-12-28 03:20:03,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18875 to 18863. [2019-12-28 03:20:03,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18863 states. [2019-12-28 03:20:03,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18863 states to 18863 states and 59607 transitions. [2019-12-28 03:20:03,224 INFO L78 Accepts]: Start accepts. Automaton has 18863 states and 59607 transitions. Word has length 68 [2019-12-28 03:20:03,224 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:03,224 INFO L462 AbstractCegarLoop]: Abstraction has 18863 states and 59607 transitions. [2019-12-28 03:20:03,224 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 03:20:03,224 INFO L276 IsEmpty]: Start isEmpty. Operand 18863 states and 59607 transitions. [2019-12-28 03:20:03,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-12-28 03:20:03,240 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:03,240 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:03,240 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:03,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:03,240 INFO L82 PathProgramCache]: Analyzing trace with hash -275704147, now seen corresponding path program 1 times [2019-12-28 03:20:03,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:03,241 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922636540] [2019-12-28 03:20:03,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:03,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:03,300 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:03,301 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [922636540] [2019-12-28 03:20:03,301 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:03,301 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 03:20:03,302 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [164420764] [2019-12-28 03:20:03,302 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:03,907 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:03,949 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 131 states and 182 transitions. [2019-12-28 03:20:03,950 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:03,990 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 8 times. [2019-12-28 03:20:03,992 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:03,992 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:03,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:03,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:03,993 INFO L87 Difference]: Start difference. First operand 18863 states and 59607 transitions. Second operand 6 states. [2019-12-28 03:20:04,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:04,293 INFO L93 Difference]: Finished difference Result 24263 states and 75787 transitions. [2019-12-28 03:20:04,293 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 03:20:04,293 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 78 [2019-12-28 03:20:04,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:04,329 INFO L225 Difference]: With dead ends: 24263 [2019-12-28 03:20:04,329 INFO L226 Difference]: Without dead ends: 24263 [2019-12-28 03:20:04,330 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:04,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24263 states. [2019-12-28 03:20:04,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24263 to 19775. [2019-12-28 03:20:04,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19775 states. [2019-12-28 03:20:04,619 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19775 states to 19775 states and 62265 transitions. [2019-12-28 03:20:04,620 INFO L78 Accepts]: Start accepts. Automaton has 19775 states and 62265 transitions. Word has length 78 [2019-12-28 03:20:04,620 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:04,620 INFO L462 AbstractCegarLoop]: Abstraction has 19775 states and 62265 transitions. [2019-12-28 03:20:04,620 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:04,620 INFO L276 IsEmpty]: Start isEmpty. Operand 19775 states and 62265 transitions. [2019-12-28 03:20:04,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-12-28 03:20:04,636 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:04,636 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:04,637 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:04,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:04,637 INFO L82 PathProgramCache]: Analyzing trace with hash -530440692, now seen corresponding path program 1 times [2019-12-28 03:20:04,638 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:04,638 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2050951631] [2019-12-28 03:20:04,638 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:04,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:04,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:04,739 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2050951631] [2019-12-28 03:20:04,739 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:04,739 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 03:20:04,740 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [390396974] [2019-12-28 03:20:04,740 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:04,770 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:04,809 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 131 states and 182 transitions. [2019-12-28 03:20:04,809 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:04,828 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 03:20:04,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 03:20:04,829 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:04,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 03:20:04,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-28 03:20:04,829 INFO L87 Difference]: Start difference. First operand 19775 states and 62265 transitions. Second operand 9 states. [2019-12-28 03:20:06,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:06,029 INFO L93 Difference]: Finished difference Result 21929 states and 68513 transitions. [2019-12-28 03:20:06,029 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-28 03:20:06,029 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 78 [2019-12-28 03:20:06,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:06,062 INFO L225 Difference]: With dead ends: 21929 [2019-12-28 03:20:06,063 INFO L226 Difference]: Without dead ends: 21881 [2019-12-28 03:20:06,063 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=175, Invalid=637, Unknown=0, NotChecked=0, Total=812 [2019-12-28 03:20:06,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21881 states. [2019-12-28 03:20:06,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21881 to 17444. [2019-12-28 03:20:06,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17444 states. [2019-12-28 03:20:06,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17444 states to 17444 states and 55284 transitions. [2019-12-28 03:20:06,328 INFO L78 Accepts]: Start accepts. Automaton has 17444 states and 55284 transitions. Word has length 78 [2019-12-28 03:20:06,328 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:06,328 INFO L462 AbstractCegarLoop]: Abstraction has 17444 states and 55284 transitions. [2019-12-28 03:20:06,328 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 03:20:06,328 INFO L276 IsEmpty]: Start isEmpty. Operand 17444 states and 55284 transitions. [2019-12-28 03:20:06,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-12-28 03:20:06,344 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:06,344 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:06,345 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:06,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:06,345 INFO L82 PathProgramCache]: Analyzing trace with hash 696586823, now seen corresponding path program 1 times [2019-12-28 03:20:06,346 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:06,346 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1857372204] [2019-12-28 03:20:06,346 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:06,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:06,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:06,390 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1857372204] [2019-12-28 03:20:06,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:06,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 03:20:06,391 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [549948556] [2019-12-28 03:20:06,391 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:06,406 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:06,428 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 85 states and 89 transitions. [2019-12-28 03:20:06,429 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:06,429 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:06,429 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 03:20:06,429 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:06,430 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 03:20:06,430 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 03:20:06,430 INFO L87 Difference]: Start difference. First operand 17444 states and 55284 transitions. Second operand 3 states. [2019-12-28 03:20:07,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:07,506 INFO L93 Difference]: Finished difference Result 18708 states and 58997 transitions. [2019-12-28 03:20:07,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 03:20:07,507 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-12-28 03:20:07,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:07,535 INFO L225 Difference]: With dead ends: 18708 [2019-12-28 03:20:07,536 INFO L226 Difference]: Without dead ends: 18708 [2019-12-28 03:20:07,536 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 03:20:07,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18708 states. [2019-12-28 03:20:07,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18708 to 18060. [2019-12-28 03:20:07,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18060 states. [2019-12-28 03:20:07,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18060 states to 18060 states and 57098 transitions. [2019-12-28 03:20:07,788 INFO L78 Accepts]: Start accepts. Automaton has 18060 states and 57098 transitions. Word has length 79 [2019-12-28 03:20:07,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:07,789 INFO L462 AbstractCegarLoop]: Abstraction has 18060 states and 57098 transitions. [2019-12-28 03:20:07,789 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 03:20:07,789 INFO L276 IsEmpty]: Start isEmpty. Operand 18060 states and 57098 transitions. [2019-12-28 03:20:07,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 03:20:07,805 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:07,806 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:07,806 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:07,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:07,806 INFO L82 PathProgramCache]: Analyzing trace with hash 341966849, now seen corresponding path program 1 times [2019-12-28 03:20:07,807 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:07,807 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [230066208] [2019-12-28 03:20:07,807 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:07,820 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:07,864 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:07,864 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [230066208] [2019-12-28 03:20:07,865 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:07,865 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 03:20:07,865 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1800158874] [2019-12-28 03:20:07,865 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:07,881 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:07,902 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 81 states and 80 transitions. [2019-12-28 03:20:07,902 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:07,903 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:07,903 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 03:20:07,903 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:07,903 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 03:20:07,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:20:07,904 INFO L87 Difference]: Start difference. First operand 18060 states and 57098 transitions. Second operand 4 states. [2019-12-28 03:20:08,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:08,253 INFO L93 Difference]: Finished difference Result 21188 states and 66144 transitions. [2019-12-28 03:20:08,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 03:20:08,253 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2019-12-28 03:20:08,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:08,291 INFO L225 Difference]: With dead ends: 21188 [2019-12-28 03:20:08,291 INFO L226 Difference]: Without dead ends: 21188 [2019-12-28 03:20:08,291 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:20:08,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21188 states. [2019-12-28 03:20:08,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21188 to 20165. [2019-12-28 03:20:08,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20165 states. [2019-12-28 03:20:08,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20165 states to 20165 states and 63260 transitions. [2019-12-28 03:20:08,570 INFO L78 Accepts]: Start accepts. Automaton has 20165 states and 63260 transitions. Word has length 80 [2019-12-28 03:20:08,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:08,570 INFO L462 AbstractCegarLoop]: Abstraction has 20165 states and 63260 transitions. [2019-12-28 03:20:08,570 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 03:20:08,570 INFO L276 IsEmpty]: Start isEmpty. Operand 20165 states and 63260 transitions. [2019-12-28 03:20:08,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 03:20:08,589 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:08,589 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:08,589 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:08,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:08,590 INFO L82 PathProgramCache]: Analyzing trace with hash -1593693438, now seen corresponding path program 1 times [2019-12-28 03:20:08,590 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:08,590 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [801500803] [2019-12-28 03:20:08,590 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:08,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:08,631 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:08,631 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [801500803] [2019-12-28 03:20:08,631 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:08,631 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 03:20:08,632 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [202138229] [2019-12-28 03:20:08,632 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:08,648 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:08,668 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 81 states and 80 transitions. [2019-12-28 03:20:08,668 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:08,669 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:08,669 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 03:20:08,669 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:08,669 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 03:20:08,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 03:20:08,670 INFO L87 Difference]: Start difference. First operand 20165 states and 63260 transitions. Second operand 3 states. [2019-12-28 03:20:08,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:08,963 INFO L93 Difference]: Finished difference Result 21496 states and 67159 transitions. [2019-12-28 03:20:08,963 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 03:20:08,963 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-12-28 03:20:08,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:09,006 INFO L225 Difference]: With dead ends: 21496 [2019-12-28 03:20:09,006 INFO L226 Difference]: Without dead ends: 21496 [2019-12-28 03:20:09,007 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 03:20:09,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21496 states. [2019-12-28 03:20:09,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21496 to 20837. [2019-12-28 03:20:09,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20837 states. [2019-12-28 03:20:09,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20837 states to 20837 states and 65224 transitions. [2019-12-28 03:20:09,340 INFO L78 Accepts]: Start accepts. Automaton has 20837 states and 65224 transitions. Word has length 80 [2019-12-28 03:20:09,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:09,341 INFO L462 AbstractCegarLoop]: Abstraction has 20837 states and 65224 transitions. [2019-12-28 03:20:09,341 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 03:20:09,341 INFO L276 IsEmpty]: Start isEmpty. Operand 20837 states and 65224 transitions. [2019-12-28 03:20:09,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-28 03:20:09,363 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:09,363 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:09,363 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:09,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:09,364 INFO L82 PathProgramCache]: Analyzing trace with hash -441899733, now seen corresponding path program 1 times [2019-12-28 03:20:09,364 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:09,364 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1539518407] [2019-12-28 03:20:09,365 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:09,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:09,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:09,454 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1539518407] [2019-12-28 03:20:09,454 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:09,454 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:20:09,454 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1573441091] [2019-12-28 03:20:09,454 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:09,471 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:09,498 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 91 transitions. [2019-12-28 03:20:09,499 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:09,499 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:09,500 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:20:09,500 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:09,500 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:20:09,500 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:09,500 INFO L87 Difference]: Start difference. First operand 20837 states and 65224 transitions. Second operand 5 states. [2019-12-28 03:20:10,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:10,160 INFO L93 Difference]: Finished difference Result 35494 states and 110331 transitions. [2019-12-28 03:20:10,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 03:20:10,161 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 81 [2019-12-28 03:20:10,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:10,240 INFO L225 Difference]: With dead ends: 35494 [2019-12-28 03:20:10,241 INFO L226 Difference]: Without dead ends: 35494 [2019-12-28 03:20:10,241 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:10,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35494 states. [2019-12-28 03:20:10,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35494 to 19411. [2019-12-28 03:20:10,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19411 states. [2019-12-28 03:20:10,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19411 states to 19411 states and 59950 transitions. [2019-12-28 03:20:10,607 INFO L78 Accepts]: Start accepts. Automaton has 19411 states and 59950 transitions. Word has length 81 [2019-12-28 03:20:10,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:10,607 INFO L462 AbstractCegarLoop]: Abstraction has 19411 states and 59950 transitions. [2019-12-28 03:20:10,607 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:20:10,608 INFO L276 IsEmpty]: Start isEmpty. Operand 19411 states and 59950 transitions. [2019-12-28 03:20:10,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-28 03:20:10,625 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:10,626 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:10,626 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:10,626 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:10,626 INFO L82 PathProgramCache]: Analyzing trace with hash -112133972, now seen corresponding path program 1 times [2019-12-28 03:20:10,627 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:10,627 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [930493073] [2019-12-28 03:20:10,627 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:10,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:10,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:10,683 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [930493073] [2019-12-28 03:20:10,684 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:10,684 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:20:10,684 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [529146811] [2019-12-28 03:20:10,684 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:10,699 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:10,725 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 91 transitions. [2019-12-28 03:20:10,725 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:10,725 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:10,727 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:20:10,727 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:10,727 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:20:10,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:10,728 INFO L87 Difference]: Start difference. First operand 19411 states and 59950 transitions. Second operand 5 states. [2019-12-28 03:20:11,789 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:11,789 INFO L93 Difference]: Finished difference Result 39483 states and 120359 transitions. [2019-12-28 03:20:11,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 03:20:11,792 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 81 [2019-12-28 03:20:11,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:11,854 INFO L225 Difference]: With dead ends: 39483 [2019-12-28 03:20:11,854 INFO L226 Difference]: Without dead ends: 39273 [2019-12-28 03:20:11,854 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:20:11,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39273 states. [2019-12-28 03:20:12,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39273 to 22242. [2019-12-28 03:20:12,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22242 states. [2019-12-28 03:20:12,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22242 states to 22242 states and 68398 transitions. [2019-12-28 03:20:12,273 INFO L78 Accepts]: Start accepts. Automaton has 22242 states and 68398 transitions. Word has length 81 [2019-12-28 03:20:12,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:12,273 INFO L462 AbstractCegarLoop]: Abstraction has 22242 states and 68398 transitions. [2019-12-28 03:20:12,273 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:20:12,273 INFO L276 IsEmpty]: Start isEmpty. Operand 22242 states and 68398 transitions. [2019-12-28 03:20:12,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-28 03:20:12,293 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:12,293 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:12,293 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:12,293 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:12,293 INFO L82 PathProgramCache]: Analyzing trace with hash -1034817555, now seen corresponding path program 1 times [2019-12-28 03:20:12,294 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:12,294 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [882235027] [2019-12-28 03:20:12,294 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:12,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:12,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:12,400 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [882235027] [2019-12-28 03:20:12,400 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:12,400 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:20:12,401 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2070852883] [2019-12-28 03:20:12,401 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:12,416 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:12,443 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 91 transitions. [2019-12-28 03:20:12,443 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:12,444 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:12,444 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 03:20:12,444 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:12,444 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 03:20:12,444 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:12,445 INFO L87 Difference]: Start difference. First operand 22242 states and 68398 transitions. Second operand 7 states. [2019-12-28 03:20:13,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:13,611 INFO L93 Difference]: Finished difference Result 33359 states and 100101 transitions. [2019-12-28 03:20:13,611 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-28 03:20:13,612 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 81 [2019-12-28 03:20:13,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:13,690 INFO L225 Difference]: With dead ends: 33359 [2019-12-28 03:20:13,690 INFO L226 Difference]: Without dead ends: 32840 [2019-12-28 03:20:13,691 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2019-12-28 03:20:13,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32840 states. [2019-12-28 03:20:14,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32840 to 25695. [2019-12-28 03:20:14,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25695 states. [2019-12-28 03:20:14,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25695 states to 25695 states and 78656 transitions. [2019-12-28 03:20:14,403 INFO L78 Accepts]: Start accepts. Automaton has 25695 states and 78656 transitions. Word has length 81 [2019-12-28 03:20:14,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:14,404 INFO L462 AbstractCegarLoop]: Abstraction has 25695 states and 78656 transitions. [2019-12-28 03:20:14,404 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 03:20:14,404 INFO L276 IsEmpty]: Start isEmpty. Operand 25695 states and 78656 transitions. [2019-12-28 03:20:14,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-28 03:20:14,437 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:14,437 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:14,438 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:14,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:14,438 INFO L82 PathProgramCache]: Analyzing trace with hash -73203538, now seen corresponding path program 1 times [2019-12-28 03:20:14,439 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:14,439 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [487220906] [2019-12-28 03:20:14,439 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:14,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:14,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:14,556 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [487220906] [2019-12-28 03:20:14,556 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:14,556 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:20:14,556 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1884829925] [2019-12-28 03:20:14,557 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:14,572 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:14,596 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 91 transitions. [2019-12-28 03:20:14,597 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:14,597 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:14,598 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 03:20:14,598 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:14,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 03:20:14,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:14,599 INFO L87 Difference]: Start difference. First operand 25695 states and 78656 transitions. Second operand 7 states. [2019-12-28 03:20:15,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:15,784 INFO L93 Difference]: Finished difference Result 44955 states and 135185 transitions. [2019-12-28 03:20:15,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-28 03:20:15,784 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 81 [2019-12-28 03:20:15,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:15,850 INFO L225 Difference]: With dead ends: 44955 [2019-12-28 03:20:15,850 INFO L226 Difference]: Without dead ends: 44883 [2019-12-28 03:20:15,851 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=87, Invalid=185, Unknown=0, NotChecked=0, Total=272 [2019-12-28 03:20:15,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44883 states. [2019-12-28 03:20:16,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44883 to 29314. [2019-12-28 03:20:16,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29314 states. [2019-12-28 03:20:16,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29314 states to 29314 states and 89483 transitions. [2019-12-28 03:20:16,352 INFO L78 Accepts]: Start accepts. Automaton has 29314 states and 89483 transitions. Word has length 81 [2019-12-28 03:20:16,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:16,352 INFO L462 AbstractCegarLoop]: Abstraction has 29314 states and 89483 transitions. [2019-12-28 03:20:16,352 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 03:20:16,353 INFO L276 IsEmpty]: Start isEmpty. Operand 29314 states and 89483 transitions. [2019-12-28 03:20:16,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-28 03:20:16,378 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:16,379 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:16,379 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:16,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:16,379 INFO L82 PathProgramCache]: Analyzing trace with hash 1171560943, now seen corresponding path program 1 times [2019-12-28 03:20:16,380 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:16,380 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635605924] [2019-12-28 03:20:16,380 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:16,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:16,482 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:16,483 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635605924] [2019-12-28 03:20:16,484 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:16,484 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:20:16,484 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [184049650] [2019-12-28 03:20:16,484 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:16,499 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:16,520 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 91 transitions. [2019-12-28 03:20:16,520 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:16,520 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:16,521 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 03:20:16,521 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:16,521 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 03:20:16,521 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:16,521 INFO L87 Difference]: Start difference. First operand 29314 states and 89483 transitions. Second operand 7 states. [2019-12-28 03:20:17,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:17,216 INFO L93 Difference]: Finished difference Result 41951 states and 128490 transitions. [2019-12-28 03:20:17,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 03:20:17,216 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 81 [2019-12-28 03:20:17,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:17,282 INFO L225 Difference]: With dead ends: 41951 [2019-12-28 03:20:17,282 INFO L226 Difference]: Without dead ends: 41951 [2019-12-28 03:20:17,282 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-12-28 03:20:17,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41951 states. [2019-12-28 03:20:17,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41951 to 27793. [2019-12-28 03:20:17,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27793 states. [2019-12-28 03:20:17,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27793 states to 27793 states and 84716 transitions. [2019-12-28 03:20:17,944 INFO L78 Accepts]: Start accepts. Automaton has 27793 states and 84716 transitions. Word has length 81 [2019-12-28 03:20:17,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:17,945 INFO L462 AbstractCegarLoop]: Abstraction has 27793 states and 84716 transitions. [2019-12-28 03:20:17,945 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 03:20:17,945 INFO L276 IsEmpty]: Start isEmpty. Operand 27793 states and 84716 transitions. [2019-12-28 03:20:17,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-28 03:20:17,967 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:17,967 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:17,967 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:17,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:17,967 INFO L82 PathProgramCache]: Analyzing trace with hash 1652277359, now seen corresponding path program 1 times [2019-12-28 03:20:17,968 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:17,968 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1007682443] [2019-12-28 03:20:17,968 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:17,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:18,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:18,078 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1007682443] [2019-12-28 03:20:18,079 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:18,079 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 03:20:18,079 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [146731390] [2019-12-28 03:20:18,079 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:18,094 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:18,118 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 91 transitions. [2019-12-28 03:20:18,118 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:18,119 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:18,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 03:20:18,121 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:18,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 03:20:18,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:20:18,122 INFO L87 Difference]: Start difference. First operand 27793 states and 84716 transitions. Second operand 8 states. [2019-12-28 03:20:19,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:19,289 INFO L93 Difference]: Finished difference Result 34518 states and 103296 transitions. [2019-12-28 03:20:19,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 03:20:19,290 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 81 [2019-12-28 03:20:19,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:19,340 INFO L225 Difference]: With dead ends: 34518 [2019-12-28 03:20:19,341 INFO L226 Difference]: Without dead ends: 34518 [2019-12-28 03:20:19,341 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2019-12-28 03:20:19,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34518 states. [2019-12-28 03:20:19,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34518 to 29728. [2019-12-28 03:20:19,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29728 states. [2019-12-28 03:20:19,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29728 states to 29728 states and 90479 transitions. [2019-12-28 03:20:19,785 INFO L78 Accepts]: Start accepts. Automaton has 29728 states and 90479 transitions. Word has length 81 [2019-12-28 03:20:19,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:19,785 INFO L462 AbstractCegarLoop]: Abstraction has 29728 states and 90479 transitions. [2019-12-28 03:20:19,785 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 03:20:19,785 INFO L276 IsEmpty]: Start isEmpty. Operand 29728 states and 90479 transitions. [2019-12-28 03:20:19,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-28 03:20:19,812 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:19,812 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:19,812 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:19,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:19,812 INFO L82 PathProgramCache]: Analyzing trace with hash -1397925456, now seen corresponding path program 1 times [2019-12-28 03:20:19,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:19,813 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [580328552] [2019-12-28 03:20:19,813 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:19,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:19,895 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:19,896 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [580328552] [2019-12-28 03:20:19,896 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:19,896 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:20:19,896 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1596203546] [2019-12-28 03:20:19,896 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:19,911 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:19,936 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 91 transitions. [2019-12-28 03:20:19,936 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:19,936 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:19,937 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:20:19,937 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:19,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:20:19,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:19,938 INFO L87 Difference]: Start difference. First operand 29728 states and 90479 transitions. Second operand 5 states. [2019-12-28 03:20:19,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:19,990 INFO L93 Difference]: Finished difference Result 3484 states and 8525 transitions. [2019-12-28 03:20:19,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 03:20:19,991 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 81 [2019-12-28 03:20:19,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:19,995 INFO L225 Difference]: With dead ends: 3484 [2019-12-28 03:20:19,995 INFO L226 Difference]: Without dead ends: 2956 [2019-12-28 03:20:19,997 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:20,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2956 states. [2019-12-28 03:20:20,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2956 to 2660. [2019-12-28 03:20:20,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2660 states. [2019-12-28 03:20:20,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2660 states to 2660 states and 6472 transitions. [2019-12-28 03:20:20,036 INFO L78 Accepts]: Start accepts. Automaton has 2660 states and 6472 transitions. Word has length 81 [2019-12-28 03:20:20,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:20,036 INFO L462 AbstractCegarLoop]: Abstraction has 2660 states and 6472 transitions. [2019-12-28 03:20:20,036 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:20:20,037 INFO L276 IsEmpty]: Start isEmpty. Operand 2660 states and 6472 transitions. [2019-12-28 03:20:20,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-12-28 03:20:20,040 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:20,040 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:20,040 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:20,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:20,041 INFO L82 PathProgramCache]: Analyzing trace with hash 1096971421, now seen corresponding path program 1 times [2019-12-28 03:20:20,041 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:20,041 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [700802404] [2019-12-28 03:20:20,042 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:20,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:20,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:20,152 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [700802404] [2019-12-28 03:20:20,152 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:20,152 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:20,153 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [917079898] [2019-12-28 03:20:20,153 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:20,175 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:20,242 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 132 states and 169 transitions. [2019-12-28 03:20:20,242 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:20,244 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:20,244 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:20,244 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:20,245 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:20,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:20,245 INFO L87 Difference]: Start difference. First operand 2660 states and 6472 transitions. Second operand 6 states. [2019-12-28 03:20:20,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:20,569 INFO L93 Difference]: Finished difference Result 2844 states and 6794 transitions. [2019-12-28 03:20:20,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 03:20:20,570 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2019-12-28 03:20:20,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:20,575 INFO L225 Difference]: With dead ends: 2844 [2019-12-28 03:20:20,575 INFO L226 Difference]: Without dead ends: 2792 [2019-12-28 03:20:20,575 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:20:20,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2792 states. [2019-12-28 03:20:20,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2792 to 2739. [2019-12-28 03:20:20,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2739 states. [2019-12-28 03:20:20,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2739 states to 2739 states and 6617 transitions. [2019-12-28 03:20:20,613 INFO L78 Accepts]: Start accepts. Automaton has 2739 states and 6617 transitions. Word has length 93 [2019-12-28 03:20:20,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:20,613 INFO L462 AbstractCegarLoop]: Abstraction has 2739 states and 6617 transitions. [2019-12-28 03:20:20,614 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:20,614 INFO L276 IsEmpty]: Start isEmpty. Operand 2739 states and 6617 transitions. [2019-12-28 03:20:20,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-12-28 03:20:20,617 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:20,617 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:20,617 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:20,618 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:20,618 INFO L82 PathProgramCache]: Analyzing trace with hash -425667078, now seen corresponding path program 1 times [2019-12-28 03:20:20,619 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:20,619 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [918597493] [2019-12-28 03:20:20,619 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:20,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:20,718 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:20,719 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [918597493] [2019-12-28 03:20:20,719 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:20,719 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 03:20:20,719 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [754795957] [2019-12-28 03:20:20,719 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:20,738 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:20,788 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 110 states and 125 transitions. [2019-12-28 03:20:20,789 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:20,789 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:20,789 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 03:20:20,790 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:20,790 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 03:20:20,790 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:20:20,790 INFO L87 Difference]: Start difference. First operand 2739 states and 6617 transitions. Second operand 4 states. [2019-12-28 03:20:20,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:20,828 INFO L93 Difference]: Finished difference Result 2823 states and 6774 transitions. [2019-12-28 03:20:20,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 03:20:20,828 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2019-12-28 03:20:20,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:20,832 INFO L225 Difference]: With dead ends: 2823 [2019-12-28 03:20:20,832 INFO L226 Difference]: Without dead ends: 2823 [2019-12-28 03:20:20,832 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:20,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2823 states. [2019-12-28 03:20:20,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2823 to 2690. [2019-12-28 03:20:20,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2690 states. [2019-12-28 03:20:20,875 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2690 states to 2690 states and 6462 transitions. [2019-12-28 03:20:20,875 INFO L78 Accepts]: Start accepts. Automaton has 2690 states and 6462 transitions. Word has length 93 [2019-12-28 03:20:20,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:20,876 INFO L462 AbstractCegarLoop]: Abstraction has 2690 states and 6462 transitions. [2019-12-28 03:20:20,876 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 03:20:20,876 INFO L276 IsEmpty]: Start isEmpty. Operand 2690 states and 6462 transitions. [2019-12-28 03:20:20,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-12-28 03:20:20,881 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:20,882 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:20,882 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:20,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:20,883 INFO L82 PathProgramCache]: Analyzing trace with hash 1031095093, now seen corresponding path program 1 times [2019-12-28 03:20:20,884 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:20,884 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741002082] [2019-12-28 03:20:20,884 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:20,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:20,972 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:20,973 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [741002082] [2019-12-28 03:20:20,973 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:20,973 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:20:20,974 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [585992129] [2019-12-28 03:20:20,974 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:21,010 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:21,078 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 110 states and 124 transitions. [2019-12-28 03:20:21,079 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:21,079 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:21,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:20:21,080 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:21,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:20:21,081 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:21,081 INFO L87 Difference]: Start difference. First operand 2690 states and 6462 transitions. Second operand 5 states. [2019-12-28 03:20:21,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:21,369 INFO L93 Difference]: Finished difference Result 3160 states and 7476 transitions. [2019-12-28 03:20:21,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 03:20:21,370 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 93 [2019-12-28 03:20:21,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:21,374 INFO L225 Difference]: With dead ends: 3160 [2019-12-28 03:20:21,374 INFO L226 Difference]: Without dead ends: 3130 [2019-12-28 03:20:21,375 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:20:21,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3130 states. [2019-12-28 03:20:21,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3130 to 2737. [2019-12-28 03:20:21,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2737 states. [2019-12-28 03:20:21,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2737 states to 2737 states and 6556 transitions. [2019-12-28 03:20:21,435 INFO L78 Accepts]: Start accepts. Automaton has 2737 states and 6556 transitions. Word has length 93 [2019-12-28 03:20:21,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:21,435 INFO L462 AbstractCegarLoop]: Abstraction has 2737 states and 6556 transitions. [2019-12-28 03:20:21,435 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:20:21,436 INFO L276 IsEmpty]: Start isEmpty. Operand 2737 states and 6556 transitions. [2019-12-28 03:20:21,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-12-28 03:20:21,441 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:21,441 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:21,441 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:21,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:21,442 INFO L82 PathProgramCache]: Analyzing trace with hash 686460611, now seen corresponding path program 2 times [2019-12-28 03:20:21,443 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:21,443 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1049769899] [2019-12-28 03:20:21,444 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:21,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:21,604 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:21,604 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1049769899] [2019-12-28 03:20:21,604 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:21,605 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:20:21,605 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [237219151] [2019-12-28 03:20:21,605 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:21,642 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:21,716 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 122 states and 146 transitions. [2019-12-28 03:20:21,717 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:21,829 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 03:20:21,830 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-28 03:20:21,830 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:21,830 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-28 03:20:21,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2019-12-28 03:20:21,831 INFO L87 Difference]: Start difference. First operand 2737 states and 6556 transitions. Second operand 10 states. [2019-12-28 03:20:23,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:23,511 INFO L93 Difference]: Finished difference Result 8915 states and 21237 transitions. [2019-12-28 03:20:23,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-28 03:20:23,511 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 93 [2019-12-28 03:20:23,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:23,524 INFO L225 Difference]: With dead ends: 8915 [2019-12-28 03:20:23,524 INFO L226 Difference]: Without dead ends: 8861 [2019-12-28 03:20:23,525 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 7 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=170, Invalid=480, Unknown=0, NotChecked=0, Total=650 [2019-12-28 03:20:23,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8861 states. [2019-12-28 03:20:23,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8861 to 3122. [2019-12-28 03:20:23,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3122 states. [2019-12-28 03:20:23,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3122 states to 3122 states and 7419 transitions. [2019-12-28 03:20:23,587 INFO L78 Accepts]: Start accepts. Automaton has 3122 states and 7419 transitions. Word has length 93 [2019-12-28 03:20:23,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:23,588 INFO L462 AbstractCegarLoop]: Abstraction has 3122 states and 7419 transitions. [2019-12-28 03:20:23,588 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-28 03:20:23,588 INFO L276 IsEmpty]: Start isEmpty. Operand 3122 states and 7419 transitions. [2019-12-28 03:20:23,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-12-28 03:20:23,590 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:23,591 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:23,591 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:23,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:23,591 INFO L82 PathProgramCache]: Analyzing trace with hash -1402128187, now seen corresponding path program 1 times [2019-12-28 03:20:23,591 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:23,592 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [951405435] [2019-12-28 03:20:23,592 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:23,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:23,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:23,691 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [951405435] [2019-12-28 03:20:23,691 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:23,692 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:23,692 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [208882211] [2019-12-28 03:20:23,692 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:23,710 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:23,769 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 122 states and 146 transitions. [2019-12-28 03:20:23,769 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:23,770 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:23,770 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:23,770 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:23,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:23,770 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:23,771 INFO L87 Difference]: Start difference. First operand 3122 states and 7419 transitions. Second operand 6 states. [2019-12-28 03:20:23,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:23,835 INFO L93 Difference]: Finished difference Result 5053 states and 12212 transitions. [2019-12-28 03:20:23,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 03:20:23,836 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2019-12-28 03:20:23,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:23,843 INFO L225 Difference]: With dead ends: 5053 [2019-12-28 03:20:23,843 INFO L226 Difference]: Without dead ends: 5053 [2019-12-28 03:20:23,844 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:23,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5053 states. [2019-12-28 03:20:23,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5053 to 3216. [2019-12-28 03:20:23,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3216 states. [2019-12-28 03:20:23,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3216 states to 3216 states and 7584 transitions. [2019-12-28 03:20:23,904 INFO L78 Accepts]: Start accepts. Automaton has 3216 states and 7584 transitions. Word has length 93 [2019-12-28 03:20:23,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:23,904 INFO L462 AbstractCegarLoop]: Abstraction has 3216 states and 7584 transitions. [2019-12-28 03:20:23,904 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:23,904 INFO L276 IsEmpty]: Start isEmpty. Operand 3216 states and 7584 transitions. [2019-12-28 03:20:23,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-12-28 03:20:23,908 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:23,908 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:23,909 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:23,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:23,909 INFO L82 PathProgramCache]: Analyzing trace with hash -2000281722, now seen corresponding path program 1 times [2019-12-28 03:20:23,910 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:23,910 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [204916382] [2019-12-28 03:20:23,910 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:23,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:23,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:23,997 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [204916382] [2019-12-28 03:20:23,997 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:23,997 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:20:23,998 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1809075489] [2019-12-28 03:20:23,998 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:24,016 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:24,076 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 122 states and 146 transitions. [2019-12-28 03:20:24,076 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:24,094 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 5 times. [2019-12-28 03:20:24,094 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 03:20:24,094 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:24,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 03:20:24,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:20:24,095 INFO L87 Difference]: Start difference. First operand 3216 states and 7584 transitions. Second operand 8 states. [2019-12-28 03:20:25,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:25,071 INFO L93 Difference]: Finished difference Result 9888 states and 23630 transitions. [2019-12-28 03:20:25,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-28 03:20:25,072 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 93 [2019-12-28 03:20:25,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:25,083 INFO L225 Difference]: With dead ends: 9888 [2019-12-28 03:20:25,083 INFO L226 Difference]: Without dead ends: 9888 [2019-12-28 03:20:25,084 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 8 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=138, Invalid=282, Unknown=0, NotChecked=0, Total=420 [2019-12-28 03:20:25,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9888 states. [2019-12-28 03:20:25,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9888 to 3455. [2019-12-28 03:20:25,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3455 states. [2019-12-28 03:20:25,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3455 states to 3455 states and 8117 transitions. [2019-12-28 03:20:25,141 INFO L78 Accepts]: Start accepts. Automaton has 3455 states and 8117 transitions. Word has length 93 [2019-12-28 03:20:25,141 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:25,141 INFO L462 AbstractCegarLoop]: Abstraction has 3455 states and 8117 transitions. [2019-12-28 03:20:25,141 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 03:20:25,141 INFO L276 IsEmpty]: Start isEmpty. Operand 3455 states and 8117 transitions. [2019-12-28 03:20:25,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-12-28 03:20:25,144 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:25,144 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:25,144 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:25,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:25,144 INFO L82 PathProgramCache]: Analyzing trace with hash -1519565306, now seen corresponding path program 1 times [2019-12-28 03:20:25,145 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:25,145 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [859693104] [2019-12-28 03:20:25,145 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:25,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:25,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:25,252 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [859693104] [2019-12-28 03:20:25,253 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:25,253 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:25,253 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1619692146] [2019-12-28 03:20:25,253 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:25,265 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:25,304 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 122 states and 146 transitions. [2019-12-28 03:20:25,304 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:25,304 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:25,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:25,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:25,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:25,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:25,305 INFO L87 Difference]: Start difference. First operand 3455 states and 8117 transitions. Second operand 6 states. [2019-12-28 03:20:25,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:25,438 INFO L93 Difference]: Finished difference Result 3311 states and 7619 transitions. [2019-12-28 03:20:25,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 03:20:25,438 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 93 [2019-12-28 03:20:25,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:25,443 INFO L225 Difference]: With dead ends: 3311 [2019-12-28 03:20:25,443 INFO L226 Difference]: Without dead ends: 3311 [2019-12-28 03:20:25,444 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:20:25,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3311 states. [2019-12-28 03:20:25,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3311 to 2263. [2019-12-28 03:20:25,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2263 states. [2019-12-28 03:20:25,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2263 states to 2263 states and 5324 transitions. [2019-12-28 03:20:25,467 INFO L78 Accepts]: Start accepts. Automaton has 2263 states and 5324 transitions. Word has length 93 [2019-12-28 03:20:25,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:25,467 INFO L462 AbstractCegarLoop]: Abstraction has 2263 states and 5324 transitions. [2019-12-28 03:20:25,467 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:25,467 INFO L276 IsEmpty]: Start isEmpty. Operand 2263 states and 5324 transitions. [2019-12-28 03:20:25,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:25,469 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:25,469 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:25,469 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:25,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:25,470 INFO L82 PathProgramCache]: Analyzing trace with hash -1853144419, now seen corresponding path program 1 times [2019-12-28 03:20:25,470 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:25,470 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [586461038] [2019-12-28 03:20:25,470 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:25,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:25,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:25,608 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [586461038] [2019-12-28 03:20:25,608 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:25,608 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:25,608 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1350813288] [2019-12-28 03:20:25,608 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:25,624 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:25,666 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 112 states and 126 transitions. [2019-12-28 03:20:25,666 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:25,667 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:25,667 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:25,667 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:25,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:25,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:25,668 INFO L87 Difference]: Start difference. First operand 2263 states and 5324 transitions. Second operand 6 states. [2019-12-28 03:20:25,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:25,791 INFO L93 Difference]: Finished difference Result 2481 states and 5697 transitions. [2019-12-28 03:20:25,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 03:20:25,791 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-12-28 03:20:25,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:25,793 INFO L225 Difference]: With dead ends: 2481 [2019-12-28 03:20:25,793 INFO L226 Difference]: Without dead ends: 2481 [2019-12-28 03:20:25,794 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-12-28 03:20:25,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2481 states. [2019-12-28 03:20:25,811 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2481 to 2234. [2019-12-28 03:20:25,811 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2234 states. [2019-12-28 03:20:25,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2234 states to 2234 states and 5208 transitions. [2019-12-28 03:20:25,814 INFO L78 Accepts]: Start accepts. Automaton has 2234 states and 5208 transitions. Word has length 95 [2019-12-28 03:20:25,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:25,814 INFO L462 AbstractCegarLoop]: Abstraction has 2234 states and 5208 transitions. [2019-12-28 03:20:25,814 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:25,814 INFO L276 IsEmpty]: Start isEmpty. Operand 2234 states and 5208 transitions. [2019-12-28 03:20:25,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:25,816 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:25,817 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:25,817 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:25,817 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:25,817 INFO L82 PathProgramCache]: Analyzing trace with hash -1153073890, now seen corresponding path program 1 times [2019-12-28 03:20:25,817 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:25,818 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250198324] [2019-12-28 03:20:25,818 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:25,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:25,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:25,932 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1250198324] [2019-12-28 03:20:25,933 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:25,933 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:25,933 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1183832853] [2019-12-28 03:20:25,933 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:25,950 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:25,996 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 112 states and 126 transitions. [2019-12-28 03:20:25,997 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:25,997 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:25,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:25,997 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:25,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:25,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:25,998 INFO L87 Difference]: Start difference. First operand 2234 states and 5208 transitions. Second operand 6 states. [2019-12-28 03:20:26,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:26,174 INFO L93 Difference]: Finished difference Result 2442 states and 5638 transitions. [2019-12-28 03:20:26,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 03:20:26,174 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-12-28 03:20:26,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:26,179 INFO L225 Difference]: With dead ends: 2442 [2019-12-28 03:20:26,179 INFO L226 Difference]: Without dead ends: 2442 [2019-12-28 03:20:26,179 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:26,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2442 states. [2019-12-28 03:20:26,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2442 to 2214. [2019-12-28 03:20:26,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2214 states. [2019-12-28 03:20:26,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2214 states to 2214 states and 5168 transitions. [2019-12-28 03:20:26,202 INFO L78 Accepts]: Start accepts. Automaton has 2214 states and 5168 transitions. Word has length 95 [2019-12-28 03:20:26,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:26,202 INFO L462 AbstractCegarLoop]: Abstraction has 2214 states and 5168 transitions. [2019-12-28 03:20:26,202 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:26,202 INFO L276 IsEmpty]: Start isEmpty. Operand 2214 states and 5168 transitions. [2019-12-28 03:20:26,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:26,204 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:26,204 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:26,205 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:26,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:26,205 INFO L82 PathProgramCache]: Analyzing trace with hash 828243038, now seen corresponding path program 1 times [2019-12-28 03:20:26,205 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:26,205 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1175434551] [2019-12-28 03:20:26,206 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:26,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:26,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:26,358 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1175434551] [2019-12-28 03:20:26,358 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:26,358 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-28 03:20:26,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [830378325] [2019-12-28 03:20:26,359 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:26,374 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:26,433 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 134 states and 170 transitions. [2019-12-28 03:20:26,433 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:26,488 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 5 times. [2019-12-28 03:20:26,488 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-28 03:20:26,489 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:26,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-28 03:20:26,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2019-12-28 03:20:26,489 INFO L87 Difference]: Start difference. First operand 2214 states and 5168 transitions. Second operand 11 states. [2019-12-28 03:20:27,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:27,475 INFO L93 Difference]: Finished difference Result 3200 states and 7322 transitions. [2019-12-28 03:20:27,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-28 03:20:27,476 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 95 [2019-12-28 03:20:27,476 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:27,480 INFO L225 Difference]: With dead ends: 3200 [2019-12-28 03:20:27,480 INFO L226 Difference]: Without dead ends: 3182 [2019-12-28 03:20:27,483 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 8 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 54 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=77, Invalid=303, Unknown=0, NotChecked=0, Total=380 [2019-12-28 03:20:27,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3182 states. [2019-12-28 03:20:27,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3182 to 2658. [2019-12-28 03:20:27,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2658 states. [2019-12-28 03:20:27,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2658 states to 2658 states and 6153 transitions. [2019-12-28 03:20:27,511 INFO L78 Accepts]: Start accepts. Automaton has 2658 states and 6153 transitions. Word has length 95 [2019-12-28 03:20:27,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:27,511 INFO L462 AbstractCegarLoop]: Abstraction has 2658 states and 6153 transitions. [2019-12-28 03:20:27,512 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-28 03:20:27,512 INFO L276 IsEmpty]: Start isEmpty. Operand 2658 states and 6153 transitions. [2019-12-28 03:20:27,515 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:27,515 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:27,515 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:27,515 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:27,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:27,515 INFO L82 PathProgramCache]: Analyzing trace with hash 2073007519, now seen corresponding path program 1 times [2019-12-28 03:20:27,516 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:27,516 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393620974] [2019-12-28 03:20:27,517 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:27,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:27,663 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:27,664 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393620974] [2019-12-28 03:20:27,664 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:27,664 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:20:27,664 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [894895277] [2019-12-28 03:20:27,664 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:27,680 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:27,731 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 134 states and 170 transitions. [2019-12-28 03:20:27,731 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:27,783 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 5 times. [2019-12-28 03:20:27,783 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 03:20:27,783 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:27,784 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 03:20:27,784 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2019-12-28 03:20:27,784 INFO L87 Difference]: Start difference. First operand 2658 states and 6153 transitions. Second operand 9 states. [2019-12-28 03:20:28,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:28,713 INFO L93 Difference]: Finished difference Result 2922 states and 6681 transitions. [2019-12-28 03:20:28,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-28 03:20:28,721 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 95 [2019-12-28 03:20:28,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:28,724 INFO L225 Difference]: With dead ends: 2922 [2019-12-28 03:20:28,724 INFO L226 Difference]: Without dead ends: 2922 [2019-12-28 03:20:28,725 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=139, Invalid=367, Unknown=0, NotChecked=0, Total=506 [2019-12-28 03:20:28,728 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2922 states. [2019-12-28 03:20:28,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2922 to 2520. [2019-12-28 03:20:28,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2520 states. [2019-12-28 03:20:28,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2520 states to 2520 states and 5875 transitions. [2019-12-28 03:20:28,749 INFO L78 Accepts]: Start accepts. Automaton has 2520 states and 5875 transitions. Word has length 95 [2019-12-28 03:20:28,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:28,749 INFO L462 AbstractCegarLoop]: Abstraction has 2520 states and 5875 transitions. [2019-12-28 03:20:28,749 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 03:20:28,749 INFO L276 IsEmpty]: Start isEmpty. Operand 2520 states and 5875 transitions. [2019-12-28 03:20:28,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:28,751 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:28,751 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:28,752 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:28,752 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:28,752 INFO L82 PathProgramCache]: Analyzing trace with hash 1158008799, now seen corresponding path program 1 times [2019-12-28 03:20:28,752 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:28,752 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [675249684] [2019-12-28 03:20:28,753 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:28,765 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:28,816 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:28,816 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [675249684] [2019-12-28 03:20:28,816 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:28,816 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:20:28,817 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1360212156] [2019-12-28 03:20:28,817 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:28,832 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:28,902 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 134 states and 170 transitions. [2019-12-28 03:20:28,903 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:28,903 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:28,904 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:20:28,904 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:28,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:20:28,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:28,904 INFO L87 Difference]: Start difference. First operand 2520 states and 5875 transitions. Second operand 5 states. [2019-12-28 03:20:29,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:29,074 INFO L93 Difference]: Finished difference Result 2772 states and 6454 transitions. [2019-12-28 03:20:29,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 03:20:29,074 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-12-28 03:20:29,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:29,078 INFO L225 Difference]: With dead ends: 2772 [2019-12-28 03:20:29,078 INFO L226 Difference]: Without dead ends: 2754 [2019-12-28 03:20:29,078 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:29,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2754 states. [2019-12-28 03:20:29,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2754 to 2219. [2019-12-28 03:20:29,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2219 states. [2019-12-28 03:20:29,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2219 states to 2219 states and 5181 transitions. [2019-12-28 03:20:29,112 INFO L78 Accepts]: Start accepts. Automaton has 2219 states and 5181 transitions. Word has length 95 [2019-12-28 03:20:29,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:29,112 INFO L462 AbstractCegarLoop]: Abstraction has 2219 states and 5181 transitions. [2019-12-28 03:20:29,112 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:20:29,112 INFO L276 IsEmpty]: Start isEmpty. Operand 2219 states and 5181 transitions. [2019-12-28 03:20:29,115 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:29,115 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:29,115 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:29,115 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:29,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:29,116 INFO L82 PathProgramCache]: Analyzing trace with hash -1892194016, now seen corresponding path program 1 times [2019-12-28 03:20:29,116 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:29,117 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913744059] [2019-12-28 03:20:29,117 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:29,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:29,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:29,291 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1913744059] [2019-12-28 03:20:29,291 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:29,291 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-28 03:20:29,292 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [354633715] [2019-12-28 03:20:29,292 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:29,307 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:29,364 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 134 states and 170 transitions. [2019-12-28 03:20:29,364 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:29,665 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 16 times. [2019-12-28 03:20:29,666 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-28 03:20:29,666 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:29,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-28 03:20:29,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2019-12-28 03:20:29,667 INFO L87 Difference]: Start difference. First operand 2219 states and 5181 transitions. Second operand 21 states. [2019-12-28 03:20:32,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:32,092 INFO L93 Difference]: Finished difference Result 3787 states and 8834 transitions. [2019-12-28 03:20:32,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-28 03:20:32,093 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 95 [2019-12-28 03:20:32,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:32,098 INFO L225 Difference]: With dead ends: 3787 [2019-12-28 03:20:32,098 INFO L226 Difference]: Without dead ends: 3148 [2019-12-28 03:20:32,099 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=301, Invalid=1505, Unknown=0, NotChecked=0, Total=1806 [2019-12-28 03:20:32,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3148 states. [2019-12-28 03:20:32,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3148 to 2733. [2019-12-28 03:20:32,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2733 states. [2019-12-28 03:20:32,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2733 states to 2733 states and 6294 transitions. [2019-12-28 03:20:32,124 INFO L78 Accepts]: Start accepts. Automaton has 2733 states and 6294 transitions. Word has length 95 [2019-12-28 03:20:32,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:32,124 INFO L462 AbstractCegarLoop]: Abstraction has 2733 states and 6294 transitions. [2019-12-28 03:20:32,124 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-28 03:20:32,124 INFO L276 IsEmpty]: Start isEmpty. Operand 2733 states and 6294 transitions. [2019-12-28 03:20:32,126 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:32,127 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:32,127 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:32,127 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:32,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:32,127 INFO L82 PathProgramCache]: Analyzing trace with hash 473037787, now seen corresponding path program 1 times [2019-12-28 03:20:32,128 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:32,128 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1563449270] [2019-12-28 03:20:32,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:32,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:32,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:32,237 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1563449270] [2019-12-28 03:20:32,237 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:32,238 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:32,238 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [328908061] [2019-12-28 03:20:32,238 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:32,249 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:32,291 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 126 states and 153 transitions. [2019-12-28 03:20:32,291 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:32,292 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 03:20:32,292 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:32,292 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:32,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:32,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:32,292 INFO L87 Difference]: Start difference. First operand 2733 states and 6294 transitions. Second operand 6 states. [2019-12-28 03:20:32,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:32,438 INFO L93 Difference]: Finished difference Result 2902 states and 6599 transitions. [2019-12-28 03:20:32,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 03:20:32,438 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-12-28 03:20:32,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:32,442 INFO L225 Difference]: With dead ends: 2902 [2019-12-28 03:20:32,442 INFO L226 Difference]: Without dead ends: 2852 [2019-12-28 03:20:32,442 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:32,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2852 states. [2019-12-28 03:20:32,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2852 to 2725. [2019-12-28 03:20:32,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2725 states. [2019-12-28 03:20:32,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2725 states to 2725 states and 6247 transitions. [2019-12-28 03:20:32,465 INFO L78 Accepts]: Start accepts. Automaton has 2725 states and 6247 transitions. Word has length 95 [2019-12-28 03:20:32,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:32,465 INFO L462 AbstractCegarLoop]: Abstraction has 2725 states and 6247 transitions. [2019-12-28 03:20:32,465 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:32,466 INFO L276 IsEmpty]: Start isEmpty. Operand 2725 states and 6247 transitions. [2019-12-28 03:20:32,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:32,467 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:32,468 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:32,468 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:32,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:32,468 INFO L82 PathProgramCache]: Analyzing trace with hash 24341148, now seen corresponding path program 2 times [2019-12-28 03:20:32,469 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:32,469 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1417018737] [2019-12-28 03:20:32,469 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:32,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 03:20:32,500 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 03:20:32,546 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-28 03:20:32,546 INFO L476 BasicCegarLoop]: Counterexample might be feasible [2019-12-28 03:20:32,711 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.12 03:20:32 BasicIcfg [2019-12-28 03:20:32,711 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-28 03:20:32,714 INFO L168 Benchmark]: Toolchain (without parser) took 74295.63 ms. Allocated memory was 143.1 MB in the beginning and 2.6 GB in the end (delta: 2.5 GB). Free memory was 102.9 MB in the beginning and 2.0 GB in the end (delta: -1.9 GB). Peak memory consumption was 583.8 MB. Max. memory is 7.1 GB. [2019-12-28 03:20:32,714 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 143.1 MB. Free memory was 122.8 MB in the beginning and 122.6 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. [2019-12-28 03:20:32,714 INFO L168 Benchmark]: CACSL2BoogieTranslator took 804.84 ms. Allocated memory was 143.1 MB in the beginning and 203.9 MB in the end (delta: 60.8 MB). Free memory was 102.4 MB in the beginning and 158.3 MB in the end (delta: -55.9 MB). Peak memory consumption was 22.5 MB. Max. memory is 7.1 GB. [2019-12-28 03:20:32,715 INFO L168 Benchmark]: Boogie Procedure Inliner took 88.92 ms. Allocated memory is still 203.9 MB. Free memory was 158.3 MB in the beginning and 155.7 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 7.1 GB. [2019-12-28 03:20:32,715 INFO L168 Benchmark]: Boogie Preprocessor took 36.11 ms. Allocated memory is still 203.9 MB. Free memory was 155.7 MB in the beginning and 153.1 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 7.1 GB. [2019-12-28 03:20:32,715 INFO L168 Benchmark]: RCFGBuilder took 833.08 ms. Allocated memory is still 203.9 MB. Free memory was 153.1 MB in the beginning and 109.1 MB in the end (delta: 44.0 MB). Peak memory consumption was 44.0 MB. Max. memory is 7.1 GB. [2019-12-28 03:20:32,716 INFO L168 Benchmark]: TraceAbstraction took 72524.91 ms. Allocated memory was 203.9 MB in the beginning and 2.6 GB in the end (delta: 2.4 GB). Free memory was 108.5 MB in the beginning and 2.0 GB in the end (delta: -1.9 GB). Peak memory consumption was 528.6 MB. Max. memory is 7.1 GB. [2019-12-28 03:20:32,718 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 143.1 MB. Free memory was 122.8 MB in the beginning and 122.6 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 804.84 ms. Allocated memory was 143.1 MB in the beginning and 203.9 MB in the end (delta: 60.8 MB). Free memory was 102.4 MB in the beginning and 158.3 MB in the end (delta: -55.9 MB). Peak memory consumption was 22.5 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 88.92 ms. Allocated memory is still 203.9 MB. Free memory was 158.3 MB in the beginning and 155.7 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 36.11 ms. Allocated memory is still 203.9 MB. Free memory was 155.7 MB in the beginning and 153.1 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 7.1 GB. * RCFGBuilder took 833.08 ms. Allocated memory is still 203.9 MB. Free memory was 153.1 MB in the beginning and 109.1 MB in the end (delta: 44.0 MB). Peak memory consumption was 44.0 MB. Max. memory is 7.1 GB. * TraceAbstraction took 72524.91 ms. Allocated memory was 203.9 MB in the beginning and 2.6 GB in the end (delta: 2.4 GB). Free memory was 108.5 MB in the beginning and 2.0 GB in the end (delta: -1.9 GB). Peak memory consumption was 528.6 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L697] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L698] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L700] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L701] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L702] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L703] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L704] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L705] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L706] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L707] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L708] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L709] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L710] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L711] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L712] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L713] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L714] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L716] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L717] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L718] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L778] 0 pthread_t t1447; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L779] FCALL, FORK 0 pthread_create(&t1447, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L780] 0 pthread_t t1448; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] FCALL, FORK 0 pthread_create(&t1448, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L742] 2 x$w_buff1 = x$w_buff0 [L743] 2 x$w_buff0 = 2 [L744] 2 x$w_buff1_used = x$w_buff0_used [L745] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 2 x$r_buff0_thd2 = (_Bool)1 [L753] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L722] 1 y = 1 [L725] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=1] [L728] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L729] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L729] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L730] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L756] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L731] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L731] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L757] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L757] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L758] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L758] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L759] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L759] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L760] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L760] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L763] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L732] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L735] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L788] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L788] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L789] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L790] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L790] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L791] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L791] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 x$flush_delayed = weak$$choice2 [L797] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L799] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L800] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L800] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L801] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L802] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L803] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L804] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L804] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L806] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L806] 0 x = x$flush_delayed ? x$mem_tmp : x [L807] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 72.2s, OverallIterations: 39, TraceHistogramMax: 1, AutomataDifference: 30.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10717 SDtfs, 12487 SDslu, 27926 SDs, 0 SdLazy, 14465 SolverSat, 864 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 13.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 541 GetRequests, 158 SyntacticMatches, 25 SemanticMatches, 358 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 950 ImplicationChecksByTransitivity, 5.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=84342occurred in iteration=11, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 31.4s AutomataMinimizationTime, 38 MinimizatonAttempts, 188880 StatesRemovedByMinimization, 37 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.9s InterpolantComputationTime, 3072 NumberOfCodeBlocks, 3072 NumberOfCodeBlocksAsserted, 39 NumberOfCheckSat, 2939 ConstructedInterpolants, 0 QuantifiedInterpolants, 566711 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 38 InterpolantComputations, 38 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...