/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf -i ../../../trunk/examples/svcomp/pthread-wmm/mix054_tso.oepc.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-4336eb1 [2019-12-28 03:19:45,483 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-28 03:19:45,486 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-28 03:19:45,498 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-28 03:19:45,498 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-28 03:19:45,499 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-28 03:19:45,500 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-28 03:19:45,502 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-28 03:19:45,504 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-28 03:19:45,505 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-28 03:19:45,506 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-28 03:19:45,507 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-28 03:19:45,507 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-28 03:19:45,510 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-28 03:19:45,513 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-28 03:19:45,515 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-28 03:19:45,516 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-28 03:19:45,520 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-28 03:19:45,522 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-28 03:19:45,528 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-28 03:19:45,531 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-28 03:19:45,533 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-28 03:19:45,534 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-28 03:19:45,535 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-28 03:19:45,539 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-28 03:19:45,539 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-28 03:19:45,539 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-28 03:19:45,541 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-28 03:19:45,542 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-28 03:19:45,544 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-28 03:19:45,544 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-28 03:19:45,545 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-28 03:19:45,546 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-28 03:19:45,548 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-28 03:19:45,551 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-28 03:19:45,551 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-28 03:19:45,552 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-28 03:19:45,553 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-28 03:19:45,553 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-28 03:19:45,554 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-28 03:19:45,556 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-28 03:19:45,556 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf [2019-12-28 03:19:45,574 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-28 03:19:45,575 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-28 03:19:45,576 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-28 03:19:45,576 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-28 03:19:45,576 INFO L138 SettingsManager]: * Use SBE=true [2019-12-28 03:19:45,577 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-28 03:19:45,577 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-28 03:19:45,577 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-28 03:19:45,577 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-28 03:19:45,577 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-28 03:19:45,578 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-28 03:19:45,578 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-28 03:19:45,578 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-28 03:19:45,578 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-28 03:19:45,578 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-28 03:19:45,579 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-28 03:19:45,579 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-28 03:19:45,579 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-28 03:19:45,579 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-28 03:19:45,579 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-28 03:19:45,580 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-28 03:19:45,580 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 03:19:45,580 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-28 03:19:45,580 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-28 03:19:45,580 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-28 03:19:45,581 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-28 03:19:45,581 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-28 03:19:45,581 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2019-12-28 03:19:45,581 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2019-12-28 03:19:45,581 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-28 03:19:45,582 INFO L138 SettingsManager]: * Interpolant automaton=MCR [2019-12-28 03:19:45,582 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-28 03:19:45,874 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-28 03:19:45,889 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-28 03:19:45,894 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-28 03:19:45,896 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-28 03:19:45,897 INFO L275 PluginConnector]: CDTParser initialized [2019-12-28 03:19:45,897 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/mix054_tso.oepc.i [2019-12-28 03:19:45,977 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1f55a7426/85ebd14f92254ddbae5eeeaff0d7aa20/FLAG3d2a01400 [2019-12-28 03:19:46,551 INFO L306 CDTParser]: Found 1 translation units. [2019-12-28 03:19:46,551 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/mix054_tso.oepc.i [2019-12-28 03:19:46,565 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1f55a7426/85ebd14f92254ddbae5eeeaff0d7aa20/FLAG3d2a01400 [2019-12-28 03:19:46,814 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/1f55a7426/85ebd14f92254ddbae5eeeaff0d7aa20 [2019-12-28 03:19:46,824 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-28 03:19:46,826 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-12-28 03:19:46,827 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-28 03:19:46,827 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-28 03:19:46,830 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-28 03:19:46,831 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 03:19:46" (1/1) ... [2019-12-28 03:19:46,834 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@23a66491 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:46, skipping insertion in model container [2019-12-28 03:19:46,834 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 03:19:46" (1/1) ... [2019-12-28 03:19:46,842 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-28 03:19:46,902 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-28 03:19:47,410 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 03:19:47,433 INFO L203 MainTranslator]: Completed pre-run [2019-12-28 03:19:47,510 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 03:19:47,586 INFO L208 MainTranslator]: Completed translation [2019-12-28 03:19:47,586 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:47 WrapperNode [2019-12-28 03:19:47,586 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-28 03:19:47,587 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-28 03:19:47,587 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-28 03:19:47,587 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-28 03:19:47,596 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:47" (1/1) ... [2019-12-28 03:19:47,619 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:47" (1/1) ... [2019-12-28 03:19:47,674 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-28 03:19:47,674 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-28 03:19:47,675 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-28 03:19:47,675 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-28 03:19:47,683 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:47" (1/1) ... [2019-12-28 03:19:47,683 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:47" (1/1) ... [2019-12-28 03:19:47,688 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:47" (1/1) ... [2019-12-28 03:19:47,688 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:47" (1/1) ... [2019-12-28 03:19:47,698 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:47" (1/1) ... [2019-12-28 03:19:47,702 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:47" (1/1) ... [2019-12-28 03:19:47,705 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:47" (1/1) ... [2019-12-28 03:19:47,710 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-28 03:19:47,711 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-28 03:19:47,711 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-28 03:19:47,711 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-28 03:19:47,712 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:47" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 03:19:47,772 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-28 03:19:47,773 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-28 03:19:47,773 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-28 03:19:47,773 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-28 03:19:47,773 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-28 03:19:47,773 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-28 03:19:47,774 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-28 03:19:47,774 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-28 03:19:47,774 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-28 03:19:47,774 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-28 03:19:47,774 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-28 03:19:47,776 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-28 03:19:48,512 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-28 03:19:48,513 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-28 03:19:48,514 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 03:19:48 BoogieIcfgContainer [2019-12-28 03:19:48,514 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-28 03:19:48,516 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-28 03:19:48,516 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-28 03:19:48,519 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-28 03:19:48,519 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.12 03:19:46" (1/3) ... [2019-12-28 03:19:48,520 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@adb0513 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 03:19:48, skipping insertion in model container [2019-12-28 03:19:48,520 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 03:19:47" (2/3) ... [2019-12-28 03:19:48,521 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@adb0513 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 03:19:48, skipping insertion in model container [2019-12-28 03:19:48,521 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 03:19:48" (3/3) ... [2019-12-28 03:19:48,523 INFO L109 eAbstractionObserver]: Analyzing ICFG mix054_tso.oepc.i [2019-12-28 03:19:48,533 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-28 03:19:48,534 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-28 03:19:48,541 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-28 03:19:48,542 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-28 03:19:48,575 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,576 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,576 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,576 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,577 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,577 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,577 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,578 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,578 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,578 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,578 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,579 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,579 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,579 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,579 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,579 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,580 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,580 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,580 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,580 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,580 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,581 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,581 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,581 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,581 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,583 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,584 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,584 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,584 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,584 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,585 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,585 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,585 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,585 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,586 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,587 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,588 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,588 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,588 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,588 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,589 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,589 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,589 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,590 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,591 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,592 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,598 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,599 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,601 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,602 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,602 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 03:19:48,618 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-28 03:19:48,634 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-28 03:19:48,634 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-28 03:19:48,634 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-28 03:19:48,634 INFO L376 AbstractCegarLoop]: Backedges is MCR [2019-12-28 03:19:48,634 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-28 03:19:48,635 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-28 03:19:48,635 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-28 03:19:48,635 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-28 03:19:48,650 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 146 places, 180 transitions [2019-12-28 03:19:50,041 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22494 states. [2019-12-28 03:19:50,043 INFO L276 IsEmpty]: Start isEmpty. Operand 22494 states. [2019-12-28 03:19:50,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-28 03:19:50,052 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:50,053 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:50,054 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:50,059 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:50,059 INFO L82 PathProgramCache]: Analyzing trace with hash 718983594, now seen corresponding path program 1 times [2019-12-28 03:19:50,069 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:50,070 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [374855031] [2019-12-28 03:19:50,070 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:50,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:50,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:50,479 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [374855031] [2019-12-28 03:19:50,480 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:50,480 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 03:19:50,482 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1857703894] [2019-12-28 03:19:50,484 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:50,491 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:50,519 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 38 states and 37 transitions. [2019-12-28 03:19:50,520 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:50,527 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:19:50,527 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 03:19:50,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:50,542 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 03:19:50,543 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:19:50,545 INFO L87 Difference]: Start difference. First operand 22494 states. Second operand 4 states. [2019-12-28 03:19:51,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:51,142 INFO L93 Difference]: Finished difference Result 23446 states and 91747 transitions. [2019-12-28 03:19:51,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 03:19:51,144 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 37 [2019-12-28 03:19:51,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:51,409 INFO L225 Difference]: With dead ends: 23446 [2019-12-28 03:19:51,409 INFO L226 Difference]: Without dead ends: 21270 [2019-12-28 03:19:51,413 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:19:52,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21270 states. [2019-12-28 03:19:53,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21270 to 21270. [2019-12-28 03:19:53,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21270 states. [2019-12-28 03:19:53,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21270 states to 21270 states and 83771 transitions. [2019-12-28 03:19:53,499 INFO L78 Accepts]: Start accepts. Automaton has 21270 states and 83771 transitions. Word has length 37 [2019-12-28 03:19:53,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:19:53,499 INFO L462 AbstractCegarLoop]: Abstraction has 21270 states and 83771 transitions. [2019-12-28 03:19:53,500 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 03:19:53,500 INFO L276 IsEmpty]: Start isEmpty. Operand 21270 states and 83771 transitions. [2019-12-28 03:19:53,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-28 03:19:53,519 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:53,519 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:53,520 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:53,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:53,521 INFO L82 PathProgramCache]: Analyzing trace with hash -580973517, now seen corresponding path program 1 times [2019-12-28 03:19:53,521 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:53,522 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221087174] [2019-12-28 03:19:53,522 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:53,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:53,721 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:53,722 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [221087174] [2019-12-28 03:19:53,722 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:53,723 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:19:53,723 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [403266852] [2019-12-28 03:19:53,723 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:53,733 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:53,753 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 73 states and 100 transitions. [2019-12-28 03:19:53,753 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:53,821 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 03:19:53,824 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:19:53,824 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:53,824 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:19:53,825 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:19:53,825 INFO L87 Difference]: Start difference. First operand 21270 states and 83771 transitions. Second operand 6 states. [2019-12-28 03:19:54,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:54,888 INFO L93 Difference]: Finished difference Result 34704 states and 129063 transitions. [2019-12-28 03:19:54,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 03:19:54,889 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2019-12-28 03:19:54,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:55,048 INFO L225 Difference]: With dead ends: 34704 [2019-12-28 03:19:55,048 INFO L226 Difference]: Without dead ends: 34560 [2019-12-28 03:19:55,052 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-28 03:19:56,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34560 states. [2019-12-28 03:19:57,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34560 to 33060. [2019-12-28 03:19:57,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33060 states. [2019-12-28 03:19:57,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33060 states to 33060 states and 123951 transitions. [2019-12-28 03:19:57,412 INFO L78 Accepts]: Start accepts. Automaton has 33060 states and 123951 transitions. Word has length 44 [2019-12-28 03:19:57,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:19:57,413 INFO L462 AbstractCegarLoop]: Abstraction has 33060 states and 123951 transitions. [2019-12-28 03:19:57,414 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:19:57,414 INFO L276 IsEmpty]: Start isEmpty. Operand 33060 states and 123951 transitions. [2019-12-28 03:19:57,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-28 03:19:57,418 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:19:57,418 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:19:57,418 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:19:57,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:19:57,419 INFO L82 PathProgramCache]: Analyzing trace with hash -1894481532, now seen corresponding path program 1 times [2019-12-28 03:19:57,419 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:19:57,420 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [550379477] [2019-12-28 03:19:57,420 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:19:57,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:19:57,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:19:57,527 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [550379477] [2019-12-28 03:19:57,527 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:19:57,527 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:19:57,527 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1942077394] [2019-12-28 03:19:57,528 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:19:57,532 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:19:57,536 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 46 states and 45 transitions. [2019-12-28 03:19:57,536 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:19:57,537 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:19:57,538 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:19:57,538 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:19:57,538 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:19:57,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:19:57,539 INFO L87 Difference]: Start difference. First operand 33060 states and 123951 transitions. Second operand 5 states. [2019-12-28 03:19:58,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:19:58,455 INFO L93 Difference]: Finished difference Result 40212 states and 148620 transitions. [2019-12-28 03:19:58,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 03:19:58,457 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 45 [2019-12-28 03:19:58,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:19:58,704 INFO L225 Difference]: With dead ends: 40212 [2019-12-28 03:19:58,704 INFO L226 Difference]: Without dead ends: 40052 [2019-12-28 03:19:58,704 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:19:58,948 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40052 states. [2019-12-28 03:20:00,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40052 to 34633. [2019-12-28 03:20:00,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34633 states. [2019-12-28 03:20:01,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34633 states to 34633 states and 129247 transitions. [2019-12-28 03:20:01,092 INFO L78 Accepts]: Start accepts. Automaton has 34633 states and 129247 transitions. Word has length 45 [2019-12-28 03:20:01,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:01,092 INFO L462 AbstractCegarLoop]: Abstraction has 34633 states and 129247 transitions. [2019-12-28 03:20:01,092 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:20:01,092 INFO L276 IsEmpty]: Start isEmpty. Operand 34633 states and 129247 transitions. [2019-12-28 03:20:01,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-28 03:20:01,112 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:01,112 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:01,112 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:01,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:01,113 INFO L82 PathProgramCache]: Analyzing trace with hash 1517466393, now seen corresponding path program 1 times [2019-12-28 03:20:01,114 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:01,114 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1433504982] [2019-12-28 03:20:01,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:01,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:01,209 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:01,209 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1433504982] [2019-12-28 03:20:01,210 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:01,210 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:01,210 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [750710209] [2019-12-28 03:20:01,210 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:01,218 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:01,226 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 65 states and 76 transitions. [2019-12-28 03:20:01,227 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:01,228 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:01,229 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:01,229 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:01,229 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:01,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:01,230 INFO L87 Difference]: Start difference. First operand 34633 states and 129247 transitions. Second operand 6 states. [2019-12-28 03:20:02,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:02,476 INFO L93 Difference]: Finished difference Result 45661 states and 166141 transitions. [2019-12-28 03:20:02,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-28 03:20:02,477 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-28 03:20:02,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:02,612 INFO L225 Difference]: With dead ends: 45661 [2019-12-28 03:20:02,613 INFO L226 Difference]: Without dead ends: 45517 [2019-12-28 03:20:02,614 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2019-12-28 03:20:02,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45517 states. [2019-12-28 03:20:04,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45517 to 33596. [2019-12-28 03:20:04,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33596 states. [2019-12-28 03:20:05,089 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33596 states to 33596 states and 125402 transitions. [2019-12-28 03:20:05,090 INFO L78 Accepts]: Start accepts. Automaton has 33596 states and 125402 transitions. Word has length 52 [2019-12-28 03:20:05,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:05,090 INFO L462 AbstractCegarLoop]: Abstraction has 33596 states and 125402 transitions. [2019-12-28 03:20:05,090 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:05,090 INFO L276 IsEmpty]: Start isEmpty. Operand 33596 states and 125402 transitions. [2019-12-28 03:20:05,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-28 03:20:05,123 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:05,123 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:05,124 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:05,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:05,124 INFO L82 PathProgramCache]: Analyzing trace with hash 588960950, now seen corresponding path program 1 times [2019-12-28 03:20:05,125 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:05,125 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [476844358] [2019-12-28 03:20:05,125 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:05,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:05,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:05,267 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [476844358] [2019-12-28 03:20:05,267 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:05,267 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:05,267 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1102032541] [2019-12-28 03:20:05,268 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:05,278 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:05,287 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 60 states and 59 transitions. [2019-12-28 03:20:05,287 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:05,288 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:05,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:05,289 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:05,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:05,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:05,289 INFO L87 Difference]: Start difference. First operand 33596 states and 125402 transitions. Second operand 6 states. [2019-12-28 03:20:06,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:06,207 INFO L93 Difference]: Finished difference Result 46068 states and 167835 transitions. [2019-12-28 03:20:06,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 03:20:06,207 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 59 [2019-12-28 03:20:06,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:06,309 INFO L225 Difference]: With dead ends: 46068 [2019-12-28 03:20:06,310 INFO L226 Difference]: Without dead ends: 45828 [2019-12-28 03:20:06,310 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-28 03:20:06,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45828 states. [2019-12-28 03:20:07,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45828 to 39957. [2019-12-28 03:20:07,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39957 states. [2019-12-28 03:20:07,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39957 states to 39957 states and 147326 transitions. [2019-12-28 03:20:07,536 INFO L78 Accepts]: Start accepts. Automaton has 39957 states and 147326 transitions. Word has length 59 [2019-12-28 03:20:07,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:07,537 INFO L462 AbstractCegarLoop]: Abstraction has 39957 states and 147326 transitions. [2019-12-28 03:20:07,537 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:07,537 INFO L276 IsEmpty]: Start isEmpty. Operand 39957 states and 147326 transitions. [2019-12-28 03:20:07,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-28 03:20:07,565 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:07,566 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:07,566 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:07,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:07,566 INFO L82 PathProgramCache]: Analyzing trace with hash 801616715, now seen corresponding path program 1 times [2019-12-28 03:20:07,567 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:07,567 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2008066362] [2019-12-28 03:20:07,567 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:07,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:07,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:07,625 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2008066362] [2019-12-28 03:20:07,625 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:07,625 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 03:20:07,625 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1478594376] [2019-12-28 03:20:07,625 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:07,637 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:07,649 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 62 states and 61 transitions. [2019-12-28 03:20:07,650 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:07,651 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:07,651 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 03:20:07,651 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:07,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 03:20:07,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 03:20:07,652 INFO L87 Difference]: Start difference. First operand 39957 states and 147326 transitions. Second operand 3 states. [2019-12-28 03:20:07,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:07,894 INFO L93 Difference]: Finished difference Result 50255 states and 182161 transitions. [2019-12-28 03:20:07,895 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 03:20:07,895 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-28 03:20:07,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:07,995 INFO L225 Difference]: With dead ends: 50255 [2019-12-28 03:20:07,996 INFO L226 Difference]: Without dead ends: 50255 [2019-12-28 03:20:07,996 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 03:20:10,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50255 states. [2019-12-28 03:20:10,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50255 to 43887. [2019-12-28 03:20:10,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43887 states. [2019-12-28 03:20:10,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43887 states to 43887 states and 160764 transitions. [2019-12-28 03:20:10,630 INFO L78 Accepts]: Start accepts. Automaton has 43887 states and 160764 transitions. Word has length 61 [2019-12-28 03:20:10,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:10,630 INFO L462 AbstractCegarLoop]: Abstraction has 43887 states and 160764 transitions. [2019-12-28 03:20:10,630 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 03:20:10,630 INFO L276 IsEmpty]: Start isEmpty. Operand 43887 states and 160764 transitions. [2019-12-28 03:20:10,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-28 03:20:10,664 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:10,664 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:10,664 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:10,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:10,664 INFO L82 PathProgramCache]: Analyzing trace with hash 1777012394, now seen corresponding path program 1 times [2019-12-28 03:20:10,665 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:10,665 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [566010020] [2019-12-28 03:20:10,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:10,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:10,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:10,777 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [566010020] [2019-12-28 03:20:10,777 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:10,777 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:20:10,781 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [966013688] [2019-12-28 03:20:10,781 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:10,799 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:10,812 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 66 states and 65 transitions. [2019-12-28 03:20:10,813 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:10,813 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:10,814 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 03:20:10,814 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:10,814 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 03:20:10,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:10,815 INFO L87 Difference]: Start difference. First operand 43887 states and 160764 transitions. Second operand 7 states. [2019-12-28 03:20:12,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:12,068 INFO L93 Difference]: Finished difference Result 55883 states and 200498 transitions. [2019-12-28 03:20:12,068 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-28 03:20:12,068 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-28 03:20:12,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:12,184 INFO L225 Difference]: With dead ends: 55883 [2019-12-28 03:20:12,184 INFO L226 Difference]: Without dead ends: 55643 [2019-12-28 03:20:12,185 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-12-28 03:20:12,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55643 states. [2019-12-28 03:20:13,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55643 to 45113. [2019-12-28 03:20:13,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45113 states. [2019-12-28 03:20:13,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45113 states to 45113 states and 164931 transitions. [2019-12-28 03:20:13,429 INFO L78 Accepts]: Start accepts. Automaton has 45113 states and 164931 transitions. Word has length 65 [2019-12-28 03:20:13,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:13,429 INFO L462 AbstractCegarLoop]: Abstraction has 45113 states and 164931 transitions. [2019-12-28 03:20:13,430 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 03:20:13,430 INFO L276 IsEmpty]: Start isEmpty. Operand 45113 states and 164931 transitions. [2019-12-28 03:20:13,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-28 03:20:13,467 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:13,467 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:13,468 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:13,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:13,468 INFO L82 PathProgramCache]: Analyzing trace with hash -1623997529, now seen corresponding path program 1 times [2019-12-28 03:20:13,468 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:13,469 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060202587] [2019-12-28 03:20:13,469 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:13,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:13,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:13,566 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2060202587] [2019-12-28 03:20:13,567 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:13,567 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 03:20:13,567 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1191358357] [2019-12-28 03:20:13,567 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:13,582 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:13,608 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 93 states and 109 transitions. [2019-12-28 03:20:13,608 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:13,608 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:13,609 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 03:20:13,609 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:13,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 03:20:13,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:20:13,610 INFO L87 Difference]: Start difference. First operand 45113 states and 164931 transitions. Second operand 4 states. [2019-12-28 03:20:14,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:14,182 INFO L93 Difference]: Finished difference Result 69395 states and 251987 transitions. [2019-12-28 03:20:14,182 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 03:20:14,182 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-28 03:20:14,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:16,287 INFO L225 Difference]: With dead ends: 69395 [2019-12-28 03:20:16,287 INFO L226 Difference]: Without dead ends: 69395 [2019-12-28 03:20:16,287 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:16,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69395 states. [2019-12-28 03:20:17,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69395 to 53603. [2019-12-28 03:20:17,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53603 states. [2019-12-28 03:20:17,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53603 states to 53603 states and 195396 transitions. [2019-12-28 03:20:17,628 INFO L78 Accepts]: Start accepts. Automaton has 53603 states and 195396 transitions. Word has length 66 [2019-12-28 03:20:17,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:17,628 INFO L462 AbstractCegarLoop]: Abstraction has 53603 states and 195396 transitions. [2019-12-28 03:20:17,629 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 03:20:17,629 INFO L276 IsEmpty]: Start isEmpty. Operand 53603 states and 195396 transitions. [2019-12-28 03:20:17,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-28 03:20:17,670 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:17,670 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:17,670 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:17,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:17,671 INFO L82 PathProgramCache]: Analyzing trace with hash 811914503, now seen corresponding path program 1 times [2019-12-28 03:20:17,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:17,671 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [489273257] [2019-12-28 03:20:17,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:17,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:17,757 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:17,758 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [489273257] [2019-12-28 03:20:17,758 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:17,758 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:20:17,758 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [537311570] [2019-12-28 03:20:17,758 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:17,772 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:17,789 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 76 states and 82 transitions. [2019-12-28 03:20:17,790 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:17,790 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:17,790 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 03:20:17,791 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:17,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 03:20:17,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:17,791 INFO L87 Difference]: Start difference. First operand 53603 states and 195396 transitions. Second operand 7 states. [2019-12-28 03:20:18,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:18,980 INFO L93 Difference]: Finished difference Result 63814 states and 228863 transitions. [2019-12-28 03:20:18,980 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-28 03:20:18,980 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-28 03:20:18,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:19,124 INFO L225 Difference]: With dead ends: 63814 [2019-12-28 03:20:19,125 INFO L226 Difference]: Without dead ends: 63614 [2019-12-28 03:20:19,125 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=106, Invalid=356, Unknown=0, NotChecked=0, Total=462 [2019-12-28 03:20:19,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63614 states. [2019-12-28 03:20:20,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63614 to 54372. [2019-12-28 03:20:20,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54372 states. [2019-12-28 03:20:20,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54372 states to 54372 states and 197926 transitions. [2019-12-28 03:20:20,586 INFO L78 Accepts]: Start accepts. Automaton has 54372 states and 197926 transitions. Word has length 66 [2019-12-28 03:20:20,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:20,586 INFO L462 AbstractCegarLoop]: Abstraction has 54372 states and 197926 transitions. [2019-12-28 03:20:20,586 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 03:20:20,586 INFO L276 IsEmpty]: Start isEmpty. Operand 54372 states and 197926 transitions. [2019-12-28 03:20:20,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-28 03:20:20,643 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:20,643 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:20,643 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:20,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:20,644 INFO L82 PathProgramCache]: Analyzing trace with hash -2098261969, now seen corresponding path program 1 times [2019-12-28 03:20:20,645 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:20,645 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [377350426] [2019-12-28 03:20:20,645 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:20,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:20,771 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:20,772 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [377350426] [2019-12-28 03:20:20,772 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:20,772 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:20,774 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1655858216] [2019-12-28 03:20:20,775 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:20,788 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:20,801 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 71 states and 72 transitions. [2019-12-28 03:20:20,802 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:20,802 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:20,802 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:20,803 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:20,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:20,803 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:20,803 INFO L87 Difference]: Start difference. First operand 54372 states and 197926 transitions. Second operand 6 states. [2019-12-28 03:20:21,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:21,737 INFO L93 Difference]: Finished difference Result 75809 states and 274644 transitions. [2019-12-28 03:20:21,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 03:20:21,737 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 68 [2019-12-28 03:20:21,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:22,490 INFO L225 Difference]: With dead ends: 75809 [2019-12-28 03:20:22,490 INFO L226 Difference]: Without dead ends: 75165 [2019-12-28 03:20:22,491 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:20:22,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75165 states. [2019-12-28 03:20:23,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75165 to 65272. [2019-12-28 03:20:23,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65272 states. [2019-12-28 03:20:23,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65272 states to 65272 states and 238097 transitions. [2019-12-28 03:20:23,649 INFO L78 Accepts]: Start accepts. Automaton has 65272 states and 238097 transitions. Word has length 68 [2019-12-28 03:20:23,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:23,649 INFO L462 AbstractCegarLoop]: Abstraction has 65272 states and 238097 transitions. [2019-12-28 03:20:23,650 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:23,650 INFO L276 IsEmpty]: Start isEmpty. Operand 65272 states and 238097 transitions. [2019-12-28 03:20:24,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-28 03:20:24,054 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:24,054 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:24,055 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:24,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:24,055 INFO L82 PathProgramCache]: Analyzing trace with hash -1136647952, now seen corresponding path program 1 times [2019-12-28 03:20:24,055 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:24,056 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197414353] [2019-12-28 03:20:24,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:24,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:24,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:24,192 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197414353] [2019-12-28 03:20:24,192 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:24,193 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:20:24,193 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [511920858] [2019-12-28 03:20:24,193 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:24,206 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:24,219 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 71 states and 72 transitions. [2019-12-28 03:20:24,219 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:24,220 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:24,220 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 03:20:24,221 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:24,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 03:20:24,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:24,221 INFO L87 Difference]: Start difference. First operand 65272 states and 238097 transitions. Second operand 7 states. [2019-12-28 03:20:25,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:25,380 INFO L93 Difference]: Finished difference Result 92233 states and 326439 transitions. [2019-12-28 03:20:25,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-28 03:20:25,380 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 68 [2019-12-28 03:20:25,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:25,581 INFO L225 Difference]: With dead ends: 92233 [2019-12-28 03:20:25,581 INFO L226 Difference]: Without dead ends: 92233 [2019-12-28 03:20:25,581 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-28 03:20:25,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92233 states. [2019-12-28 03:20:29,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92233 to 84342. [2019-12-28 03:20:29,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84342 states. [2019-12-28 03:20:29,680 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84342 states to 84342 states and 301206 transitions. [2019-12-28 03:20:29,680 INFO L78 Accepts]: Start accepts. Automaton has 84342 states and 301206 transitions. Word has length 68 [2019-12-28 03:20:29,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:29,680 INFO L462 AbstractCegarLoop]: Abstraction has 84342 states and 301206 transitions. [2019-12-28 03:20:29,681 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 03:20:29,681 INFO L276 IsEmpty]: Start isEmpty. Operand 84342 states and 301206 transitions. [2019-12-28 03:20:29,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-28 03:20:29,759 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:29,760 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:29,760 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:29,760 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:29,760 INFO L82 PathProgramCache]: Analyzing trace with hash 108116529, now seen corresponding path program 1 times [2019-12-28 03:20:29,761 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:29,761 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [673567437] [2019-12-28 03:20:29,761 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:29,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:29,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:29,838 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [673567437] [2019-12-28 03:20:29,838 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:29,838 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 03:20:29,838 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [276282759] [2019-12-28 03:20:29,838 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:29,851 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:29,863 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 71 states and 72 transitions. [2019-12-28 03:20:29,864 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:29,864 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:29,864 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 03:20:29,865 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:29,866 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 03:20:29,866 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 03:20:29,866 INFO L87 Difference]: Start difference. First operand 84342 states and 301206 transitions. Second operand 3 states. [2019-12-28 03:20:30,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:30,262 INFO L93 Difference]: Finished difference Result 63501 states and 230470 transitions. [2019-12-28 03:20:30,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 03:20:30,263 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 68 [2019-12-28 03:20:30,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:30,398 INFO L225 Difference]: With dead ends: 63501 [2019-12-28 03:20:30,399 INFO L226 Difference]: Without dead ends: 63339 [2019-12-28 03:20:30,399 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 03:20:31,276 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63339 states. [2019-12-28 03:20:31,928 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63339 to 63299. [2019-12-28 03:20:31,928 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63299 states. [2019-12-28 03:20:32,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63299 states to 63299 states and 229885 transitions. [2019-12-28 03:20:32,087 INFO L78 Accepts]: Start accepts. Automaton has 63299 states and 229885 transitions. Word has length 68 [2019-12-28 03:20:32,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:32,087 INFO L462 AbstractCegarLoop]: Abstraction has 63299 states and 229885 transitions. [2019-12-28 03:20:32,087 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 03:20:32,087 INFO L276 IsEmpty]: Start isEmpty. Operand 63299 states and 229885 transitions. [2019-12-28 03:20:32,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-12-28 03:20:32,136 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:32,136 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:32,136 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:32,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:32,137 INFO L82 PathProgramCache]: Analyzing trace with hash -1961517310, now seen corresponding path program 1 times [2019-12-28 03:20:32,137 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:32,137 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [840871748] [2019-12-28 03:20:32,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:32,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:32,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:32,227 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [840871748] [2019-12-28 03:20:32,227 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:32,228 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:20:32,228 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1257451454] [2019-12-28 03:20:32,229 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:32,242 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:32,255 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 70 states and 69 transitions. [2019-12-28 03:20:32,255 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:32,256 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:32,256 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:20:32,257 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:32,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:20:32,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:32,257 INFO L87 Difference]: Start difference. First operand 63299 states and 229885 transitions. Second operand 5 states. [2019-12-28 03:20:35,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:35,253 INFO L93 Difference]: Finished difference Result 84427 states and 303655 transitions. [2019-12-28 03:20:35,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 03:20:35,253 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 69 [2019-12-28 03:20:35,254 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:35,453 INFO L225 Difference]: With dead ends: 84427 [2019-12-28 03:20:35,454 INFO L226 Difference]: Without dead ends: 84231 [2019-12-28 03:20:35,454 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:35,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84231 states. [2019-12-28 03:20:36,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84231 to 76146. [2019-12-28 03:20:36,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76146 states. [2019-12-28 03:20:36,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76146 states to 76146 states and 275543 transitions. [2019-12-28 03:20:36,873 INFO L78 Accepts]: Start accepts. Automaton has 76146 states and 275543 transitions. Word has length 69 [2019-12-28 03:20:36,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:36,873 INFO L462 AbstractCegarLoop]: Abstraction has 76146 states and 275543 transitions. [2019-12-28 03:20:36,873 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:20:36,873 INFO L276 IsEmpty]: Start isEmpty. Operand 76146 states and 275543 transitions. [2019-12-28 03:20:36,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-12-28 03:20:36,933 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:36,933 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:36,934 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:36,934 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:36,934 INFO L82 PathProgramCache]: Analyzing trace with hash -716752829, now seen corresponding path program 1 times [2019-12-28 03:20:36,935 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:36,935 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385271574] [2019-12-28 03:20:36,935 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:36,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:37,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:37,549 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [385271574] [2019-12-28 03:20:37,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:37,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:20:37,550 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1701331258] [2019-12-28 03:20:37,550 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:37,563 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:37,575 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 70 states and 69 transitions. [2019-12-28 03:20:37,576 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:37,576 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:37,576 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:20:37,576 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:37,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:20:37,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:37,577 INFO L87 Difference]: Start difference. First operand 76146 states and 275543 transitions. Second operand 5 states. [2019-12-28 03:20:37,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:37,718 INFO L93 Difference]: Finished difference Result 19614 states and 62264 transitions. [2019-12-28 03:20:37,719 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 03:20:37,719 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 69 [2019-12-28 03:20:37,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:37,748 INFO L225 Difference]: With dead ends: 19614 [2019-12-28 03:20:37,749 INFO L226 Difference]: Without dead ends: 19136 [2019-12-28 03:20:37,749 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 6 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:37,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19136 states. [2019-12-28 03:20:37,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19136 to 19124. [2019-12-28 03:20:37,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19124 states. [2019-12-28 03:20:38,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19124 states to 19124 states and 60759 transitions. [2019-12-28 03:20:38,005 INFO L78 Accepts]: Start accepts. Automaton has 19124 states and 60759 transitions. Word has length 69 [2019-12-28 03:20:38,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:38,005 INFO L462 AbstractCegarLoop]: Abstraction has 19124 states and 60759 transitions. [2019-12-28 03:20:38,005 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:20:38,005 INFO L276 IsEmpty]: Start isEmpty. Operand 19124 states and 60759 transitions. [2019-12-28 03:20:38,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-12-28 03:20:38,022 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:38,022 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:38,022 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:38,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:38,023 INFO L82 PathProgramCache]: Analyzing trace with hash -1120176018, now seen corresponding path program 1 times [2019-12-28 03:20:38,023 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:38,023 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1239899840] [2019-12-28 03:20:38,024 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:38,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:38,081 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:38,082 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1239899840] [2019-12-28 03:20:38,082 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:38,082 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 03:20:38,082 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [400506644] [2019-12-28 03:20:38,083 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:38,098 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:38,141 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 131 states and 182 transitions. [2019-12-28 03:20:38,141 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:38,177 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 8 times. [2019-12-28 03:20:38,177 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:38,177 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:38,178 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:38,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:38,178 INFO L87 Difference]: Start difference. First operand 19124 states and 60759 transitions. Second operand 6 states. [2019-12-28 03:20:38,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:38,557 INFO L93 Difference]: Finished difference Result 24074 states and 75427 transitions. [2019-12-28 03:20:38,557 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 03:20:38,558 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 78 [2019-12-28 03:20:38,558 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:38,594 INFO L225 Difference]: With dead ends: 24074 [2019-12-28 03:20:38,594 INFO L226 Difference]: Without dead ends: 24074 [2019-12-28 03:20:38,595 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:38,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24074 states. [2019-12-28 03:20:38,847 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24074 to 19964. [2019-12-28 03:20:38,847 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19964 states. [2019-12-28 03:20:38,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19964 states to 19964 states and 63126 transitions. [2019-12-28 03:20:38,887 INFO L78 Accepts]: Start accepts. Automaton has 19964 states and 63126 transitions. Word has length 78 [2019-12-28 03:20:38,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:38,887 INFO L462 AbstractCegarLoop]: Abstraction has 19964 states and 63126 transitions. [2019-12-28 03:20:38,887 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:38,887 INFO L276 IsEmpty]: Start isEmpty. Operand 19964 states and 63126 transitions. [2019-12-28 03:20:38,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-12-28 03:20:38,905 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:38,905 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:38,905 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:38,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:38,905 INFO L82 PathProgramCache]: Analyzing trace with hash -1374912563, now seen corresponding path program 1 times [2019-12-28 03:20:38,906 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:38,906 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627803125] [2019-12-28 03:20:38,906 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:38,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:39,003 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:39,004 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [627803125] [2019-12-28 03:20:39,004 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:39,004 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 03:20:39,004 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1737065863] [2019-12-28 03:20:39,005 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:39,021 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:39,074 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 131 states and 182 transitions. [2019-12-28 03:20:39,074 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:39,097 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 03:20:39,097 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 03:20:39,098 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:39,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 03:20:39,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-28 03:20:39,098 INFO L87 Difference]: Start difference. First operand 19964 states and 63126 transitions. Second operand 9 states. [2019-12-28 03:20:40,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:40,206 INFO L93 Difference]: Finished difference Result 22070 states and 69318 transitions. [2019-12-28 03:20:40,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-28 03:20:40,207 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 78 [2019-12-28 03:20:40,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:40,243 INFO L225 Difference]: With dead ends: 22070 [2019-12-28 03:20:40,243 INFO L226 Difference]: Without dead ends: 22022 [2019-12-28 03:20:40,243 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 97 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=107, Invalid=445, Unknown=0, NotChecked=0, Total=552 [2019-12-28 03:20:40,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22022 states. [2019-12-28 03:20:40,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22022 to 19436. [2019-12-28 03:20:40,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19436 states. [2019-12-28 03:20:40,794 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19436 states to 19436 states and 61628 transitions. [2019-12-28 03:20:40,794 INFO L78 Accepts]: Start accepts. Automaton has 19436 states and 61628 transitions. Word has length 78 [2019-12-28 03:20:40,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:40,795 INFO L462 AbstractCegarLoop]: Abstraction has 19436 states and 61628 transitions. [2019-12-28 03:20:40,795 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 03:20:40,795 INFO L276 IsEmpty]: Start isEmpty. Operand 19436 states and 61628 transitions. [2019-12-28 03:20:40,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-28 03:20:40,814 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:40,814 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:40,814 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:40,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:40,815 INFO L82 PathProgramCache]: Analyzing trace with hash -12906451, now seen corresponding path program 1 times [2019-12-28 03:20:40,815 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:40,816 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [641061183] [2019-12-28 03:20:40,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:40,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:40,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:40,907 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [641061183] [2019-12-28 03:20:40,907 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:40,908 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 03:20:40,908 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1902214633] [2019-12-28 03:20:40,908 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:40,924 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:40,949 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 91 transitions. [2019-12-28 03:20:40,949 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:40,950 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:40,950 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 03:20:40,950 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:40,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 03:20:40,951 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:20:40,951 INFO L87 Difference]: Start difference. First operand 19436 states and 61628 transitions. Second operand 8 states. [2019-12-28 03:20:43,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:43,586 INFO L93 Difference]: Finished difference Result 50430 states and 153646 transitions. [2019-12-28 03:20:43,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-28 03:20:43,587 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 81 [2019-12-28 03:20:43,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:43,725 INFO L225 Difference]: With dead ends: 50430 [2019-12-28 03:20:43,725 INFO L226 Difference]: Without dead ends: 49731 [2019-12-28 03:20:43,727 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=153, Invalid=497, Unknown=0, NotChecked=0, Total=650 [2019-12-28 03:20:43,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49731 states. [2019-12-28 03:20:44,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49731 to 29964. [2019-12-28 03:20:44,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29964 states. [2019-12-28 03:20:44,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29964 states to 29964 states and 93558 transitions. [2019-12-28 03:20:44,774 INFO L78 Accepts]: Start accepts. Automaton has 29964 states and 93558 transitions. Word has length 81 [2019-12-28 03:20:44,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:44,775 INFO L462 AbstractCegarLoop]: Abstraction has 29964 states and 93558 transitions. [2019-12-28 03:20:44,775 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 03:20:44,775 INFO L276 IsEmpty]: Start isEmpty. Operand 29964 states and 93558 transitions. [2019-12-28 03:20:44,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-28 03:20:44,828 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:44,828 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:44,829 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:44,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:44,829 INFO L82 PathProgramCache]: Analyzing trace with hash 948707566, now seen corresponding path program 1 times [2019-12-28 03:20:44,830 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:44,831 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967000447] [2019-12-28 03:20:44,831 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:44,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:44,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:44,985 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967000447] [2019-12-28 03:20:44,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:44,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:44,986 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1722651033] [2019-12-28 03:20:44,986 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:45,004 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:45,029 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 91 transitions. [2019-12-28 03:20:45,029 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:45,030 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:45,030 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:45,030 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:45,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:45,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:45,031 INFO L87 Difference]: Start difference. First operand 29964 states and 93558 transitions. Second operand 6 states. [2019-12-28 03:20:45,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:45,650 INFO L93 Difference]: Finished difference Result 31402 states and 97495 transitions. [2019-12-28 03:20:45,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 03:20:45,651 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 81 [2019-12-28 03:20:45,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:45,747 INFO L225 Difference]: With dead ends: 31402 [2019-12-28 03:20:45,747 INFO L226 Difference]: Without dead ends: 31402 [2019-12-28 03:20:45,748 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:20:45,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31402 states. [2019-12-28 03:20:46,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31402 to 29633. [2019-12-28 03:20:46,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29633 states. [2019-12-28 03:20:46,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29633 states to 29633 states and 92401 transitions. [2019-12-28 03:20:46,822 INFO L78 Accepts]: Start accepts. Automaton has 29633 states and 92401 transitions. Word has length 81 [2019-12-28 03:20:46,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:46,823 INFO L462 AbstractCegarLoop]: Abstraction has 29633 states and 92401 transitions. [2019-12-28 03:20:46,823 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:46,824 INFO L276 IsEmpty]: Start isEmpty. Operand 29633 states and 92401 transitions. [2019-12-28 03:20:46,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-28 03:20:46,863 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:46,863 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:46,863 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:46,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:46,864 INFO L82 PathProgramCache]: Analyzing trace with hash -986952721, now seen corresponding path program 1 times [2019-12-28 03:20:46,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:46,867 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1720525576] [2019-12-28 03:20:46,867 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:46,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:46,967 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:46,967 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1720525576] [2019-12-28 03:20:46,967 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:46,968 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:20:46,968 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1186650923] [2019-12-28 03:20:46,968 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:46,983 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:47,006 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 91 transitions. [2019-12-28 03:20:47,007 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:47,007 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:47,010 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 03:20:47,010 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:47,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 03:20:47,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:47,010 INFO L87 Difference]: Start difference. First operand 29633 states and 92401 transitions. Second operand 7 states. [2019-12-28 03:20:47,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:47,618 INFO L93 Difference]: Finished difference Result 31147 states and 96557 transitions. [2019-12-28 03:20:47,618 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-28 03:20:47,619 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 81 [2019-12-28 03:20:47,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:47,665 INFO L225 Difference]: With dead ends: 31147 [2019-12-28 03:20:47,665 INFO L226 Difference]: Without dead ends: 31147 [2019-12-28 03:20:47,666 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-28 03:20:47,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31147 states. [2019-12-28 03:20:48,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31147 to 29965. [2019-12-28 03:20:48,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29965 states. [2019-12-28 03:20:48,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29965 states to 29965 states and 93232 transitions. [2019-12-28 03:20:48,077 INFO L78 Accepts]: Start accepts. Automaton has 29965 states and 93232 transitions. Word has length 81 [2019-12-28 03:20:48,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:48,077 INFO L462 AbstractCegarLoop]: Abstraction has 29965 states and 93232 transitions. [2019-12-28 03:20:48,077 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 03:20:48,077 INFO L276 IsEmpty]: Start isEmpty. Operand 29965 states and 93232 transitions. [2019-12-28 03:20:48,107 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-28 03:20:48,107 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:48,107 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:48,107 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:48,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:48,108 INFO L82 PathProgramCache]: Analyzing trace with hash -657186960, now seen corresponding path program 1 times [2019-12-28 03:20:48,108 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:48,108 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1013789086] [2019-12-28 03:20:48,109 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:48,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:48,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:48,160 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1013789086] [2019-12-28 03:20:48,160 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:48,160 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 03:20:48,161 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1515615209] [2019-12-28 03:20:48,161 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:48,175 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:48,199 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 91 transitions. [2019-12-28 03:20:48,199 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:48,200 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:48,200 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 03:20:48,200 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:48,200 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 03:20:48,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 03:20:48,201 INFO L87 Difference]: Start difference. First operand 29965 states and 93232 transitions. Second operand 3 states. [2019-12-28 03:20:48,282 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:48,282 INFO L93 Difference]: Finished difference Result 21486 states and 66269 transitions. [2019-12-28 03:20:48,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 03:20:48,283 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 81 [2019-12-28 03:20:48,283 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:48,324 INFO L225 Difference]: With dead ends: 21486 [2019-12-28 03:20:48,324 INFO L226 Difference]: Without dead ends: 21486 [2019-12-28 03:20:48,325 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 03:20:48,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21486 states. [2019-12-28 03:20:48,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21486 to 21163. [2019-12-28 03:20:48,579 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21163 states. [2019-12-28 03:20:48,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21163 states to 21163 states and 65320 transitions. [2019-12-28 03:20:48,620 INFO L78 Accepts]: Start accepts. Automaton has 21163 states and 65320 transitions. Word has length 81 [2019-12-28 03:20:48,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:48,621 INFO L462 AbstractCegarLoop]: Abstraction has 21163 states and 65320 transitions. [2019-12-28 03:20:48,621 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 03:20:48,621 INFO L276 IsEmpty]: Start isEmpty. Operand 21163 states and 65320 transitions. [2019-12-28 03:20:48,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 03:20:48,641 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:48,641 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:48,641 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:48,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:48,641 INFO L82 PathProgramCache]: Analyzing trace with hash 983805704, now seen corresponding path program 1 times [2019-12-28 03:20:48,642 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:48,642 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1838014468] [2019-12-28 03:20:48,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:48,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:48,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:48,690 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1838014468] [2019-12-28 03:20:48,690 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:48,690 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 03:20:48,690 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1609353825] [2019-12-28 03:20:48,690 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:48,706 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:48,729 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 83 states and 82 transitions. [2019-12-28 03:20:48,729 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:48,729 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:48,730 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 03:20:48,730 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:48,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 03:20:48,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:20:48,730 INFO L87 Difference]: Start difference. First operand 21163 states and 65320 transitions. Second operand 4 states. [2019-12-28 03:20:49,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:49,025 INFO L93 Difference]: Finished difference Result 26080 states and 79433 transitions. [2019-12-28 03:20:49,025 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 03:20:49,025 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2019-12-28 03:20:49,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:49,064 INFO L225 Difference]: With dead ends: 26080 [2019-12-28 03:20:49,064 INFO L226 Difference]: Without dead ends: 25972 [2019-12-28 03:20:49,064 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:20:49,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25972 states. [2019-12-28 03:20:49,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25972 to 23743. [2019-12-28 03:20:49,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23743 states. [2019-12-28 03:20:49,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23743 states to 23743 states and 72888 transitions. [2019-12-28 03:20:49,540 INFO L78 Accepts]: Start accepts. Automaton has 23743 states and 72888 transitions. Word has length 82 [2019-12-28 03:20:49,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:49,540 INFO L462 AbstractCegarLoop]: Abstraction has 23743 states and 72888 transitions. [2019-12-28 03:20:49,540 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 03:20:49,540 INFO L276 IsEmpty]: Start isEmpty. Operand 23743 states and 72888 transitions. [2019-12-28 03:20:49,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 03:20:49,560 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:49,561 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:49,561 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:49,561 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:49,561 INFO L82 PathProgramCache]: Analyzing trace with hash 61122121, now seen corresponding path program 1 times [2019-12-28 03:20:49,562 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:49,562 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066358009] [2019-12-28 03:20:49,562 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:49,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:49,667 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:49,667 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2066358009] [2019-12-28 03:20:49,667 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:49,668 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:49,668 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2014106879] [2019-12-28 03:20:49,668 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:49,684 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:49,716 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 83 states and 82 transitions. [2019-12-28 03:20:49,716 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:49,717 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:49,717 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:49,718 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:49,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:49,718 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:49,718 INFO L87 Difference]: Start difference. First operand 23743 states and 72888 transitions. Second operand 6 states. [2019-12-28 03:20:50,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:50,362 INFO L93 Difference]: Finished difference Result 26033 states and 79294 transitions. [2019-12-28 03:20:50,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 03:20:50,362 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-12-28 03:20:50,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:50,424 INFO L225 Difference]: With dead ends: 26033 [2019-12-28 03:20:50,424 INFO L226 Difference]: Without dead ends: 26009 [2019-12-28 03:20:50,425 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:20:50,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26009 states. [2019-12-28 03:20:50,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26009 to 25008. [2019-12-28 03:20:50,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25008 states. [2019-12-28 03:20:50,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25008 states to 25008 states and 76355 transitions. [2019-12-28 03:20:50,780 INFO L78 Accepts]: Start accepts. Automaton has 25008 states and 76355 transitions. Word has length 82 [2019-12-28 03:20:50,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:50,780 INFO L462 AbstractCegarLoop]: Abstraction has 25008 states and 76355 transitions. [2019-12-28 03:20:50,781 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:50,781 INFO L276 IsEmpty]: Start isEmpty. Operand 25008 states and 76355 transitions. [2019-12-28 03:20:50,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 03:20:50,801 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:50,801 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:50,801 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:50,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:50,802 INFO L82 PathProgramCache]: Analyzing trace with hash -1874538166, now seen corresponding path program 1 times [2019-12-28 03:20:50,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:50,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [336863639] [2019-12-28 03:20:50,802 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:50,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:50,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:50,901 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [336863639] [2019-12-28 03:20:50,902 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:50,902 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:50,902 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [362327822] [2019-12-28 03:20:50,902 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:50,922 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:50,946 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 83 states and 82 transitions. [2019-12-28 03:20:50,946 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:50,947 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:50,947 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:50,948 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:50,948 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:50,948 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:50,948 INFO L87 Difference]: Start difference. First operand 25008 states and 76355 transitions. Second operand 6 states. [2019-12-28 03:20:51,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:51,644 INFO L93 Difference]: Finished difference Result 32577 states and 96112 transitions. [2019-12-28 03:20:51,645 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 03:20:51,645 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-12-28 03:20:51,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:51,712 INFO L225 Difference]: With dead ends: 32577 [2019-12-28 03:20:51,712 INFO L226 Difference]: Without dead ends: 32564 [2019-12-28 03:20:51,712 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-12-28 03:20:51,788 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32564 states. [2019-12-28 03:20:52,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32564 to 27961. [2019-12-28 03:20:52,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27961 states. [2019-12-28 03:20:52,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27961 states to 27961 states and 83312 transitions. [2019-12-28 03:20:52,153 INFO L78 Accepts]: Start accepts. Automaton has 27961 states and 83312 transitions. Word has length 82 [2019-12-28 03:20:52,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:52,153 INFO L462 AbstractCegarLoop]: Abstraction has 27961 states and 83312 transitions. [2019-12-28 03:20:52,153 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:52,153 INFO L276 IsEmpty]: Start isEmpty. Operand 27961 states and 83312 transitions. [2019-12-28 03:20:52,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 03:20:52,177 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:52,177 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:52,177 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:52,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:52,177 INFO L82 PathProgramCache]: Analyzing trace with hash -1544772405, now seen corresponding path program 1 times [2019-12-28 03:20:52,178 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:52,178 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912142476] [2019-12-28 03:20:52,178 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:52,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:52,240 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:52,240 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912142476] [2019-12-28 03:20:52,241 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:52,241 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:20:52,241 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [507547331] [2019-12-28 03:20:52,241 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:52,252 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:52,275 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 83 states and 82 transitions. [2019-12-28 03:20:52,276 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:52,276 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:52,276 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:20:52,277 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:52,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:20:52,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:52,277 INFO L87 Difference]: Start difference. First operand 27961 states and 83312 transitions. Second operand 5 states. [2019-12-28 03:20:52,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:52,848 INFO L93 Difference]: Finished difference Result 33403 states and 98789 transitions. [2019-12-28 03:20:52,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 03:20:52,849 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2019-12-28 03:20:52,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:52,919 INFO L225 Difference]: With dead ends: 33403 [2019-12-28 03:20:52,919 INFO L226 Difference]: Without dead ends: 33403 [2019-12-28 03:20:52,920 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:53,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33403 states. [2019-12-28 03:20:53,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33403 to 27283. [2019-12-28 03:20:53,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27283 states. [2019-12-28 03:20:53,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27283 states to 27283 states and 81291 transitions. [2019-12-28 03:20:53,569 INFO L78 Accepts]: Start accepts. Automaton has 27283 states and 81291 transitions. Word has length 82 [2019-12-28 03:20:53,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:53,569 INFO L462 AbstractCegarLoop]: Abstraction has 27283 states and 81291 transitions. [2019-12-28 03:20:53,569 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:20:53,569 INFO L276 IsEmpty]: Start isEmpty. Operand 27283 states and 81291 transitions. [2019-12-28 03:20:53,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 03:20:53,592 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:53,593 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:53,593 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:53,593 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:53,593 INFO L82 PathProgramCache]: Analyzing trace with hash 740091050, now seen corresponding path program 1 times [2019-12-28 03:20:53,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:53,594 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1877243986] [2019-12-28 03:20:53,594 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:53,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:53,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:53,664 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1877243986] [2019-12-28 03:20:53,665 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:53,665 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 03:20:53,665 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1433413540] [2019-12-28 03:20:53,665 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:53,675 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:53,698 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 83 states and 82 transitions. [2019-12-28 03:20:53,699 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:53,699 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:53,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 03:20:53,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:53,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 03:20:53,700 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 03:20:53,700 INFO L87 Difference]: Start difference. First operand 27283 states and 81291 transitions. Second operand 4 states. [2019-12-28 03:20:54,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:54,270 INFO L93 Difference]: Finished difference Result 31432 states and 92484 transitions. [2019-12-28 03:20:54,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 03:20:54,270 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2019-12-28 03:20:54,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:54,334 INFO L225 Difference]: With dead ends: 31432 [2019-12-28 03:20:54,334 INFO L226 Difference]: Without dead ends: 30982 [2019-12-28 03:20:54,334 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:54,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30982 states. [2019-12-28 03:20:54,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30982 to 26929. [2019-12-28 03:20:54,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26929 states. [2019-12-28 03:20:54,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26929 states to 26929 states and 80065 transitions. [2019-12-28 03:20:54,760 INFO L78 Accepts]: Start accepts. Automaton has 26929 states and 80065 transitions. Word has length 82 [2019-12-28 03:20:54,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:54,760 INFO L462 AbstractCegarLoop]: Abstraction has 26929 states and 80065 transitions. [2019-12-28 03:20:54,760 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 03:20:54,760 INFO L276 IsEmpty]: Start isEmpty. Operand 26929 states and 80065 transitions. [2019-12-28 03:20:54,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 03:20:54,781 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:54,781 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:54,782 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:54,782 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:54,782 INFO L82 PathProgramCache]: Analyzing trace with hash 456940586, now seen corresponding path program 1 times [2019-12-28 03:20:54,782 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:54,783 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [363709277] [2019-12-28 03:20:54,783 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:54,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:54,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:54,859 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [363709277] [2019-12-28 03:20:54,859 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:54,859 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:20:54,860 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [293866673] [2019-12-28 03:20:54,860 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:54,870 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:54,893 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 83 states and 82 transitions. [2019-12-28 03:20:54,893 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:54,894 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:54,894 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:20:54,895 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:54,895 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:20:54,895 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:54,895 INFO L87 Difference]: Start difference. First operand 26929 states and 80065 transitions. Second operand 5 states. [2019-12-28 03:20:55,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:55,240 INFO L93 Difference]: Finished difference Result 23125 states and 67572 transitions. [2019-12-28 03:20:55,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 03:20:55,241 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2019-12-28 03:20:55,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:55,271 INFO L225 Difference]: With dead ends: 23125 [2019-12-28 03:20:55,271 INFO L226 Difference]: Without dead ends: 22969 [2019-12-28 03:20:55,272 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:55,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22969 states. [2019-12-28 03:20:55,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22969 to 18282. [2019-12-28 03:20:55,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18282 states. [2019-12-28 03:20:55,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18282 states to 18282 states and 54149 transitions. [2019-12-28 03:20:55,532 INFO L78 Accepts]: Start accepts. Automaton has 18282 states and 54149 transitions. Word has length 82 [2019-12-28 03:20:55,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:55,533 INFO L462 AbstractCegarLoop]: Abstraction has 18282 states and 54149 transitions. [2019-12-28 03:20:55,533 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:20:55,533 INFO L276 IsEmpty]: Start isEmpty. Operand 18282 states and 54149 transitions. [2019-12-28 03:20:55,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 03:20:55,546 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:55,546 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:55,546 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:55,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:55,546 INFO L82 PathProgramCache]: Analyzing trace with hash 1701705067, now seen corresponding path program 1 times [2019-12-28 03:20:55,547 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:55,547 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816983473] [2019-12-28 03:20:55,547 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:55,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:55,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:55,619 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [816983473] [2019-12-28 03:20:55,619 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:55,619 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:20:55,619 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2104873564] [2019-12-28 03:20:55,619 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:55,627 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:55,645 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 83 states and 82 transitions. [2019-12-28 03:20:55,645 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:55,645 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:55,645 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:20:55,646 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:55,646 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:20:55,646 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:55,646 INFO L87 Difference]: Start difference. First operand 18282 states and 54149 transitions. Second operand 5 states. [2019-12-28 03:20:55,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:55,688 INFO L93 Difference]: Finished difference Result 2364 states and 5647 transitions. [2019-12-28 03:20:55,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 03:20:55,688 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 82 [2019-12-28 03:20:55,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:55,691 INFO L225 Difference]: With dead ends: 2364 [2019-12-28 03:20:55,691 INFO L226 Difference]: Without dead ends: 2076 [2019-12-28 03:20:55,691 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:20:55,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2076 states. [2019-12-28 03:20:55,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2076 to 2021. [2019-12-28 03:20:55,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2021 states. [2019-12-28 03:20:55,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2021 states to 2021 states and 4817 transitions. [2019-12-28 03:20:55,710 INFO L78 Accepts]: Start accepts. Automaton has 2021 states and 4817 transitions. Word has length 82 [2019-12-28 03:20:55,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:55,710 INFO L462 AbstractCegarLoop]: Abstraction has 2021 states and 4817 transitions. [2019-12-28 03:20:55,710 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:20:55,711 INFO L276 IsEmpty]: Start isEmpty. Operand 2021 states and 4817 transitions. [2019-12-28 03:20:55,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:55,712 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:55,712 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:55,712 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:55,713 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:55,713 INFO L82 PathProgramCache]: Analyzing trace with hash 1787288701, now seen corresponding path program 1 times [2019-12-28 03:20:55,713 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:55,713 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [869590936] [2019-12-28 03:20:55,714 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:55,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:55,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:55,802 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [869590936] [2019-12-28 03:20:55,802 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:55,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:20:55,803 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2012655967] [2019-12-28 03:20:55,803 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:55,818 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:55,878 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 112 states and 126 transitions. [2019-12-28 03:20:55,878 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:55,911 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 3 times. [2019-12-28 03:20:55,912 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:55,912 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:55,912 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:55,912 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:55,913 INFO L87 Difference]: Start difference. First operand 2021 states and 4817 transitions. Second operand 6 states. [2019-12-28 03:20:56,490 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:56,490 INFO L93 Difference]: Finished difference Result 2800 states and 6454 transitions. [2019-12-28 03:20:56,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 03:20:56,491 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-12-28 03:20:56,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:56,495 INFO L225 Difference]: With dead ends: 2800 [2019-12-28 03:20:56,495 INFO L226 Difference]: Without dead ends: 2776 [2019-12-28 03:20:56,496 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=43, Unknown=0, NotChecked=0, Total=72 [2019-12-28 03:20:56,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2776 states. [2019-12-28 03:20:56,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2776 to 2149. [2019-12-28 03:20:56,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2149 states. [2019-12-28 03:20:56,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2149 states to 2149 states and 5080 transitions. [2019-12-28 03:20:56,523 INFO L78 Accepts]: Start accepts. Automaton has 2149 states and 5080 transitions. Word has length 95 [2019-12-28 03:20:56,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:56,523 INFO L462 AbstractCegarLoop]: Abstraction has 2149 states and 5080 transitions. [2019-12-28 03:20:56,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:56,523 INFO L276 IsEmpty]: Start isEmpty. Operand 2149 states and 5080 transitions. [2019-12-28 03:20:56,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:56,525 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:56,525 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:56,525 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:56,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:56,525 INFO L82 PathProgramCache]: Analyzing trace with hash 762594780, now seen corresponding path program 1 times [2019-12-28 03:20:56,526 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:56,526 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953714247] [2019-12-28 03:20:56,526 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:56,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:56,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:56,588 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953714247] [2019-12-28 03:20:56,588 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:56,589 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:20:56,589 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [197036139] [2019-12-28 03:20:56,589 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:56,599 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:56,636 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 112 states and 126 transitions. [2019-12-28 03:20:56,637 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:56,637 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:56,637 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:20:56,637 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:56,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:20:56,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:20:56,638 INFO L87 Difference]: Start difference. First operand 2149 states and 5080 transitions. Second operand 5 states. [2019-12-28 03:20:56,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:56,882 INFO L93 Difference]: Finished difference Result 2538 states and 5883 transitions. [2019-12-28 03:20:56,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 03:20:56,883 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-12-28 03:20:56,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:56,886 INFO L225 Difference]: With dead ends: 2538 [2019-12-28 03:20:56,887 INFO L226 Difference]: Without dead ends: 2520 [2019-12-28 03:20:56,887 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 03:20:56,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2520 states. [2019-12-28 03:20:56,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2520 to 2215. [2019-12-28 03:20:56,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2215 states. [2019-12-28 03:20:56,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2215 states to 2215 states and 5208 transitions. [2019-12-28 03:20:56,934 INFO L78 Accepts]: Start accepts. Automaton has 2215 states and 5208 transitions. Word has length 95 [2019-12-28 03:20:56,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:56,934 INFO L462 AbstractCegarLoop]: Abstraction has 2215 states and 5208 transitions. [2019-12-28 03:20:56,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:20:56,935 INFO L276 IsEmpty]: Start isEmpty. Operand 2215 states and 5208 transitions. [2019-12-28 03:20:56,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:56,938 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:56,939 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:56,939 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:56,939 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:56,939 INFO L82 PathProgramCache]: Analyzing trace with hash -238075170, now seen corresponding path program 1 times [2019-12-28 03:20:56,940 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:56,941 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633651887] [2019-12-28 03:20:56,941 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:56,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:57,098 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:57,099 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1633651887] [2019-12-28 03:20:57,099 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:57,099 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:57,099 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1285772738] [2019-12-28 03:20:57,099 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:57,124 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:57,193 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 112 states and 126 transitions. [2019-12-28 03:20:57,193 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:57,195 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 03:20:57,195 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:57,195 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:57,196 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:57,196 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:57,196 INFO L87 Difference]: Start difference. First operand 2215 states and 5208 transitions. Second operand 6 states. [2019-12-28 03:20:57,581 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:57,582 INFO L93 Difference]: Finished difference Result 2346 states and 5439 transitions. [2019-12-28 03:20:57,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-28 03:20:57,582 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-12-28 03:20:57,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:57,585 INFO L225 Difference]: With dead ends: 2346 [2019-12-28 03:20:57,586 INFO L226 Difference]: Without dead ends: 2346 [2019-12-28 03:20:57,587 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2019-12-28 03:20:57,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2346 states. [2019-12-28 03:20:57,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2346 to 2128. [2019-12-28 03:20:57,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2128 states. [2019-12-28 03:20:57,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2128 states to 2128 states and 5005 transitions. [2019-12-28 03:20:57,618 INFO L78 Accepts]: Start accepts. Automaton has 2128 states and 5005 transitions. Word has length 95 [2019-12-28 03:20:57,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:57,619 INFO L462 AbstractCegarLoop]: Abstraction has 2128 states and 5005 transitions. [2019-12-28 03:20:57,619 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:57,619 INFO L276 IsEmpty]: Start isEmpty. Operand 2128 states and 5005 transitions. [2019-12-28 03:20:57,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:57,622 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:57,622 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:57,622 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:57,622 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:57,622 INFO L82 PathProgramCache]: Analyzing trace with hash 91690591, now seen corresponding path program 1 times [2019-12-28 03:20:57,623 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:57,623 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117036746] [2019-12-28 03:20:57,623 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:57,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:57,734 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:57,735 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [117036746] [2019-12-28 03:20:57,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:57,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 03:20:57,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1929133529] [2019-12-28 03:20:57,736 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:57,759 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:57,811 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 112 states and 126 transitions. [2019-12-28 03:20:57,811 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:57,813 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 03:20:57,813 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 03:20:57,813 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:57,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 03:20:57,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:57,814 INFO L87 Difference]: Start difference. First operand 2128 states and 5005 transitions. Second operand 6 states. [2019-12-28 03:20:58,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:58,142 INFO L93 Difference]: Finished difference Result 2318 states and 5399 transitions. [2019-12-28 03:20:58,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 03:20:58,142 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-12-28 03:20:58,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:58,145 INFO L225 Difference]: With dead ends: 2318 [2019-12-28 03:20:58,146 INFO L226 Difference]: Without dead ends: 2318 [2019-12-28 03:20:58,146 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:20:58,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2318 states. [2019-12-28 03:20:58,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2318 to 2110. [2019-12-28 03:20:58,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2110 states. [2019-12-28 03:20:58,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2110 states to 2110 states and 4969 transitions. [2019-12-28 03:20:58,190 INFO L78 Accepts]: Start accepts. Automaton has 2110 states and 4969 transitions. Word has length 95 [2019-12-28 03:20:58,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:58,191 INFO L462 AbstractCegarLoop]: Abstraction has 2110 states and 4969 transitions. [2019-12-28 03:20:58,191 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 03:20:58,191 INFO L276 IsEmpty]: Start isEmpty. Operand 2110 states and 4969 transitions. [2019-12-28 03:20:58,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:58,195 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:58,195 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:58,195 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:58,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:58,196 INFO L82 PathProgramCache]: Analyzing trace with hash 2073007519, now seen corresponding path program 1 times [2019-12-28 03:20:58,197 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:58,197 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1732683384] [2019-12-28 03:20:58,197 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:58,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:58,368 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:58,368 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1732683384] [2019-12-28 03:20:58,368 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:58,369 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:20:58,369 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1964954712] [2019-12-28 03:20:58,369 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:58,393 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:58,484 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 134 states and 170 transitions. [2019-12-28 03:20:58,484 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:20:58,561 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 5 times. [2019-12-28 03:20:58,561 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 03:20:58,562 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:20:58,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 03:20:58,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2019-12-28 03:20:58,562 INFO L87 Difference]: Start difference. First operand 2110 states and 4969 transitions. Second operand 9 states. [2019-12-28 03:20:59,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:20:59,530 INFO L93 Difference]: Finished difference Result 2393 states and 5507 transitions. [2019-12-28 03:20:59,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-28 03:20:59,531 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 95 [2019-12-28 03:20:59,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:20:59,534 INFO L225 Difference]: With dead ends: 2393 [2019-12-28 03:20:59,535 INFO L226 Difference]: Without dead ends: 2393 [2019-12-28 03:20:59,535 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 5 SyntacticMatches, 4 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=139, Invalid=367, Unknown=0, NotChecked=0, Total=506 [2019-12-28 03:20:59,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2393 states. [2019-12-28 03:20:59,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2393 to 2102. [2019-12-28 03:20:59,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2102 states. [2019-12-28 03:20:59,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2102 states to 2102 states and 4932 transitions. [2019-12-28 03:20:59,556 INFO L78 Accepts]: Start accepts. Automaton has 2102 states and 4932 transitions. Word has length 95 [2019-12-28 03:20:59,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:20:59,556 INFO L462 AbstractCegarLoop]: Abstraction has 2102 states and 4932 transitions. [2019-12-28 03:20:59,556 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 03:20:59,557 INFO L276 IsEmpty]: Start isEmpty. Operand 2102 states and 4932 transitions. [2019-12-28 03:20:59,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:20:59,558 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:20:59,558 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:20:59,559 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:20:59,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:20:59,559 INFO L82 PathProgramCache]: Analyzing trace with hash -1892194016, now seen corresponding path program 1 times [2019-12-28 03:20:59,559 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:20:59,559 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1587108280] [2019-12-28 03:20:59,560 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:20:59,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:20:59,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:20:59,722 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1587108280] [2019-12-28 03:20:59,722 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:20:59,722 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-28 03:20:59,722 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [60810477] [2019-12-28 03:20:59,722 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:20:59,733 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:20:59,782 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 134 states and 170 transitions. [2019-12-28 03:20:59,782 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:21:00,087 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 16 times. [2019-12-28 03:21:00,087 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-28 03:21:00,088 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:21:00,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-28 03:21:00,088 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2019-12-28 03:21:00,089 INFO L87 Difference]: Start difference. First operand 2102 states and 4932 transitions. Second operand 21 states. [2019-12-28 03:21:02,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:21:02,477 INFO L93 Difference]: Finished difference Result 3616 states and 8484 transitions. [2019-12-28 03:21:02,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-28 03:21:02,477 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 95 [2019-12-28 03:21:02,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:21:02,482 INFO L225 Difference]: With dead ends: 3616 [2019-12-28 03:21:02,482 INFO L226 Difference]: Without dead ends: 2977 [2019-12-28 03:21:02,483 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=301, Invalid=1505, Unknown=0, NotChecked=0, Total=1806 [2019-12-28 03:21:02,487 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2977 states. [2019-12-28 03:21:02,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2977 to 2591. [2019-12-28 03:21:02,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2591 states. [2019-12-28 03:21:02,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2591 states to 2591 states and 5999 transitions. [2019-12-28 03:21:02,509 INFO L78 Accepts]: Start accepts. Automaton has 2591 states and 5999 transitions. Word has length 95 [2019-12-28 03:21:02,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:21:02,509 INFO L462 AbstractCegarLoop]: Abstraction has 2591 states and 5999 transitions. [2019-12-28 03:21:02,509 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-28 03:21:02,510 INFO L276 IsEmpty]: Start isEmpty. Operand 2591 states and 5999 transitions. [2019-12-28 03:21:02,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:21:02,512 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:21:02,512 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:21:02,513 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:21:02,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:21:02,513 INFO L82 PathProgramCache]: Analyzing trace with hash -337677158, now seen corresponding path program 2 times [2019-12-28 03:21:02,513 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:21:02,513 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371890851] [2019-12-28 03:21:02,514 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:21:02,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:21:02,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:21:02,632 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1371890851] [2019-12-28 03:21:02,633 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:21:02,633 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 03:21:02,633 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1966562710] [2019-12-28 03:21:02,633 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:21:02,648 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:21:02,694 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 125 states and 151 transitions. [2019-12-28 03:21:02,694 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:21:02,696 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 03:21:02,696 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 03:21:02,696 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:21:02,696 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 03:21:02,697 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-28 03:21:02,697 INFO L87 Difference]: Start difference. First operand 2591 states and 5999 transitions. Second operand 7 states. [2019-12-28 03:21:03,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:21:03,196 INFO L93 Difference]: Finished difference Result 3609 states and 8163 transitions. [2019-12-28 03:21:03,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 03:21:03,197 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2019-12-28 03:21:03,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:21:03,202 INFO L225 Difference]: With dead ends: 3609 [2019-12-28 03:21:03,202 INFO L226 Difference]: Without dead ends: 3567 [2019-12-28 03:21:03,202 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2019-12-28 03:21:03,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3567 states. [2019-12-28 03:21:03,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3567 to 2760. [2019-12-28 03:21:03,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2760 states. [2019-12-28 03:21:03,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2760 states to 2760 states and 6333 transitions. [2019-12-28 03:21:03,231 INFO L78 Accepts]: Start accepts. Automaton has 2760 states and 6333 transitions. Word has length 95 [2019-12-28 03:21:03,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:21:03,232 INFO L462 AbstractCegarLoop]: Abstraction has 2760 states and 6333 transitions. [2019-12-28 03:21:03,232 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 03:21:03,232 INFO L276 IsEmpty]: Start isEmpty. Operand 2760 states and 6333 transitions. [2019-12-28 03:21:03,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:21:03,235 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:21:03,235 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:21:03,235 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:21:03,235 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:21:03,236 INFO L82 PathProgramCache]: Analyzing trace with hash 2021629851, now seen corresponding path program 2 times [2019-12-28 03:21:03,236 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:21:03,237 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1569342598] [2019-12-28 03:21:03,237 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:21:03,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 03:21:03,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 03:21:03,325 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1569342598] [2019-12-28 03:21:03,325 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 03:21:03,325 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 03:21:03,325 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2013980737] [2019-12-28 03:21:03,326 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 03:21:03,341 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 03:21:03,403 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 125 states and 151 transitions. [2019-12-28 03:21:03,403 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 03:21:03,404 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 03:21:03,404 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 03:21:03,404 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 03:21:03,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 03:21:03,405 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-28 03:21:03,405 INFO L87 Difference]: Start difference. First operand 2760 states and 6333 transitions. Second operand 5 states. [2019-12-28 03:21:03,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 03:21:03,458 INFO L93 Difference]: Finished difference Result 3693 states and 8648 transitions. [2019-12-28 03:21:03,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 03:21:03,459 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-12-28 03:21:03,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 03:21:03,463 INFO L225 Difference]: With dead ends: 3693 [2019-12-28 03:21:03,463 INFO L226 Difference]: Without dead ends: 3693 [2019-12-28 03:21:03,463 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-28 03:21:03,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3693 states. [2019-12-28 03:21:03,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3693 to 2544. [2019-12-28 03:21:03,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2544 states. [2019-12-28 03:21:03,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2544 states to 2544 states and 5842 transitions. [2019-12-28 03:21:03,491 INFO L78 Accepts]: Start accepts. Automaton has 2544 states and 5842 transitions. Word has length 95 [2019-12-28 03:21:03,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 03:21:03,491 INFO L462 AbstractCegarLoop]: Abstraction has 2544 states and 5842 transitions. [2019-12-28 03:21:03,491 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 03:21:03,491 INFO L276 IsEmpty]: Start isEmpty. Operand 2544 states and 5842 transitions. [2019-12-28 03:21:03,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 03:21:03,493 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 03:21:03,493 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 03:21:03,493 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 03:21:03,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 03:21:03,494 INFO L82 PathProgramCache]: Analyzing trace with hash 24341148, now seen corresponding path program 2 times [2019-12-28 03:21:03,495 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 03:21:03,495 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261410633] [2019-12-28 03:21:03,495 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 03:21:03,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 03:21:03,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 03:21:03,582 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-28 03:21:03,582 INFO L476 BasicCegarLoop]: Counterexample might be feasible [2019-12-28 03:21:03,727 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.12 03:21:03 BasicIcfg [2019-12-28 03:21:03,727 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-28 03:21:03,729 INFO L168 Benchmark]: Toolchain (without parser) took 76903.53 ms. Allocated memory was 146.3 MB in the beginning and 3.0 GB in the end (delta: 2.8 GB). Free memory was 102.3 MB in the beginning and 2.4 GB in the end (delta: -2.3 GB). Peak memory consumption was 496.3 MB. Max. memory is 7.1 GB. [2019-12-28 03:21:03,729 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 146.3 MB. Free memory was 122.6 MB in the beginning and 122.4 MB in the end (delta: 210.1 kB). Peak memory consumption was 210.1 kB. Max. memory is 7.1 GB. [2019-12-28 03:21:03,730 INFO L168 Benchmark]: CACSL2BoogieTranslator took 759.90 ms. Allocated memory was 146.3 MB in the beginning and 203.4 MB in the end (delta: 57.1 MB). Free memory was 102.1 MB in the beginning and 157.5 MB in the end (delta: -55.3 MB). Peak memory consumption was 21.7 MB. Max. memory is 7.1 GB. [2019-12-28 03:21:03,730 INFO L168 Benchmark]: Boogie Procedure Inliner took 87.27 ms. Allocated memory is still 203.4 MB. Free memory was 157.5 MB in the beginning and 154.9 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 7.1 GB. [2019-12-28 03:21:03,731 INFO L168 Benchmark]: Boogie Preprocessor took 35.93 ms. Allocated memory is still 203.4 MB. Free memory was 154.9 MB in the beginning and 152.3 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 7.1 GB. [2019-12-28 03:21:03,731 INFO L168 Benchmark]: RCFGBuilder took 803.89 ms. Allocated memory is still 203.4 MB. Free memory was 152.3 MB in the beginning and 108.3 MB in the end (delta: 44.0 MB). Peak memory consumption was 44.0 MB. Max. memory is 7.1 GB. [2019-12-28 03:21:03,731 INFO L168 Benchmark]: TraceAbstraction took 75211.27 ms. Allocated memory was 203.4 MB in the beginning and 3.0 GB in the end (delta: 2.8 GB). Free memory was 107.7 MB in the beginning and 2.4 GB in the end (delta: -2.3 GB). Peak memory consumption was 444.5 MB. Max. memory is 7.1 GB. [2019-12-28 03:21:03,733 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 146.3 MB. Free memory was 122.6 MB in the beginning and 122.4 MB in the end (delta: 210.1 kB). Peak memory consumption was 210.1 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 759.90 ms. Allocated memory was 146.3 MB in the beginning and 203.4 MB in the end (delta: 57.1 MB). Free memory was 102.1 MB in the beginning and 157.5 MB in the end (delta: -55.3 MB). Peak memory consumption was 21.7 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 87.27 ms. Allocated memory is still 203.4 MB. Free memory was 157.5 MB in the beginning and 154.9 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 35.93 ms. Allocated memory is still 203.4 MB. Free memory was 154.9 MB in the beginning and 152.3 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 7.1 GB. * RCFGBuilder took 803.89 ms. Allocated memory is still 203.4 MB. Free memory was 152.3 MB in the beginning and 108.3 MB in the end (delta: 44.0 MB). Peak memory consumption was 44.0 MB. Max. memory is 7.1 GB. * TraceAbstraction took 75211.27 ms. Allocated memory was 203.4 MB in the beginning and 3.0 GB in the end (delta: 2.8 GB). Free memory was 107.7 MB in the beginning and 2.4 GB in the end (delta: -2.3 GB). Peak memory consumption was 444.5 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0] [L697] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0] [L698] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L700] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L701] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L702] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L703] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L704] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L705] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L706] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L707] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L708] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L709] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L710] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L711] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L712] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L713] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L714] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L716] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L717] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L718] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L778] 0 pthread_t t1453; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L779] FCALL, FORK 0 pthread_create(&t1453, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L780] 0 pthread_t t1454; VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L781] FCALL, FORK 0 pthread_create(&t1454, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L742] 2 x$w_buff1 = x$w_buff0 [L743] 2 x$w_buff0 = 2 [L744] 2 x$w_buff1_used = x$w_buff0_used [L745] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L747] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 2 x$r_buff0_thd2 = (_Bool)1 [L753] 2 __unbuffered_p1_EAX = y VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L722] 1 y = 1 [L725] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L728] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=1] [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=1, y=1] [L728] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L729] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L729] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L730] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L756] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L731] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L731] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L757] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L757] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L758] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L758] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L759] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L759] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L760] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L760] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L763] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L732] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=1, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L732] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L735] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L787] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L788] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L788] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L789] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L790] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L790] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L791] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L791] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 x$flush_delayed = weak$$choice2 [L797] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L798] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L799] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L800] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L800] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L801] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L801] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L802] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L803] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L804] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L804] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p1_EAX == 0) VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L806] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L806] 0 x = x$flush_delayed ? x$mem_tmp : x [L807] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p1_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 74.9s, OverallIterations: 36, TraceHistogramMax: 1, AutomataDifference: 33.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9294 SDtfs, 11453 SDslu, 23889 SDs, 0 SdLazy, 12256 SolverSat, 810 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 13.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 478 GetRequests, 140 SyntacticMatches, 32 SemanticMatches, 306 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 799 ImplicationChecksByTransitivity, 4.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=84342occurred in iteration=11, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 32.3s AutomataMinimizationTime, 35 MinimizatonAttempts, 149040 StatesRemovedByMinimization, 34 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.8s InterpolantComputationTime, 2746 NumberOfCodeBlocks, 2746 NumberOfCodeBlocksAsserted, 36 NumberOfCheckSat, 2616 ConstructedInterpolants, 0 QuantifiedInterpolants, 490524 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 35 InterpolantComputations, 35 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...