/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf -i ../../../trunk/examples/svcomp/pthread-wmm/safe006_power.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-4336eb1 [2019-12-28 04:22:49,992 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-28 04:22:49,995 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-28 04:22:50,015 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-28 04:22:50,015 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-28 04:22:50,017 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-28 04:22:50,019 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-28 04:22:50,021 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-28 04:22:50,023 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-28 04:22:50,023 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-28 04:22:50,024 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-28 04:22:50,026 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-28 04:22:50,026 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-28 04:22:50,027 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-28 04:22:50,030 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-28 04:22:50,033 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-28 04:22:50,034 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-28 04:22:50,038 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-28 04:22:50,039 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-28 04:22:50,041 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-28 04:22:50,043 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-28 04:22:50,044 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-28 04:22:50,045 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-28 04:22:50,046 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-28 04:22:50,048 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-28 04:22:50,048 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-28 04:22:50,049 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-28 04:22:50,050 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-28 04:22:50,050 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-28 04:22:50,051 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-28 04:22:50,051 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-28 04:22:50,052 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-28 04:22:50,052 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-28 04:22:50,053 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-28 04:22:50,054 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-28 04:22:50,054 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-28 04:22:50,055 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-28 04:22:50,055 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-28 04:22:50,056 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-28 04:22:50,056 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-28 04:22:50,057 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-28 04:22:50,058 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf [2019-12-28 04:22:50,072 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-28 04:22:50,072 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-28 04:22:50,073 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-28 04:22:50,074 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-28 04:22:50,074 INFO L138 SettingsManager]: * Use SBE=true [2019-12-28 04:22:50,074 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-28 04:22:50,074 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-28 04:22:50,074 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-28 04:22:50,075 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-28 04:22:50,075 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-28 04:22:50,075 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-28 04:22:50,075 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-28 04:22:50,075 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-28 04:22:50,076 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-28 04:22:50,076 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-28 04:22:50,076 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-28 04:22:50,076 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-28 04:22:50,076 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-28 04:22:50,077 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-28 04:22:50,077 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-28 04:22:50,077 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-28 04:22:50,077 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 04:22:50,077 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-28 04:22:50,078 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-28 04:22:50,078 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-28 04:22:50,078 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-28 04:22:50,078 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-28 04:22:50,078 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2019-12-28 04:22:50,079 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2019-12-28 04:22:50,079 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-28 04:22:50,079 INFO L138 SettingsManager]: * Interpolant automaton=MCR [2019-12-28 04:22:50,079 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-28 04:22:50,370 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-28 04:22:50,394 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-28 04:22:50,397 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-28 04:22:50,399 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-28 04:22:50,400 INFO L275 PluginConnector]: CDTParser initialized [2019-12-28 04:22:50,401 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/safe006_power.opt.i [2019-12-28 04:22:50,466 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/68c50b739/f34e8e90ebc6478aad3ee5bf83e9cf5d/FLAG92c5a7cb1 [2019-12-28 04:22:51,050 INFO L306 CDTParser]: Found 1 translation units. [2019-12-28 04:22:51,051 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe006_power.opt.i [2019-12-28 04:22:51,068 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/68c50b739/f34e8e90ebc6478aad3ee5bf83e9cf5d/FLAG92c5a7cb1 [2019-12-28 04:22:51,351 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/68c50b739/f34e8e90ebc6478aad3ee5bf83e9cf5d [2019-12-28 04:22:51,360 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-28 04:22:51,362 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-12-28 04:22:51,363 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-28 04:22:51,363 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-28 04:22:51,366 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-28 04:22:51,367 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 04:22:51" (1/1) ... [2019-12-28 04:22:51,370 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3a1e95ed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:51, skipping insertion in model container [2019-12-28 04:22:51,371 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 04:22:51" (1/1) ... [2019-12-28 04:22:51,379 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-28 04:22:51,439 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-28 04:22:52,029 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 04:22:52,043 INFO L203 MainTranslator]: Completed pre-run [2019-12-28 04:22:52,118 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 04:22:52,209 INFO L208 MainTranslator]: Completed translation [2019-12-28 04:22:52,210 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:52 WrapperNode [2019-12-28 04:22:52,210 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-28 04:22:52,211 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-28 04:22:52,211 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-28 04:22:52,212 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-28 04:22:52,219 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:52" (1/1) ... [2019-12-28 04:22:52,240 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:52" (1/1) ... [2019-12-28 04:22:52,274 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-28 04:22:52,275 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-28 04:22:52,275 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-28 04:22:52,275 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-28 04:22:52,287 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:52" (1/1) ... [2019-12-28 04:22:52,288 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:52" (1/1) ... [2019-12-28 04:22:52,297 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:52" (1/1) ... [2019-12-28 04:22:52,298 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:52" (1/1) ... [2019-12-28 04:22:52,318 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:52" (1/1) ... [2019-12-28 04:22:52,333 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:52" (1/1) ... [2019-12-28 04:22:52,338 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:52" (1/1) ... [2019-12-28 04:22:52,352 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-28 04:22:52,354 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-28 04:22:52,355 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-28 04:22:52,355 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-28 04:22:52,356 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:52" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 04:22:52,444 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-12-28 04:22:52,444 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-28 04:22:52,445 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-28 04:22:52,446 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-28 04:22:52,446 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-28 04:22:52,447 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-28 04:22:52,447 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-28 04:22:52,449 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-28 04:22:52,449 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-28 04:22:52,449 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-12-28 04:22:52,450 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-28 04:22:52,451 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-28 04:22:52,451 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-28 04:22:52,454 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-28 04:22:53,538 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-28 04:22:53,539 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-28 04:22:53,540 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 04:22:53 BoogieIcfgContainer [2019-12-28 04:22:53,540 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-28 04:22:53,543 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-28 04:22:53,544 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-28 04:22:53,562 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-28 04:22:53,564 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.12 04:22:51" (1/3) ... [2019-12-28 04:22:53,565 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@25cbc942 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 04:22:53, skipping insertion in model container [2019-12-28 04:22:53,565 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:22:52" (2/3) ... [2019-12-28 04:22:53,565 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@25cbc942 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 04:22:53, skipping insertion in model container [2019-12-28 04:22:53,565 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 04:22:53" (3/3) ... [2019-12-28 04:22:53,567 INFO L109 eAbstractionObserver]: Analyzing ICFG safe006_power.opt.i [2019-12-28 04:22:53,578 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-28 04:22:53,579 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-28 04:22:53,587 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-28 04:22:53,588 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-28 04:22:53,632 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,633 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,633 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,633 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,633 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,634 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,634 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,634 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,635 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,635 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,635 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,635 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,636 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,638 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,638 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,638 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,638 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,638 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,639 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,639 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,639 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,639 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,640 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,640 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,640 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,640 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,640 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,641 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,641 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,642 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,643 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,644 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,644 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,644 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,645 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,646 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,647 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,650 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,652 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,652 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,652 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,652 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,654 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,654 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,654 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,654 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,655 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,655 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,655 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,655 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,655 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,656 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,656 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,656 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,656 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,659 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,659 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,659 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,659 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,659 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,660 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,660 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,660 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,660 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,661 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,661 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,661 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,661 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,661 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,662 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,662 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,662 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,662 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,662 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,663 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,663 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,663 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,663 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,663 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,663 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,663 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,664 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,664 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,664 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,664 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,664 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,665 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,665 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,665 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,665 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,665 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,666 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,666 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,666 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,666 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,666 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,667 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,667 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,667 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,667 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,667 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,667 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,668 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,668 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,668 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,668 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,668 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,669 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,669 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,669 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,669 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,670 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,670 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,670 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,670 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,670 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,671 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,671 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,671 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,671 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,671 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,671 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,672 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,672 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,672 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,672 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,673 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,673 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,673 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,673 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,673 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,674 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,674 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,674 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,674 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,674 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,677 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,681 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,697 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,697 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,697 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,697 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,697 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,698 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,698 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,698 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,698 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,698 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,698 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,702 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,703 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,703 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,703 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,703 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,704 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,704 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,704 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,704 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,704 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,705 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,705 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,705 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:22:53,722 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-28 04:22:53,743 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-28 04:22:53,743 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-28 04:22:53,743 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-28 04:22:53,744 INFO L376 AbstractCegarLoop]: Backedges is MCR [2019-12-28 04:22:53,744 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-28 04:22:53,744 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-28 04:22:53,744 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-28 04:22:53,744 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-28 04:22:53,760 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 205 places, 260 transitions [2019-12-28 04:22:58,284 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 61567 states. [2019-12-28 04:22:58,286 INFO L276 IsEmpty]: Start isEmpty. Operand 61567 states. [2019-12-28 04:22:58,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-12-28 04:22:58,294 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:22:58,295 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:22:58,296 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:22:58,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:22:58,301 INFO L82 PathProgramCache]: Analyzing trace with hash 565161644, now seen corresponding path program 1 times [2019-12-28 04:22:58,310 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:22:58,310 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [396957305] [2019-12-28 04:22:58,310 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:22:58,449 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:22:58,687 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:22:58,688 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [396957305] [2019-12-28 04:22:58,690 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:22:58,690 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:22:58,691 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1898493212] [2019-12-28 04:22:58,693 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:22:58,704 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:22:58,740 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 51 states and 50 transitions. [2019-12-28 04:22:58,740 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:22:58,745 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:22:58,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:22:58,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:22:58,758 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:22:58,839 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:22:58,841 INFO L87 Difference]: Start difference. First operand 61567 states. Second operand 4 states. [2019-12-28 04:22:59,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:22:59,854 INFO L93 Difference]: Finished difference Result 63247 states and 248046 transitions. [2019-12-28 04:22:59,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 04:22:59,858 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 50 [2019-12-28 04:22:59,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:23:00,266 INFO L225 Difference]: With dead ends: 63247 [2019-12-28 04:23:00,275 INFO L226 Difference]: Without dead ends: 50191 [2019-12-28 04:23:00,280 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:23:02,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50191 states. [2019-12-28 04:23:03,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50191 to 50191. [2019-12-28 04:23:03,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50191 states. [2019-12-28 04:23:04,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50191 states to 50191 states and 198150 transitions. [2019-12-28 04:23:04,036 INFO L78 Accepts]: Start accepts. Automaton has 50191 states and 198150 transitions. Word has length 50 [2019-12-28 04:23:04,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:23:04,037 INFO L462 AbstractCegarLoop]: Abstraction has 50191 states and 198150 transitions. [2019-12-28 04:23:04,037 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:23:04,037 INFO L276 IsEmpty]: Start isEmpty. Operand 50191 states and 198150 transitions. [2019-12-28 04:23:04,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-12-28 04:23:04,048 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:23:04,048 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:23:04,048 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:23:04,049 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:23:04,049 INFO L82 PathProgramCache]: Analyzing trace with hash 529123426, now seen corresponding path program 1 times [2019-12-28 04:23:04,049 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:23:04,050 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [962005878] [2019-12-28 04:23:04,050 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:23:04,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:23:04,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:23:04,221 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [962005878] [2019-12-28 04:23:04,221 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:23:04,222 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:23:04,222 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [67179581] [2019-12-28 04:23:04,222 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:23:04,233 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:23:04,243 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 63 states and 62 transitions. [2019-12-28 04:23:04,243 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:23:04,244 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:23:04,246 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 04:23:04,246 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:23:04,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 04:23:04,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:23:04,247 INFO L87 Difference]: Start difference. First operand 50191 states and 198150 transitions. Second operand 5 states. [2019-12-28 04:23:07,171 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:23:07,172 INFO L93 Difference]: Finished difference Result 80987 states and 302744 transitions. [2019-12-28 04:23:07,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:23:07,172 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 62 [2019-12-28 04:23:07,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:23:07,599 INFO L225 Difference]: With dead ends: 80987 [2019-12-28 04:23:07,599 INFO L226 Difference]: Without dead ends: 80147 [2019-12-28 04:23:07,600 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:23:08,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80147 states. [2019-12-28 04:23:11,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80147 to 77169. [2019-12-28 04:23:11,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77169 states. [2019-12-28 04:23:11,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77169 states to 77169 states and 290104 transitions. [2019-12-28 04:23:11,778 INFO L78 Accepts]: Start accepts. Automaton has 77169 states and 290104 transitions. Word has length 62 [2019-12-28 04:23:11,779 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:23:11,780 INFO L462 AbstractCegarLoop]: Abstraction has 77169 states and 290104 transitions. [2019-12-28 04:23:11,780 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 04:23:11,780 INFO L276 IsEmpty]: Start isEmpty. Operand 77169 states and 290104 transitions. [2019-12-28 04:23:11,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-12-28 04:23:11,787 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:23:11,787 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:23:11,787 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:23:11,788 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:23:11,788 INFO L82 PathProgramCache]: Analyzing trace with hash -1012667442, now seen corresponding path program 1 times [2019-12-28 04:23:11,789 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:23:11,789 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255497785] [2019-12-28 04:23:11,789 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:23:11,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:23:11,956 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:23:11,957 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1255497785] [2019-12-28 04:23:11,957 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:23:11,957 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:23:11,959 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [98624373] [2019-12-28 04:23:11,959 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:23:11,967 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:23:11,983 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 64 states and 63 transitions. [2019-12-28 04:23:11,983 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:23:11,985 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:23:11,985 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:23:11,985 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:23:11,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:23:11,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:23:11,986 INFO L87 Difference]: Start difference. First operand 77169 states and 290104 transitions. Second operand 6 states. [2019-12-28 04:23:13,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:23:13,721 INFO L93 Difference]: Finished difference Result 119436 states and 436397 transitions. [2019-12-28 04:23:13,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 04:23:13,722 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 63 [2019-12-28 04:23:13,722 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:23:14,019 INFO L225 Difference]: With dead ends: 119436 [2019-12-28 04:23:14,019 INFO L226 Difference]: Without dead ends: 118428 [2019-12-28 04:23:14,020 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=90, Unknown=0, NotChecked=0, Total=132 [2019-12-28 04:23:17,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118428 states. [2019-12-28 04:23:19,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118428 to 85983. [2019-12-28 04:23:19,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85983 states. [2019-12-28 04:23:19,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85983 states to 85983 states and 321010 transitions. [2019-12-28 04:23:19,565 INFO L78 Accepts]: Start accepts. Automaton has 85983 states and 321010 transitions. Word has length 63 [2019-12-28 04:23:19,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:23:19,566 INFO L462 AbstractCegarLoop]: Abstraction has 85983 states and 321010 transitions. [2019-12-28 04:23:19,566 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:23:19,566 INFO L276 IsEmpty]: Start isEmpty. Operand 85983 states and 321010 transitions. [2019-12-28 04:23:19,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-28 04:23:19,578 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:23:19,578 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:23:19,579 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:23:19,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:23:19,579 INFO L82 PathProgramCache]: Analyzing trace with hash -1514867945, now seen corresponding path program 1 times [2019-12-28 04:23:19,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:23:19,580 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [99709380] [2019-12-28 04:23:19,580 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:23:19,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:23:19,647 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:23:19,648 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [99709380] [2019-12-28 04:23:19,648 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:23:19,648 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 04:23:19,649 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1389924677] [2019-12-28 04:23:19,649 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:23:19,657 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:23:19,666 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 66 states and 65 transitions. [2019-12-28 04:23:19,667 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:23:19,667 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:23:19,668 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 04:23:19,668 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:23:19,668 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 04:23:19,668 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:23:19,669 INFO L87 Difference]: Start difference. First operand 85983 states and 321010 transitions. Second operand 3 states. [2019-12-28 04:23:23,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:23:23,188 INFO L93 Difference]: Finished difference Result 113656 states and 419178 transitions. [2019-12-28 04:23:23,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 04:23:23,189 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-28 04:23:23,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:23:23,489 INFO L225 Difference]: With dead ends: 113656 [2019-12-28 04:23:23,489 INFO L226 Difference]: Without dead ends: 113656 [2019-12-28 04:23:23,490 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:23:24,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113656 states. [2019-12-28 04:23:25,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113656 to 96018. [2019-12-28 04:23:25,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96018 states. [2019-12-28 04:23:25,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96018 states to 96018 states and 354765 transitions. [2019-12-28 04:23:25,848 INFO L78 Accepts]: Start accepts. Automaton has 96018 states and 354765 transitions. Word has length 65 [2019-12-28 04:23:25,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:23:25,848 INFO L462 AbstractCegarLoop]: Abstraction has 96018 states and 354765 transitions. [2019-12-28 04:23:25,848 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 04:23:25,848 INFO L276 IsEmpty]: Start isEmpty. Operand 96018 states and 354765 transitions. [2019-12-28 04:23:26,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-12-28 04:23:26,535 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:23:26,535 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:23:26,535 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:23:26,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:23:26,536 INFO L82 PathProgramCache]: Analyzing trace with hash 184399052, now seen corresponding path program 1 times [2019-12-28 04:23:26,536 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:23:26,536 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [539219302] [2019-12-28 04:23:26,536 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:23:26,555 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:23:26,655 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:23:26,655 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [539219302] [2019-12-28 04:23:26,656 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:23:26,656 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 04:23:26,656 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1963938028] [2019-12-28 04:23:26,656 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:23:26,667 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:23:26,679 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 70 states and 69 transitions. [2019-12-28 04:23:26,679 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:23:26,681 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:23:26,681 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 04:23:26,681 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:23:26,682 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 04:23:26,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:23:26,682 INFO L87 Difference]: Start difference. First operand 96018 states and 354765 transitions. Second operand 7 states. [2019-12-28 04:23:28,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:23:28,248 INFO L93 Difference]: Finished difference Result 123922 states and 450566 transitions. [2019-12-28 04:23:28,248 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-28 04:23:28,248 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 69 [2019-12-28 04:23:28,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:23:28,553 INFO L225 Difference]: With dead ends: 123922 [2019-12-28 04:23:28,553 INFO L226 Difference]: Without dead ends: 122970 [2019-12-28 04:23:28,553 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=114, Invalid=348, Unknown=0, NotChecked=0, Total=462 [2019-12-28 04:23:33,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122970 states. [2019-12-28 04:23:34,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122970 to 93226. [2019-12-28 04:23:34,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93226 states. [2019-12-28 04:23:35,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93226 states to 93226 states and 345739 transitions. [2019-12-28 04:23:35,002 INFO L78 Accepts]: Start accepts. Automaton has 93226 states and 345739 transitions. Word has length 69 [2019-12-28 04:23:35,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:23:35,003 INFO L462 AbstractCegarLoop]: Abstraction has 93226 states and 345739 transitions. [2019-12-28 04:23:35,003 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 04:23:35,003 INFO L276 IsEmpty]: Start isEmpty. Operand 93226 states and 345739 transitions. [2019-12-28 04:23:35,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-28 04:23:35,032 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:23:35,032 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:23:35,032 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:23:35,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:23:35,032 INFO L82 PathProgramCache]: Analyzing trace with hash -1107589200, now seen corresponding path program 1 times [2019-12-28 04:23:35,033 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:23:35,033 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1161182745] [2019-12-28 04:23:35,033 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:23:35,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:23:35,164 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:23:35,165 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1161182745] [2019-12-28 04:23:35,166 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:23:35,167 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:23:35,167 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [940276037] [2019-12-28 04:23:35,167 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:23:35,177 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:23:35,190 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 78 states and 83 transitions. [2019-12-28 04:23:35,191 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:23:35,194 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:23:35,194 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:23:35,195 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:23:35,195 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:23:35,195 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:23:35,195 INFO L87 Difference]: Start difference. First operand 93226 states and 345739 transitions. Second operand 6 states. [2019-12-28 04:23:36,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:23:36,570 INFO L93 Difference]: Finished difference Result 117216 states and 426035 transitions. [2019-12-28 04:23:36,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:23:36,570 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 71 [2019-12-28 04:23:36,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:23:36,861 INFO L225 Difference]: With dead ends: 117216 [2019-12-28 04:23:36,861 INFO L226 Difference]: Without dead ends: 116954 [2019-12-28 04:23:36,862 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:23:38,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116954 states. [2019-12-28 04:23:44,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116954 to 113599. [2019-12-28 04:23:44,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113599 states. [2019-12-28 04:23:44,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113599 states to 113599 states and 413907 transitions. [2019-12-28 04:23:44,824 INFO L78 Accepts]: Start accepts. Automaton has 113599 states and 413907 transitions. Word has length 71 [2019-12-28 04:23:44,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:23:44,825 INFO L462 AbstractCegarLoop]: Abstraction has 113599 states and 413907 transitions. [2019-12-28 04:23:44,825 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:23:44,825 INFO L276 IsEmpty]: Start isEmpty. Operand 113599 states and 413907 transitions. [2019-12-28 04:23:44,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-28 04:23:44,858 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:23:44,858 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:23:44,858 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:23:44,858 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:23:44,859 INFO L82 PathProgramCache]: Analyzing trace with hash -1400992207, now seen corresponding path program 1 times [2019-12-28 04:23:44,859 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:23:44,859 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626020223] [2019-12-28 04:23:44,859 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:23:44,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:23:44,969 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:23:44,970 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1626020223] [2019-12-28 04:23:44,970 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:23:44,970 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 04:23:44,971 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [508095424] [2019-12-28 04:23:44,971 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:23:44,979 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:23:44,990 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 78 states and 83 transitions. [2019-12-28 04:23:44,990 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:23:44,991 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:23:44,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 04:23:44,991 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:23:44,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 04:23:44,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:23:44,992 INFO L87 Difference]: Start difference. First operand 113599 states and 413907 transitions. Second operand 7 states. [2019-12-28 04:23:47,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:23:47,846 INFO L93 Difference]: Finished difference Result 162865 states and 574462 transitions. [2019-12-28 04:23:47,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-28 04:23:47,846 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 71 [2019-12-28 04:23:47,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:23:48,261 INFO L225 Difference]: With dead ends: 162865 [2019-12-28 04:23:48,261 INFO L226 Difference]: Without dead ends: 162865 [2019-12-28 04:23:48,261 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2019-12-28 04:23:48,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162865 states. [2019-12-28 04:23:51,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162865 to 139510. [2019-12-28 04:23:51,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139510 states. [2019-12-28 04:23:51,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139510 states to 139510 states and 498566 transitions. [2019-12-28 04:23:51,831 INFO L78 Accepts]: Start accepts. Automaton has 139510 states and 498566 transitions. Word has length 71 [2019-12-28 04:23:51,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:23:51,832 INFO L462 AbstractCegarLoop]: Abstraction has 139510 states and 498566 transitions. [2019-12-28 04:23:51,832 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 04:23:51,832 INFO L276 IsEmpty]: Start isEmpty. Operand 139510 states and 498566 transitions. [2019-12-28 04:23:51,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-28 04:23:51,868 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:23:51,868 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:23:51,869 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:23:51,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:23:51,869 INFO L82 PathProgramCache]: Analyzing trace with hash 1086520626, now seen corresponding path program 1 times [2019-12-28 04:23:51,870 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:23:51,870 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1227258254] [2019-12-28 04:23:51,870 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:23:51,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:23:51,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:23:51,932 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1227258254] [2019-12-28 04:23:51,932 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:23:51,932 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 04:23:51,932 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2015919295] [2019-12-28 04:23:51,933 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:23:51,941 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:23:51,954 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 78 states and 83 transitions. [2019-12-28 04:23:51,954 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:23:51,955 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:23:51,956 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 04:23:51,956 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:23:51,956 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 04:23:51,956 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:23:51,957 INFO L87 Difference]: Start difference. First operand 139510 states and 498566 transitions. Second operand 3 states. [2019-12-28 04:23:53,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:23:53,552 INFO L93 Difference]: Finished difference Result 112234 states and 398894 transitions. [2019-12-28 04:23:53,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 04:23:53,553 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 71 [2019-12-28 04:23:53,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:23:53,817 INFO L225 Difference]: With dead ends: 112234 [2019-12-28 04:23:53,817 INFO L226 Difference]: Without dead ends: 112234 [2019-12-28 04:23:53,818 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:23:54,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112234 states. [2019-12-28 04:23:56,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112234 to 111327. [2019-12-28 04:23:56,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111327 states. [2019-12-28 04:23:57,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111327 states to 111327 states and 396116 transitions. [2019-12-28 04:23:57,048 INFO L78 Accepts]: Start accepts. Automaton has 111327 states and 396116 transitions. Word has length 71 [2019-12-28 04:23:57,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:23:57,049 INFO L462 AbstractCegarLoop]: Abstraction has 111327 states and 396116 transitions. [2019-12-28 04:23:57,049 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 04:23:57,049 INFO L276 IsEmpty]: Start isEmpty. Operand 111327 states and 396116 transitions. [2019-12-28 04:23:57,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2019-12-28 04:23:57,068 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:23:57,068 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:23:57,069 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:23:57,069 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:23:57,069 INFO L82 PathProgramCache]: Analyzing trace with hash 742050989, now seen corresponding path program 1 times [2019-12-28 04:23:57,070 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:23:57,070 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2084812150] [2019-12-28 04:23:57,070 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:23:57,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:23:57,195 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:23:57,195 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2084812150] [2019-12-28 04:23:57,195 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:23:57,196 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:23:57,196 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1886241820] [2019-12-28 04:23:57,196 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:23:57,206 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:23:57,223 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 84 states and 95 transitions. [2019-12-28 04:23:57,224 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:23:57,224 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:23:57,225 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:23:57,225 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:23:57,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:23:57,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:23:57,226 INFO L87 Difference]: Start difference. First operand 111327 states and 396116 transitions. Second operand 4 states. [2019-12-28 04:23:57,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:23:57,320 INFO L93 Difference]: Finished difference Result 17103 states and 53413 transitions. [2019-12-28 04:23:57,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:23:57,321 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 71 [2019-12-28 04:23:57,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:23:57,343 INFO L225 Difference]: With dead ends: 17103 [2019-12-28 04:23:57,343 INFO L226 Difference]: Without dead ends: 14467 [2019-12-28 04:23:57,344 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:23:57,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14467 states. [2019-12-28 04:23:58,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14467 to 14415. [2019-12-28 04:23:58,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14415 states. [2019-12-28 04:23:58,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14415 states to 14415 states and 44444 transitions. [2019-12-28 04:23:58,445 INFO L78 Accepts]: Start accepts. Automaton has 14415 states and 44444 transitions. Word has length 71 [2019-12-28 04:23:58,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:23:58,445 INFO L462 AbstractCegarLoop]: Abstraction has 14415 states and 44444 transitions. [2019-12-28 04:23:58,445 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:23:58,445 INFO L276 IsEmpty]: Start isEmpty. Operand 14415 states and 44444 transitions. [2019-12-28 04:23:58,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-28 04:23:58,450 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:23:58,450 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:23:58,450 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:23:58,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:23:58,450 INFO L82 PathProgramCache]: Analyzing trace with hash -1275762068, now seen corresponding path program 1 times [2019-12-28 04:23:58,451 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:23:58,451 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1989315295] [2019-12-28 04:23:58,451 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:23:58,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:23:58,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:23:58,520 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1989315295] [2019-12-28 04:23:58,521 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:23:58,521 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:23:58,521 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [263870595] [2019-12-28 04:23:58,521 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:23:58,535 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:23:58,554 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 78 states and 77 transitions. [2019-12-28 04:23:58,554 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:23:58,555 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:23:58,555 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:23:58,555 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:23:58,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:23:58,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:23:58,556 INFO L87 Difference]: Start difference. First operand 14415 states and 44444 transitions. Second operand 4 states. [2019-12-28 04:23:58,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:23:58,782 INFO L93 Difference]: Finished difference Result 15731 states and 48360 transitions. [2019-12-28 04:23:58,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:23:58,783 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2019-12-28 04:23:58,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:23:58,815 INFO L225 Difference]: With dead ends: 15731 [2019-12-28 04:23:58,815 INFO L226 Difference]: Without dead ends: 15731 [2019-12-28 04:23:58,816 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:23:58,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15731 states. [2019-12-28 04:23:59,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15731 to 15323. [2019-12-28 04:23:59,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15323 states. [2019-12-28 04:23:59,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15323 states to 15323 states and 47102 transitions. [2019-12-28 04:23:59,045 INFO L78 Accepts]: Start accepts. Automaton has 15323 states and 47102 transitions. Word has length 77 [2019-12-28 04:23:59,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:23:59,045 INFO L462 AbstractCegarLoop]: Abstraction has 15323 states and 47102 transitions. [2019-12-28 04:23:59,045 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:23:59,045 INFO L276 IsEmpty]: Start isEmpty. Operand 15323 states and 47102 transitions. [2019-12-28 04:23:59,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-28 04:23:59,049 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:23:59,049 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:23:59,049 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:23:59,049 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:23:59,049 INFO L82 PathProgramCache]: Analyzing trace with hash 467048267, now seen corresponding path program 1 times [2019-12-28 04:23:59,050 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:23:59,050 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [411369040] [2019-12-28 04:23:59,050 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:23:59,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:23:59,191 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:23:59,192 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [411369040] [2019-12-28 04:23:59,192 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:23:59,192 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 04:23:59,193 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1315772071] [2019-12-28 04:23:59,193 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:23:59,208 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:23:59,228 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 78 states and 77 transitions. [2019-12-28 04:23:59,229 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:23:59,229 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:23:59,229 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 04:23:59,231 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:23:59,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 04:23:59,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:23:59,231 INFO L87 Difference]: Start difference. First operand 15323 states and 47102 transitions. Second operand 7 states. [2019-12-28 04:23:59,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:23:59,954 INFO L93 Difference]: Finished difference Result 19194 states and 58185 transitions. [2019-12-28 04:23:59,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-28 04:23:59,954 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 77 [2019-12-28 04:23:59,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:23:59,982 INFO L225 Difference]: With dead ends: 19194 [2019-12-28 04:23:59,983 INFO L226 Difference]: Without dead ends: 19133 [2019-12-28 04:23:59,983 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2019-12-28 04:24:00,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19133 states. [2019-12-28 04:24:00,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19133 to 17076. [2019-12-28 04:24:00,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17076 states. [2019-12-28 04:24:00,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17076 states to 17076 states and 52200 transitions. [2019-12-28 04:24:00,219 INFO L78 Accepts]: Start accepts. Automaton has 17076 states and 52200 transitions. Word has length 77 [2019-12-28 04:24:00,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:00,219 INFO L462 AbstractCegarLoop]: Abstraction has 17076 states and 52200 transitions. [2019-12-28 04:24:00,219 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 04:24:00,220 INFO L276 IsEmpty]: Start isEmpty. Operand 17076 states and 52200 transitions. [2019-12-28 04:24:00,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-28 04:24:00,226 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:00,227 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:00,227 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:00,227 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:00,227 INFO L82 PathProgramCache]: Analyzing trace with hash -1507472439, now seen corresponding path program 1 times [2019-12-28 04:24:00,228 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:00,228 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210061053] [2019-12-28 04:24:00,228 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:00,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:00,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:00,268 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210061053] [2019-12-28 04:24:00,268 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:00,268 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 04:24:00,268 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1870512055] [2019-12-28 04:24:00,268 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:00,284 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:00,309 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 84 states and 83 transitions. [2019-12-28 04:24:00,309 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:00,310 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:00,310 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 04:24:00,310 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:00,311 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 04:24:00,311 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:24:00,311 INFO L87 Difference]: Start difference. First operand 17076 states and 52200 transitions. Second operand 3 states. [2019-12-28 04:24:00,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:00,542 INFO L93 Difference]: Finished difference Result 20126 states and 60940 transitions. [2019-12-28 04:24:00,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 04:24:00,543 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-28 04:24:00,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:00,589 INFO L225 Difference]: With dead ends: 20126 [2019-12-28 04:24:00,590 INFO L226 Difference]: Without dead ends: 20126 [2019-12-28 04:24:00,590 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:24:00,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20126 states. [2019-12-28 04:24:00,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20126 to 16710. [2019-12-28 04:24:00,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16710 states. [2019-12-28 04:24:00,960 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16710 states to 16710 states and 50337 transitions. [2019-12-28 04:24:00,960 INFO L78 Accepts]: Start accepts. Automaton has 16710 states and 50337 transitions. Word has length 83 [2019-12-28 04:24:00,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:00,960 INFO L462 AbstractCegarLoop]: Abstraction has 16710 states and 50337 transitions. [2019-12-28 04:24:00,960 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 04:24:00,961 INFO L276 IsEmpty]: Start isEmpty. Operand 16710 states and 50337 transitions. [2019-12-28 04:24:00,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-12-28 04:24:00,972 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:00,972 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:00,972 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:00,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:00,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1325665965, now seen corresponding path program 1 times [2019-12-28 04:24:00,973 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:00,973 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [849786503] [2019-12-28 04:24:00,974 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:00,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:01,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:01,040 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [849786503] [2019-12-28 04:24:01,040 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:01,040 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:01,040 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2054080418] [2019-12-28 04:24:01,041 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:01,055 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:01,093 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 128 states and 169 transitions. [2019-12-28 04:24:01,093 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:01,094 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:01,094 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:01,094 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:01,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:01,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:01,095 INFO L87 Difference]: Start difference. First operand 16710 states and 50337 transitions. Second operand 4 states. [2019-12-28 04:24:01,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:01,536 INFO L93 Difference]: Finished difference Result 21983 states and 64914 transitions. [2019-12-28 04:24:01,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 04:24:01,536 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 85 [2019-12-28 04:24:01,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:01,567 INFO L225 Difference]: With dead ends: 21983 [2019-12-28 04:24:01,567 INFO L226 Difference]: Without dead ends: 21983 [2019-12-28 04:24:01,567 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:01,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21983 states. [2019-12-28 04:24:01,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21983 to 19054. [2019-12-28 04:24:01,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19054 states. [2019-12-28 04:24:01,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19054 states to 19054 states and 56728 transitions. [2019-12-28 04:24:01,830 INFO L78 Accepts]: Start accepts. Automaton has 19054 states and 56728 transitions. Word has length 85 [2019-12-28 04:24:01,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:01,830 INFO L462 AbstractCegarLoop]: Abstraction has 19054 states and 56728 transitions. [2019-12-28 04:24:01,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:01,830 INFO L276 IsEmpty]: Start isEmpty. Operand 19054 states and 56728 transitions. [2019-12-28 04:24:01,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-12-28 04:24:01,840 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:01,840 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:01,841 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:01,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:01,841 INFO L82 PathProgramCache]: Analyzing trace with hash 2018767662, now seen corresponding path program 1 times [2019-12-28 04:24:01,842 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:01,842 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [594908287] [2019-12-28 04:24:01,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:01,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:01,945 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:01,946 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [594908287] [2019-12-28 04:24:01,946 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:01,946 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:24:01,947 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [173582340] [2019-12-28 04:24:01,947 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:01,962 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:01,996 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 128 states and 169 transitions. [2019-12-28 04:24:01,997 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:01,997 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:01,998 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:24:01,998 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:01,998 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:24:01,998 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:24:01,999 INFO L87 Difference]: Start difference. First operand 19054 states and 56728 transitions. Second operand 6 states. [2019-12-28 04:24:02,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:02,775 INFO L93 Difference]: Finished difference Result 20613 states and 60276 transitions. [2019-12-28 04:24:02,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:24:02,776 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 85 [2019-12-28 04:24:02,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:02,804 INFO L225 Difference]: With dead ends: 20613 [2019-12-28 04:24:02,804 INFO L226 Difference]: Without dead ends: 20535 [2019-12-28 04:24:02,804 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:24:02,842 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20535 states. [2019-12-28 04:24:03,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20535 to 20246. [2019-12-28 04:24:03,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20246 states. [2019-12-28 04:24:03,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20246 states to 20246 states and 59400 transitions. [2019-12-28 04:24:03,195 INFO L78 Accepts]: Start accepts. Automaton has 20246 states and 59400 transitions. Word has length 85 [2019-12-28 04:24:03,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:03,195 INFO L462 AbstractCegarLoop]: Abstraction has 20246 states and 59400 transitions. [2019-12-28 04:24:03,195 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:24:03,195 INFO L276 IsEmpty]: Start isEmpty. Operand 20246 states and 59400 transitions. [2019-12-28 04:24:03,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-12-28 04:24:03,207 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:03,207 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:03,207 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:03,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:03,208 INFO L82 PathProgramCache]: Analyzing trace with hash -1925399697, now seen corresponding path program 1 times [2019-12-28 04:24:03,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:03,209 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [377434082] [2019-12-28 04:24:03,209 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:03,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:03,298 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:03,298 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [377434082] [2019-12-28 04:24:03,299 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:03,299 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:24:03,299 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1732923813] [2019-12-28 04:24:03,299 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:03,314 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:03,347 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 128 states and 169 transitions. [2019-12-28 04:24:03,347 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:03,348 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:03,348 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:24:03,348 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:03,348 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:24:03,348 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:24:03,349 INFO L87 Difference]: Start difference. First operand 20246 states and 59400 transitions. Second operand 6 states. [2019-12-28 04:24:04,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:04,070 INFO L93 Difference]: Finished difference Result 22260 states and 63798 transitions. [2019-12-28 04:24:04,071 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 04:24:04,071 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 85 [2019-12-28 04:24:04,071 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:04,100 INFO L225 Difference]: With dead ends: 22260 [2019-12-28 04:24:04,101 INFO L226 Difference]: Without dead ends: 22260 [2019-12-28 04:24:04,101 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-12-28 04:24:04,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22260 states. [2019-12-28 04:24:04,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22260 to 20787. [2019-12-28 04:24:04,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20787 states. [2019-12-28 04:24:04,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20787 states to 20787 states and 60146 transitions. [2019-12-28 04:24:04,377 INFO L78 Accepts]: Start accepts. Automaton has 20787 states and 60146 transitions. Word has length 85 [2019-12-28 04:24:04,377 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:04,377 INFO L462 AbstractCegarLoop]: Abstraction has 20787 states and 60146 transitions. [2019-12-28 04:24:04,377 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:24:04,378 INFO L276 IsEmpty]: Start isEmpty. Operand 20787 states and 60146 transitions. [2019-12-28 04:24:04,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-12-28 04:24:04,388 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:04,388 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:04,388 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:04,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:04,388 INFO L82 PathProgramCache]: Analyzing trace with hash -963785680, now seen corresponding path program 1 times [2019-12-28 04:24:04,389 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:04,389 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1826558006] [2019-12-28 04:24:04,389 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:04,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:04,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:04,453 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1826558006] [2019-12-28 04:24:04,453 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:04,454 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:24:04,454 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1505092343] [2019-12-28 04:24:04,454 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:04,468 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:04,503 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 128 states and 169 transitions. [2019-12-28 04:24:04,503 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:04,504 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:04,504 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 04:24:04,504 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:04,505 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 04:24:04,505 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:04,505 INFO L87 Difference]: Start difference. First operand 20787 states and 60146 transitions. Second operand 5 states. [2019-12-28 04:24:05,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:05,031 INFO L93 Difference]: Finished difference Result 25316 states and 72071 transitions. [2019-12-28 04:24:05,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 04:24:05,031 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 85 [2019-12-28 04:24:05,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:05,065 INFO L225 Difference]: With dead ends: 25316 [2019-12-28 04:24:05,066 INFO L226 Difference]: Without dead ends: 25316 [2019-12-28 04:24:05,066 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:24:05,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25316 states. [2019-12-28 04:24:05,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25316 to 23187. [2019-12-28 04:24:05,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23187 states. [2019-12-28 04:24:05,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23187 states to 23187 states and 65980 transitions. [2019-12-28 04:24:05,502 INFO L78 Accepts]: Start accepts. Automaton has 23187 states and 65980 transitions. Word has length 85 [2019-12-28 04:24:05,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:05,503 INFO L462 AbstractCegarLoop]: Abstraction has 23187 states and 65980 transitions. [2019-12-28 04:24:05,503 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 04:24:05,503 INFO L276 IsEmpty]: Start isEmpty. Operand 23187 states and 65980 transitions. [2019-12-28 04:24:05,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2019-12-28 04:24:05,513 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:05,513 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:05,514 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:05,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:05,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1960858033, now seen corresponding path program 1 times [2019-12-28 04:24:05,515 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:05,515 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1676857327] [2019-12-28 04:24:05,515 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:05,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:05,596 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:05,596 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1676857327] [2019-12-28 04:24:05,596 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:05,596 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:24:05,597 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1057983505] [2019-12-28 04:24:05,597 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:05,611 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:05,647 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 128 states and 169 transitions. [2019-12-28 04:24:05,647 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:05,648 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:05,648 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 04:24:05,649 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:05,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 04:24:05,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:05,649 INFO L87 Difference]: Start difference. First operand 23187 states and 65980 transitions. Second operand 5 states. [2019-12-28 04:24:05,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:05,716 INFO L93 Difference]: Finished difference Result 7617 states and 17398 transitions. [2019-12-28 04:24:05,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 04:24:05,716 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 85 [2019-12-28 04:24:05,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:05,725 INFO L225 Difference]: With dead ends: 7617 [2019-12-28 04:24:05,725 INFO L226 Difference]: Without dead ends: 6537 [2019-12-28 04:24:05,726 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:24:05,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6537 states. [2019-12-28 04:24:05,787 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6537 to 6233. [2019-12-28 04:24:05,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6233 states. [2019-12-28 04:24:05,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6233 states to 6233 states and 13747 transitions. [2019-12-28 04:24:05,796 INFO L78 Accepts]: Start accepts. Automaton has 6233 states and 13747 transitions. Word has length 85 [2019-12-28 04:24:05,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:05,796 INFO L462 AbstractCegarLoop]: Abstraction has 6233 states and 13747 transitions. [2019-12-28 04:24:05,796 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 04:24:05,796 INFO L276 IsEmpty]: Start isEmpty. Operand 6233 states and 13747 transitions. [2019-12-28 04:24:05,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-12-28 04:24:05,801 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:05,801 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:05,802 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:05,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:05,802 INFO L82 PathProgramCache]: Analyzing trace with hash 1817282181, now seen corresponding path program 1 times [2019-12-28 04:24:05,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:05,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [25338593] [2019-12-28 04:24:05,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:05,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:05,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:05,850 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [25338593] [2019-12-28 04:24:05,851 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:05,851 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:24:05,851 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1286180524] [2019-12-28 04:24:05,851 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:05,868 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:05,894 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 90 states and 89 transitions. [2019-12-28 04:24:05,894 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:05,894 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:05,894 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 04:24:05,895 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:05,895 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 04:24:05,895 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:05,895 INFO L87 Difference]: Start difference. First operand 6233 states and 13747 transitions. Second operand 5 states. [2019-12-28 04:24:06,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:06,100 INFO L93 Difference]: Finished difference Result 7485 states and 16557 transitions. [2019-12-28 04:24:06,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 04:24:06,101 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 89 [2019-12-28 04:24:06,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:06,111 INFO L225 Difference]: With dead ends: 7485 [2019-12-28 04:24:06,111 INFO L226 Difference]: Without dead ends: 7485 [2019-12-28 04:24:06,112 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-28 04:24:06,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7485 states. [2019-12-28 04:24:06,183 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7485 to 6666. [2019-12-28 04:24:06,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6666 states. [2019-12-28 04:24:06,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6666 states to 6666 states and 14704 transitions. [2019-12-28 04:24:06,192 INFO L78 Accepts]: Start accepts. Automaton has 6666 states and 14704 transitions. Word has length 89 [2019-12-28 04:24:06,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:06,192 INFO L462 AbstractCegarLoop]: Abstraction has 6666 states and 14704 transitions. [2019-12-28 04:24:06,192 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 04:24:06,192 INFO L276 IsEmpty]: Start isEmpty. Operand 6666 states and 14704 transitions. [2019-12-28 04:24:06,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-12-28 04:24:06,198 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:06,198 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:06,198 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:06,199 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:06,199 INFO L82 PathProgramCache]: Analyzing trace with hash -734874780, now seen corresponding path program 1 times [2019-12-28 04:24:06,199 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:06,200 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1848531053] [2019-12-28 04:24:06,200 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:06,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:06,301 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:06,302 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1848531053] [2019-12-28 04:24:06,302 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:06,302 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:24:06,302 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1020743898] [2019-12-28 04:24:06,302 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:06,319 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:06,341 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 90 states and 89 transitions. [2019-12-28 04:24:06,341 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:06,341 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:06,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:24:06,342 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:06,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:24:06,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:24:06,342 INFO L87 Difference]: Start difference. First operand 6666 states and 14704 transitions. Second operand 6 states. [2019-12-28 04:24:07,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:07,044 INFO L93 Difference]: Finished difference Result 8764 states and 19335 transitions. [2019-12-28 04:24:07,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 04:24:07,044 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 89 [2019-12-28 04:24:07,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:07,055 INFO L225 Difference]: With dead ends: 8764 [2019-12-28 04:24:07,055 INFO L226 Difference]: Without dead ends: 8711 [2019-12-28 04:24:07,056 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-28 04:24:07,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8711 states. [2019-12-28 04:24:07,128 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8711 to 7088. [2019-12-28 04:24:07,129 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7088 states. [2019-12-28 04:24:07,138 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7088 states to 7088 states and 15584 transitions. [2019-12-28 04:24:07,138 INFO L78 Accepts]: Start accepts. Automaton has 7088 states and 15584 transitions. Word has length 89 [2019-12-28 04:24:07,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:07,138 INFO L462 AbstractCegarLoop]: Abstraction has 7088 states and 15584 transitions. [2019-12-28 04:24:07,138 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:24:07,138 INFO L276 IsEmpty]: Start isEmpty. Operand 7088 states and 15584 transitions. [2019-12-28 04:24:07,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-12-28 04:24:07,145 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:07,145 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:07,145 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:07,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:07,145 INFO L82 PathProgramCache]: Analyzing trace with hash 728546740, now seen corresponding path program 1 times [2019-12-28 04:24:07,146 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:07,146 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223439788] [2019-12-28 04:24:07,146 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:07,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:07,222 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:07,223 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1223439788] [2019-12-28 04:24:07,223 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:07,223 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:07,223 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1941621325] [2019-12-28 04:24:07,223 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:07,257 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:07,433 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 156 states and 198 transitions. [2019-12-28 04:24:07,433 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:07,444 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 04:24:07,444 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:07,444 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:07,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:07,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:07,445 INFO L87 Difference]: Start difference. First operand 7088 states and 15584 transitions. Second operand 4 states. [2019-12-28 04:24:07,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:07,597 INFO L93 Difference]: Finished difference Result 8014 states and 17518 transitions. [2019-12-28 04:24:07,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 04:24:07,597 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 112 [2019-12-28 04:24:07,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:07,625 INFO L225 Difference]: With dead ends: 8014 [2019-12-28 04:24:07,625 INFO L226 Difference]: Without dead ends: 8014 [2019-12-28 04:24:07,625 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:07,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8014 states. [2019-12-28 04:24:07,808 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8014 to 7317. [2019-12-28 04:24:07,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7317 states. [2019-12-28 04:24:07,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7317 states to 7317 states and 16054 transitions. [2019-12-28 04:24:07,822 INFO L78 Accepts]: Start accepts. Automaton has 7317 states and 16054 transitions. Word has length 112 [2019-12-28 04:24:07,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:07,823 INFO L462 AbstractCegarLoop]: Abstraction has 7317 states and 16054 transitions. [2019-12-28 04:24:07,823 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:07,823 INFO L276 IsEmpty]: Start isEmpty. Operand 7317 states and 16054 transitions. [2019-12-28 04:24:07,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-12-28 04:24:07,838 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:07,838 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:07,838 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:07,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:07,839 INFO L82 PathProgramCache]: Analyzing trace with hash -525440785, now seen corresponding path program 1 times [2019-12-28 04:24:07,840 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:07,840 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [102563859] [2019-12-28 04:24:07,840 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:07,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:07,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:07,945 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [102563859] [2019-12-28 04:24:07,945 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:07,945 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:24:07,945 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1288356098] [2019-12-28 04:24:07,945 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:08,008 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:08,205 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 227 states and 338 transitions. [2019-12-28 04:24:08,206 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:08,210 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 04:24:08,210 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:24:08,210 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:08,211 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:24:08,211 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:24:08,211 INFO L87 Difference]: Start difference. First operand 7317 states and 16054 transitions. Second operand 6 states. [2019-12-28 04:24:08,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:08,762 INFO L93 Difference]: Finished difference Result 8501 states and 18635 transitions. [2019-12-28 04:24:08,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-28 04:24:08,763 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 114 [2019-12-28 04:24:08,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:08,777 INFO L225 Difference]: With dead ends: 8501 [2019-12-28 04:24:08,777 INFO L226 Difference]: Without dead ends: 8501 [2019-12-28 04:24:08,778 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-28 04:24:08,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8501 states. [2019-12-28 04:24:08,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8501 to 7401. [2019-12-28 04:24:08,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7401 states. [2019-12-28 04:24:08,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7401 states to 7401 states and 16257 transitions. [2019-12-28 04:24:08,908 INFO L78 Accepts]: Start accepts. Automaton has 7401 states and 16257 transitions. Word has length 114 [2019-12-28 04:24:08,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:08,908 INFO L462 AbstractCegarLoop]: Abstraction has 7401 states and 16257 transitions. [2019-12-28 04:24:08,908 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:24:08,908 INFO L276 IsEmpty]: Start isEmpty. Operand 7401 states and 16257 transitions. [2019-12-28 04:24:08,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-12-28 04:24:08,918 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:08,919 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:08,919 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:08,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:08,919 INFO L82 PathProgramCache]: Analyzing trace with hash 1759422670, now seen corresponding path program 1 times [2019-12-28 04:24:08,920 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:08,920 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1770193818] [2019-12-28 04:24:08,920 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:08,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:08,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:08,998 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1770193818] [2019-12-28 04:24:08,998 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:08,998 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:08,999 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [357741934] [2019-12-28 04:24:08,999 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:09,036 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:09,315 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 227 states and 338 transitions. [2019-12-28 04:24:09,315 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:09,318 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 04:24:09,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:09,319 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:09,319 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:09,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:09,321 INFO L87 Difference]: Start difference. First operand 7401 states and 16257 transitions. Second operand 4 states. [2019-12-28 04:24:09,469 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:09,470 INFO L93 Difference]: Finished difference Result 7852 states and 17277 transitions. [2019-12-28 04:24:09,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 04:24:09,470 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 114 [2019-12-28 04:24:09,470 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:09,481 INFO L225 Difference]: With dead ends: 7852 [2019-12-28 04:24:09,481 INFO L226 Difference]: Without dead ends: 7852 [2019-12-28 04:24:09,482 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:09,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7852 states. [2019-12-28 04:24:09,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7852 to 7492. [2019-12-28 04:24:09,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7492 states. [2019-12-28 04:24:09,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7492 states to 7492 states and 16452 transitions. [2019-12-28 04:24:09,616 INFO L78 Accepts]: Start accepts. Automaton has 7492 states and 16452 transitions. Word has length 114 [2019-12-28 04:24:09,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:09,616 INFO L462 AbstractCegarLoop]: Abstraction has 7492 states and 16452 transitions. [2019-12-28 04:24:09,617 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:09,617 INFO L276 IsEmpty]: Start isEmpty. Operand 7492 states and 16452 transitions. [2019-12-28 04:24:09,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-12-28 04:24:09,628 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:09,628 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:09,629 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:09,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:09,629 INFO L82 PathProgramCache]: Analyzing trace with hash 762350317, now seen corresponding path program 1 times [2019-12-28 04:24:09,630 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:09,635 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1336100126] [2019-12-28 04:24:09,636 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:09,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:09,726 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:09,731 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1336100126] [2019-12-28 04:24:09,731 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:09,731 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:09,732 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1671467451] [2019-12-28 04:24:09,732 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:09,767 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:09,963 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 227 states and 338 transitions. [2019-12-28 04:24:09,964 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:09,966 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:09,966 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:09,969 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:09,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:09,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:09,969 INFO L87 Difference]: Start difference. First operand 7492 states and 16452 transitions. Second operand 4 states. [2019-12-28 04:24:10,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:10,210 INFO L93 Difference]: Finished difference Result 7573 states and 16641 transitions. [2019-12-28 04:24:10,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:24:10,210 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 114 [2019-12-28 04:24:10,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:10,220 INFO L225 Difference]: With dead ends: 7573 [2019-12-28 04:24:10,220 INFO L226 Difference]: Without dead ends: 7555 [2019-12-28 04:24:10,220 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:10,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7555 states. [2019-12-28 04:24:10,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7555 to 7537. [2019-12-28 04:24:10,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7537 states. [2019-12-28 04:24:10,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7537 states to 7537 states and 16557 transitions. [2019-12-28 04:24:10,323 INFO L78 Accepts]: Start accepts. Automaton has 7537 states and 16557 transitions. Word has length 114 [2019-12-28 04:24:10,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:10,324 INFO L462 AbstractCegarLoop]: Abstraction has 7537 states and 16557 transitions. [2019-12-28 04:24:10,324 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:10,324 INFO L276 IsEmpty]: Start isEmpty. Operand 7537 states and 16557 transitions. [2019-12-28 04:24:10,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-12-28 04:24:10,334 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:10,335 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:10,335 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:10,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:10,335 INFO L82 PathProgramCache]: Analyzing trace with hash 468947310, now seen corresponding path program 1 times [2019-12-28 04:24:10,337 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:10,337 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1270633496] [2019-12-28 04:24:10,338 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:10,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:10,599 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:10,599 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1270633496] [2019-12-28 04:24:10,600 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:10,600 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-28 04:24:10,600 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1443651989] [2019-12-28 04:24:10,600 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:10,667 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:11,018 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 227 states and 338 transitions. [2019-12-28 04:24:11,019 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:11,025 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 04:24:11,025 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-28 04:24:11,025 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:11,026 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-28 04:24:11,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-28 04:24:11,027 INFO L87 Difference]: Start difference. First operand 7537 states and 16557 transitions. Second operand 11 states. [2019-12-28 04:24:13,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:13,403 INFO L93 Difference]: Finished difference Result 16913 states and 37189 transitions. [2019-12-28 04:24:13,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-28 04:24:13,403 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 114 [2019-12-28 04:24:13,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:13,426 INFO L225 Difference]: With dead ends: 16913 [2019-12-28 04:24:13,426 INFO L226 Difference]: Without dead ends: 16881 [2019-12-28 04:24:13,429 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=172, Invalid=478, Unknown=0, NotChecked=0, Total=650 [2019-12-28 04:24:13,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16881 states. [2019-12-28 04:24:13,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16881 to 11134. [2019-12-28 04:24:13,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11134 states. [2019-12-28 04:24:13,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11134 states to 11134 states and 24849 transitions. [2019-12-28 04:24:13,621 INFO L78 Accepts]: Start accepts. Automaton has 11134 states and 24849 transitions. Word has length 114 [2019-12-28 04:24:13,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:13,621 INFO L462 AbstractCegarLoop]: Abstraction has 11134 states and 24849 transitions. [2019-12-28 04:24:13,621 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-28 04:24:13,621 INFO L276 IsEmpty]: Start isEmpty. Operand 11134 states and 24849 transitions. [2019-12-28 04:24:13,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-12-28 04:24:13,636 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:13,636 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:13,636 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:13,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:13,637 INFO L82 PathProgramCache]: Analyzing trace with hash -1338507153, now seen corresponding path program 1 times [2019-12-28 04:24:13,638 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:13,638 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [143050192] [2019-12-28 04:24:13,638 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:13,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:13,711 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:13,711 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [143050192] [2019-12-28 04:24:13,711 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:13,712 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:13,712 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1729251402] [2019-12-28 04:24:13,712 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:13,736 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:13,952 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 227 states and 338 transitions. [2019-12-28 04:24:13,952 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:13,956 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 3 times. [2019-12-28 04:24:13,956 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:13,956 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:13,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:13,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:13,957 INFO L87 Difference]: Start difference. First operand 11134 states and 24849 transitions. Second operand 4 states. [2019-12-28 04:24:14,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:14,430 INFO L93 Difference]: Finished difference Result 11887 states and 26270 transitions. [2019-12-28 04:24:14,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:24:14,430 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 114 [2019-12-28 04:24:14,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:14,449 INFO L225 Difference]: With dead ends: 11887 [2019-12-28 04:24:14,450 INFO L226 Difference]: Without dead ends: 11827 [2019-12-28 04:24:14,450 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:14,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11827 states. [2019-12-28 04:24:14,730 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11827 to 10926. [2019-12-28 04:24:14,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10926 states. [2019-12-28 04:24:14,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10926 states to 10926 states and 24186 transitions. [2019-12-28 04:24:14,751 INFO L78 Accepts]: Start accepts. Automaton has 10926 states and 24186 transitions. Word has length 114 [2019-12-28 04:24:14,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:14,752 INFO L462 AbstractCegarLoop]: Abstraction has 10926 states and 24186 transitions. [2019-12-28 04:24:14,752 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:14,752 INFO L276 IsEmpty]: Start isEmpty. Operand 10926 states and 24186 transitions. [2019-12-28 04:24:14,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-12-28 04:24:14,765 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:14,765 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:14,766 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:14,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:14,766 INFO L82 PathProgramCache]: Analyzing trace with hash -376893136, now seen corresponding path program 1 times [2019-12-28 04:24:14,767 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:14,767 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1836807624] [2019-12-28 04:24:14,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:14,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:14,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:14,825 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1836807624] [2019-12-28 04:24:14,826 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:14,826 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 04:24:14,826 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [442081418] [2019-12-28 04:24:14,826 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:14,866 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:15,059 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 227 states and 338 transitions. [2019-12-28 04:24:15,059 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:15,062 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 04:24:15,064 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 04:24:15,064 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:15,065 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 04:24:15,065 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:24:15,065 INFO L87 Difference]: Start difference. First operand 10926 states and 24186 transitions. Second operand 3 states. [2019-12-28 04:24:15,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:15,099 INFO L93 Difference]: Finished difference Result 10926 states and 24177 transitions. [2019-12-28 04:24:15,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 04:24:15,100 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 114 [2019-12-28 04:24:15,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:15,114 INFO L225 Difference]: With dead ends: 10926 [2019-12-28 04:24:15,114 INFO L226 Difference]: Without dead ends: 10926 [2019-12-28 04:24:15,114 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:24:15,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10926 states. [2019-12-28 04:24:15,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10926 to 10926. [2019-12-28 04:24:15,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10926 states. [2019-12-28 04:24:15,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10926 states to 10926 states and 24177 transitions. [2019-12-28 04:24:15,235 INFO L78 Accepts]: Start accepts. Automaton has 10926 states and 24177 transitions. Word has length 114 [2019-12-28 04:24:15,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:15,236 INFO L462 AbstractCegarLoop]: Abstraction has 10926 states and 24177 transitions. [2019-12-28 04:24:15,236 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 04:24:15,236 INFO L276 IsEmpty]: Start isEmpty. Operand 10926 states and 24177 transitions. [2019-12-28 04:24:15,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2019-12-28 04:24:15,246 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:15,246 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:15,246 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:15,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:15,246 INFO L82 PathProgramCache]: Analyzing trace with hash 708933766, now seen corresponding path program 1 times [2019-12-28 04:24:15,247 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:15,247 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1431383764] [2019-12-28 04:24:15,247 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:15,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:15,367 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:15,367 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1431383764] [2019-12-28 04:24:15,367 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:15,368 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 04:24:15,368 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [474884032] [2019-12-28 04:24:15,368 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:15,398 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:15,568 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 229 states and 340 transitions. [2019-12-28 04:24:15,568 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:15,571 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 04:24:15,571 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 04:24:15,571 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:15,572 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 04:24:15,572 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:24:15,572 INFO L87 Difference]: Start difference. First operand 10926 states and 24177 transitions. Second operand 7 states. [2019-12-28 04:24:15,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:15,792 INFO L93 Difference]: Finished difference Result 11450 states and 25196 transitions. [2019-12-28 04:24:15,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 04:24:15,793 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 116 [2019-12-28 04:24:15,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:15,803 INFO L225 Difference]: With dead ends: 11450 [2019-12-28 04:24:15,804 INFO L226 Difference]: Without dead ends: 11450 [2019-12-28 04:24:15,804 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 8 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-12-28 04:24:15,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11450 states. [2019-12-28 04:24:15,900 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11450 to 10338. [2019-12-28 04:24:15,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10338 states. [2019-12-28 04:24:15,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10338 states to 10338 states and 22764 transitions. [2019-12-28 04:24:15,913 INFO L78 Accepts]: Start accepts. Automaton has 10338 states and 22764 transitions. Word has length 116 [2019-12-28 04:24:15,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:15,914 INFO L462 AbstractCegarLoop]: Abstraction has 10338 states and 22764 transitions. [2019-12-28 04:24:15,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 04:24:15,914 INFO L276 IsEmpty]: Start isEmpty. Operand 10338 states and 22764 transitions. [2019-12-28 04:24:15,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2019-12-28 04:24:15,961 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:15,961 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:15,961 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:15,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:15,961 INFO L82 PathProgramCache]: Analyzing trace with hash -1368275577, now seen corresponding path program 1 times [2019-12-28 04:24:15,962 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:15,962 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [327549468] [2019-12-28 04:24:15,962 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:15,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:16,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:16,093 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [327549468] [2019-12-28 04:24:16,093 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:16,093 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 04:24:16,094 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1427678541] [2019-12-28 04:24:16,094 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:16,119 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:16,281 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 229 states and 340 transitions. [2019-12-28 04:24:16,281 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:16,502 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-28 04:24:16,546 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 13 times. [2019-12-28 04:24:16,546 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-28 04:24:16,546 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:16,547 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-28 04:24:16,547 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=194, Unknown=0, NotChecked=0, Total=240 [2019-12-28 04:24:16,547 INFO L87 Difference]: Start difference. First operand 10338 states and 22764 transitions. Second operand 16 states. [2019-12-28 04:24:17,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:17,837 INFO L93 Difference]: Finished difference Result 13583 states and 30036 transitions. [2019-12-28 04:24:17,838 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-28 04:24:17,838 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 116 [2019-12-28 04:24:17,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:17,842 INFO L225 Difference]: With dead ends: 13583 [2019-12-28 04:24:17,843 INFO L226 Difference]: Without dead ends: 2750 [2019-12-28 04:24:17,843 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=141, Invalid=459, Unknown=0, NotChecked=0, Total=600 [2019-12-28 04:24:17,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2750 states. [2019-12-28 04:24:17,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2750 to 1831. [2019-12-28 04:24:17,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1831 states. [2019-12-28 04:24:17,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1831 states to 1831 states and 4071 transitions. [2019-12-28 04:24:17,865 INFO L78 Accepts]: Start accepts. Automaton has 1831 states and 4071 transitions. Word has length 116 [2019-12-28 04:24:17,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:17,865 INFO L462 AbstractCegarLoop]: Abstraction has 1831 states and 4071 transitions. [2019-12-28 04:24:17,865 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-28 04:24:17,865 INFO L276 IsEmpty]: Start isEmpty. Operand 1831 states and 4071 transitions. [2019-12-28 04:24:17,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2019-12-28 04:24:17,867 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:17,867 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:17,867 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:17,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:17,867 INFO L82 PathProgramCache]: Analyzing trace with hash -1838173592, now seen corresponding path program 1 times [2019-12-28 04:24:17,868 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:17,868 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [931489713] [2019-12-28 04:24:17,868 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:17,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:17,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:17,991 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [931489713] [2019-12-28 04:24:17,992 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:17,992 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:24:17,992 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [187747002] [2019-12-28 04:24:17,992 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:18,018 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:18,113 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 145 states and 172 transitions. [2019-12-28 04:24:18,113 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:18,114 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:18,114 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:24:18,114 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:18,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:24:18,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:24:18,115 INFO L87 Difference]: Start difference. First operand 1831 states and 4071 transitions. Second operand 6 states. [2019-12-28 04:24:18,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:18,214 INFO L93 Difference]: Finished difference Result 2057 states and 4498 transitions. [2019-12-28 04:24:18,215 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 04:24:18,215 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 116 [2019-12-28 04:24:18,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:18,217 INFO L225 Difference]: With dead ends: 2057 [2019-12-28 04:24:18,217 INFO L226 Difference]: Without dead ends: 2023 [2019-12-28 04:24:18,217 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:24:18,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2023 states. [2019-12-28 04:24:18,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2023 to 1890. [2019-12-28 04:24:18,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1890 states. [2019-12-28 04:24:18,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1890 states to 1890 states and 4121 transitions. [2019-12-28 04:24:18,235 INFO L78 Accepts]: Start accepts. Automaton has 1890 states and 4121 transitions. Word has length 116 [2019-12-28 04:24:18,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:18,235 INFO L462 AbstractCegarLoop]: Abstraction has 1890 states and 4121 transitions. [2019-12-28 04:24:18,235 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:24:18,235 INFO L276 IsEmpty]: Start isEmpty. Operand 1890 states and 4121 transitions. [2019-12-28 04:24:18,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2019-12-28 04:24:18,237 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:18,237 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:18,237 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:18,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:18,238 INFO L82 PathProgramCache]: Analyzing trace with hash -1778829786, now seen corresponding path program 1 times [2019-12-28 04:24:18,238 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:18,238 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [288940290] [2019-12-28 04:24:18,238 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:18,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:18,307 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:18,308 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [288940290] [2019-12-28 04:24:18,308 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:18,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:24:18,308 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1611994057] [2019-12-28 04:24:18,309 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:18,344 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:18,508 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 127 states and 136 transitions. [2019-12-28 04:24:18,509 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:18,509 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:18,510 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 04:24:18,510 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:18,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 04:24:18,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:18,510 INFO L87 Difference]: Start difference. First operand 1890 states and 4121 transitions. Second operand 5 states. [2019-12-28 04:24:18,696 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:18,696 INFO L93 Difference]: Finished difference Result 2504 states and 5398 transitions. [2019-12-28 04:24:18,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:24:18,697 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 116 [2019-12-28 04:24:18,697 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:18,703 INFO L225 Difference]: With dead ends: 2504 [2019-12-28 04:24:18,703 INFO L226 Difference]: Without dead ends: 2436 [2019-12-28 04:24:18,706 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:24:18,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2436 states. [2019-12-28 04:24:18,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2436 to 1945. [2019-12-28 04:24:18,731 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1945 states. [2019-12-28 04:24:18,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1945 states to 1945 states and 4223 transitions. [2019-12-28 04:24:18,735 INFO L78 Accepts]: Start accepts. Automaton has 1945 states and 4223 transitions. Word has length 116 [2019-12-28 04:24:18,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:18,736 INFO L462 AbstractCegarLoop]: Abstraction has 1945 states and 4223 transitions. [2019-12-28 04:24:18,736 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 04:24:18,736 INFO L276 IsEmpty]: Start isEmpty. Operand 1945 states and 4223 transitions. [2019-12-28 04:24:18,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2019-12-28 04:24:18,738 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:18,739 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:18,739 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:18,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:18,739 INFO L82 PathProgramCache]: Analyzing trace with hash 683260520, now seen corresponding path program 2 times [2019-12-28 04:24:18,740 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:18,740 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950228539] [2019-12-28 04:24:18,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:18,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:18,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:18,839 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1950228539] [2019-12-28 04:24:18,839 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:18,840 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:24:18,840 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [740839698] [2019-12-28 04:24:18,840 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:18,865 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:18,987 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 127 states and 136 transitions. [2019-12-28 04:24:18,987 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:18,988 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:18,988 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:24:18,988 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:18,988 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:24:18,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:24:18,989 INFO L87 Difference]: Start difference. First operand 1945 states and 4223 transitions. Second operand 6 states. [2019-12-28 04:24:19,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:19,177 INFO L93 Difference]: Finished difference Result 2058 states and 4451 transitions. [2019-12-28 04:24:19,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:24:19,177 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 116 [2019-12-28 04:24:19,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:19,181 INFO L225 Difference]: With dead ends: 2058 [2019-12-28 04:24:19,181 INFO L226 Difference]: Without dead ends: 2058 [2019-12-28 04:24:19,182 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:24:19,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2058 states. [2019-12-28 04:24:19,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2058 to 1906. [2019-12-28 04:24:19,213 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1906 states. [2019-12-28 04:24:19,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1906 states to 1906 states and 4137 transitions. [2019-12-28 04:24:19,218 INFO L78 Accepts]: Start accepts. Automaton has 1906 states and 4137 transitions. Word has length 116 [2019-12-28 04:24:19,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:19,219 INFO L462 AbstractCegarLoop]: Abstraction has 1906 states and 4137 transitions. [2019-12-28 04:24:19,219 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:24:19,219 INFO L276 IsEmpty]: Start isEmpty. Operand 1906 states and 4137 transitions. [2019-12-28 04:24:19,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2019-12-28 04:24:19,223 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:19,223 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:19,223 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:19,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:19,224 INFO L82 PathProgramCache]: Analyzing trace with hash 521133417, now seen corresponding path program 2 times [2019-12-28 04:24:19,225 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:19,225 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [303375931] [2019-12-28 04:24:19,226 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:19,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 04:24:19,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 04:24:19,368 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-28 04:24:19,368 INFO L476 BasicCegarLoop]: Counterexample might be feasible [2019-12-28 04:24:19,644 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.12 04:24:19 BasicIcfg [2019-12-28 04:24:19,644 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-28 04:24:19,647 INFO L168 Benchmark]: Toolchain (without parser) took 88285.23 ms. Allocated memory was 137.9 MB in the beginning and 3.3 GB in the end (delta: 3.2 GB). Free memory was 101.1 MB in the beginning and 1.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 1.7 GB. Max. memory is 7.1 GB. [2019-12-28 04:24:19,648 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 137.9 MB. Free memory was 121.1 MB in the beginning and 120.9 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. [2019-12-28 04:24:19,648 INFO L168 Benchmark]: CACSL2BoogieTranslator took 847.62 ms. Allocated memory was 137.9 MB in the beginning and 201.9 MB in the end (delta: 64.0 MB). Free memory was 100.7 MB in the beginning and 154.3 MB in the end (delta: -53.6 MB). Peak memory consumption was 26.1 MB. Max. memory is 7.1 GB. [2019-12-28 04:24:19,649 INFO L168 Benchmark]: Boogie Procedure Inliner took 63.49 ms. Allocated memory is still 201.9 MB. Free memory was 154.3 MB in the beginning and 151.6 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. [2019-12-28 04:24:19,649 INFO L168 Benchmark]: Boogie Preprocessor took 77.95 ms. Allocated memory is still 201.9 MB. Free memory was 151.6 MB in the beginning and 149.0 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. [2019-12-28 04:24:19,649 INFO L168 Benchmark]: RCFGBuilder took 1186.35 ms. Allocated memory is still 201.9 MB. Free memory was 149.0 MB in the beginning and 89.3 MB in the end (delta: 59.7 MB). Peak memory consumption was 59.7 MB. Max. memory is 7.1 GB. [2019-12-28 04:24:19,650 INFO L168 Benchmark]: TraceAbstraction took 86101.87 ms. Allocated memory was 201.9 MB in the beginning and 3.3 GB in the end (delta: 3.1 GB). Free memory was 89.3 MB in the beginning and 1.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 1.6 GB. Max. memory is 7.1 GB. [2019-12-28 04:24:19,652 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 137.9 MB. Free memory was 121.1 MB in the beginning and 120.9 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 847.62 ms. Allocated memory was 137.9 MB in the beginning and 201.9 MB in the end (delta: 64.0 MB). Free memory was 100.7 MB in the beginning and 154.3 MB in the end (delta: -53.6 MB). Peak memory consumption was 26.1 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 63.49 ms. Allocated memory is still 201.9 MB. Free memory was 154.3 MB in the beginning and 151.6 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 77.95 ms. Allocated memory is still 201.9 MB. Free memory was 151.6 MB in the beginning and 149.0 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. * RCFGBuilder took 1186.35 ms. Allocated memory is still 201.9 MB. Free memory was 149.0 MB in the beginning and 89.3 MB in the end (delta: 59.7 MB). Peak memory consumption was 59.7 MB. Max. memory is 7.1 GB. * TraceAbstraction took 86101.87 ms. Allocated memory was 201.9 MB in the beginning and 3.3 GB in the end (delta: 3.1 GB). Free memory was 89.3 MB in the beginning and 1.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 1.6 GB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L696] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L698] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0] [L699] 0 _Bool __unbuffered_p1_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0] [L700] 0 int __unbuffered_p1_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0] [L701] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0] [L702] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0] [L703] 0 _Bool __unbuffered_p1_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0] [L704] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0] [L705] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0] [L706] 0 _Bool __unbuffered_p1_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0] [L707] 0 _Bool __unbuffered_p1_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0] [L708] 0 int *__unbuffered_p1_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}] [L709] 0 int __unbuffered_p1_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0] [L710] 0 _Bool __unbuffered_p1_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0] [L711] 0 int __unbuffered_p1_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0] [L712] 0 _Bool __unbuffered_p1_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0] [L713] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0] [L714] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0] [L716] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}] [L717] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0] [L718] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0] [L719] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L720] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L721] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L722] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L723] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L724] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L725] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L726] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L727] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L728] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L729] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L730] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L732] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L733] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L734] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L735] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L811] 0 pthread_t t1923; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L812] FCALL, FORK 0 pthread_create(&t1923, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L813] 0 pthread_t t1924; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L814] FCALL, FORK 0 pthread_create(&t1924, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L767] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L768] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L769] 2 x$flush_delayed = weak$$choice2 [L770] EXPR 2 \read(x) [L770] 2 x$mem_tmp = x [L771] 2 weak$$choice1 = __VERIFIER_nondet_bool() [L772] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L772] EXPR 2 \read(x) [L772] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) VAL [!x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))))=0, \read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L772] 2 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L773] EXPR 2 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0))))=0, x={3:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L773] 2 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L774] EXPR 2 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1))))=0, x={3:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L774] 2 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L775] EXPR 2 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0))))=0, x={3:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L775] 2 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L776] EXPR 2 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={3:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L776] 2 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L777] EXPR 2 weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={3:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L777] 2 x$r_buff0_thd2 = weak$$choice2 ? x$r_buff0_thd2 : (!x$w_buff0_used ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$r_buff0_thd2 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L778] EXPR 2 weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={3:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L778] 2 x$r_buff1_thd2 = weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L779] 2 __unbuffered_p1_EAX$read_delayed = (_Bool)1 [L780] 2 __unbuffered_p1_EAX$read_delayed_var = &x [L781] EXPR 2 \read(x) [L781] 2 __unbuffered_p1_EAX = x [L782] EXPR 2 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=1, x$flush_delayed ? x$mem_tmp : x=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L782] 2 x = x$flush_delayed ? x$mem_tmp : x [L783] 2 x$flush_delayed = (_Bool)0 [L786] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L739] 1 __unbuffered_p0_EAX = y [L742] 1 x$w_buff1 = x$w_buff0 [L743] 1 x$w_buff0 = 1 [L744] 1 x$w_buff1_used = x$w_buff0_used [L745] 1 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L747] 1 x$r_buff1_thd0 = x$r_buff0_thd0 [L748] 1 x$r_buff1_thd1 = x$r_buff0_thd1 [L749] 1 x$r_buff1_thd2 = x$r_buff0_thd2 [L750] 1 x$r_buff0_thd1 = (_Bool)1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L753] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L753] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L754] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L754] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L755] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L755] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L756] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L756] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L757] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L757] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L760] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x [L789] EXPR 2 \read(x) [L789] EXPR 2 x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x VAL [\read(x)=1, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=1, y=1] [L789] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\read(x)=1, __unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x)=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x=1, y=1] [L789] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L790] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L790] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L791] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L791] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L792] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L792] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L793] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L793] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L796] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L816] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L820] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L820] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x [L820] EXPR 0 \read(x) [L820] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L820] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L820] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L821] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L821] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L822] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L822] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L823] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L823] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L824] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=2, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L824] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L827] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L828] EXPR 0 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L828] EXPR 0 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX [L828] EXPR 0 \read(*__unbuffered_p1_EAX$read_delayed_var) [L828] EXPR 0 weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L828] EXPR 0 __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L828] 0 __unbuffered_p1_EAX = __unbuffered_p1_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p1_EAX$read_delayed_var : __unbuffered_p1_EAX) : __unbuffered_p1_EAX [L829] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=1, __unbuffered_p1_EAX=1, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={3:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=1, weak$$choice2=1, x={3:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 199 locations, 2 error locations. Result: UNSAFE, OverallTime: 85.6s, OverallIterations: 32, TraceHistogramMax: 1, AutomataDifference: 30.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10398 SDtfs, 11880 SDslu, 22435 SDs, 0 SdLazy, 9735 SolverSat, 781 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 12.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 329 GetRequests, 102 SyntacticMatches, 16 SemanticMatches, 211 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 350 ImplicationChecksByTransitivity, 2.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=139510occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 41.9s AutomataMinimizationTime, 31 MinimizatonAttempts, 137551 StatesRemovedByMinimization, 29 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 2925 NumberOfCodeBlocks, 2925 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 2778 ConstructedInterpolants, 0 QuantifiedInterpolants, 585318 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...