/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf -i ../../../trunk/examples/svcomp/pthread-wmm/safe007_rmo.oepc.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-4336eb1 [2019-12-28 04:23:54,921 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-28 04:23:54,924 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-28 04:23:54,943 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-28 04:23:54,943 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-28 04:23:54,945 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-28 04:23:54,947 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-28 04:23:54,957 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-28 04:23:54,958 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-28 04:23:54,959 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-28 04:23:54,960 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-28 04:23:54,961 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-28 04:23:54,961 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-28 04:23:54,962 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-28 04:23:54,963 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-28 04:23:54,964 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-28 04:23:54,965 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-28 04:23:54,966 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-28 04:23:54,967 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-28 04:23:54,969 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-28 04:23:54,971 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-28 04:23:54,971 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-28 04:23:54,972 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-28 04:23:54,973 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-28 04:23:54,975 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-12-28 04:23:54,978 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-28 04:23:54,979 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-28 04:23:54,979 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-28 04:23:54,980 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-28 04:23:54,981 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-28 04:23:54,981 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-28 04:23:54,982 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-28 04:23:54,982 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-28 04:23:54,982 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-28 04:23:54,983 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-28 04:23:54,984 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-28 04:23:54,985 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf [2019-12-28 04:23:54,999 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-28 04:23:55,000 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-28 04:23:55,001 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-28 04:23:55,001 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-28 04:23:55,001 INFO L138 SettingsManager]: * Use SBE=true [2019-12-28 04:23:55,002 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-28 04:23:55,002 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-28 04:23:55,002 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-28 04:23:55,002 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-28 04:23:55,002 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-28 04:23:55,003 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-28 04:23:55,003 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-28 04:23:55,003 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-28 04:23:55,003 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-28 04:23:55,003 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-28 04:23:55,003 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-28 04:23:55,004 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-28 04:23:55,004 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-28 04:23:55,004 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-28 04:23:55,004 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-28 04:23:55,005 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-28 04:23:55,005 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 04:23:55,005 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-28 04:23:55,005 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-28 04:23:55,005 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-28 04:23:55,006 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-28 04:23:55,006 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-28 04:23:55,006 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2019-12-28 04:23:55,006 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2019-12-28 04:23:55,006 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-28 04:23:55,007 INFO L138 SettingsManager]: * Interpolant automaton=MCR [2019-12-28 04:23:55,007 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-28 04:23:55,274 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-28 04:23:55,287 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-28 04:23:55,291 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-28 04:23:55,292 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-28 04:23:55,293 INFO L275 PluginConnector]: CDTParser initialized [2019-12-28 04:23:55,293 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/safe007_rmo.oepc.i [2019-12-28 04:23:55,376 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9b4098f15/b5296360ed324005bfcce86eb79f9da8/FLAG9173dc285 [2019-12-28 04:23:55,973 INFO L306 CDTParser]: Found 1 translation units. [2019-12-28 04:23:55,974 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe007_rmo.oepc.i [2019-12-28 04:23:55,993 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9b4098f15/b5296360ed324005bfcce86eb79f9da8/FLAG9173dc285 [2019-12-28 04:23:56,238 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9b4098f15/b5296360ed324005bfcce86eb79f9da8 [2019-12-28 04:23:56,247 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-28 04:23:56,249 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-12-28 04:23:56,250 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-28 04:23:56,250 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-28 04:23:56,253 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-28 04:23:56,254 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 04:23:56" (1/1) ... [2019-12-28 04:23:56,257 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4c126812 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:56, skipping insertion in model container [2019-12-28 04:23:56,258 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 04:23:56" (1/1) ... [2019-12-28 04:23:56,266 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-28 04:23:56,336 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-28 04:23:56,852 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 04:23:56,865 INFO L203 MainTranslator]: Completed pre-run [2019-12-28 04:23:56,956 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 04:23:57,055 INFO L208 MainTranslator]: Completed translation [2019-12-28 04:23:57,056 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:57 WrapperNode [2019-12-28 04:23:57,056 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-28 04:23:57,057 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-28 04:23:57,057 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-28 04:23:57,059 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-28 04:23:57,069 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:57" (1/1) ... [2019-12-28 04:23:57,092 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:57" (1/1) ... [2019-12-28 04:23:57,122 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-28 04:23:57,122 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-28 04:23:57,122 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-28 04:23:57,123 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-28 04:23:57,133 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:57" (1/1) ... [2019-12-28 04:23:57,134 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:57" (1/1) ... [2019-12-28 04:23:57,139 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:57" (1/1) ... [2019-12-28 04:23:57,139 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:57" (1/1) ... [2019-12-28 04:23:57,152 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:57" (1/1) ... [2019-12-28 04:23:57,157 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:57" (1/1) ... [2019-12-28 04:23:57,161 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:57" (1/1) ... [2019-12-28 04:23:57,166 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-28 04:23:57,167 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-28 04:23:57,167 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-28 04:23:57,167 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-28 04:23:57,168 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:57" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 04:23:57,251 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-12-28 04:23:57,252 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-28 04:23:57,252 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-28 04:23:57,253 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-28 04:23:57,253 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-28 04:23:57,254 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-28 04:23:57,254 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-28 04:23:57,255 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-28 04:23:57,255 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-28 04:23:57,255 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-28 04:23:57,255 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-28 04:23:57,255 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-12-28 04:23:57,255 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-28 04:23:57,256 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-28 04:23:57,256 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-28 04:23:57,259 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-28 04:23:57,964 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-28 04:23:57,964 INFO L287 CfgBuilder]: Removed 6 assume(true) statements. [2019-12-28 04:23:57,965 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 04:23:57 BoogieIcfgContainer [2019-12-28 04:23:57,966 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-28 04:23:57,967 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-28 04:23:57,967 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-28 04:23:57,970 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-28 04:23:57,971 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.12 04:23:56" (1/3) ... [2019-12-28 04:23:57,972 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@590eecd6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 04:23:57, skipping insertion in model container [2019-12-28 04:23:57,972 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:57" (2/3) ... [2019-12-28 04:23:57,972 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@590eecd6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 04:23:57, skipping insertion in model container [2019-12-28 04:23:57,973 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 04:23:57" (3/3) ... [2019-12-28 04:23:57,974 INFO L109 eAbstractionObserver]: Analyzing ICFG safe007_rmo.oepc.i [2019-12-28 04:23:57,985 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-28 04:23:57,986 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-28 04:23:57,994 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-28 04:23:57,995 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-28 04:23:58,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,039 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,039 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,044 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,044 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,045 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,045 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,045 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,045 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,046 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,046 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,046 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,047 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,047 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,047 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,047 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,048 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,048 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,049 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,049 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,049 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,050 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,050 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,050 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,051 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,051 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,051 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,051 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,052 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,052 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,052 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,052 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,053 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,053 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,053 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,054 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,054 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,054 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,054 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,054 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,055 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,055 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,055 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,055 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,056 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,056 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,056 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,056 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,057 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,058 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,059 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,061 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,061 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,061 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,064 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,064 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,064 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,065 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,065 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,065 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,065 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,065 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,066 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,066 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,066 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,067 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,067 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,067 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,067 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,068 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,068 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,068 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,068 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,069 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,069 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,069 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,069 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,070 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,070 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,070 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,071 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,071 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,072 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,073 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,087 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,089 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,096 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,096 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,096 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,097 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,097 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,098 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,101 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,101 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,102 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,102 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,102 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,102 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,102 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,103 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,103 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,103 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,103 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,103 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,103 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,104 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,104 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,104 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,104 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,104 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,105 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,105 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,105 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,105 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,105 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,106 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,106 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,106 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,106 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,106 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,106 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,107 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,107 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,110 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,111 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,111 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,111 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:23:58,126 INFO L249 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2019-12-28 04:23:58,144 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-28 04:23:58,144 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-28 04:23:58,144 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-28 04:23:58,144 INFO L376 AbstractCegarLoop]: Backedges is MCR [2019-12-28 04:23:58,145 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-28 04:23:58,145 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-28 04:23:58,145 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-28 04:23:58,145 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-28 04:23:58,159 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 170 places, 196 transitions [2019-12-28 04:24:10,540 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 101069 states. [2019-12-28 04:24:10,542 INFO L276 IsEmpty]: Start isEmpty. Operand 101069 states. [2019-12-28 04:24:10,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 04:24:10,682 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:10,683 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:10,684 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:10,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:10,691 INFO L82 PathProgramCache]: Analyzing trace with hash 813058933, now seen corresponding path program 1 times [2019-12-28 04:24:10,705 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:10,706 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2067386750] [2019-12-28 04:24:10,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:10,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:11,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:11,115 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2067386750] [2019-12-28 04:24:11,116 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:11,117 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:11,118 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [62910557] [2019-12-28 04:24:11,119 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:11,137 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:11,182 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 81 states and 80 transitions. [2019-12-28 04:24:11,183 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:11,190 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:11,191 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:11,191 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:11,205 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:11,206 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:11,208 INFO L87 Difference]: Start difference. First operand 101069 states. Second operand 4 states. [2019-12-28 04:24:15,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:15,606 INFO L93 Difference]: Finished difference Result 155393 states and 683056 transitions. [2019-12-28 04:24:15,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:24:15,607 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2019-12-28 04:24:15,608 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:16,503 INFO L225 Difference]: With dead ends: 155393 [2019-12-28 04:24:16,505 INFO L226 Difference]: Without dead ends: 105193 [2019-12-28 04:24:16,511 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:17,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105193 states. [2019-12-28 04:24:20,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105193 to 101345. [2019-12-28 04:24:20,869 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101345 states. [2019-12-28 04:24:25,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101345 states to 101345 states and 456424 transitions. [2019-12-28 04:24:25,766 INFO L78 Accepts]: Start accepts. Automaton has 101345 states and 456424 transitions. Word has length 80 [2019-12-28 04:24:25,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:25,767 INFO L462 AbstractCegarLoop]: Abstraction has 101345 states and 456424 transitions. [2019-12-28 04:24:25,767 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:25,768 INFO L276 IsEmpty]: Start isEmpty. Operand 101345 states and 456424 transitions. [2019-12-28 04:24:25,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 04:24:25,875 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:25,875 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:25,875 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:25,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:25,876 INFO L82 PathProgramCache]: Analyzing trace with hash -326032991, now seen corresponding path program 1 times [2019-12-28 04:24:25,876 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:25,877 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1931154636] [2019-12-28 04:24:25,877 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:25,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:26,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:26,109 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1931154636] [2019-12-28 04:24:26,109 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:26,110 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:24:26,110 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2001354994] [2019-12-28 04:24:26,110 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:26,126 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:26,144 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 83 states and 82 transitions. [2019-12-28 04:24:26,145 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:26,145 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:26,148 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:24:26,149 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:26,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:24:26,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:24:26,150 INFO L87 Difference]: Start difference. First operand 101345 states and 456424 transitions. Second operand 6 states. [2019-12-28 04:24:31,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:31,649 INFO L93 Difference]: Finished difference Result 139693 states and 602621 transitions. [2019-12-28 04:24:31,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:24:31,649 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-12-28 04:24:31,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:32,390 INFO L225 Difference]: With dead ends: 139693 [2019-12-28 04:24:32,390 INFO L226 Difference]: Without dead ends: 139693 [2019-12-28 04:24:32,391 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:24:33,698 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139693 states. [2019-12-28 04:24:35,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139693 to 121677. [2019-12-28 04:24:35,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121677 states. [2019-12-28 04:24:37,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121677 states to 121677 states and 533357 transitions. [2019-12-28 04:24:37,035 INFO L78 Accepts]: Start accepts. Automaton has 121677 states and 533357 transitions. Word has length 82 [2019-12-28 04:24:37,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:37,036 INFO L462 AbstractCegarLoop]: Abstraction has 121677 states and 533357 transitions. [2019-12-28 04:24:37,036 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:24:37,036 INFO L276 IsEmpty]: Start isEmpty. Operand 121677 states and 533357 transitions. [2019-12-28 04:24:37,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 04:24:37,081 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:37,081 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:37,082 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:37,082 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:37,082 INFO L82 PathProgramCache]: Analyzing trace with hash 871004482, now seen corresponding path program 1 times [2019-12-28 04:24:37,083 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:37,083 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2047376403] [2019-12-28 04:24:37,083 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:37,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:37,210 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:37,211 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2047376403] [2019-12-28 04:24:37,211 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:37,211 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:37,212 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1475051882] [2019-12-28 04:24:37,212 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:37,224 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:37,239 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 83 states and 82 transitions. [2019-12-28 04:24:37,239 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:37,240 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:37,240 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:37,240 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:37,241 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:37,241 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:37,241 INFO L87 Difference]: Start difference. First operand 121677 states and 533357 transitions. Second operand 4 states. [2019-12-28 04:24:37,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:37,802 INFO L93 Difference]: Finished difference Result 102295 states and 436661 transitions. [2019-12-28 04:24:37,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:24:37,802 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2019-12-28 04:24:37,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:43,272 INFO L225 Difference]: With dead ends: 102295 [2019-12-28 04:24:43,272 INFO L226 Difference]: Without dead ends: 99575 [2019-12-28 04:24:43,273 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:43,834 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99575 states. [2019-12-28 04:24:45,428 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99575 to 99575. [2019-12-28 04:24:45,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99575 states. [2019-12-28 04:24:46,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99575 states to 99575 states and 426978 transitions. [2019-12-28 04:24:46,382 INFO L78 Accepts]: Start accepts. Automaton has 99575 states and 426978 transitions. Word has length 82 [2019-12-28 04:24:46,382 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:46,382 INFO L462 AbstractCegarLoop]: Abstraction has 99575 states and 426978 transitions. [2019-12-28 04:24:46,382 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:46,382 INFO L276 IsEmpty]: Start isEmpty. Operand 99575 states and 426978 transitions. [2019-12-28 04:24:46,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-28 04:24:46,421 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:46,421 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:46,421 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:46,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:46,422 INFO L82 PathProgramCache]: Analyzing trace with hash -280324458, now seen corresponding path program 1 times [2019-12-28 04:24:46,422 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:46,423 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1404318965] [2019-12-28 04:24:46,423 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:46,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:46,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:46,557 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1404318965] [2019-12-28 04:24:46,557 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:46,557 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:24:46,558 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1540510177] [2019-12-28 04:24:46,558 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:46,571 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:46,589 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 88 states and 91 transitions. [2019-12-28 04:24:46,589 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:46,591 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:46,591 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 04:24:46,592 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:46,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 04:24:46,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:46,593 INFO L87 Difference]: Start difference. First operand 99575 states and 426978 transitions. Second operand 5 states. [2019-12-28 04:24:46,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:46,871 INFO L93 Difference]: Finished difference Result 28331 states and 108414 transitions. [2019-12-28 04:24:46,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 04:24:46,872 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 83 [2019-12-28 04:24:46,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:46,958 INFO L225 Difference]: With dead ends: 28331 [2019-12-28 04:24:46,959 INFO L226 Difference]: Without dead ends: 26114 [2019-12-28 04:24:46,960 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:24:47,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26114 states. [2019-12-28 04:24:47,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26114 to 26114. [2019-12-28 04:24:47,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26114 states. [2019-12-28 04:24:47,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26114 states to 26114 states and 99472 transitions. [2019-12-28 04:24:47,450 INFO L78 Accepts]: Start accepts. Automaton has 26114 states and 99472 transitions. Word has length 83 [2019-12-28 04:24:47,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:47,450 INFO L462 AbstractCegarLoop]: Abstraction has 26114 states and 99472 transitions. [2019-12-28 04:24:47,450 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 04:24:47,450 INFO L276 IsEmpty]: Start isEmpty. Operand 26114 states and 99472 transitions. [2019-12-28 04:24:47,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 04:24:47,481 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:47,481 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:47,481 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:47,482 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:47,482 INFO L82 PathProgramCache]: Analyzing trace with hash 1111812710, now seen corresponding path program 1 times [2019-12-28 04:24:47,482 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:47,483 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2090358532] [2019-12-28 04:24:47,483 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:47,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:47,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:47,633 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2090358532] [2019-12-28 04:24:47,633 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:47,633 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:47,633 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1012091416] [2019-12-28 04:24:47,634 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:47,657 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:47,688 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 99 states and 102 transitions. [2019-12-28 04:24:47,689 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:47,689 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:47,690 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:47,690 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:47,690 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:47,690 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:47,690 INFO L87 Difference]: Start difference. First operand 26114 states and 99472 transitions. Second operand 4 states. [2019-12-28 04:24:48,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:48,281 INFO L93 Difference]: Finished difference Result 25792 states and 96918 transitions. [2019-12-28 04:24:48,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:24:48,282 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 94 [2019-12-28 04:24:48,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:48,337 INFO L225 Difference]: With dead ends: 25792 [2019-12-28 04:24:48,337 INFO L226 Difference]: Without dead ends: 25792 [2019-12-28 04:24:48,338 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:48,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25792 states. [2019-12-28 04:24:48,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25792 to 24415. [2019-12-28 04:24:48,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24415 states. [2019-12-28 04:24:48,779 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24415 states to 24415 states and 92022 transitions. [2019-12-28 04:24:48,780 INFO L78 Accepts]: Start accepts. Automaton has 24415 states and 92022 transitions. Word has length 94 [2019-12-28 04:24:48,780 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:48,780 INFO L462 AbstractCegarLoop]: Abstraction has 24415 states and 92022 transitions. [2019-12-28 04:24:48,780 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:48,780 INFO L276 IsEmpty]: Start isEmpty. Operand 24415 states and 92022 transitions. [2019-12-28 04:24:48,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:24:48,802 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:48,802 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:48,802 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:48,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:48,803 INFO L82 PathProgramCache]: Analyzing trace with hash 823634256, now seen corresponding path program 1 times [2019-12-28 04:24:48,803 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:48,803 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [40245868] [2019-12-28 04:24:48,803 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:48,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:48,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:48,891 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [40245868] [2019-12-28 04:24:48,892 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:48,892 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:24:48,892 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1527535381] [2019-12-28 04:24:48,893 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:48,913 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:48,945 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:24:48,946 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:48,946 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:48,947 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 04:24:48,947 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:48,947 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 04:24:48,947 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:48,948 INFO L87 Difference]: Start difference. First operand 24415 states and 92022 transitions. Second operand 5 states. [2019-12-28 04:24:49,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:49,730 INFO L93 Difference]: Finished difference Result 46463 states and 173591 transitions. [2019-12-28 04:24:49,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 04:24:49,731 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-12-28 04:24:49,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:49,845 INFO L225 Difference]: With dead ends: 46463 [2019-12-28 04:24:49,845 INFO L226 Difference]: Without dead ends: 46463 [2019-12-28 04:24:49,846 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-28 04:24:49,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46463 states. [2019-12-28 04:24:50,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46463 to 17662. [2019-12-28 04:24:50,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17662 states. [2019-12-28 04:24:50,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17662 states to 17662 states and 66369 transitions. [2019-12-28 04:24:50,613 INFO L78 Accepts]: Start accepts. Automaton has 17662 states and 66369 transitions. Word has length 96 [2019-12-28 04:24:50,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:50,613 INFO L462 AbstractCegarLoop]: Abstraction has 17662 states and 66369 transitions. [2019-12-28 04:24:50,613 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 04:24:50,613 INFO L276 IsEmpty]: Start isEmpty. Operand 17662 states and 66369 transitions. [2019-12-28 04:24:50,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:24:50,632 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:50,632 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:50,632 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:50,632 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:50,633 INFO L82 PathProgramCache]: Analyzing trace with hash -973317103, now seen corresponding path program 1 times [2019-12-28 04:24:50,633 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:50,634 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1733946884] [2019-12-28 04:24:50,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:50,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:50,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:50,707 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1733946884] [2019-12-28 04:24:50,707 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:50,707 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:50,708 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1158615526] [2019-12-28 04:24:50,708 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:50,728 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:50,760 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:24:50,760 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:50,761 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:50,761 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:50,761 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:50,761 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:50,761 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:50,762 INFO L87 Difference]: Start difference. First operand 17662 states and 66369 transitions. Second operand 4 states. [2019-12-28 04:24:51,027 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:51,027 INFO L93 Difference]: Finished difference Result 22410 states and 83383 transitions. [2019-12-28 04:24:51,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:24:51,028 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-12-28 04:24:51,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:51,084 INFO L225 Difference]: With dead ends: 22410 [2019-12-28 04:24:51,084 INFO L226 Difference]: Without dead ends: 22410 [2019-12-28 04:24:51,085 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:51,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22410 states. [2019-12-28 04:24:51,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22410 to 19476. [2019-12-28 04:24:51,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19476 states. [2019-12-28 04:24:51,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19476 states to 19476 states and 72568 transitions. [2019-12-28 04:24:51,492 INFO L78 Accepts]: Start accepts. Automaton has 19476 states and 72568 transitions. Word has length 96 [2019-12-28 04:24:51,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:51,493 INFO L462 AbstractCegarLoop]: Abstraction has 19476 states and 72568 transitions. [2019-12-28 04:24:51,493 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:51,493 INFO L276 IsEmpty]: Start isEmpty. Operand 19476 states and 72568 transitions. [2019-12-28 04:24:51,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:24:51,519 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:51,519 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:51,519 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:51,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:51,520 INFO L82 PathProgramCache]: Analyzing trace with hash -1970389456, now seen corresponding path program 1 times [2019-12-28 04:24:51,520 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:51,521 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [211630333] [2019-12-28 04:24:51,521 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:51,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:51,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:51,620 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [211630333] [2019-12-28 04:24:51,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:51,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:24:51,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1467418273] [2019-12-28 04:24:51,621 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:51,640 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:51,666 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:24:51,666 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:51,666 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:51,666 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:24:51,667 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:51,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:24:51,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:24:51,667 INFO L87 Difference]: Start difference. First operand 19476 states and 72568 transitions. Second operand 6 states. [2019-12-28 04:24:52,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:52,791 INFO L93 Difference]: Finished difference Result 32166 states and 118738 transitions. [2019-12-28 04:24:52,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:24:52,791 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-12-28 04:24:52,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:52,862 INFO L225 Difference]: With dead ends: 32166 [2019-12-28 04:24:52,862 INFO L226 Difference]: Without dead ends: 32166 [2019-12-28 04:24:52,863 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:24:52,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32166 states. [2019-12-28 04:24:53,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32166 to 27909. [2019-12-28 04:24:53,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27909 states. [2019-12-28 04:24:53,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27909 states to 27909 states and 103207 transitions. [2019-12-28 04:24:53,364 INFO L78 Accepts]: Start accepts. Automaton has 27909 states and 103207 transitions. Word has length 96 [2019-12-28 04:24:53,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:53,365 INFO L462 AbstractCegarLoop]: Abstraction has 27909 states and 103207 transitions. [2019-12-28 04:24:53,365 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:24:53,365 INFO L276 IsEmpty]: Start isEmpty. Operand 27909 states and 103207 transitions. [2019-12-28 04:24:53,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:24:53,391 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:53,391 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:53,391 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:53,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:53,392 INFO L82 PathProgramCache]: Analyzing trace with hash 517123377, now seen corresponding path program 1 times [2019-12-28 04:24:53,392 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:53,393 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1912839648] [2019-12-28 04:24:53,393 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:53,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:53,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:53,585 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1912839648] [2019-12-28 04:24:53,585 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:53,585 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-28 04:24:53,586 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1175558383] [2019-12-28 04:24:53,586 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:53,603 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:53,626 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:24:53,626 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:53,627 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:53,627 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 04:24:53,627 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:53,628 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 04:24:53,628 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-28 04:24:53,628 INFO L87 Difference]: Start difference. First operand 27909 states and 103207 transitions. Second operand 9 states. [2019-12-28 04:24:56,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:56,243 INFO L93 Difference]: Finished difference Result 67691 states and 245174 transitions. [2019-12-28 04:24:56,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-28 04:24:56,244 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 96 [2019-12-28 04:24:56,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:56,443 INFO L225 Difference]: With dead ends: 67691 [2019-12-28 04:24:56,443 INFO L226 Difference]: Without dead ends: 67691 [2019-12-28 04:24:56,444 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=145, Invalid=455, Unknown=0, NotChecked=0, Total=600 [2019-12-28 04:24:56,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67691 states. [2019-12-28 04:24:57,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67691 to 34404. [2019-12-28 04:24:57,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34404 states. [2019-12-28 04:24:57,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34404 states to 34404 states and 124809 transitions. [2019-12-28 04:24:57,354 INFO L78 Accepts]: Start accepts. Automaton has 34404 states and 124809 transitions. Word has length 96 [2019-12-28 04:24:57,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:57,354 INFO L462 AbstractCegarLoop]: Abstraction has 34404 states and 124809 transitions. [2019-12-28 04:24:57,355 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 04:24:57,355 INFO L276 IsEmpty]: Start isEmpty. Operand 34404 states and 124809 transitions. [2019-12-28 04:24:57,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:24:57,384 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:57,384 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:57,385 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:57,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:57,385 INFO L82 PathProgramCache]: Analyzing trace with hash 1478737394, now seen corresponding path program 1 times [2019-12-28 04:24:57,386 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:57,386 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1139325633] [2019-12-28 04:24:57,386 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:57,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:57,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:57,456 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1139325633] [2019-12-28 04:24:57,456 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:57,456 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:57,456 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [148144556] [2019-12-28 04:24:57,457 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:57,475 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:57,506 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:24:57,507 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:57,507 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:57,508 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:57,508 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:57,508 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:57,508 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:57,508 INFO L87 Difference]: Start difference. First operand 34404 states and 124809 transitions. Second operand 4 states. [2019-12-28 04:24:58,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:58,035 INFO L93 Difference]: Finished difference Result 34278 states and 123966 transitions. [2019-12-28 04:24:58,035 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:24:58,035 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-12-28 04:24:58,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:58,402 INFO L225 Difference]: With dead ends: 34278 [2019-12-28 04:24:58,402 INFO L226 Difference]: Without dead ends: 33279 [2019-12-28 04:24:58,402 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:58,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33279 states. [2019-12-28 04:24:58,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33279 to 28027. [2019-12-28 04:24:58,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28027 states. [2019-12-28 04:24:58,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28027 states to 28027 states and 101374 transitions. [2019-12-28 04:24:58,868 INFO L78 Accepts]: Start accepts. Automaton has 28027 states and 101374 transitions. Word has length 96 [2019-12-28 04:24:58,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:58,869 INFO L462 AbstractCegarLoop]: Abstraction has 28027 states and 101374 transitions. [2019-12-28 04:24:58,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:58,869 INFO L276 IsEmpty]: Start isEmpty. Operand 28027 states and 101374 transitions. [2019-12-28 04:24:58,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:24:58,891 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:58,891 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:58,892 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:58,892 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:58,892 INFO L82 PathProgramCache]: Analyzing trace with hash -1302178446, now seen corresponding path program 1 times [2019-12-28 04:24:58,892 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:58,893 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1765682354] [2019-12-28 04:24:58,893 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:58,908 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:59,004 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:59,005 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1765682354] [2019-12-28 04:24:59,005 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:59,005 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:24:59,005 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [69950571] [2019-12-28 04:24:59,006 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:59,024 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:59,049 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:24:59,049 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:59,050 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:59,050 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:24:59,050 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:59,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:24:59,051 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:24:59,051 INFO L87 Difference]: Start difference. First operand 28027 states and 101374 transitions. Second operand 6 states. [2019-12-28 04:24:59,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:59,473 INFO L93 Difference]: Finished difference Result 32376 states and 116433 transitions. [2019-12-28 04:24:59,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:24:59,474 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-12-28 04:24:59,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:59,537 INFO L225 Difference]: With dead ends: 32376 [2019-12-28 04:24:59,537 INFO L226 Difference]: Without dead ends: 32376 [2019-12-28 04:24:59,537 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:24:59,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32376 states. [2019-12-28 04:24:59,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32376 to 28782. [2019-12-28 04:24:59,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28782 states. [2019-12-28 04:25:00,007 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28782 states to 28782 states and 103909 transitions. [2019-12-28 04:25:00,007 INFO L78 Accepts]: Start accepts. Automaton has 28782 states and 103909 transitions. Word has length 96 [2019-12-28 04:25:00,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:00,007 INFO L462 AbstractCegarLoop]: Abstraction has 28782 states and 103909 transitions. [2019-12-28 04:25:00,007 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:25:00,007 INFO L276 IsEmpty]: Start isEmpty. Operand 28782 states and 103909 transitions. [2019-12-28 04:25:00,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:25:00,032 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:00,032 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:00,032 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:00,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:00,033 INFO L82 PathProgramCache]: Analyzing trace with hash -57413965, now seen corresponding path program 1 times [2019-12-28 04:25:00,033 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:00,034 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2025197240] [2019-12-28 04:25:00,034 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:00,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:00,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:00,331 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2025197240] [2019-12-28 04:25:00,331 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:00,331 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 04:25:00,331 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1751318174] [2019-12-28 04:25:00,332 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:00,350 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:00,382 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:25:00,383 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:00,383 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:25:00,383 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 04:25:00,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:00,384 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 04:25:00,384 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:25:00,384 INFO L87 Difference]: Start difference. First operand 28782 states and 103909 transitions. Second operand 8 states. [2019-12-28 04:25:01,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:01,393 INFO L93 Difference]: Finished difference Result 34527 states and 122631 transitions. [2019-12-28 04:25:01,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 04:25:01,393 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 96 [2019-12-28 04:25:01,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:01,459 INFO L225 Difference]: With dead ends: 34527 [2019-12-28 04:25:01,460 INFO L226 Difference]: Without dead ends: 34527 [2019-12-28 04:25:01,460 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2019-12-28 04:25:01,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34527 states. [2019-12-28 04:25:01,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34527 to 28837. [2019-12-28 04:25:01,881 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28837 states. [2019-12-28 04:25:01,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28837 states to 28837 states and 102790 transitions. [2019-12-28 04:25:01,952 INFO L78 Accepts]: Start accepts. Automaton has 28837 states and 102790 transitions. Word has length 96 [2019-12-28 04:25:01,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:01,953 INFO L462 AbstractCegarLoop]: Abstraction has 28837 states and 102790 transitions. [2019-12-28 04:25:01,953 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 04:25:01,953 INFO L276 IsEmpty]: Start isEmpty. Operand 28837 states and 102790 transitions. [2019-12-28 04:25:01,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:25:01,978 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:01,978 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:01,978 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:01,978 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:01,978 INFO L82 PathProgramCache]: Analyzing trace with hash -1864868428, now seen corresponding path program 1 times [2019-12-28 04:25:01,979 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:01,979 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [447574159] [2019-12-28 04:25:01,979 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:01,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:02,064 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:02,065 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [447574159] [2019-12-28 04:25:02,065 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:02,065 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:25:02,066 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [627178458] [2019-12-28 04:25:02,066 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:02,084 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:02,119 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:25:02,119 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:02,120 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:25:02,120 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:25:02,120 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:02,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:25:02,121 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:25:02,121 INFO L87 Difference]: Start difference. First operand 28837 states and 102790 transitions. Second operand 6 states. [2019-12-28 04:25:02,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:02,226 INFO L93 Difference]: Finished difference Result 8911 states and 27784 transitions. [2019-12-28 04:25:02,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 04:25:02,226 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-12-28 04:25:02,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:02,239 INFO L225 Difference]: With dead ends: 8911 [2019-12-28 04:25:02,239 INFO L226 Difference]: Without dead ends: 7678 [2019-12-28 04:25:02,239 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-28 04:25:02,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7678 states. [2019-12-28 04:25:02,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7678 to 6646. [2019-12-28 04:25:02,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6646 states. [2019-12-28 04:25:02,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6646 states to 6646 states and 20237 transitions. [2019-12-28 04:25:02,332 INFO L78 Accepts]: Start accepts. Automaton has 6646 states and 20237 transitions. Word has length 96 [2019-12-28 04:25:02,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:02,333 INFO L462 AbstractCegarLoop]: Abstraction has 6646 states and 20237 transitions. [2019-12-28 04:25:02,333 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:25:02,333 INFO L276 IsEmpty]: Start isEmpty. Operand 6646 states and 20237 transitions. [2019-12-28 04:25:02,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-12-28 04:25:02,341 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:02,341 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:02,341 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:02,342 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:02,342 INFO L82 PathProgramCache]: Analyzing trace with hash -1126666891, now seen corresponding path program 1 times [2019-12-28 04:25:02,342 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:02,343 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [468889337] [2019-12-28 04:25:02,343 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:02,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:02,428 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:02,428 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [468889337] [2019-12-28 04:25:02,428 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:02,429 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:25:02,429 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1858081870] [2019-12-28 04:25:02,429 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:02,462 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:02,751 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 234 states and 371 transitions. [2019-12-28 04:25:02,752 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:02,791 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 04:25:02,791 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:25:02,792 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:02,792 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:25:02,792 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:25:02,792 INFO L87 Difference]: Start difference. First operand 6646 states and 20237 transitions. Second operand 6 states. [2019-12-28 04:25:03,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:03,203 INFO L93 Difference]: Finished difference Result 22501 states and 69334 transitions. [2019-12-28 04:25:03,204 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 04:25:03,204 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 113 [2019-12-28 04:25:03,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:03,303 INFO L225 Difference]: With dead ends: 22501 [2019-12-28 04:25:03,303 INFO L226 Difference]: Without dead ends: 22501 [2019-12-28 04:25:03,305 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2019-12-28 04:25:03,391 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22501 states. [2019-12-28 04:25:03,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22501 to 8118. [2019-12-28 04:25:03,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8118 states. [2019-12-28 04:25:03,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8118 states to 8118 states and 24855 transitions. [2019-12-28 04:25:03,727 INFO L78 Accepts]: Start accepts. Automaton has 8118 states and 24855 transitions. Word has length 113 [2019-12-28 04:25:03,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:03,728 INFO L462 AbstractCegarLoop]: Abstraction has 8118 states and 24855 transitions. [2019-12-28 04:25:03,728 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:25:03,728 INFO L276 IsEmpty]: Start isEmpty. Operand 8118 states and 24855 transitions. [2019-12-28 04:25:03,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-12-28 04:25:03,757 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:03,757 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:03,758 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:03,758 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:03,758 INFO L82 PathProgramCache]: Analyzing trace with hash 1877825045, now seen corresponding path program 1 times [2019-12-28 04:25:03,759 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:03,759 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2093854001] [2019-12-28 04:25:03,759 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:03,791 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:03,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:03,951 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2093854001] [2019-12-28 04:25:03,951 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:03,951 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-28 04:25:03,952 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1963344626] [2019-12-28 04:25:03,952 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:03,978 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:04,195 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 234 states and 371 transitions. [2019-12-28 04:25:04,195 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:04,392 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 9 times. [2019-12-28 04:25:04,392 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-28 04:25:04,393 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:04,393 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-28 04:25:04,393 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-28 04:25:04,394 INFO L87 Difference]: Start difference. First operand 8118 states and 24855 transitions. Second operand 15 states. [2019-12-28 04:25:06,974 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 43 [2019-12-28 04:25:10,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:10,823 INFO L93 Difference]: Finished difference Result 50883 states and 151244 transitions. [2019-12-28 04:25:10,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 82 states. [2019-12-28 04:25:10,824 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 113 [2019-12-28 04:25:10,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:10,917 INFO L225 Difference]: With dead ends: 50883 [2019-12-28 04:25:10,917 INFO L226 Difference]: Without dead ends: 50883 [2019-12-28 04:25:10,919 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 13 SyntacticMatches, 3 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2500 ImplicationChecksByTransitivity, 3.2s TimeCoverageRelationStatistics Valid=1154, Invalid=6156, Unknown=0, NotChecked=0, Total=7310 [2019-12-28 04:25:11,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50883 states. [2019-12-28 04:25:11,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50883 to 11590. [2019-12-28 04:25:11,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11590 states. [2019-12-28 04:25:11,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11590 states to 11590 states and 35675 transitions. [2019-12-28 04:25:11,498 INFO L78 Accepts]: Start accepts. Automaton has 11590 states and 35675 transitions. Word has length 113 [2019-12-28 04:25:11,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:11,498 INFO L462 AbstractCegarLoop]: Abstraction has 11590 states and 35675 transitions. [2019-12-28 04:25:11,498 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-28 04:25:11,499 INFO L276 IsEmpty]: Start isEmpty. Operand 11590 states and 35675 transitions. [2019-12-28 04:25:11,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-12-28 04:25:11,514 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:11,514 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:11,514 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:11,515 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:11,515 INFO L82 PathProgramCache]: Analyzing trace with hash 70370582, now seen corresponding path program 1 times [2019-12-28 04:25:11,516 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:11,516 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1603291629] [2019-12-28 04:25:11,516 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:11,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:11,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:11,573 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1603291629] [2019-12-28 04:25:11,573 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:11,574 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 04:25:11,574 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [587560557] [2019-12-28 04:25:11,574 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:11,598 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:11,781 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 234 states and 371 transitions. [2019-12-28 04:25:11,781 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:11,784 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 04:25:11,785 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 04:25:11,785 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:11,785 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 04:25:11,785 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:25:11,786 INFO L87 Difference]: Start difference. First operand 11590 states and 35675 transitions. Second operand 3 states. [2019-12-28 04:25:11,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:11,827 INFO L93 Difference]: Finished difference Result 11590 states and 35648 transitions. [2019-12-28 04:25:11,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 04:25:11,828 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 113 [2019-12-28 04:25:11,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:11,853 INFO L225 Difference]: With dead ends: 11590 [2019-12-28 04:25:11,853 INFO L226 Difference]: Without dead ends: 11590 [2019-12-28 04:25:11,853 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:25:11,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11590 states. [2019-12-28 04:25:12,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11590 to 11590. [2019-12-28 04:25:12,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11590 states. [2019-12-28 04:25:12,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11590 states to 11590 states and 35648 transitions. [2019-12-28 04:25:12,105 INFO L78 Accepts]: Start accepts. Automaton has 11590 states and 35648 transitions. Word has length 113 [2019-12-28 04:25:12,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:12,106 INFO L462 AbstractCegarLoop]: Abstraction has 11590 states and 35648 transitions. [2019-12-28 04:25:12,106 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 04:25:12,106 INFO L276 IsEmpty]: Start isEmpty. Operand 11590 states and 35648 transitions. [2019-12-28 04:25:12,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-12-28 04:25:12,125 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:12,126 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:12,126 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:12,126 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:12,126 INFO L82 PathProgramCache]: Analyzing trace with hash -1192348262, now seen corresponding path program 1 times [2019-12-28 04:25:12,127 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:12,127 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1575460070] [2019-12-28 04:25:12,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:12,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:12,306 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:12,307 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1575460070] [2019-12-28 04:25:12,307 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:12,307 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 04:25:12,307 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [490771880] [2019-12-28 04:25:12,308 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:12,421 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:12,630 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 236 states and 373 transitions. [2019-12-28 04:25:12,631 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:12,632 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:25:12,632 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 04:25:12,633 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:12,634 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 04:25:12,634 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:25:12,634 INFO L87 Difference]: Start difference. First operand 11590 states and 35648 transitions. Second operand 7 states. [2019-12-28 04:25:12,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:12,845 INFO L93 Difference]: Finished difference Result 13525 states and 41144 transitions. [2019-12-28 04:25:12,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 04:25:12,845 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 115 [2019-12-28 04:25:12,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:12,858 INFO L225 Difference]: With dead ends: 13525 [2019-12-28 04:25:12,859 INFO L226 Difference]: Without dead ends: 4912 [2019-12-28 04:25:12,860 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-28 04:25:12,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4912 states. [2019-12-28 04:25:12,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4912 to 4912. [2019-12-28 04:25:12,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4912 states. [2019-12-28 04:25:12,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4912 states to 4912 states and 12725 transitions. [2019-12-28 04:25:12,964 INFO L78 Accepts]: Start accepts. Automaton has 4912 states and 12725 transitions. Word has length 115 [2019-12-28 04:25:12,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:12,965 INFO L462 AbstractCegarLoop]: Abstraction has 4912 states and 12725 transitions. [2019-12-28 04:25:12,965 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 04:25:12,965 INFO L276 IsEmpty]: Start isEmpty. Operand 4912 states and 12725 transitions. [2019-12-28 04:25:12,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-12-28 04:25:12,974 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:12,974 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:12,975 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:12,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:12,975 INFO L82 PathProgramCache]: Analyzing trace with hash -212202412, now seen corresponding path program 2 times [2019-12-28 04:25:12,976 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:12,977 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952102946] [2019-12-28 04:25:12,977 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:13,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:13,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:13,193 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1952102946] [2019-12-28 04:25:13,194 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:13,194 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 04:25:13,194 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [636232651] [2019-12-28 04:25:13,194 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:13,236 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:13,447 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 209 states and 301 transitions. [2019-12-28 04:25:13,447 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:13,462 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 04:25:13,462 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 04:25:13,462 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:13,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 04:25:13,463 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:25:13,463 INFO L87 Difference]: Start difference. First operand 4912 states and 12725 transitions. Second operand 8 states. [2019-12-28 04:25:13,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:13,577 INFO L93 Difference]: Finished difference Result 6586 states and 17576 transitions. [2019-12-28 04:25:13,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 04:25:13,577 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 115 [2019-12-28 04:25:13,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:13,582 INFO L225 Difference]: With dead ends: 6586 [2019-12-28 04:25:13,583 INFO L226 Difference]: Without dead ends: 2830 [2019-12-28 04:25:13,584 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2019-12-28 04:25:13,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2830 states. [2019-12-28 04:25:13,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2830 to 2830. [2019-12-28 04:25:13,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2830 states. [2019-12-28 04:25:13,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2830 states to 2830 states and 7403 transitions. [2019-12-28 04:25:13,632 INFO L78 Accepts]: Start accepts. Automaton has 2830 states and 7403 transitions. Word has length 115 [2019-12-28 04:25:13,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:13,632 INFO L462 AbstractCegarLoop]: Abstraction has 2830 states and 7403 transitions. [2019-12-28 04:25:13,633 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 04:25:13,633 INFO L276 IsEmpty]: Start isEmpty. Operand 2830 states and 7403 transitions. [2019-12-28 04:25:13,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-12-28 04:25:13,637 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:13,637 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:13,637 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:13,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:13,637 INFO L82 PathProgramCache]: Analyzing trace with hash 1053398540, now seen corresponding path program 3 times [2019-12-28 04:25:13,638 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:13,638 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1094838225] [2019-12-28 04:25:13,639 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:13,671 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:13,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:13,746 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1094838225] [2019-12-28 04:25:13,746 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:13,746 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:25:13,747 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1812298947] [2019-12-28 04:25:13,747 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:13,770 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:13,896 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 182 states and 247 transitions. [2019-12-28 04:25:13,896 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:13,965 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 9 times. [2019-12-28 04:25:13,965 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 04:25:13,965 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:13,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 04:25:13,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:25:13,966 INFO L87 Difference]: Start difference. First operand 2830 states and 7403 transitions. Second operand 7 states. [2019-12-28 04:25:14,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:14,066 INFO L93 Difference]: Finished difference Result 2654 states and 6927 transitions. [2019-12-28 04:25:14,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 04:25:14,067 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 115 [2019-12-28 04:25:14,067 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:14,071 INFO L225 Difference]: With dead ends: 2654 [2019-12-28 04:25:14,071 INFO L226 Difference]: Without dead ends: 2654 [2019-12-28 04:25:14,071 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:25:14,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2654 states. [2019-12-28 04:25:14,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2654 to 2644. [2019-12-28 04:25:14,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2644 states. [2019-12-28 04:25:14,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2644 states to 2644 states and 6909 transitions. [2019-12-28 04:25:14,106 INFO L78 Accepts]: Start accepts. Automaton has 2644 states and 6909 transitions. Word has length 115 [2019-12-28 04:25:14,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:14,106 INFO L462 AbstractCegarLoop]: Abstraction has 2644 states and 6909 transitions. [2019-12-28 04:25:14,106 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 04:25:14,106 INFO L276 IsEmpty]: Start isEmpty. Operand 2644 states and 6909 transitions. [2019-12-28 04:25:14,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-12-28 04:25:14,109 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:14,109 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:14,109 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:14,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:14,109 INFO L82 PathProgramCache]: Analyzing trace with hash 1976082123, now seen corresponding path program 1 times [2019-12-28 04:25:14,110 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:14,110 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1026351066] [2019-12-28 04:25:14,110 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:14,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 04:25:14,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 04:25:14,237 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-28 04:25:14,237 INFO L476 BasicCegarLoop]: Counterexample might be feasible [2019-12-28 04:25:14,515 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.12 04:25:14 BasicIcfg [2019-12-28 04:25:14,515 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-28 04:25:14,518 INFO L168 Benchmark]: Toolchain (without parser) took 78268.84 ms. Allocated memory was 137.4 MB in the beginning and 3.2 GB in the end (delta: 3.1 GB). Free memory was 100.5 MB in the beginning and 1.1 GB in the end (delta: -953.1 MB). Peak memory consumption was 2.1 GB. Max. memory is 7.1 GB. [2019-12-28 04:25:14,518 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 137.4 MB. Free memory was 120.5 MB in the beginning and 120.3 MB in the end (delta: 209.9 kB). Peak memory consumption was 209.9 kB. Max. memory is 7.1 GB. [2019-12-28 04:25:14,519 INFO L168 Benchmark]: CACSL2BoogieTranslator took 806.79 ms. Allocated memory was 137.4 MB in the beginning and 201.3 MB in the end (delta: 64.0 MB). Free memory was 100.3 MB in the beginning and 155.4 MB in the end (delta: -55.1 MB). Peak memory consumption was 26.5 MB. Max. memory is 7.1 GB. [2019-12-28 04:25:14,520 INFO L168 Benchmark]: Boogie Procedure Inliner took 64.95 ms. Allocated memory is still 201.3 MB. Free memory was 155.4 MB in the beginning and 152.7 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. [2019-12-28 04:25:14,522 INFO L168 Benchmark]: Boogie Preprocessor took 44.49 ms. Allocated memory is still 201.3 MB. Free memory was 152.7 MB in the beginning and 150.0 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. [2019-12-28 04:25:14,523 INFO L168 Benchmark]: RCFGBuilder took 798.96 ms. Allocated memory is still 201.3 MB. Free memory was 150.0 MB in the beginning and 101.5 MB in the end (delta: 48.5 MB). Peak memory consumption was 48.5 MB. Max. memory is 7.1 GB. [2019-12-28 04:25:14,524 INFO L168 Benchmark]: TraceAbstraction took 76548.32 ms. Allocated memory was 201.3 MB in the beginning and 3.2 GB in the end (delta: 3.0 GB). Free memory was 101.5 MB in the beginning and 1.1 GB in the end (delta: -952.1 MB). Peak memory consumption was 2.1 GB. Max. memory is 7.1 GB. [2019-12-28 04:25:14,530 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 137.4 MB. Free memory was 120.5 MB in the beginning and 120.3 MB in the end (delta: 209.9 kB). Peak memory consumption was 209.9 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 806.79 ms. Allocated memory was 137.4 MB in the beginning and 201.3 MB in the end (delta: 64.0 MB). Free memory was 100.3 MB in the beginning and 155.4 MB in the end (delta: -55.1 MB). Peak memory consumption was 26.5 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 64.95 ms. Allocated memory is still 201.3 MB. Free memory was 155.4 MB in the beginning and 152.7 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 44.49 ms. Allocated memory is still 201.3 MB. Free memory was 152.7 MB in the beginning and 150.0 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. * RCFGBuilder took 798.96 ms. Allocated memory is still 201.3 MB. Free memory was 150.0 MB in the beginning and 101.5 MB in the end (delta: 48.5 MB). Peak memory consumption was 48.5 MB. Max. memory is 7.1 GB. * TraceAbstraction took 76548.32 ms. Allocated memory was 201.3 MB in the beginning and 3.2 GB in the end (delta: 3.0 GB). Free memory was 101.5 MB in the beginning and 1.1 GB in the end (delta: -952.1 MB). Peak memory consumption was 2.1 GB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L696] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L698] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L699] 0 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0] [L700] 0 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0] [L701] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0] [L702] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0] [L703] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0] [L704] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0] [L705] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0] [L706] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0] [L707] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0] [L708] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0] [L709] 0 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0] [L710] 0 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}] [L711] 0 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0] [L712] 0 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0] [L713] 0 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0] [L714] 0 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0] [L716] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0] [L718] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L719] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L720] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L722] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L724] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L726] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}] [L727] 0 _Bool z$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0] [L728] 0 int z$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0] [L729] 0 _Bool z$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0] [L730] 0 _Bool z$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0] [L731] 0 _Bool z$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0] [L732] 0 _Bool z$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0] [L733] 0 _Bool z$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0] [L734] 0 _Bool z$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0] [L735] 0 _Bool z$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0] [L736] 0 _Bool z$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0] [L737] 0 _Bool z$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0] [L738] 0 int *z$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}] [L739] 0 int z$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0] [L740] 0 _Bool z$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0] [L741] 0 int z$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0] [L742] 0 _Bool z$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L743] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L744] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L745] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L822] 0 pthread_t t1949; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L823] FCALL, FORK 0 pthread_create(&t1949, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L824] 0 pthread_t t1950; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L749] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L750] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L751] 1 z$flush_delayed = weak$$choice2 [L752] EXPR 1 \read(z) [L752] 1 z$mem_tmp = z [L753] EXPR 1 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L753] EXPR 1 \read(z) [L753] EXPR 1 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L825] FCALL, FORK 0 pthread_create(&t1950, ((void *)0), P1, ((void *)0)) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L753] 1 z = !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L754] EXPR 1 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L826] 0 pthread_t t1951; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t1951, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L754] 1 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) [L755] EXPR 1 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L755] 1 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) [L756] EXPR 1 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L756] 1 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) [L757] EXPR 1 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L757] 1 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L758] EXPR 1 weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L758] 1 z$r_buff0_thd1 = weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) [L759] EXPR 1 weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L759] 1 z$r_buff1_thd1 = weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L760] 1 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L761] 1 __unbuffered_p0_EAX$read_delayed_var = &z [L762] EXPR 1 \read(z) [L762] 1 __unbuffered_p0_EAX = z [L763] EXPR 1 z$flush_delayed ? z$mem_tmp : z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={5:0}, z$flush_delayed=1, z$flush_delayed ? z$mem_tmp : z=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L763] 1 z = z$flush_delayed ? z$mem_tmp : z [L764] 1 z$flush_delayed = (_Bool)0 [L767] 1 x = 1 [L772] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L779] 2 __unbuffered_p1_EAX = x [L782] 2 y = 1 [L787] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L794] 3 __unbuffered_p2_EAX = y [L797] 3 z = 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] EXPR 3 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z [L800] EXPR 3 \read(z) [L800] EXPR 3 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L800] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z)=1, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L800] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L801] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L801] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L802] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L802] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L803] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L803] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L804] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L804] 3 z$r_buff1_thd3 = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 [L807] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L829] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] EXPR 0 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z [L833] EXPR 0 \read(z) [L833] EXPR 0 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L834] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L834] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L835] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L836] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L836] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L837] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L840] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L841] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L841] EXPR 0 \read(*__unbuffered_p0_EAX$read_delayed_var) [L841] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] 0 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L842] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] COND TRUE 0 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] 0 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 161 locations, 1 error locations. Result: UNSAFE, OverallTime: 76.0s, OverallIterations: 20, TraceHistogramMax: 1, AutomataDifference: 33.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5147 SDtfs, 7997 SDslu, 16359 SDs, 0 SdLazy, 6893 SolverSat, 457 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 291 GetRequests, 74 SyntacticMatches, 15 SemanticMatches, 202 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2645 ImplicationChecksByTransitivity, 4.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=121677occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 23.4s AutomataMinimizationTime, 19 MinimizatonAttempts, 161774 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 1988 NumberOfCodeBlocks, 1988 NumberOfCodeBlocksAsserted, 20 NumberOfCheckSat, 1854 ConstructedInterpolants, 0 QuantifiedInterpolants, 465699 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 19 InterpolantComputations, 19 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...