/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf -i ../../../trunk/examples/svcomp/pthread-wmm/safe007_rmo.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-4336eb1 [2019-12-28 04:23:57,372 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-28 04:23:57,376 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-28 04:23:57,393 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-28 04:23:57,393 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-28 04:23:57,395 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-28 04:23:57,397 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-28 04:23:57,409 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-28 04:23:57,411 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-28 04:23:57,411 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-28 04:23:57,412 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-28 04:23:57,413 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-28 04:23:57,414 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-28 04:23:57,415 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-28 04:23:57,416 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-28 04:23:57,417 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-28 04:23:57,417 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-28 04:23:57,418 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-28 04:23:57,420 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-28 04:23:57,421 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-28 04:23:57,423 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-28 04:23:57,424 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-28 04:23:57,425 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-28 04:23:57,425 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-28 04:23:57,429 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-28 04:23:57,429 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-28 04:23:57,429 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-28 04:23:57,430 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-28 04:23:57,430 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-28 04:23:57,431 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-28 04:23:57,431 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-28 04:23:57,434 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-28 04:23:57,435 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-28 04:23:57,436 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-28 04:23:57,437 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-28 04:23:57,438 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-28 04:23:57,439 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-28 04:23:57,439 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-28 04:23:57,440 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-28 04:23:57,441 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-28 04:23:57,442 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-28 04:23:57,443 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf [2019-12-28 04:23:57,461 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-28 04:23:57,461 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-28 04:23:57,463 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-28 04:23:57,463 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-28 04:23:57,463 INFO L138 SettingsManager]: * Use SBE=true [2019-12-28 04:23:57,463 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-28 04:23:57,463 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-28 04:23:57,464 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-28 04:23:57,464 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-28 04:23:57,464 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-28 04:23:57,464 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-28 04:23:57,465 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-28 04:23:57,465 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-28 04:23:57,465 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-28 04:23:57,465 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-28 04:23:57,465 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-28 04:23:57,466 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-28 04:23:57,466 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-28 04:23:57,466 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-28 04:23:57,466 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-28 04:23:57,467 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-28 04:23:57,467 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 04:23:57,467 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-28 04:23:57,467 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-28 04:23:57,467 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-28 04:23:57,468 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-28 04:23:57,468 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-28 04:23:57,468 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2019-12-28 04:23:57,468 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2019-12-28 04:23:57,468 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-28 04:23:57,469 INFO L138 SettingsManager]: * Interpolant automaton=MCR [2019-12-28 04:23:57,469 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-28 04:23:57,755 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-28 04:23:57,768 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-28 04:23:57,772 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-28 04:23:57,773 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-28 04:23:57,774 INFO L275 PluginConnector]: CDTParser initialized [2019-12-28 04:23:57,775 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/safe007_rmo.opt.i [2019-12-28 04:23:57,832 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f993f6912/16ca12c85c3b471fa911f4adc37381f3/FLAG05e15fd77 [2019-12-28 04:23:58,382 INFO L306 CDTParser]: Found 1 translation units. [2019-12-28 04:23:58,382 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe007_rmo.opt.i [2019-12-28 04:23:58,401 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f993f6912/16ca12c85c3b471fa911f4adc37381f3/FLAG05e15fd77 [2019-12-28 04:23:58,688 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f993f6912/16ca12c85c3b471fa911f4adc37381f3 [2019-12-28 04:23:58,696 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-28 04:23:58,698 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-12-28 04:23:58,699 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-28 04:23:58,699 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-28 04:23:58,703 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-28 04:23:58,704 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 04:23:58" (1/1) ... [2019-12-28 04:23:58,707 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f2a7ee5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:58, skipping insertion in model container [2019-12-28 04:23:58,707 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 04:23:58" (1/1) ... [2019-12-28 04:23:58,715 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-28 04:23:58,771 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-28 04:23:59,342 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 04:23:59,362 INFO L203 MainTranslator]: Completed pre-run [2019-12-28 04:23:59,416 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 04:23:59,510 INFO L208 MainTranslator]: Completed translation [2019-12-28 04:23:59,510 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:59 WrapperNode [2019-12-28 04:23:59,510 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-28 04:23:59,511 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-28 04:23:59,511 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-28 04:23:59,511 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-28 04:23:59,521 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:59" (1/1) ... [2019-12-28 04:23:59,544 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:59" (1/1) ... [2019-12-28 04:23:59,573 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-28 04:23:59,574 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-28 04:23:59,574 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-28 04:23:59,574 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-28 04:23:59,583 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:59" (1/1) ... [2019-12-28 04:23:59,583 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:59" (1/1) ... [2019-12-28 04:23:59,588 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:59" (1/1) ... [2019-12-28 04:23:59,588 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:59" (1/1) ... [2019-12-28 04:23:59,599 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:59" (1/1) ... [2019-12-28 04:23:59,603 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:59" (1/1) ... [2019-12-28 04:23:59,607 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:59" (1/1) ... [2019-12-28 04:23:59,612 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-28 04:23:59,613 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-28 04:23:59,613 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-28 04:23:59,613 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-28 04:23:59,614 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:59" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 04:23:59,692 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-12-28 04:23:59,692 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-28 04:23:59,692 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-28 04:23:59,693 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-28 04:23:59,693 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-28 04:23:59,693 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-28 04:23:59,693 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-28 04:23:59,694 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-28 04:23:59,694 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-28 04:23:59,694 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-28 04:23:59,694 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-28 04:23:59,695 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-12-28 04:23:59,695 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-28 04:23:59,695 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-28 04:23:59,695 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-28 04:23:59,697 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-28 04:24:00,462 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-28 04:24:00,463 INFO L287 CfgBuilder]: Removed 6 assume(true) statements. [2019-12-28 04:24:00,465 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 04:24:00 BoogieIcfgContainer [2019-12-28 04:24:00,465 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-28 04:24:00,467 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-28 04:24:00,467 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-28 04:24:00,472 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-28 04:24:00,472 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.12 04:23:58" (1/3) ... [2019-12-28 04:24:00,473 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1558daa8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 04:24:00, skipping insertion in model container [2019-12-28 04:24:00,473 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:23:59" (2/3) ... [2019-12-28 04:24:00,474 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1558daa8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 04:24:00, skipping insertion in model container [2019-12-28 04:24:00,474 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 04:24:00" (3/3) ... [2019-12-28 04:24:00,476 INFO L109 eAbstractionObserver]: Analyzing ICFG safe007_rmo.opt.i [2019-12-28 04:24:00,488 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-28 04:24:00,488 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-28 04:24:00,501 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-28 04:24:00,502 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-28 04:24:00,567 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,567 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,567 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,568 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,568 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,568 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,568 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,569 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,569 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,569 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,570 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,571 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,572 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,572 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,572 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,572 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,573 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,573 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,573 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,573 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,573 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,574 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,574 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,575 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,575 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,575 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,575 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,576 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,576 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,577 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,577 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,577 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,578 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,579 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,579 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,580 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,580 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,580 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,580 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,581 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,581 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,581 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,581 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,582 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,583 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,584 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,584 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,584 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,585 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,585 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,585 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,585 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,585 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,586 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,586 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,586 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,587 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,587 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,587 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,588 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,588 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,588 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,588 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,589 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,589 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,589 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,589 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,590 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,590 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,590 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,590 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,591 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,611 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,611 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,612 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,612 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,612 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,613 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,613 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,614 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,614 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,614 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,614 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,614 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,615 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,615 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,615 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,617 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,617 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,617 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,618 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,618 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,622 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,622 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,624 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,624 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,630 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,630 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,630 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,630 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,632 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,632 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,632 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,632 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,632 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,633 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,634 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,634 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,634 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,634 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,634 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,635 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,635 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,635 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,635 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,635 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,636 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,636 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,636 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,636 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,636 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,637 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,637 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,637 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,637 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,637 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,637 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,638 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,638 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,638 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,638 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,638 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,644 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,645 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,645 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,645 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,645 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,646 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,646 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,646 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,646 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,646 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,647 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,650 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,651 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,651 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,651 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,652 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,652 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,652 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,652 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,652 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,652 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,653 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,653 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,653 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,653 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,653 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,654 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,654 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,655 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,656 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,656 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,656 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,656 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,658 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,658 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,658 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,661 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,661 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,661 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,661 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:24:00,676 INFO L249 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2019-12-28 04:24:00,700 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-28 04:24:00,700 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-28 04:24:00,701 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-28 04:24:00,701 INFO L376 AbstractCegarLoop]: Backedges is MCR [2019-12-28 04:24:00,701 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-28 04:24:00,701 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-28 04:24:00,701 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-28 04:24:00,701 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-28 04:24:00,721 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 170 places, 196 transitions [2019-12-28 04:24:13,468 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 101069 states. [2019-12-28 04:24:13,471 INFO L276 IsEmpty]: Start isEmpty. Operand 101069 states. [2019-12-28 04:24:13,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 04:24:13,610 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:13,611 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:13,612 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:13,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:13,620 INFO L82 PathProgramCache]: Analyzing trace with hash 813058933, now seen corresponding path program 1 times [2019-12-28 04:24:13,634 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:13,635 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [216198186] [2019-12-28 04:24:13,636 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:13,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:14,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:14,093 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [216198186] [2019-12-28 04:24:14,094 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:14,094 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:14,095 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1586069245] [2019-12-28 04:24:14,096 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:14,113 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:14,158 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 81 states and 80 transitions. [2019-12-28 04:24:14,159 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:14,166 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:14,167 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:14,168 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:14,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:14,186 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:14,188 INFO L87 Difference]: Start difference. First operand 101069 states. Second operand 4 states. [2019-12-28 04:24:19,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:19,134 INFO L93 Difference]: Finished difference Result 155393 states and 683056 transitions. [2019-12-28 04:24:19,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:24:19,136 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 80 [2019-12-28 04:24:19,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:19,796 INFO L225 Difference]: With dead ends: 155393 [2019-12-28 04:24:19,797 INFO L226 Difference]: Without dead ends: 105193 [2019-12-28 04:24:19,798 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:20,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105193 states. [2019-12-28 04:24:23,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105193 to 101345. [2019-12-28 04:24:23,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101345 states. [2019-12-28 04:24:29,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101345 states to 101345 states and 456424 transitions. [2019-12-28 04:24:29,140 INFO L78 Accepts]: Start accepts. Automaton has 101345 states and 456424 transitions. Word has length 80 [2019-12-28 04:24:29,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:29,142 INFO L462 AbstractCegarLoop]: Abstraction has 101345 states and 456424 transitions. [2019-12-28 04:24:29,142 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:29,142 INFO L276 IsEmpty]: Start isEmpty. Operand 101345 states and 456424 transitions. [2019-12-28 04:24:29,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 04:24:29,255 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:29,255 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:29,255 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:29,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:29,256 INFO L82 PathProgramCache]: Analyzing trace with hash -326032991, now seen corresponding path program 1 times [2019-12-28 04:24:29,257 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:29,257 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [453610695] [2019-12-28 04:24:29,257 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:29,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:29,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:29,473 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [453610695] [2019-12-28 04:24:29,474 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:29,474 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:24:29,474 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1526363908] [2019-12-28 04:24:29,474 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:29,488 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:29,516 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 83 states and 82 transitions. [2019-12-28 04:24:29,517 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:29,517 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:29,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:24:29,519 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:29,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:24:29,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:24:29,520 INFO L87 Difference]: Start difference. First operand 101345 states and 456424 transitions. Second operand 6 states. [2019-12-28 04:24:35,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:35,288 INFO L93 Difference]: Finished difference Result 139693 states and 602621 transitions. [2019-12-28 04:24:35,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:24:35,289 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-12-28 04:24:35,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:36,039 INFO L225 Difference]: With dead ends: 139693 [2019-12-28 04:24:36,039 INFO L226 Difference]: Without dead ends: 139693 [2019-12-28 04:24:36,040 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:24:36,888 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139693 states. [2019-12-28 04:24:39,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139693 to 121677. [2019-12-28 04:24:39,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121677 states. [2019-12-28 04:24:39,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121677 states to 121677 states and 533357 transitions. [2019-12-28 04:24:39,776 INFO L78 Accepts]: Start accepts. Automaton has 121677 states and 533357 transitions. Word has length 82 [2019-12-28 04:24:39,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:39,777 INFO L462 AbstractCegarLoop]: Abstraction has 121677 states and 533357 transitions. [2019-12-28 04:24:39,777 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:24:39,777 INFO L276 IsEmpty]: Start isEmpty. Operand 121677 states and 533357 transitions. [2019-12-28 04:24:39,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 04:24:39,835 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:39,835 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:39,835 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:39,835 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:39,835 INFO L82 PathProgramCache]: Analyzing trace with hash 871004482, now seen corresponding path program 1 times [2019-12-28 04:24:39,836 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:39,836 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1985603168] [2019-12-28 04:24:39,836 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:39,907 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:40,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:40,032 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1985603168] [2019-12-28 04:24:40,032 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:40,033 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:40,033 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [773932345] [2019-12-28 04:24:40,033 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:40,045 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:40,062 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 83 states and 82 transitions. [2019-12-28 04:24:40,062 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:40,063 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:40,064 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:40,064 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:40,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:40,065 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:40,065 INFO L87 Difference]: Start difference. First operand 121677 states and 533357 transitions. Second operand 4 states. [2019-12-28 04:24:44,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:44,533 INFO L93 Difference]: Finished difference Result 102295 states and 436661 transitions. [2019-12-28 04:24:44,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:24:44,533 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 82 [2019-12-28 04:24:44,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:44,813 INFO L225 Difference]: With dead ends: 102295 [2019-12-28 04:24:44,813 INFO L226 Difference]: Without dead ends: 99575 [2019-12-28 04:24:44,813 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:45,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99575 states. [2019-12-28 04:24:47,190 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99575 to 99575. [2019-12-28 04:24:47,190 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99575 states. [2019-12-28 04:24:48,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99575 states to 99575 states and 426978 transitions. [2019-12-28 04:24:48,304 INFO L78 Accepts]: Start accepts. Automaton has 99575 states and 426978 transitions. Word has length 82 [2019-12-28 04:24:48,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:48,304 INFO L462 AbstractCegarLoop]: Abstraction has 99575 states and 426978 transitions. [2019-12-28 04:24:48,304 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:48,305 INFO L276 IsEmpty]: Start isEmpty. Operand 99575 states and 426978 transitions. [2019-12-28 04:24:48,342 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-28 04:24:48,342 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:48,342 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:48,343 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:48,343 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:48,343 INFO L82 PathProgramCache]: Analyzing trace with hash -280324458, now seen corresponding path program 1 times [2019-12-28 04:24:48,344 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:48,344 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223823133] [2019-12-28 04:24:48,344 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:48,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:48,489 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:48,490 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1223823133] [2019-12-28 04:24:48,490 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:48,490 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:24:48,490 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [882125785] [2019-12-28 04:24:48,490 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:48,505 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:48,521 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 88 states and 91 transitions. [2019-12-28 04:24:48,521 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:48,525 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:48,526 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 04:24:48,526 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:48,526 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 04:24:48,526 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:48,526 INFO L87 Difference]: Start difference. First operand 99575 states and 426978 transitions. Second operand 5 states. [2019-12-28 04:24:48,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:48,770 INFO L93 Difference]: Finished difference Result 28331 states and 108414 transitions. [2019-12-28 04:24:48,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 04:24:48,771 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 83 [2019-12-28 04:24:48,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:48,845 INFO L225 Difference]: With dead ends: 28331 [2019-12-28 04:24:48,845 INFO L226 Difference]: Without dead ends: 26114 [2019-12-28 04:24:48,846 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:24:48,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26114 states. [2019-12-28 04:24:49,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26114 to 26114. [2019-12-28 04:24:49,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26114 states. [2019-12-28 04:24:49,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26114 states to 26114 states and 99472 transitions. [2019-12-28 04:24:49,249 INFO L78 Accepts]: Start accepts. Automaton has 26114 states and 99472 transitions. Word has length 83 [2019-12-28 04:24:49,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:49,250 INFO L462 AbstractCegarLoop]: Abstraction has 26114 states and 99472 transitions. [2019-12-28 04:24:49,250 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 04:24:49,250 INFO L276 IsEmpty]: Start isEmpty. Operand 26114 states and 99472 transitions. [2019-12-28 04:24:49,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 04:24:49,276 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:49,276 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:49,276 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:49,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:49,277 INFO L82 PathProgramCache]: Analyzing trace with hash 1111812710, now seen corresponding path program 1 times [2019-12-28 04:24:49,278 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:49,278 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [314631349] [2019-12-28 04:24:49,278 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:49,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:49,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:49,363 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [314631349] [2019-12-28 04:24:49,363 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:49,364 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:49,364 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [200105396] [2019-12-28 04:24:49,364 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:49,387 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:49,415 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 99 states and 102 transitions. [2019-12-28 04:24:49,415 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:49,416 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:49,416 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:49,416 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:49,417 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:49,417 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:49,417 INFO L87 Difference]: Start difference. First operand 26114 states and 99472 transitions. Second operand 4 states. [2019-12-28 04:24:49,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:49,731 INFO L93 Difference]: Finished difference Result 25792 states and 96918 transitions. [2019-12-28 04:24:49,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:24:49,732 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 94 [2019-12-28 04:24:49,732 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:49,781 INFO L225 Difference]: With dead ends: 25792 [2019-12-28 04:24:49,781 INFO L226 Difference]: Without dead ends: 25792 [2019-12-28 04:24:49,782 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:51,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25792 states. [2019-12-28 04:24:51,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25792 to 24415. [2019-12-28 04:24:51,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24415 states. [2019-12-28 04:24:51,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24415 states to 24415 states and 92022 transitions. [2019-12-28 04:24:51,872 INFO L78 Accepts]: Start accepts. Automaton has 24415 states and 92022 transitions. Word has length 94 [2019-12-28 04:24:51,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:51,873 INFO L462 AbstractCegarLoop]: Abstraction has 24415 states and 92022 transitions. [2019-12-28 04:24:51,873 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:51,873 INFO L276 IsEmpty]: Start isEmpty. Operand 24415 states and 92022 transitions. [2019-12-28 04:24:51,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:24:51,895 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:51,895 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:51,895 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:51,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:51,896 INFO L82 PathProgramCache]: Analyzing trace with hash 823634256, now seen corresponding path program 1 times [2019-12-28 04:24:51,896 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:51,897 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [266596950] [2019-12-28 04:24:51,897 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:51,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:51,987 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:51,987 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [266596950] [2019-12-28 04:24:51,988 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:51,988 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:24:51,988 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1468190887] [2019-12-28 04:24:51,988 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:52,012 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:52,043 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:24:52,043 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:52,044 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:52,044 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 04:24:52,045 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:52,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 04:24:52,045 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:52,045 INFO L87 Difference]: Start difference. First operand 24415 states and 92022 transitions. Second operand 5 states. [2019-12-28 04:24:52,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:52,800 INFO L93 Difference]: Finished difference Result 46463 states and 173591 transitions. [2019-12-28 04:24:52,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 04:24:52,801 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 96 [2019-12-28 04:24:52,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:52,902 INFO L225 Difference]: With dead ends: 46463 [2019-12-28 04:24:52,903 INFO L226 Difference]: Without dead ends: 46463 [2019-12-28 04:24:52,903 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-28 04:24:53,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46463 states. [2019-12-28 04:24:53,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46463 to 17662. [2019-12-28 04:24:53,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17662 states. [2019-12-28 04:24:53,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17662 states to 17662 states and 66369 transitions. [2019-12-28 04:24:53,407 INFO L78 Accepts]: Start accepts. Automaton has 17662 states and 66369 transitions. Word has length 96 [2019-12-28 04:24:53,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:53,407 INFO L462 AbstractCegarLoop]: Abstraction has 17662 states and 66369 transitions. [2019-12-28 04:24:53,407 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 04:24:53,407 INFO L276 IsEmpty]: Start isEmpty. Operand 17662 states and 66369 transitions. [2019-12-28 04:24:53,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:24:53,427 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:53,427 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:53,428 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:53,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:53,428 INFO L82 PathProgramCache]: Analyzing trace with hash -973317103, now seen corresponding path program 1 times [2019-12-28 04:24:53,429 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:53,429 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1275746063] [2019-12-28 04:24:53,429 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:53,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:53,500 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:53,501 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1275746063] [2019-12-28 04:24:53,501 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:53,501 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:24:53,501 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1518892208] [2019-12-28 04:24:53,502 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:53,522 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:53,552 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:24:53,553 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:53,553 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:53,554 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:24:53,554 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:53,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:24:53,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:24:53,554 INFO L87 Difference]: Start difference. First operand 17662 states and 66369 transitions. Second operand 4 states. [2019-12-28 04:24:54,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:54,056 INFO L93 Difference]: Finished difference Result 22410 states and 83383 transitions. [2019-12-28 04:24:54,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:24:54,056 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-12-28 04:24:54,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:54,102 INFO L225 Difference]: With dead ends: 22410 [2019-12-28 04:24:54,102 INFO L226 Difference]: Without dead ends: 22410 [2019-12-28 04:24:54,102 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:24:54,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22410 states. [2019-12-28 04:24:54,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22410 to 19476. [2019-12-28 04:24:54,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19476 states. [2019-12-28 04:24:54,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19476 states to 19476 states and 72568 transitions. [2019-12-28 04:24:54,414 INFO L78 Accepts]: Start accepts. Automaton has 19476 states and 72568 transitions. Word has length 96 [2019-12-28 04:24:54,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:54,415 INFO L462 AbstractCegarLoop]: Abstraction has 19476 states and 72568 transitions. [2019-12-28 04:24:54,415 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:24:54,415 INFO L276 IsEmpty]: Start isEmpty. Operand 19476 states and 72568 transitions. [2019-12-28 04:24:54,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:24:54,439 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:54,440 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:54,440 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:54,440 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:54,440 INFO L82 PathProgramCache]: Analyzing trace with hash -1970389456, now seen corresponding path program 1 times [2019-12-28 04:24:54,441 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:54,441 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1390600200] [2019-12-28 04:24:54,441 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:54,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:54,582 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:54,583 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1390600200] [2019-12-28 04:24:54,583 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:54,583 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:24:54,584 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [129809902] [2019-12-28 04:24:54,584 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:54,621 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:54,653 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:24:54,653 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:54,654 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:54,654 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:24:54,654 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:54,655 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:24:54,655 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:24:54,655 INFO L87 Difference]: Start difference. First operand 19476 states and 72568 transitions. Second operand 6 states. [2019-12-28 04:24:55,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:55,521 INFO L93 Difference]: Finished difference Result 32166 states and 118738 transitions. [2019-12-28 04:24:55,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:24:55,521 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-12-28 04:24:55,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:55,597 INFO L225 Difference]: With dead ends: 32166 [2019-12-28 04:24:55,597 INFO L226 Difference]: Without dead ends: 32166 [2019-12-28 04:24:55,597 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:24:55,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32166 states. [2019-12-28 04:24:56,081 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32166 to 27909. [2019-12-28 04:24:56,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27909 states. [2019-12-28 04:24:56,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27909 states to 27909 states and 103207 transitions. [2019-12-28 04:24:56,157 INFO L78 Accepts]: Start accepts. Automaton has 27909 states and 103207 transitions. Word has length 96 [2019-12-28 04:24:56,157 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:24:56,157 INFO L462 AbstractCegarLoop]: Abstraction has 27909 states and 103207 transitions. [2019-12-28 04:24:56,157 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:24:56,158 INFO L276 IsEmpty]: Start isEmpty. Operand 27909 states and 103207 transitions. [2019-12-28 04:24:56,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:24:56,184 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:24:56,184 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:24:56,184 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:24:56,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:24:56,185 INFO L82 PathProgramCache]: Analyzing trace with hash 517123377, now seen corresponding path program 1 times [2019-12-28 04:24:56,185 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:24:56,186 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [878615760] [2019-12-28 04:24:56,186 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:24:56,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:24:56,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:24:56,356 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [878615760] [2019-12-28 04:24:56,356 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:24:56,357 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-28 04:24:56,362 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [696222466] [2019-12-28 04:24:56,362 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:24:56,382 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:24:56,738 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:24:56,738 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:24:56,739 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:24:56,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 04:24:56,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:24:56,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 04:24:56,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-28 04:24:56,740 INFO L87 Difference]: Start difference. First operand 27909 states and 103207 transitions. Second operand 9 states. [2019-12-28 04:24:59,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:24:59,071 INFO L93 Difference]: Finished difference Result 67691 states and 245174 transitions. [2019-12-28 04:24:59,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-28 04:24:59,074 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 96 [2019-12-28 04:24:59,074 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:24:59,222 INFO L225 Difference]: With dead ends: 67691 [2019-12-28 04:24:59,222 INFO L226 Difference]: Without dead ends: 67691 [2019-12-28 04:24:59,223 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=145, Invalid=455, Unknown=0, NotChecked=0, Total=600 [2019-12-28 04:24:59,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67691 states. [2019-12-28 04:25:00,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67691 to 34404. [2019-12-28 04:25:00,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34404 states. [2019-12-28 04:25:00,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34404 states to 34404 states and 124809 transitions. [2019-12-28 04:25:00,146 INFO L78 Accepts]: Start accepts. Automaton has 34404 states and 124809 transitions. Word has length 96 [2019-12-28 04:25:00,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:00,146 INFO L462 AbstractCegarLoop]: Abstraction has 34404 states and 124809 transitions. [2019-12-28 04:25:00,147 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 04:25:00,147 INFO L276 IsEmpty]: Start isEmpty. Operand 34404 states and 124809 transitions. [2019-12-28 04:25:00,177 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:25:00,177 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:00,177 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:00,177 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:00,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:00,178 INFO L82 PathProgramCache]: Analyzing trace with hash 1478737394, now seen corresponding path program 1 times [2019-12-28 04:25:00,178 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:00,178 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1855713029] [2019-12-28 04:25:00,178 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:00,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:00,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:00,242 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1855713029] [2019-12-28 04:25:00,242 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:00,243 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:25:00,243 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1643978389] [2019-12-28 04:25:00,243 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:00,262 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:00,295 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:25:00,295 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:00,296 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:25:00,296 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:25:00,297 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:00,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:25:00,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:25:00,297 INFO L87 Difference]: Start difference. First operand 34404 states and 124809 transitions. Second operand 4 states. [2019-12-28 04:25:01,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:01,153 INFO L93 Difference]: Finished difference Result 34278 states and 123966 transitions. [2019-12-28 04:25:01,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:25:01,153 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 96 [2019-12-28 04:25:01,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:01,220 INFO L225 Difference]: With dead ends: 34278 [2019-12-28 04:25:01,220 INFO L226 Difference]: Without dead ends: 33279 [2019-12-28 04:25:01,220 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:25:01,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33279 states. [2019-12-28 04:25:01,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33279 to 28027. [2019-12-28 04:25:01,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28027 states. [2019-12-28 04:25:01,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28027 states to 28027 states and 101374 transitions. [2019-12-28 04:25:01,729 INFO L78 Accepts]: Start accepts. Automaton has 28027 states and 101374 transitions. Word has length 96 [2019-12-28 04:25:01,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:01,729 INFO L462 AbstractCegarLoop]: Abstraction has 28027 states and 101374 transitions. [2019-12-28 04:25:01,729 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:25:01,730 INFO L276 IsEmpty]: Start isEmpty. Operand 28027 states and 101374 transitions. [2019-12-28 04:25:01,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:25:01,754 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:01,755 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:01,755 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:01,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:01,755 INFO L82 PathProgramCache]: Analyzing trace with hash -1302178446, now seen corresponding path program 1 times [2019-12-28 04:25:01,756 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:01,756 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [51739093] [2019-12-28 04:25:01,756 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:01,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:01,879 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:01,879 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [51739093] [2019-12-28 04:25:01,880 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:01,880 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:25:01,880 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [296890328] [2019-12-28 04:25:01,880 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:01,899 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:01,933 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:25:01,933 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:01,934 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:25:01,934 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:25:01,934 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:01,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:25:01,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:25:01,935 INFO L87 Difference]: Start difference. First operand 28027 states and 101374 transitions. Second operand 6 states. [2019-12-28 04:25:02,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:02,351 INFO L93 Difference]: Finished difference Result 32376 states and 116433 transitions. [2019-12-28 04:25:02,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:25:02,351 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-12-28 04:25:02,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:02,420 INFO L225 Difference]: With dead ends: 32376 [2019-12-28 04:25:02,421 INFO L226 Difference]: Without dead ends: 32376 [2019-12-28 04:25:02,421 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:25:02,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32376 states. [2019-12-28 04:25:02,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32376 to 28782. [2019-12-28 04:25:02,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28782 states. [2019-12-28 04:25:02,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28782 states to 28782 states and 103909 transitions. [2019-12-28 04:25:02,917 INFO L78 Accepts]: Start accepts. Automaton has 28782 states and 103909 transitions. Word has length 96 [2019-12-28 04:25:02,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:02,917 INFO L462 AbstractCegarLoop]: Abstraction has 28782 states and 103909 transitions. [2019-12-28 04:25:02,917 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:25:02,917 INFO L276 IsEmpty]: Start isEmpty. Operand 28782 states and 103909 transitions. [2019-12-28 04:25:02,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:25:02,940 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:02,940 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:02,941 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:02,941 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:02,941 INFO L82 PathProgramCache]: Analyzing trace with hash -57413965, now seen corresponding path program 1 times [2019-12-28 04:25:02,942 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:02,942 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392780469] [2019-12-28 04:25:02,942 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:02,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:03,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:03,068 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1392780469] [2019-12-28 04:25:03,068 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:03,068 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 04:25:03,068 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [585801253] [2019-12-28 04:25:03,068 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:03,090 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:03,410 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:25:03,410 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:03,411 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:25:03,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 04:25:03,411 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:03,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 04:25:03,412 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:25:03,412 INFO L87 Difference]: Start difference. First operand 28782 states and 103909 transitions. Second operand 8 states. [2019-12-28 04:25:04,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:04,156 INFO L93 Difference]: Finished difference Result 34527 states and 122631 transitions. [2019-12-28 04:25:04,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 04:25:04,156 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 96 [2019-12-28 04:25:04,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:04,218 INFO L225 Difference]: With dead ends: 34527 [2019-12-28 04:25:04,218 INFO L226 Difference]: Without dead ends: 34527 [2019-12-28 04:25:04,219 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=96, Unknown=0, NotChecked=0, Total=132 [2019-12-28 04:25:04,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34527 states. [2019-12-28 04:25:04,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34527 to 28837. [2019-12-28 04:25:04,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28837 states. [2019-12-28 04:25:04,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28837 states to 28837 states and 102790 transitions. [2019-12-28 04:25:04,688 INFO L78 Accepts]: Start accepts. Automaton has 28837 states and 102790 transitions. Word has length 96 [2019-12-28 04:25:04,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:04,689 INFO L462 AbstractCegarLoop]: Abstraction has 28837 states and 102790 transitions. [2019-12-28 04:25:04,689 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 04:25:04,689 INFO L276 IsEmpty]: Start isEmpty. Operand 28837 states and 102790 transitions. [2019-12-28 04:25:04,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2019-12-28 04:25:04,712 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:04,712 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:04,712 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:04,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:04,713 INFO L82 PathProgramCache]: Analyzing trace with hash -1864868428, now seen corresponding path program 1 times [2019-12-28 04:25:04,713 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:04,713 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [999839281] [2019-12-28 04:25:04,714 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:04,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:04,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:04,803 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [999839281] [2019-12-28 04:25:04,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:04,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:25:04,803 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2115702815] [2019-12-28 04:25:04,803 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:04,819 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:04,850 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 101 states and 104 transitions. [2019-12-28 04:25:04,850 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:04,851 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:25:04,851 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:25:04,851 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:04,851 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:25:04,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:25:04,852 INFO L87 Difference]: Start difference. First operand 28837 states and 102790 transitions. Second operand 6 states. [2019-12-28 04:25:04,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:04,948 INFO L93 Difference]: Finished difference Result 8911 states and 27784 transitions. [2019-12-28 04:25:04,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 04:25:04,948 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 96 [2019-12-28 04:25:04,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:04,959 INFO L225 Difference]: With dead ends: 8911 [2019-12-28 04:25:04,960 INFO L226 Difference]: Without dead ends: 7678 [2019-12-28 04:25:04,960 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-28 04:25:04,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7678 states. [2019-12-28 04:25:05,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7678 to 6646. [2019-12-28 04:25:05,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6646 states. [2019-12-28 04:25:05,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6646 states to 6646 states and 20237 transitions. [2019-12-28 04:25:05,042 INFO L78 Accepts]: Start accepts. Automaton has 6646 states and 20237 transitions. Word has length 96 [2019-12-28 04:25:05,043 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:05,043 INFO L462 AbstractCegarLoop]: Abstraction has 6646 states and 20237 transitions. [2019-12-28 04:25:05,043 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:25:05,043 INFO L276 IsEmpty]: Start isEmpty. Operand 6646 states and 20237 transitions. [2019-12-28 04:25:05,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-12-28 04:25:05,052 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:05,053 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:05,053 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:05,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:05,053 INFO L82 PathProgramCache]: Analyzing trace with hash -1126666891, now seen corresponding path program 1 times [2019-12-28 04:25:05,054 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:05,054 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [442148745] [2019-12-28 04:25:05,054 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:05,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:05,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:05,122 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [442148745] [2019-12-28 04:25:05,122 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:05,122 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:25:05,123 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1144814610] [2019-12-28 04:25:05,123 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:05,146 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:05,323 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 234 states and 371 transitions. [2019-12-28 04:25:05,324 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:05,352 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 04:25:05,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:25:05,352 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:05,353 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:25:05,353 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:25:05,353 INFO L87 Difference]: Start difference. First operand 6646 states and 20237 transitions. Second operand 6 states. [2019-12-28 04:25:05,748 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:05,749 INFO L93 Difference]: Finished difference Result 22501 states and 69334 transitions. [2019-12-28 04:25:05,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 04:25:05,749 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 113 [2019-12-28 04:25:05,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:05,821 INFO L225 Difference]: With dead ends: 22501 [2019-12-28 04:25:05,821 INFO L226 Difference]: Without dead ends: 22501 [2019-12-28 04:25:05,824 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2019-12-28 04:25:05,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22501 states. [2019-12-28 04:25:06,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22501 to 8118. [2019-12-28 04:25:06,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8118 states. [2019-12-28 04:25:06,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8118 states to 8118 states and 24855 transitions. [2019-12-28 04:25:06,223 INFO L78 Accepts]: Start accepts. Automaton has 8118 states and 24855 transitions. Word has length 113 [2019-12-28 04:25:06,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:06,223 INFO L462 AbstractCegarLoop]: Abstraction has 8118 states and 24855 transitions. [2019-12-28 04:25:06,223 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:25:06,223 INFO L276 IsEmpty]: Start isEmpty. Operand 8118 states and 24855 transitions. [2019-12-28 04:25:06,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-12-28 04:25:06,251 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:06,251 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:06,252 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:06,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:06,252 INFO L82 PathProgramCache]: Analyzing trace with hash 1877825045, now seen corresponding path program 1 times [2019-12-28 04:25:06,253 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:06,253 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1275892264] [2019-12-28 04:25:06,253 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:06,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:06,514 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification that was a NOOP. DAG size: 6 [2019-12-28 04:25:06,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:06,608 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1275892264] [2019-12-28 04:25:06,608 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:06,608 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-28 04:25:06,608 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [817581070] [2019-12-28 04:25:06,608 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:06,669 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:06,870 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 234 states and 371 transitions. [2019-12-28 04:25:06,871 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:07,016 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 9 times. [2019-12-28 04:25:07,017 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-28 04:25:07,017 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:07,017 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-28 04:25:07,017 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-28 04:25:07,018 INFO L87 Difference]: Start difference. First operand 8118 states and 24855 transitions. Second operand 15 states. [2019-12-28 04:25:09,114 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 39 [2019-12-28 04:25:09,630 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 43 [2019-12-28 04:25:13,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:13,439 INFO L93 Difference]: Finished difference Result 50883 states and 151244 transitions. [2019-12-28 04:25:13,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 82 states. [2019-12-28 04:25:13,439 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 113 [2019-12-28 04:25:13,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:13,508 INFO L225 Difference]: With dead ends: 50883 [2019-12-28 04:25:13,509 INFO L226 Difference]: Without dead ends: 50883 [2019-12-28 04:25:13,511 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 13 SyntacticMatches, 3 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2500 ImplicationChecksByTransitivity, 3.4s TimeCoverageRelationStatistics Valid=1154, Invalid=6156, Unknown=0, NotChecked=0, Total=7310 [2019-12-28 04:25:13,579 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50883 states. [2019-12-28 04:25:14,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50883 to 11590. [2019-12-28 04:25:14,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11590 states. [2019-12-28 04:25:14,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11590 states to 11590 states and 35675 transitions. [2019-12-28 04:25:14,124 INFO L78 Accepts]: Start accepts. Automaton has 11590 states and 35675 transitions. Word has length 113 [2019-12-28 04:25:14,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:14,124 INFO L462 AbstractCegarLoop]: Abstraction has 11590 states and 35675 transitions. [2019-12-28 04:25:14,124 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-28 04:25:14,124 INFO L276 IsEmpty]: Start isEmpty. Operand 11590 states and 35675 transitions. [2019-12-28 04:25:14,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2019-12-28 04:25:14,137 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:14,137 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:14,137 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:14,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:14,138 INFO L82 PathProgramCache]: Analyzing trace with hash 70370582, now seen corresponding path program 1 times [2019-12-28 04:25:14,139 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:14,139 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [560186933] [2019-12-28 04:25:14,139 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:14,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:14,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:14,190 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [560186933] [2019-12-28 04:25:14,190 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:14,190 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 04:25:14,190 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [253481952] [2019-12-28 04:25:14,190 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:14,215 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:14,344 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 234 states and 371 transitions. [2019-12-28 04:25:14,345 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:14,346 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 04:25:14,347 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 04:25:14,347 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:14,347 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 04:25:14,347 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:25:14,347 INFO L87 Difference]: Start difference. First operand 11590 states and 35675 transitions. Second operand 3 states. [2019-12-28 04:25:14,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:14,380 INFO L93 Difference]: Finished difference Result 11590 states and 35648 transitions. [2019-12-28 04:25:14,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 04:25:14,380 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 113 [2019-12-28 04:25:14,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:14,397 INFO L225 Difference]: With dead ends: 11590 [2019-12-28 04:25:14,397 INFO L226 Difference]: Without dead ends: 11590 [2019-12-28 04:25:14,397 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:25:14,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11590 states. [2019-12-28 04:25:14,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11590 to 11590. [2019-12-28 04:25:14,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11590 states. [2019-12-28 04:25:14,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11590 states to 11590 states and 35648 transitions. [2019-12-28 04:25:14,556 INFO L78 Accepts]: Start accepts. Automaton has 11590 states and 35648 transitions. Word has length 113 [2019-12-28 04:25:14,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:14,557 INFO L462 AbstractCegarLoop]: Abstraction has 11590 states and 35648 transitions. [2019-12-28 04:25:14,557 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 04:25:14,557 INFO L276 IsEmpty]: Start isEmpty. Operand 11590 states and 35648 transitions. [2019-12-28 04:25:14,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-12-28 04:25:14,571 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:14,571 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:14,571 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:14,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:14,571 INFO L82 PathProgramCache]: Analyzing trace with hash -1192348262, now seen corresponding path program 1 times [2019-12-28 04:25:14,572 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:14,572 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549715566] [2019-12-28 04:25:14,572 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:14,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:14,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:14,708 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549715566] [2019-12-28 04:25:14,708 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:14,708 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 04:25:14,709 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [436986291] [2019-12-28 04:25:14,709 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:14,734 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:14,886 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 236 states and 373 transitions. [2019-12-28 04:25:14,886 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:14,887 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:25:14,887 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 04:25:14,887 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:14,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 04:25:14,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:25:14,888 INFO L87 Difference]: Start difference. First operand 11590 states and 35648 transitions. Second operand 7 states. [2019-12-28 04:25:15,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:15,007 INFO L93 Difference]: Finished difference Result 13525 states and 41144 transitions. [2019-12-28 04:25:15,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 04:25:15,008 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 115 [2019-12-28 04:25:15,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:15,015 INFO L225 Difference]: With dead ends: 13525 [2019-12-28 04:25:15,015 INFO L226 Difference]: Without dead ends: 4912 [2019-12-28 04:25:15,016 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-28 04:25:15,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4912 states. [2019-12-28 04:25:15,059 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4912 to 4912. [2019-12-28 04:25:15,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4912 states. [2019-12-28 04:25:15,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4912 states to 4912 states and 12725 transitions. [2019-12-28 04:25:15,066 INFO L78 Accepts]: Start accepts. Automaton has 4912 states and 12725 transitions. Word has length 115 [2019-12-28 04:25:15,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:15,067 INFO L462 AbstractCegarLoop]: Abstraction has 4912 states and 12725 transitions. [2019-12-28 04:25:15,067 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 04:25:15,067 INFO L276 IsEmpty]: Start isEmpty. Operand 4912 states and 12725 transitions. [2019-12-28 04:25:15,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-12-28 04:25:15,071 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:15,071 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:15,071 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:15,071 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:15,071 INFO L82 PathProgramCache]: Analyzing trace with hash -212202412, now seen corresponding path program 2 times [2019-12-28 04:25:15,072 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:15,072 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1701059791] [2019-12-28 04:25:15,072 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:15,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:15,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:15,174 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1701059791] [2019-12-28 04:25:15,174 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:15,174 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 04:25:15,175 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1848501585] [2019-12-28 04:25:15,175 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:15,199 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:15,350 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 209 states and 301 transitions. [2019-12-28 04:25:15,350 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:15,365 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 04:25:15,365 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 04:25:15,365 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:15,366 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 04:25:15,366 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:25:15,366 INFO L87 Difference]: Start difference. First operand 4912 states and 12725 transitions. Second operand 8 states. [2019-12-28 04:25:15,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:15,457 INFO L93 Difference]: Finished difference Result 6586 states and 17576 transitions. [2019-12-28 04:25:15,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 04:25:15,457 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 115 [2019-12-28 04:25:15,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:15,463 INFO L225 Difference]: With dead ends: 6586 [2019-12-28 04:25:15,463 INFO L226 Difference]: Without dead ends: 2830 [2019-12-28 04:25:15,463 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2019-12-28 04:25:15,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2830 states. [2019-12-28 04:25:15,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2830 to 2830. [2019-12-28 04:25:15,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2830 states. [2019-12-28 04:25:15,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2830 states to 2830 states and 7403 transitions. [2019-12-28 04:25:15,493 INFO L78 Accepts]: Start accepts. Automaton has 2830 states and 7403 transitions. Word has length 115 [2019-12-28 04:25:15,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:15,493 INFO L462 AbstractCegarLoop]: Abstraction has 2830 states and 7403 transitions. [2019-12-28 04:25:15,493 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 04:25:15,493 INFO L276 IsEmpty]: Start isEmpty. Operand 2830 states and 7403 transitions. [2019-12-28 04:25:15,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-12-28 04:25:15,496 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:15,496 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:15,496 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:15,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:15,497 INFO L82 PathProgramCache]: Analyzing trace with hash 1053398540, now seen corresponding path program 3 times [2019-12-28 04:25:15,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:15,497 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [483326457] [2019-12-28 04:25:15,497 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:15,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:25:15,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:25:15,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [483326457] [2019-12-28 04:25:15,610 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:25:15,610 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:25:15,610 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [31683437] [2019-12-28 04:25:15,610 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:25:15,635 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:25:15,968 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 182 states and 247 transitions. [2019-12-28 04:25:15,968 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:25:16,043 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 9 times. [2019-12-28 04:25:16,043 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 04:25:16,043 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:25:16,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 04:25:16,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:25:16,044 INFO L87 Difference]: Start difference. First operand 2830 states and 7403 transitions. Second operand 7 states. [2019-12-28 04:25:16,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:25:16,132 INFO L93 Difference]: Finished difference Result 2654 states and 6927 transitions. [2019-12-28 04:25:16,132 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 04:25:16,132 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 115 [2019-12-28 04:25:16,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:25:16,137 INFO L225 Difference]: With dead ends: 2654 [2019-12-28 04:25:16,137 INFO L226 Difference]: Without dead ends: 2654 [2019-12-28 04:25:16,138 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:25:16,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2654 states. [2019-12-28 04:25:16,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2654 to 2644. [2019-12-28 04:25:16,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2644 states. [2019-12-28 04:25:16,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2644 states to 2644 states and 6909 transitions. [2019-12-28 04:25:16,181 INFO L78 Accepts]: Start accepts. Automaton has 2644 states and 6909 transitions. Word has length 115 [2019-12-28 04:25:16,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:25:16,181 INFO L462 AbstractCegarLoop]: Abstraction has 2644 states and 6909 transitions. [2019-12-28 04:25:16,182 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 04:25:16,182 INFO L276 IsEmpty]: Start isEmpty. Operand 2644 states and 6909 transitions. [2019-12-28 04:25:16,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2019-12-28 04:25:16,186 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:25:16,186 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:25:16,186 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:25:16,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:25:16,186 INFO L82 PathProgramCache]: Analyzing trace with hash 1976082123, now seen corresponding path program 1 times [2019-12-28 04:25:16,187 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:25:16,187 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1782826013] [2019-12-28 04:25:16,188 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:25:16,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 04:25:16,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 04:25:16,330 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-28 04:25:16,330 INFO L476 BasicCegarLoop]: Counterexample might be feasible [2019-12-28 04:25:16,644 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.12 04:25:16 BasicIcfg [2019-12-28 04:25:16,644 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-28 04:25:16,646 INFO L168 Benchmark]: Toolchain (without parser) took 77948.27 ms. Allocated memory was 137.9 MB in the beginning and 2.9 GB in the end (delta: 2.7 GB). Free memory was 101.1 MB in the beginning and 2.1 GB in the end (delta: -2.0 GB). Peak memory consumption was 762.7 MB. Max. memory is 7.1 GB. [2019-12-28 04:25:16,646 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 137.9 MB. Free memory is still 120.7 MB. There was no memory consumed. Max. memory is 7.1 GB. [2019-12-28 04:25:16,647 INFO L168 Benchmark]: CACSL2BoogieTranslator took 811.71 ms. Allocated memory was 137.9 MB in the beginning and 202.9 MB in the end (delta: 65.0 MB). Free memory was 100.7 MB in the beginning and 154.1 MB in the end (delta: -53.4 MB). Peak memory consumption was 24.3 MB. Max. memory is 7.1 GB. [2019-12-28 04:25:16,647 INFO L168 Benchmark]: Boogie Procedure Inliner took 62.42 ms. Allocated memory is still 202.9 MB. Free memory was 154.1 MB in the beginning and 152.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. [2019-12-28 04:25:16,648 INFO L168 Benchmark]: Boogie Preprocessor took 38.62 ms. Allocated memory is still 202.9 MB. Free memory was 152.1 MB in the beginning and 150.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. [2019-12-28 04:25:16,649 INFO L168 Benchmark]: RCFGBuilder took 852.87 ms. Allocated memory is still 202.9 MB. Free memory was 150.1 MB in the beginning and 100.6 MB in the end (delta: 49.5 MB). Peak memory consumption was 49.5 MB. Max. memory is 7.1 GB. [2019-12-28 04:25:16,649 INFO L168 Benchmark]: TraceAbstraction took 76177.60 ms. Allocated memory was 202.9 MB in the beginning and 2.9 GB in the end (delta: 2.7 GB). Free memory was 100.6 MB in the beginning and 2.1 GB in the end (delta: -2.0 GB). Peak memory consumption was 697.2 MB. Max. memory is 7.1 GB. [2019-12-28 04:25:16,652 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 137.9 MB. Free memory is still 120.7 MB. There was no memory consumed. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 811.71 ms. Allocated memory was 137.9 MB in the beginning and 202.9 MB in the end (delta: 65.0 MB). Free memory was 100.7 MB in the beginning and 154.1 MB in the end (delta: -53.4 MB). Peak memory consumption was 24.3 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 62.42 ms. Allocated memory is still 202.9 MB. Free memory was 154.1 MB in the beginning and 152.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 38.62 ms. Allocated memory is still 202.9 MB. Free memory was 152.1 MB in the beginning and 150.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. * RCFGBuilder took 852.87 ms. Allocated memory is still 202.9 MB. Free memory was 150.1 MB in the beginning and 100.6 MB in the end (delta: 49.5 MB). Peak memory consumption was 49.5 MB. Max. memory is 7.1 GB. * TraceAbstraction took 76177.60 ms. Allocated memory was 202.9 MB in the beginning and 2.9 GB in the end (delta: 2.7 GB). Free memory was 100.6 MB in the beginning and 2.1 GB in the end (delta: -2.0 GB). Peak memory consumption was 697.2 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L696] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L698] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L699] 0 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0] [L700] 0 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0] [L701] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0] [L702] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0] [L703] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0] [L704] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0] [L705] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0] [L706] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0] [L707] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0] [L708] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0] [L709] 0 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0] [L710] 0 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}] [L711] 0 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0] [L712] 0 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0] [L713] 0 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0] [L714] 0 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0] [L716] 0 int __unbuffered_p1_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0] [L718] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0] [L719] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L720] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L722] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L724] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L726] 0 int z = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}] [L727] 0 _Bool z$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0] [L728] 0 int z$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0] [L729] 0 _Bool z$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0] [L730] 0 _Bool z$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0] [L731] 0 _Bool z$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0] [L732] 0 _Bool z$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0] [L733] 0 _Bool z$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0] [L734] 0 _Bool z$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0] [L735] 0 _Bool z$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0] [L736] 0 _Bool z$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0] [L737] 0 _Bool z$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0] [L738] 0 int *z$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}] [L739] 0 int z$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0] [L740] 0 _Bool z$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0] [L741] 0 int z$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0] [L742] 0 _Bool z$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L743] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L744] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L745] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L822] 0 pthread_t t1952; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L823] FCALL, FORK 0 pthread_create(&t1952, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L824] 0 pthread_t t1953; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L749] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L750] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L751] 1 z$flush_delayed = weak$$choice2 [L752] EXPR 1 \read(z) [L752] 1 z$mem_tmp = z [L753] EXPR 1 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L753] EXPR 1 \read(z) [L753] EXPR 1 !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L825] FCALL, FORK 0 pthread_create(&t1953, ((void *)0), P1, ((void *)0)) VAL [!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1)=0, \read(z)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L753] 1 z = !z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff1) [L754] EXPR 1 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L826] 0 pthread_t t1954; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L827] FCALL, FORK 0 pthread_create(&t1954, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L754] 1 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : z$w_buff0)) [L755] EXPR 1 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L755] 1 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff1 : z$w_buff1)) [L756] EXPR 1 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L756] 1 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used)) [L757] EXPR 1 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L757] 1 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L758] EXPR 1 weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L758] 1 z$r_buff0_thd1 = weak$$choice2 ? z$r_buff0_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff0_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$r_buff0_thd1)) [L759] EXPR 1 weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y=0, z={5:0}, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L759] 1 z$r_buff1_thd1 = weak$$choice2 ? z$r_buff1_thd1 : (!z$w_buff0_used || !z$r_buff0_thd1 && !z$w_buff1_used || !z$r_buff0_thd1 && !z$r_buff1_thd1 ? z$r_buff1_thd1 : (z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L760] 1 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L761] 1 __unbuffered_p0_EAX$read_delayed_var = &z [L762] EXPR 1 \read(z) [L762] 1 __unbuffered_p0_EAX = z [L763] EXPR 1 z$flush_delayed ? z$mem_tmp : z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z={5:0}, z$flush_delayed=1, z$flush_delayed ? z$mem_tmp : z=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L763] 1 z = z$flush_delayed ? z$mem_tmp : z [L764] 1 z$flush_delayed = (_Bool)0 [L767] 1 x = 1 [L772] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=0, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L779] 2 __unbuffered_p1_EAX = x [L782] 2 y = 1 [L787] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L794] 3 __unbuffered_p2_EAX = y [L797] 3 z = 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] EXPR 3 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z [L800] EXPR 3 \read(z) [L800] EXPR 3 z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L800] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\read(z)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z)=1, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z=1] [L800] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L801] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L801] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L802] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used=0, z$w_buff1=0, z$w_buff1_used=0] [L802] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L803] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L803] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L804] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3=0, z$w_buff1=0, z$w_buff1_used=0] [L804] 3 z$r_buff1_thd3 = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$r_buff1_thd3 [L807] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L829] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] EXPR 0 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z [L833] EXPR 0 \read(z) [L833] EXPR 0 z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L833] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L834] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L834] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L835] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L835] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L836] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L836] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L837] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L840] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L841] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L841] EXPR 0 \read(*__unbuffered_p0_EAX$read_delayed_var) [L841] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] 0 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L842] 0 main$tmp_guard1 = !(__unbuffered_p0_EAX == 1 && __unbuffered_p1_EAX == 1 && __unbuffered_p2_EAX == 1) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] COND TRUE 0 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L5] 0 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=1, y=1, z={5:0}, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 161 locations, 1 error locations. Result: UNSAFE, OverallTime: 75.6s, OverallIterations: 20, TraceHistogramMax: 1, AutomataDifference: 32.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5147 SDtfs, 7997 SDslu, 16359 SDs, 0 SdLazy, 6893 SolverSat, 457 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 291 GetRequests, 74 SyntacticMatches, 15 SemanticMatches, 202 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2645 ImplicationChecksByTransitivity, 4.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=121677occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 24.1s AutomataMinimizationTime, 19 MinimizatonAttempts, 161774 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 1988 NumberOfCodeBlocks, 1988 NumberOfCodeBlocksAsserted, 20 NumberOfCheckSat, 1854 ConstructedInterpolants, 0 QuantifiedInterpolants, 465699 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 19 InterpolantComputations, 19 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...