/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf -i ../../../trunk/examples/svcomp/pthread-wmm/safe014_rmo.oepc.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-4336eb1 [2019-12-28 04:40:46,912 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-28 04:40:46,915 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-28 04:40:46,934 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-28 04:40:46,934 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-28 04:40:46,936 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-28 04:40:46,938 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-28 04:40:46,948 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-28 04:40:46,951 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-28 04:40:46,954 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-28 04:40:46,956 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-28 04:40:46,958 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-28 04:40:46,958 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-28 04:40:46,960 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-28 04:40:46,962 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-28 04:40:46,964 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-28 04:40:46,965 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-28 04:40:46,966 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-28 04:40:46,967 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-28 04:40:46,972 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-28 04:40:46,976 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-28 04:40:46,980 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-28 04:40:46,981 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-28 04:40:46,983 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-28 04:40:46,985 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-12-28 04:40:46,990 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-28 04:40:46,991 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-28 04:40:46,991 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-28 04:40:46,992 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-28 04:40:46,993 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-28 04:40:46,994 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-28 04:40:46,994 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-28 04:40:46,994 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-28 04:40:46,995 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-28 04:40:46,995 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-28 04:40:46,997 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-28 04:40:46,997 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf [2019-12-28 04:40:47,025 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-28 04:40:47,026 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-28 04:40:47,027 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-28 04:40:47,027 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-28 04:40:47,027 INFO L138 SettingsManager]: * Use SBE=true [2019-12-28 04:40:47,027 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-28 04:40:47,028 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-28 04:40:47,028 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-28 04:40:47,028 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-28 04:40:47,028 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-28 04:40:47,029 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-28 04:40:47,029 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-28 04:40:47,029 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-28 04:40:47,029 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-28 04:40:47,029 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-28 04:40:47,030 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-28 04:40:47,030 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-28 04:40:47,030 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-28 04:40:47,030 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-28 04:40:47,030 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-28 04:40:47,031 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-28 04:40:47,031 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 04:40:47,031 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-28 04:40:47,031 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-28 04:40:47,031 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-28 04:40:47,032 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-28 04:40:47,032 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-28 04:40:47,032 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2019-12-28 04:40:47,032 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2019-12-28 04:40:47,032 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-28 04:40:47,033 INFO L138 SettingsManager]: * Interpolant automaton=MCR [2019-12-28 04:40:47,033 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-28 04:40:47,319 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-28 04:40:47,339 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-28 04:40:47,343 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-28 04:40:47,345 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-28 04:40:47,346 INFO L275 PluginConnector]: CDTParser initialized [2019-12-28 04:40:47,347 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/safe014_rmo.oepc.i [2019-12-28 04:40:47,410 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f26105682/b41c4cb26751468aacaa47846c8e9527/FLAGb19a5d0b3 [2019-12-28 04:40:47,926 INFO L306 CDTParser]: Found 1 translation units. [2019-12-28 04:40:47,929 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe014_rmo.oepc.i [2019-12-28 04:40:47,945 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f26105682/b41c4cb26751468aacaa47846c8e9527/FLAGb19a5d0b3 [2019-12-28 04:40:48,252 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/f26105682/b41c4cb26751468aacaa47846c8e9527 [2019-12-28 04:40:48,261 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-28 04:40:48,263 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-12-28 04:40:48,264 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-28 04:40:48,264 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-28 04:40:48,270 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-28 04:40:48,271 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 04:40:48" (1/1) ... [2019-12-28 04:40:48,273 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2cc7de13 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:48, skipping insertion in model container [2019-12-28 04:40:48,273 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 04:40:48" (1/1) ... [2019-12-28 04:40:48,281 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-28 04:40:48,343 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-28 04:40:48,879 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 04:40:48,892 INFO L203 MainTranslator]: Completed pre-run [2019-12-28 04:40:49,003 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 04:40:49,091 INFO L208 MainTranslator]: Completed translation [2019-12-28 04:40:49,091 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:49 WrapperNode [2019-12-28 04:40:49,092 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-28 04:40:49,092 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-28 04:40:49,092 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-28 04:40:49,093 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-28 04:40:49,102 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:49" (1/1) ... [2019-12-28 04:40:49,130 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:49" (1/1) ... [2019-12-28 04:40:49,162 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-28 04:40:49,162 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-28 04:40:49,162 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-28 04:40:49,162 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-28 04:40:49,173 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:49" (1/1) ... [2019-12-28 04:40:49,173 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:49" (1/1) ... [2019-12-28 04:40:49,178 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:49" (1/1) ... [2019-12-28 04:40:49,178 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:49" (1/1) ... [2019-12-28 04:40:49,193 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:49" (1/1) ... [2019-12-28 04:40:49,198 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:49" (1/1) ... [2019-12-28 04:40:49,201 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:49" (1/1) ... [2019-12-28 04:40:49,207 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-28 04:40:49,207 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-28 04:40:49,208 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-28 04:40:49,208 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-28 04:40:49,209 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:49" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 04:40:49,281 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-12-28 04:40:49,282 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-28 04:40:49,282 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-28 04:40:49,282 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-28 04:40:49,282 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-28 04:40:49,282 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-28 04:40:49,283 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-28 04:40:49,283 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-28 04:40:49,283 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-28 04:40:49,283 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-28 04:40:49,284 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-28 04:40:49,284 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-12-28 04:40:49,284 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-28 04:40:49,284 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-28 04:40:49,284 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-28 04:40:49,286 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-28 04:40:50,020 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-28 04:40:50,020 INFO L287 CfgBuilder]: Removed 6 assume(true) statements. [2019-12-28 04:40:50,022 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 04:40:50 BoogieIcfgContainer [2019-12-28 04:40:50,023 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-28 04:40:50,024 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-28 04:40:50,024 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-28 04:40:50,030 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-28 04:40:50,030 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.12 04:40:48" (1/3) ... [2019-12-28 04:40:50,031 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@efdaed8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 04:40:50, skipping insertion in model container [2019-12-28 04:40:50,032 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 04:40:49" (2/3) ... [2019-12-28 04:40:50,032 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@efdaed8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 04:40:50, skipping insertion in model container [2019-12-28 04:40:50,033 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 04:40:50" (3/3) ... [2019-12-28 04:40:50,035 INFO L109 eAbstractionObserver]: Analyzing ICFG safe014_rmo.oepc.i [2019-12-28 04:40:50,046 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-28 04:40:50,046 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-28 04:40:50,058 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-28 04:40:50,059 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-28 04:40:50,120 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,121 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,121 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,121 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,121 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,121 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,122 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,122 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,122 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,123 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,123 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,125 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,125 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,125 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,125 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,126 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,127 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,128 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,129 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,129 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,129 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,130 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,130 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,130 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,130 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,131 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,132 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,132 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,133 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,133 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,133 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,134 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,134 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,135 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,135 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,135 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,135 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,135 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,136 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,136 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,136 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,136 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,137 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,138 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,138 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,138 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,139 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,139 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,139 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,139 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,140 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,140 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,140 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,140 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,141 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,141 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,142 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,142 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,142 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,142 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,143 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,143 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,143 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,143 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,143 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,144 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,144 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,144 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,159 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,161 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,162 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,163 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,164 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,166 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,167 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,167 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,167 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,168 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,172 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,172 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,174 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,174 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,182 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,182 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,183 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,184 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,184 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,185 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,186 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,186 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,187 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,188 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,189 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,190 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,191 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,194 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,195 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,195 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,196 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,196 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,202 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,202 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,203 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,203 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,203 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,203 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,203 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,204 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,204 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,204 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,204 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,204 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,204 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,205 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,205 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,205 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,205 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,206 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,206 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,206 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,206 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,207 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,208 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,211 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,211 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,212 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 04:40:50,227 INFO L249 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2019-12-28 04:40:50,248 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-28 04:40:50,248 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-28 04:40:50,248 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-28 04:40:50,248 INFO L376 AbstractCegarLoop]: Backedges is MCR [2019-12-28 04:40:50,248 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-28 04:40:50,249 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-28 04:40:50,249 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-28 04:40:50,249 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-28 04:40:50,263 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 169 places, 195 transitions [2019-12-28 04:41:02,912 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 101068 states. [2019-12-28 04:41:02,914 INFO L276 IsEmpty]: Start isEmpty. Operand 101068 states. [2019-12-28 04:41:03,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-12-28 04:41:03,053 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:41:03,054 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:41:03,055 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:41:03,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:41:03,062 INFO L82 PathProgramCache]: Analyzing trace with hash -916525203, now seen corresponding path program 1 times [2019-12-28 04:41:03,077 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:41:03,077 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [543941401] [2019-12-28 04:41:03,078 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:41:03,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:41:03,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:41:03,615 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [543941401] [2019-12-28 04:41:03,616 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:41:03,616 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:41:03,617 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [984897683] [2019-12-28 04:41:03,618 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:41:03,770 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:41:03,812 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 80 states and 79 transitions. [2019-12-28 04:41:03,813 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:41:03,818 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:41:03,818 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:41:03,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:41:03,833 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:41:03,834 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:41:03,836 INFO L87 Difference]: Start difference. First operand 101068 states. Second operand 6 states. [2019-12-28 04:41:08,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:41:08,876 INFO L93 Difference]: Finished difference Result 198220 states and 878884 transitions. [2019-12-28 04:41:08,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 04:41:08,878 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 79 [2019-12-28 04:41:08,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:41:10,046 INFO L225 Difference]: With dead ends: 198220 [2019-12-28 04:41:10,046 INFO L226 Difference]: Without dead ends: 139340 [2019-12-28 04:41:10,048 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-28 04:41:11,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139340 states. [2019-12-28 04:41:18,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139340 to 124420. [2019-12-28 04:41:18,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124420 states. [2019-12-28 04:41:23,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124420 states to 124420 states and 567278 transitions. [2019-12-28 04:41:23,654 INFO L78 Accepts]: Start accepts. Automaton has 124420 states and 567278 transitions. Word has length 79 [2019-12-28 04:41:23,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:41:23,656 INFO L462 AbstractCegarLoop]: Abstraction has 124420 states and 567278 transitions. [2019-12-28 04:41:23,656 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:41:23,656 INFO L276 IsEmpty]: Start isEmpty. Operand 124420 states and 567278 transitions. [2019-12-28 04:41:23,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-12-28 04:41:23,822 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:41:23,823 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:41:23,823 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:41:23,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:41:23,824 INFO L82 PathProgramCache]: Analyzing trace with hash 1570987630, now seen corresponding path program 1 times [2019-12-28 04:41:23,824 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:41:23,824 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1672435637] [2019-12-28 04:41:23,825 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:41:23,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:41:24,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:41:24,029 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1672435637] [2019-12-28 04:41:24,030 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:41:24,030 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:41:24,030 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1332796705] [2019-12-28 04:41:24,030 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:41:24,043 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:41:24,056 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 80 states and 79 transitions. [2019-12-28 04:41:24,056 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:41:24,057 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:41:24,058 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 04:41:24,059 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:41:24,059 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 04:41:24,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:41:24,059 INFO L87 Difference]: Start difference. First operand 124420 states and 567278 transitions. Second operand 5 states. [2019-12-28 04:41:29,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:41:29,995 INFO L93 Difference]: Finished difference Result 140268 states and 637960 transitions. [2019-12-28 04:41:29,995 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 04:41:29,996 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 79 [2019-12-28 04:41:29,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:41:30,523 INFO L225 Difference]: With dead ends: 140268 [2019-12-28 04:41:30,523 INFO L226 Difference]: Without dead ends: 140268 [2019-12-28 04:41:30,524 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:41:31,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140268 states. [2019-12-28 04:41:34,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140268 to 133340. [2019-12-28 04:41:34,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133340 states. [2019-12-28 04:41:35,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133340 states to 133340 states and 607156 transitions. [2019-12-28 04:41:35,472 INFO L78 Accepts]: Start accepts. Automaton has 133340 states and 607156 transitions. Word has length 79 [2019-12-28 04:41:35,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:41:35,473 INFO L462 AbstractCegarLoop]: Abstraction has 133340 states and 607156 transitions. [2019-12-28 04:41:35,473 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 04:41:35,473 INFO L276 IsEmpty]: Start isEmpty. Operand 133340 states and 607156 transitions. [2019-12-28 04:41:35,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-12-28 04:41:35,551 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:41:35,551 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:41:35,551 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:41:35,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:41:35,552 INFO L82 PathProgramCache]: Analyzing trace with hash 880426156, now seen corresponding path program 1 times [2019-12-28 04:41:35,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:41:35,552 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [254611742] [2019-12-28 04:41:35,553 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:41:35,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:41:35,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:41:35,674 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [254611742] [2019-12-28 04:41:35,675 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:41:35,675 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:41:35,675 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [189277923] [2019-12-28 04:41:35,675 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:41:35,686 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:41:35,698 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 80 states and 79 transitions. [2019-12-28 04:41:35,699 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:41:35,699 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:41:35,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:41:35,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:41:35,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:41:35,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:41:35,701 INFO L87 Difference]: Start difference. First operand 133340 states and 607156 transitions. Second operand 4 states. [2019-12-28 04:41:41,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:41:41,614 INFO L93 Difference]: Finished difference Result 168104 states and 726141 transitions. [2019-12-28 04:41:41,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:41:41,615 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-12-28 04:41:41,615 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:41:42,413 INFO L225 Difference]: With dead ends: 168104 [2019-12-28 04:41:42,413 INFO L226 Difference]: Without dead ends: 166128 [2019-12-28 04:41:42,415 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:41:43,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166128 states. [2019-12-28 04:41:47,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166128 to 148820. [2019-12-28 04:41:47,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148820 states. [2019-12-28 04:41:47,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148820 states to 148820 states and 651886 transitions. [2019-12-28 04:41:47,560 INFO L78 Accepts]: Start accepts. Automaton has 148820 states and 651886 transitions. Word has length 79 [2019-12-28 04:41:47,561 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:41:47,561 INFO L462 AbstractCegarLoop]: Abstraction has 148820 states and 651886 transitions. [2019-12-28 04:41:47,561 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:41:47,561 INFO L276 IsEmpty]: Start isEmpty. Operand 148820 states and 651886 transitions. [2019-12-28 04:41:47,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2019-12-28 04:41:47,603 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:41:47,604 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:41:47,604 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:41:47,604 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:41:47,604 INFO L82 PathProgramCache]: Analyzing trace with hash 213764313, now seen corresponding path program 1 times [2019-12-28 04:41:47,605 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:41:47,605 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1418639527] [2019-12-28 04:41:47,605 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:41:47,630 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:41:47,717 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:41:47,718 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1418639527] [2019-12-28 04:41:47,718 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:41:47,718 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:41:47,719 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1536571460] [2019-12-28 04:41:47,719 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:41:47,731 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:41:47,746 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 82 states and 81 transitions. [2019-12-28 04:41:47,746 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:41:47,748 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:41:47,748 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:41:47,748 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:41:47,749 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:41:47,749 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:41:47,749 INFO L87 Difference]: Start difference. First operand 148820 states and 651886 transitions. Second operand 4 states. [2019-12-28 04:41:53,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:41:53,315 INFO L93 Difference]: Finished difference Result 123708 states and 528393 transitions. [2019-12-28 04:41:53,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:41:53,316 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 81 [2019-12-28 04:41:53,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:41:53,693 INFO L225 Difference]: With dead ends: 123708 [2019-12-28 04:41:53,694 INFO L226 Difference]: Without dead ends: 120988 [2019-12-28 04:41:53,694 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:41:54,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120988 states. [2019-12-28 04:41:56,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120988 to 120988. [2019-12-28 04:41:56,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120988 states. [2019-12-28 04:41:57,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120988 states to 120988 states and 518734 transitions. [2019-12-28 04:41:57,279 INFO L78 Accepts]: Start accepts. Automaton has 120988 states and 518734 transitions. Word has length 81 [2019-12-28 04:41:57,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:41:57,279 INFO L462 AbstractCegarLoop]: Abstraction has 120988 states and 518734 transitions. [2019-12-28 04:41:57,279 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:41:57,280 INFO L276 IsEmpty]: Start isEmpty. Operand 120988 states and 518734 transitions. [2019-12-28 04:41:57,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 04:41:57,317 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:41:57,318 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:41:57,318 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:41:57,318 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:41:57,318 INFO L82 PathProgramCache]: Analyzing trace with hash 1818396671, now seen corresponding path program 1 times [2019-12-28 04:41:57,319 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:41:57,319 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912168949] [2019-12-28 04:41:57,319 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:41:57,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:41:57,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:41:57,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912168949] [2019-12-28 04:41:57,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:41:57,435 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:41:57,435 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2105350004] [2019-12-28 04:41:57,435 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:41:57,446 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:41:57,462 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 90 transitions. [2019-12-28 04:41:57,462 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:41:57,464 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:41:57,464 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:41:57,464 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:41:57,465 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:41:57,465 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:41:57,465 INFO L87 Difference]: Start difference. First operand 120988 states and 518734 transitions. Second operand 6 states. [2019-12-28 04:42:00,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:00,213 INFO L93 Difference]: Finished difference Result 161962 states and 678170 transitions. [2019-12-28 04:42:00,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:42:00,213 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-12-28 04:42:00,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:00,763 INFO L225 Difference]: With dead ends: 161962 [2019-12-28 04:42:00,763 INFO L226 Difference]: Without dead ends: 161962 [2019-12-28 04:42:00,764 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:42:01,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161962 states. [2019-12-28 04:42:10,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161962 to 124966. [2019-12-28 04:42:10,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124966 states. [2019-12-28 04:42:10,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124966 states to 124966 states and 533653 transitions. [2019-12-28 04:42:10,917 INFO L78 Accepts]: Start accepts. Automaton has 124966 states and 533653 transitions. Word has length 82 [2019-12-28 04:42:10,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:10,918 INFO L462 AbstractCegarLoop]: Abstraction has 124966 states and 533653 transitions. [2019-12-28 04:42:10,918 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:42:10,918 INFO L276 IsEmpty]: Start isEmpty. Operand 124966 states and 533653 transitions. [2019-12-28 04:42:10,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2019-12-28 04:42:10,958 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:10,959 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:10,959 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:10,959 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:10,959 INFO L82 PathProgramCache]: Analyzing trace with hash 10942208, now seen corresponding path program 1 times [2019-12-28 04:42:10,960 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:10,960 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1326215734] [2019-12-28 04:42:10,960 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:11,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:11,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:11,097 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1326215734] [2019-12-28 04:42:11,097 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:11,097 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:42:11,097 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [690272830] [2019-12-28 04:42:11,098 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:11,110 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:11,128 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 90 transitions. [2019-12-28 04:42:11,128 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:11,962 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 04:42:11,962 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:42:11,962 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:11,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:42:11,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:42:11,963 INFO L87 Difference]: Start difference. First operand 124966 states and 533653 transitions. Second operand 6 states. [2019-12-28 04:42:12,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:12,166 INFO L93 Difference]: Finished difference Result 31516 states and 121061 transitions. [2019-12-28 04:42:12,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 04:42:12,167 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 82 [2019-12-28 04:42:12,167 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:12,342 INFO L225 Difference]: With dead ends: 31516 [2019-12-28 04:42:12,343 INFO L226 Difference]: Without dead ends: 29299 [2019-12-28 04:42:12,343 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=24, Invalid=32, Unknown=0, NotChecked=0, Total=56 [2019-12-28 04:42:12,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29299 states. [2019-12-28 04:42:13,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29299 to 29299. [2019-12-28 04:42:13,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29299 states. [2019-12-28 04:42:13,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29299 states to 29299 states and 112137 transitions. [2019-12-28 04:42:13,178 INFO L78 Accepts]: Start accepts. Automaton has 29299 states and 112137 transitions. Word has length 82 [2019-12-28 04:42:13,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:13,179 INFO L462 AbstractCegarLoop]: Abstraction has 29299 states and 112137 transitions. [2019-12-28 04:42:13,179 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:42:13,179 INFO L276 IsEmpty]: Start isEmpty. Operand 29299 states and 112137 transitions. [2019-12-28 04:42:13,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2019-12-28 04:42:13,235 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:13,235 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:13,235 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:13,235 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:13,235 INFO L82 PathProgramCache]: Analyzing trace with hash 1773234289, now seen corresponding path program 1 times [2019-12-28 04:42:13,236 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:13,236 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2122690878] [2019-12-28 04:42:13,236 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:13,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:13,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:13,320 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2122690878] [2019-12-28 04:42:13,320 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:13,320 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:42:13,321 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1982305655] [2019-12-28 04:42:13,321 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:13,339 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:13,367 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 98 states and 101 transitions. [2019-12-28 04:42:13,367 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:13,367 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:42:13,368 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:42:13,368 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:13,368 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:42:13,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:42:13,369 INFO L87 Difference]: Start difference. First operand 29299 states and 112137 transitions. Second operand 4 states. [2019-12-28 04:42:13,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:13,693 INFO L93 Difference]: Finished difference Result 28140 states and 105524 transitions. [2019-12-28 04:42:13,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:42:13,694 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 93 [2019-12-28 04:42:13,694 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:13,760 INFO L225 Difference]: With dead ends: 28140 [2019-12-28 04:42:13,760 INFO L226 Difference]: Without dead ends: 28140 [2019-12-28 04:42:13,760 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:42:13,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28140 states. [2019-12-28 04:42:16,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28140 to 25908. [2019-12-28 04:42:16,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25908 states. [2019-12-28 04:42:16,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25908 states to 25908 states and 97652 transitions. [2019-12-28 04:42:16,317 INFO L78 Accepts]: Start accepts. Automaton has 25908 states and 97652 transitions. Word has length 93 [2019-12-28 04:42:16,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:16,318 INFO L462 AbstractCegarLoop]: Abstraction has 25908 states and 97652 transitions. [2019-12-28 04:42:16,318 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:42:16,318 INFO L276 IsEmpty]: Start isEmpty. Operand 25908 states and 97652 transitions. [2019-12-28 04:42:16,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 04:42:16,349 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:16,349 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:16,350 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:16,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:16,350 INFO L82 PathProgramCache]: Analyzing trace with hash 512541309, now seen corresponding path program 1 times [2019-12-28 04:42:16,351 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:16,351 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [494479570] [2019-12-28 04:42:16,351 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:16,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:16,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:16,435 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [494479570] [2019-12-28 04:42:16,435 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:16,435 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:42:16,435 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [809891381] [2019-12-28 04:42:16,436 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:16,470 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:16,510 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 100 states and 103 transitions. [2019-12-28 04:42:16,511 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:16,511 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:42:16,512 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:42:16,512 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:16,512 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:42:16,513 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:42:16,513 INFO L87 Difference]: Start difference. First operand 25908 states and 97652 transitions. Second operand 4 states. [2019-12-28 04:42:16,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:16,925 INFO L93 Difference]: Finished difference Result 33422 states and 125178 transitions. [2019-12-28 04:42:16,926 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:42:16,926 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-12-28 04:42:16,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:17,024 INFO L225 Difference]: With dead ends: 33422 [2019-12-28 04:42:17,024 INFO L226 Difference]: Without dead ends: 33422 [2019-12-28 04:42:17,025 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:42:17,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33422 states. [2019-12-28 04:42:17,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33422 to 28238. [2019-12-28 04:42:17,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28238 states. [2019-12-28 04:42:17,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28238 states to 28238 states and 105801 transitions. [2019-12-28 04:42:17,613 INFO L78 Accepts]: Start accepts. Automaton has 28238 states and 105801 transitions. Word has length 95 [2019-12-28 04:42:17,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:17,613 INFO L462 AbstractCegarLoop]: Abstraction has 28238 states and 105801 transitions. [2019-12-28 04:42:17,613 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:42:17,613 INFO L276 IsEmpty]: Start isEmpty. Operand 28238 states and 105801 transitions. [2019-12-28 04:42:17,640 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 04:42:17,640 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:17,640 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:17,641 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:17,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:17,641 INFO L82 PathProgramCache]: Analyzing trace with hash -484531044, now seen corresponding path program 1 times [2019-12-28 04:42:17,642 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:17,642 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267231134] [2019-12-28 04:42:17,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:17,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:18,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:18,023 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1267231134] [2019-12-28 04:42:18,023 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:18,024 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:42:18,028 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [889060255] [2019-12-28 04:42:18,028 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:18,047 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:18,077 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 100 states and 103 transitions. [2019-12-28 04:42:18,078 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:18,078 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:42:18,079 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:42:18,079 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:18,079 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:42:18,080 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:42:18,080 INFO L87 Difference]: Start difference. First operand 28238 states and 105801 transitions. Second operand 4 states. [2019-12-28 04:42:18,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:18,662 INFO L93 Difference]: Finished difference Result 35618 states and 133182 transitions. [2019-12-28 04:42:18,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:42:18,663 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-12-28 04:42:18,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:18,735 INFO L225 Difference]: With dead ends: 35618 [2019-12-28 04:42:18,735 INFO L226 Difference]: Without dead ends: 34673 [2019-12-28 04:42:18,735 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:42:18,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34673 states. [2019-12-28 04:42:19,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34673 to 32414. [2019-12-28 04:42:19,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32414 states. [2019-12-28 04:42:19,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32414 states to 32414 states and 121683 transitions. [2019-12-28 04:42:19,316 INFO L78 Accepts]: Start accepts. Automaton has 32414 states and 121683 transitions. Word has length 95 [2019-12-28 04:42:19,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:19,317 INFO L462 AbstractCegarLoop]: Abstraction has 32414 states and 121683 transitions. [2019-12-28 04:42:19,317 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:42:19,317 INFO L276 IsEmpty]: Start isEmpty. Operand 32414 states and 121683 transitions. [2019-12-28 04:42:19,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 04:42:19,348 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:19,348 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:19,348 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:19,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:19,349 INFO L82 PathProgramCache]: Analyzing trace with hash 1312420315, now seen corresponding path program 1 times [2019-12-28 04:42:19,349 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:19,349 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [798171591] [2019-12-28 04:42:19,350 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:19,366 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:19,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:19,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [798171591] [2019-12-28 04:42:19,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:19,435 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:42:19,435 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1079349230] [2019-12-28 04:42:19,435 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:19,453 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:19,484 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 100 states and 103 transitions. [2019-12-28 04:42:19,484 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:19,485 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:42:19,485 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:42:19,485 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:19,486 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:42:19,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:42:19,486 INFO L87 Difference]: Start difference. First operand 32414 states and 121683 transitions. Second operand 6 states. [2019-12-28 04:42:20,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:20,587 INFO L93 Difference]: Finished difference Result 57992 states and 214179 transitions. [2019-12-28 04:42:20,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 04:42:20,588 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 95 [2019-12-28 04:42:20,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:20,709 INFO L225 Difference]: With dead ends: 57992 [2019-12-28 04:42:20,710 INFO L226 Difference]: Without dead ends: 56921 [2019-12-28 04:42:20,710 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-28 04:42:20,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56921 states. [2019-12-28 04:42:21,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56921 to 21923. [2019-12-28 04:42:21,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21923 states. [2019-12-28 04:42:21,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21923 states to 21923 states and 81375 transitions. [2019-12-28 04:42:21,285 INFO L78 Accepts]: Start accepts. Automaton has 21923 states and 81375 transitions. Word has length 95 [2019-12-28 04:42:21,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:21,285 INFO L462 AbstractCegarLoop]: Abstraction has 21923 states and 81375 transitions. [2019-12-28 04:42:21,285 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:42:21,285 INFO L276 IsEmpty]: Start isEmpty. Operand 21923 states and 81375 transitions. [2019-12-28 04:42:21,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 04:42:21,306 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:21,306 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:21,306 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:21,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:21,306 INFO L82 PathProgramCache]: Analyzing trace with hash -777934051, now seen corresponding path program 1 times [2019-12-28 04:42:21,307 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:21,307 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [602743134] [2019-12-28 04:42:21,307 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:21,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:21,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:21,372 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [602743134] [2019-12-28 04:42:21,372 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:21,373 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:42:21,373 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1742941077] [2019-12-28 04:42:21,373 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:21,391 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:21,422 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 100 states and 103 transitions. [2019-12-28 04:42:21,422 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:21,423 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:42:21,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 04:42:21,424 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:21,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 04:42:21,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 04:42:21,424 INFO L87 Difference]: Start difference. First operand 21923 states and 81375 transitions. Second operand 4 states. [2019-12-28 04:42:21,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:21,909 INFO L93 Difference]: Finished difference Result 29081 states and 106094 transitions. [2019-12-28 04:42:21,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:42:21,909 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 95 [2019-12-28 04:42:21,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:21,964 INFO L225 Difference]: With dead ends: 29081 [2019-12-28 04:42:21,965 INFO L226 Difference]: Without dead ends: 29081 [2019-12-28 04:42:21,965 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:42:22,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29081 states. [2019-12-28 04:42:22,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29081 to 26629. [2019-12-28 04:42:22,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26629 states. [2019-12-28 04:42:22,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26629 states to 26629 states and 97805 transitions. [2019-12-28 04:42:22,618 INFO L78 Accepts]: Start accepts. Automaton has 26629 states and 97805 transitions. Word has length 95 [2019-12-28 04:42:22,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:22,618 INFO L462 AbstractCegarLoop]: Abstraction has 26629 states and 97805 transitions. [2019-12-28 04:42:22,618 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 04:42:22,618 INFO L276 IsEmpty]: Start isEmpty. Operand 26629 states and 97805 transitions. [2019-12-28 04:42:22,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 04:42:22,643 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:22,643 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:22,643 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:22,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:22,643 INFO L82 PathProgramCache]: Analyzing trace with hash 183679966, now seen corresponding path program 1 times [2019-12-28 04:42:22,644 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:22,644 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271559524] [2019-12-28 04:42:22,644 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:22,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:22,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:22,882 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1271559524] [2019-12-28 04:42:22,882 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:22,882 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-28 04:42:22,882 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1208280450] [2019-12-28 04:42:22,882 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:22,900 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:22,933 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 100 states and 103 transitions. [2019-12-28 04:42:22,933 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:22,934 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:42:22,934 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-28 04:42:22,934 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:22,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-28 04:42:22,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-12-28 04:42:22,935 INFO L87 Difference]: Start difference. First operand 26629 states and 97805 transitions. Second operand 10 states. [2019-12-28 04:42:24,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:24,521 INFO L93 Difference]: Finished difference Result 35736 states and 127368 transitions. [2019-12-28 04:42:24,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-28 04:42:24,521 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 95 [2019-12-28 04:42:24,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:24,589 INFO L225 Difference]: With dead ends: 35736 [2019-12-28 04:42:24,589 INFO L226 Difference]: Without dead ends: 35736 [2019-12-28 04:42:24,590 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=108, Invalid=272, Unknown=0, NotChecked=0, Total=380 [2019-12-28 04:42:24,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35736 states. [2019-12-28 04:42:25,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35736 to 21500. [2019-12-28 04:42:25,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21500 states. [2019-12-28 04:42:25,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21500 states to 21500 states and 77748 transitions. [2019-12-28 04:42:25,240 INFO L78 Accepts]: Start accepts. Automaton has 21500 states and 77748 transitions. Word has length 95 [2019-12-28 04:42:25,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:25,241 INFO L462 AbstractCegarLoop]: Abstraction has 21500 states and 77748 transitions. [2019-12-28 04:42:25,241 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-28 04:42:25,241 INFO L276 IsEmpty]: Start isEmpty. Operand 21500 states and 77748 transitions. [2019-12-28 04:42:25,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 04:42:25,260 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:25,260 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:25,261 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:25,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:25,261 INFO L82 PathProgramCache]: Analyzing trace with hash -1623774497, now seen corresponding path program 1 times [2019-12-28 04:42:25,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:25,262 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [778046709] [2019-12-28 04:42:25,262 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:25,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:25,367 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:25,368 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [778046709] [2019-12-28 04:42:25,368 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:25,368 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:42:25,368 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2125251394] [2019-12-28 04:42:25,368 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:25,386 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:25,421 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 100 states and 103 transitions. [2019-12-28 04:42:25,421 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:25,422 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 04:42:25,422 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 04:42:25,423 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:25,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 04:42:25,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 04:42:25,424 INFO L87 Difference]: Start difference. First operand 21500 states and 77748 transitions. Second operand 5 states. [2019-12-28 04:42:25,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:25,665 INFO L93 Difference]: Finished difference Result 21499 states and 77166 transitions. [2019-12-28 04:42:25,665 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 04:42:25,665 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 95 [2019-12-28 04:42:25,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:25,704 INFO L225 Difference]: With dead ends: 21499 [2019-12-28 04:42:25,704 INFO L226 Difference]: Without dead ends: 21499 [2019-12-28 04:42:25,705 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:42:25,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21499 states. [2019-12-28 04:42:25,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21499 to 20972. [2019-12-28 04:42:25,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20972 states. [2019-12-28 04:42:26,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20972 states to 20972 states and 75392 transitions. [2019-12-28 04:42:26,027 INFO L78 Accepts]: Start accepts. Automaton has 20972 states and 75392 transitions. Word has length 95 [2019-12-28 04:42:26,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:26,027 INFO L462 AbstractCegarLoop]: Abstraction has 20972 states and 75392 transitions. [2019-12-28 04:42:26,027 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 04:42:26,027 INFO L276 IsEmpty]: Start isEmpty. Operand 20972 states and 75392 transitions. [2019-12-28 04:42:26,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2019-12-28 04:42:26,049 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:26,049 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:26,049 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:26,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:26,050 INFO L82 PathProgramCache]: Analyzing trace with hash -379010016, now seen corresponding path program 1 times [2019-12-28 04:42:26,050 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:26,051 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1623985681] [2019-12-28 04:42:26,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:26,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:26,140 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:26,141 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1623985681] [2019-12-28 04:42:26,141 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:26,141 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 04:42:26,141 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [997744657] [2019-12-28 04:42:26,142 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:26,160 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:26,191 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 100 states and 103 transitions. [2019-12-28 04:42:26,191 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:26,212 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 04:42:26,212 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 04:42:26,212 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:26,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 04:42:26,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:42:26,213 INFO L87 Difference]: Start difference. First operand 20972 states and 75392 transitions. Second operand 7 states. [2019-12-28 04:42:26,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:26,302 INFO L93 Difference]: Finished difference Result 6257 states and 19655 transitions. [2019-12-28 04:42:26,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 04:42:26,303 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 95 [2019-12-28 04:42:26,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:26,311 INFO L225 Difference]: With dead ends: 6257 [2019-12-28 04:42:26,311 INFO L226 Difference]: Without dead ends: 5501 [2019-12-28 04:42:26,312 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=54, Unknown=0, NotChecked=0, Total=90 [2019-12-28 04:42:26,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5501 states. [2019-12-28 04:42:26,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5501 to 5365. [2019-12-28 04:42:26,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5365 states. [2019-12-28 04:42:26,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5365 states to 5365 states and 16558 transitions. [2019-12-28 04:42:26,378 INFO L78 Accepts]: Start accepts. Automaton has 5365 states and 16558 transitions. Word has length 95 [2019-12-28 04:42:26,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:26,378 INFO L462 AbstractCegarLoop]: Abstraction has 5365 states and 16558 transitions. [2019-12-28 04:42:26,378 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 04:42:26,378 INFO L276 IsEmpty]: Start isEmpty. Operand 5365 states and 16558 transitions. [2019-12-28 04:42:26,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2019-12-28 04:42:26,384 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:26,384 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:26,385 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:26,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:26,385 INFO L82 PathProgramCache]: Analyzing trace with hash -771526174, now seen corresponding path program 1 times [2019-12-28 04:42:26,386 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:26,386 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651017085] [2019-12-28 04:42:26,386 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:26,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:26,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:26,453 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [651017085] [2019-12-28 04:42:26,453 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:26,454 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 04:42:26,454 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [99129372] [2019-12-28 04:42:26,454 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:26,475 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:26,682 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 271 states and 476 transitions. [2019-12-28 04:42:26,682 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:26,729 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 8 times. [2019-12-28 04:42:26,729 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 04:42:26,729 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:26,729 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 04:42:26,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 04:42:26,730 INFO L87 Difference]: Start difference. First operand 5365 states and 16558 transitions. Second operand 6 states. [2019-12-28 04:42:26,944 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:26,945 INFO L93 Difference]: Finished difference Result 7478 states and 22705 transitions. [2019-12-28 04:42:26,945 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 04:42:26,945 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 110 [2019-12-28 04:42:26,946 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:26,956 INFO L225 Difference]: With dead ends: 7478 [2019-12-28 04:42:26,956 INFO L226 Difference]: Without dead ends: 7342 [2019-12-28 04:42:26,956 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 9 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:42:26,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7342 states. [2019-12-28 04:42:27,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7342 to 6741. [2019-12-28 04:42:27,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6741 states. [2019-12-28 04:42:27,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6741 states to 6741 states and 20624 transitions. [2019-12-28 04:42:27,041 INFO L78 Accepts]: Start accepts. Automaton has 6741 states and 20624 transitions. Word has length 110 [2019-12-28 04:42:27,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:27,042 INFO L462 AbstractCegarLoop]: Abstraction has 6741 states and 20624 transitions. [2019-12-28 04:42:27,042 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 04:42:27,042 INFO L276 IsEmpty]: Start isEmpty. Operand 6741 states and 20624 transitions. [2019-12-28 04:42:27,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-12-28 04:42:27,049 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:27,049 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:27,050 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:27,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:27,050 INFO L82 PathProgramCache]: Analyzing trace with hash -892915100, now seen corresponding path program 1 times [2019-12-28 04:42:27,051 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:27,051 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2014698067] [2019-12-28 04:42:27,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:27,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:27,134 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:27,134 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2014698067] [2019-12-28 04:42:27,134 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:27,135 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 04:42:27,135 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1180105132] [2019-12-28 04:42:27,135 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:27,167 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:27,308 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 273 states and 478 transitions. [2019-12-28 04:42:27,309 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:27,359 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 8 times. [2019-12-28 04:42:27,359 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 04:42:27,359 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:27,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 04:42:27,360 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-28 04:42:27,360 INFO L87 Difference]: Start difference. First operand 6741 states and 20624 transitions. Second operand 7 states. [2019-12-28 04:42:27,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:27,670 INFO L93 Difference]: Finished difference Result 7866 states and 23976 transitions. [2019-12-28 04:42:27,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 04:42:27,670 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 112 [2019-12-28 04:42:27,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:27,682 INFO L225 Difference]: With dead ends: 7866 [2019-12-28 04:42:27,682 INFO L226 Difference]: Without dead ends: 7730 [2019-12-28 04:42:27,683 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 10 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2019-12-28 04:42:27,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7730 states. [2019-12-28 04:42:27,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7730 to 6849. [2019-12-28 04:42:27,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6849 states. [2019-12-28 04:42:27,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6849 states to 6849 states and 20929 transitions. [2019-12-28 04:42:27,770 INFO L78 Accepts]: Start accepts. Automaton has 6849 states and 20929 transitions. Word has length 112 [2019-12-28 04:42:27,770 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:27,770 INFO L462 AbstractCegarLoop]: Abstraction has 6849 states and 20929 transitions. [2019-12-28 04:42:27,770 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 04:42:27,771 INFO L276 IsEmpty]: Start isEmpty. Operand 6849 states and 20929 transitions. [2019-12-28 04:42:27,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-12-28 04:42:27,778 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:27,778 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:27,779 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:27,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:27,779 INFO L82 PathProgramCache]: Analyzing trace with hash -2008510426, now seen corresponding path program 1 times [2019-12-28 04:42:27,780 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:27,780 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [807270629] [2019-12-28 04:42:27,780 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:27,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:27,927 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:27,927 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [807270629] [2019-12-28 04:42:27,928 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:27,928 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 04:42:27,928 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1540195151] [2019-12-28 04:42:27,928 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:27,964 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:28,243 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 273 states and 478 transitions. [2019-12-28 04:42:28,243 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:28,402 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-28 04:42:28,455 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-28 04:42:28,606 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 17 times. [2019-12-28 04:42:28,607 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-28 04:42:28,607 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:28,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-28 04:42:28,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2019-12-28 04:42:28,608 INFO L87 Difference]: Start difference. First operand 6849 states and 20929 transitions. Second operand 12 states. [2019-12-28 04:42:29,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:29,344 INFO L93 Difference]: Finished difference Result 10099 states and 30361 transitions. [2019-12-28 04:42:29,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-28 04:42:29,345 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 112 [2019-12-28 04:42:29,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:29,360 INFO L225 Difference]: With dead ends: 10099 [2019-12-28 04:42:29,360 INFO L226 Difference]: Without dead ends: 10099 [2019-12-28 04:42:29,361 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 9 SyntacticMatches, 12 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=94, Invalid=286, Unknown=0, NotChecked=0, Total=380 [2019-12-28 04:42:29,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10099 states. [2019-12-28 04:42:29,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10099 to 7517. [2019-12-28 04:42:29,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7517 states. [2019-12-28 04:42:29,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7517 states to 7517 states and 22856 transitions. [2019-12-28 04:42:29,467 INFO L78 Accepts]: Start accepts. Automaton has 7517 states and 22856 transitions. Word has length 112 [2019-12-28 04:42:29,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:29,467 INFO L462 AbstractCegarLoop]: Abstraction has 7517 states and 22856 transitions. [2019-12-28 04:42:29,467 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-28 04:42:29,467 INFO L276 IsEmpty]: Start isEmpty. Operand 7517 states and 22856 transitions. [2019-12-28 04:42:29,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2019-12-28 04:42:29,476 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:29,476 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:29,476 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:29,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:29,476 INFO L82 PathProgramCache]: Analyzing trace with hash -763745945, now seen corresponding path program 1 times [2019-12-28 04:42:29,477 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:29,477 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [788129138] [2019-12-28 04:42:29,477 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:29,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:29,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:29,565 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [788129138] [2019-12-28 04:42:29,565 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:29,566 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 04:42:29,566 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1545220062] [2019-12-28 04:42:29,566 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:29,587 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:29,732 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 273 states and 478 transitions. [2019-12-28 04:42:29,732 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:29,733 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 04:42:29,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 04:42:29,734 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:29,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 04:42:29,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:42:29,734 INFO L87 Difference]: Start difference. First operand 7517 states and 22856 transitions. Second operand 3 states. [2019-12-28 04:42:29,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:29,762 INFO L93 Difference]: Finished difference Result 7517 states and 22829 transitions. [2019-12-28 04:42:29,762 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 04:42:29,762 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 112 [2019-12-28 04:42:29,762 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:29,773 INFO L225 Difference]: With dead ends: 7517 [2019-12-28 04:42:29,773 INFO L226 Difference]: Without dead ends: 7517 [2019-12-28 04:42:29,774 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 04:42:29,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7517 states. [2019-12-28 04:42:29,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7517 to 7517. [2019-12-28 04:42:29,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7517 states. [2019-12-28 04:42:29,893 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7517 states to 7517 states and 22829 transitions. [2019-12-28 04:42:29,893 INFO L78 Accepts]: Start accepts. Automaton has 7517 states and 22829 transitions. Word has length 112 [2019-12-28 04:42:29,893 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:29,893 INFO L462 AbstractCegarLoop]: Abstraction has 7517 states and 22829 transitions. [2019-12-28 04:42:29,894 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 04:42:29,894 INFO L276 IsEmpty]: Start isEmpty. Operand 7517 states and 22829 transitions. [2019-12-28 04:42:29,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-12-28 04:42:29,902 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:29,902 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:29,902 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:29,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:29,902 INFO L82 PathProgramCache]: Analyzing trace with hash 469280852, now seen corresponding path program 1 times [2019-12-28 04:42:29,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:29,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [35367208] [2019-12-28 04:42:29,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:29,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 04:42:30,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 04:42:30,019 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [35367208] [2019-12-28 04:42:30,020 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 04:42:30,020 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 04:42:30,020 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [402356004] [2019-12-28 04:42:30,020 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 04:42:30,054 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 04:42:30,327 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 275 states and 480 transitions. [2019-12-28 04:42:30,328 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 04:42:30,385 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 04:42:30,385 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-28 04:42:30,385 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 04:42:30,386 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-28 04:42:30,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-12-28 04:42:30,386 INFO L87 Difference]: Start difference. First operand 7517 states and 22829 transitions. Second operand 10 states. [2019-12-28 04:42:30,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 04:42:30,616 INFO L93 Difference]: Finished difference Result 10667 states and 32358 transitions. [2019-12-28 04:42:30,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 04:42:30,616 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 114 [2019-12-28 04:42:30,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 04:42:30,621 INFO L225 Difference]: With dead ends: 10667 [2019-12-28 04:42:30,622 INFO L226 Difference]: Without dead ends: 3496 [2019-12-28 04:42:30,622 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=100, Unknown=0, NotChecked=0, Total=156 [2019-12-28 04:42:30,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3496 states. [2019-12-28 04:42:30,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3496 to 3352. [2019-12-28 04:42:30,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3352 states. [2019-12-28 04:42:30,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3352 states to 3352 states and 8224 transitions. [2019-12-28 04:42:30,657 INFO L78 Accepts]: Start accepts. Automaton has 3352 states and 8224 transitions. Word has length 114 [2019-12-28 04:42:30,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 04:42:30,658 INFO L462 AbstractCegarLoop]: Abstraction has 3352 states and 8224 transitions. [2019-12-28 04:42:30,658 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-28 04:42:30,658 INFO L276 IsEmpty]: Start isEmpty. Operand 3352 states and 8224 transitions. [2019-12-28 04:42:30,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2019-12-28 04:42:30,661 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 04:42:30,662 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 04:42:30,662 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 04:42:30,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 04:42:30,662 INFO L82 PathProgramCache]: Analyzing trace with hash -288606440, now seen corresponding path program 2 times [2019-12-28 04:42:30,663 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 04:42:30,663 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095943660] [2019-12-28 04:42:30,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 04:42:30,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 04:42:30,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 04:42:30,775 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-28 04:42:30,775 INFO L476 BasicCegarLoop]: Counterexample might be feasible [2019-12-28 04:42:31,021 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.12 04:42:31 BasicIcfg [2019-12-28 04:42:31,021 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-28 04:42:31,025 INFO L168 Benchmark]: Toolchain (without parser) took 102760.84 ms. Allocated memory was 144.7 MB in the beginning and 2.4 GB in the end (delta: 2.2 GB). Free memory was 100.6 MB in the beginning and 1.4 GB in the end (delta: -1.3 GB). Peak memory consumption was 961.1 MB. Max. memory is 7.1 GB. [2019-12-28 04:42:31,029 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 144.7 MB. Free memory was 121.0 MB in the beginning and 120.8 MB in the end (delta: 209.9 kB). Peak memory consumption was 209.9 kB. Max. memory is 7.1 GB. [2019-12-28 04:42:31,032 INFO L168 Benchmark]: CACSL2BoogieTranslator took 828.14 ms. Allocated memory was 144.7 MB in the beginning and 202.4 MB in the end (delta: 57.7 MB). Free memory was 100.3 MB in the beginning and 154.2 MB in the end (delta: -53.9 MB). Peak memory consumption was 20.8 MB. Max. memory is 7.1 GB. [2019-12-28 04:42:31,033 INFO L168 Benchmark]: Boogie Procedure Inliner took 69.57 ms. Allocated memory is still 202.4 MB. Free memory was 154.2 MB in the beginning and 152.1 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 7.1 GB. [2019-12-28 04:42:31,033 INFO L168 Benchmark]: Boogie Preprocessor took 45.00 ms. Allocated memory is still 202.4 MB. Free memory was 152.1 MB in the beginning and 149.3 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. [2019-12-28 04:42:31,034 INFO L168 Benchmark]: RCFGBuilder took 815.65 ms. Allocated memory is still 202.4 MB. Free memory was 149.3 MB in the beginning and 100.7 MB in the end (delta: 48.7 MB). Peak memory consumption was 48.7 MB. Max. memory is 7.1 GB. [2019-12-28 04:42:31,035 INFO L168 Benchmark]: TraceAbstraction took 100997.06 ms. Allocated memory was 202.4 MB in the beginning and 2.4 GB in the end (delta: 2.2 GB). Free memory was 100.7 MB in the beginning and 1.4 GB in the end (delta: -1.3 GB). Peak memory consumption was 903.5 MB. Max. memory is 7.1 GB. [2019-12-28 04:42:31,042 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 144.7 MB. Free memory was 121.0 MB in the beginning and 120.8 MB in the end (delta: 209.9 kB). Peak memory consumption was 209.9 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 828.14 ms. Allocated memory was 144.7 MB in the beginning and 202.4 MB in the end (delta: 57.7 MB). Free memory was 100.3 MB in the beginning and 154.2 MB in the end (delta: -53.9 MB). Peak memory consumption was 20.8 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 69.57 ms. Allocated memory is still 202.4 MB. Free memory was 154.2 MB in the beginning and 152.1 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 45.00 ms. Allocated memory is still 202.4 MB. Free memory was 152.1 MB in the beginning and 149.3 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. * RCFGBuilder took 815.65 ms. Allocated memory is still 202.4 MB. Free memory was 149.3 MB in the beginning and 100.7 MB in the end (delta: 48.7 MB). Peak memory consumption was 48.7 MB. Max. memory is 7.1 GB. * TraceAbstraction took 100997.06 ms. Allocated memory was 202.4 MB in the beginning and 2.4 GB in the end (delta: 2.2 GB). Free memory was 100.7 MB in the beginning and 1.4 GB in the end (delta: -1.3 GB). Peak memory consumption was 903.5 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L696] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L698] 0 int __unbuffered_p0_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0] [L699] 0 _Bool __unbuffered_p0_EAX$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0] [L700] 0 int __unbuffered_p0_EAX$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0] [L701] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0] [L702] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0] [L703] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0] [L704] 0 _Bool __unbuffered_p0_EAX$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0] [L705] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0] [L706] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0] [L707] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0] [L708] 0 _Bool __unbuffered_p0_EAX$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0] [L709] 0 _Bool __unbuffered_p0_EAX$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0] [L710] 0 int *__unbuffered_p0_EAX$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}] [L711] 0 int __unbuffered_p0_EAX$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0] [L712] 0 _Bool __unbuffered_p0_EAX$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0] [L713] 0 int __unbuffered_p0_EAX$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0] [L714] 0 _Bool __unbuffered_p0_EAX$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0] [L716] 0 int __unbuffered_p0_EBX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0] [L718] 0 int __unbuffered_p2_EAX = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0] [L719] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0] [L720] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0] [L722] 0 int x = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L724] 0 int y = 0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}] [L725] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0] [L726] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0] [L727] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L728] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L729] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L730] 0 _Bool y$r_buff0_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0] [L731] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0] [L732] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L733] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L734] 0 _Bool y$r_buff1_thd3; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0] [L735] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0] [L736] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L737] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L738] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L739] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L740] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L741] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L742] 0 _Bool weak$$choice1; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L743] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L820] 0 pthread_t t2109; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L821] FCALL, FORK 0 pthread_create(&t2109, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L747] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L748] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L749] 1 y$flush_delayed = weak$$choice2 [L750] EXPR 1 \read(y) [L750] 1 y$mem_tmp = y [L751] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L751] EXPR 1 \read(y) [L751] EXPR 1 !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1)=0, \read(y)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y={5:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L751] 1 y = !y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff1) [L822] 0 pthread_t t2110; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y={5:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L752] EXPR 1 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=0, x=0, y={5:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L823] FCALL, FORK 0 pthread_create(&t2110, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=0, x=0, y={5:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L824] 0 pthread_t t2111; VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0))=0, x=0, y={5:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L752] 1 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : y$w_buff0)) [L753] EXPR 1 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1))=0, x=0, y={5:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L753] 1 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff1 : y$w_buff1)) [L754] EXPR 1 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used))=0, x=0, y={5:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L754] 1 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used)) [L755] EXPR 1 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y={5:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L755] 1 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L756] EXPR 1 weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1))=0, x=0, y={5:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L756] 1 y$r_buff0_thd1 = weak$$choice2 ? y$r_buff0_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff0_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1)) [L757] EXPR 1 weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0))=0, x=0, y={5:0}, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L757] 1 y$r_buff1_thd1 = weak$$choice2 ? y$r_buff1_thd1 : (!y$w_buff0_used || !y$r_buff0_thd1 && !y$w_buff1_used || !y$r_buff0_thd1 && !y$r_buff1_thd1 ? y$r_buff1_thd1 : (y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L758] 1 __unbuffered_p0_EAX$read_delayed = (_Bool)1 [L759] 1 __unbuffered_p0_EAX$read_delayed_var = &y [L760] EXPR 1 \read(y) [L760] 1 __unbuffered_p0_EAX = y [L761] EXPR 1 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y={5:0}, y$flush_delayed=1, y$flush_delayed ? y$mem_tmp : y=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L761] 1 y = y$flush_delayed ? y$mem_tmp : y [L762] 1 y$flush_delayed = (_Bool)0 [L765] 1 __unbuffered_p0_EBX = x [L770] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] 2 x = 1 [L780] 2 x = 2 [L785] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L825] FCALL, FORK 0 pthread_create(&t2111, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L792] 3 __unbuffered_p2_EAX = x [L795] 3 y = 1 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 3 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y [L798] EXPR 3 \read(y) [L798] EXPR 3 y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y VAL [\read(y)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=1] [L798] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\read(y)=1, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y)=1, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=1] [L798] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L799] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L800] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L801] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L802] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 VAL [__unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 3 y$r_buff1_thd3 = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$r_buff1_thd3 [L805] 3 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L827] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L831] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L831] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y [L831] EXPR 0 \read(y) [L831] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L831] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L831] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L832] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L832] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L833] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L833] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L834] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L834] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L835] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L835] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L838] 0 weak$$choice1 = __VERIFIER_nondet_bool() [L839] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L839] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX [L839] EXPR 0 \read(*__unbuffered_p0_EAX$read_delayed_var) [L839] EXPR 0 weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L839] EXPR 0 __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L839] 0 __unbuffered_p0_EAX = __unbuffered_p0_EAX$read_delayed ? (weak$$choice1 ? *__unbuffered_p0_EAX$read_delayed_var : __unbuffered_p0_EAX) : __unbuffered_p0_EAX [L840] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p0_EAX == 1 && __unbuffered_p0_EBX == 0 && __unbuffered_p2_EAX == 2) VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] COND TRUE 0 !expression VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L5] 0 __VERIFIER_error() VAL [__unbuffered_cnt=3, __unbuffered_p0_EAX=1, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={5:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p0_EBX=0, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=1, weak$$choice2=1, x=2, y={5:0}, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 160 locations, 1 error locations. Result: UNSAFE, OverallTime: 100.5s, OverallIterations: 20, TraceHistogramMax: 1, AutomataDifference: 35.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5083 SDtfs, 6925 SDslu, 10885 SDs, 0 SdLazy, 4264 SolverSat, 315 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 221 GetRequests, 73 SyntacticMatches, 27 SemanticMatches, 121 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 161 ImplicationChecksByTransitivity, 3.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=148820occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 44.6s AutomataMinimizationTime, 19 MinimizatonAttempts, 142384 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.0s InterpolantComputationTime, 1914 NumberOfCodeBlocks, 1914 NumberOfCodeBlocksAsserted, 20 NumberOfCheckSat, 1781 ConstructedInterpolants, 0 QuantifiedInterpolants, 423557 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 19 InterpolantComputations, 19 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...