/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf -i ../../../trunk/examples/svcomp/pthread-wmm/safe029_power.oepc.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-4336eb1 [2019-12-28 05:15:26,417 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-28 05:15:26,419 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-28 05:15:26,432 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-28 05:15:26,432 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-28 05:15:26,433 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-28 05:15:26,434 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-28 05:15:26,436 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-28 05:15:26,438 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-28 05:15:26,439 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-28 05:15:26,440 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-28 05:15:26,441 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-28 05:15:26,441 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-28 05:15:26,442 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-28 05:15:26,443 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-28 05:15:26,445 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-28 05:15:26,445 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-28 05:15:26,446 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-28 05:15:26,448 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-28 05:15:26,450 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-28 05:15:26,452 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-28 05:15:26,453 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-28 05:15:26,454 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-28 05:15:26,455 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-28 05:15:26,457 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-28 05:15:26,458 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-28 05:15:26,458 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-28 05:15:26,459 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-28 05:15:26,459 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-28 05:15:26,460 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-28 05:15:26,461 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-28 05:15:26,461 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-28 05:15:26,462 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-28 05:15:26,463 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-28 05:15:26,464 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-28 05:15:26,464 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-28 05:15:26,465 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-28 05:15:26,465 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-28 05:15:26,466 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-28 05:15:26,467 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-28 05:15:26,467 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-28 05:15:26,468 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf [2019-12-28 05:15:26,489 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-28 05:15:26,489 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-28 05:15:26,493 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-28 05:15:26,494 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-28 05:15:26,494 INFO L138 SettingsManager]: * Use SBE=true [2019-12-28 05:15:26,494 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-28 05:15:26,495 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-28 05:15:26,495 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-28 05:15:26,495 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-28 05:15:26,495 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-28 05:15:26,495 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-28 05:15:26,495 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-28 05:15:26,497 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-28 05:15:26,497 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-28 05:15:26,497 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-28 05:15:26,497 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-28 05:15:26,498 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-28 05:15:26,498 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-28 05:15:26,498 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-28 05:15:26,498 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-28 05:15:26,498 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-28 05:15:26,499 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 05:15:26,499 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-28 05:15:26,500 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-28 05:15:26,500 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-28 05:15:26,500 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-28 05:15:26,500 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-28 05:15:26,501 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2019-12-28 05:15:26,501 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2019-12-28 05:15:26,501 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-28 05:15:26,502 INFO L138 SettingsManager]: * Interpolant automaton=MCR [2019-12-28 05:15:26,503 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-28 05:15:26,836 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-28 05:15:26,852 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-28 05:15:26,856 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-28 05:15:26,858 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-28 05:15:26,859 INFO L275 PluginConnector]: CDTParser initialized [2019-12-28 05:15:26,860 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/safe029_power.oepc.i [2019-12-28 05:15:26,937 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b4e9dba2b/2736d0dd8d7b4476b70f30b8b0c5ec35/FLAG832a96ccb [2019-12-28 05:15:27,510 INFO L306 CDTParser]: Found 1 translation units. [2019-12-28 05:15:27,510 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe029_power.oepc.i [2019-12-28 05:15:27,535 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b4e9dba2b/2736d0dd8d7b4476b70f30b8b0c5ec35/FLAG832a96ccb [2019-12-28 05:15:27,788 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b4e9dba2b/2736d0dd8d7b4476b70f30b8b0c5ec35 [2019-12-28 05:15:27,800 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-28 05:15:27,802 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-12-28 05:15:27,803 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-28 05:15:27,803 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-28 05:15:27,807 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-28 05:15:27,808 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 05:15:27" (1/1) ... [2019-12-28 05:15:27,811 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@75edc707 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:27, skipping insertion in model container [2019-12-28 05:15:27,811 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 05:15:27" (1/1) ... [2019-12-28 05:15:27,819 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-28 05:15:27,884 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-28 05:15:28,368 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 05:15:28,395 INFO L203 MainTranslator]: Completed pre-run [2019-12-28 05:15:28,463 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 05:15:28,536 INFO L208 MainTranslator]: Completed translation [2019-12-28 05:15:28,537 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:28 WrapperNode [2019-12-28 05:15:28,537 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-28 05:15:28,538 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-28 05:15:28,538 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-28 05:15:28,538 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-28 05:15:28,549 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:28" (1/1) ... [2019-12-28 05:15:28,580 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:28" (1/1) ... [2019-12-28 05:15:28,620 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-28 05:15:28,620 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-28 05:15:28,620 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-28 05:15:28,621 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-28 05:15:28,631 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:28" (1/1) ... [2019-12-28 05:15:28,631 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:28" (1/1) ... [2019-12-28 05:15:28,636 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:28" (1/1) ... [2019-12-28 05:15:28,636 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:28" (1/1) ... [2019-12-28 05:15:28,645 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:28" (1/1) ... [2019-12-28 05:15:28,649 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:28" (1/1) ... [2019-12-28 05:15:28,653 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:28" (1/1) ... [2019-12-28 05:15:28,658 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-28 05:15:28,658 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-28 05:15:28,659 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-28 05:15:28,659 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-28 05:15:28,660 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:28" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 05:15:28,729 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-28 05:15:28,730 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-28 05:15:28,730 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-28 05:15:28,730 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-28 05:15:28,730 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-28 05:15:28,730 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-28 05:15:28,731 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-28 05:15:28,731 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-28 05:15:28,731 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-28 05:15:28,731 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-28 05:15:28,732 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-28 05:15:28,734 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-28 05:15:29,517 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-28 05:15:29,518 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-28 05:15:29,519 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 05:15:29 BoogieIcfgContainer [2019-12-28 05:15:29,520 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-28 05:15:29,521 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-28 05:15:29,521 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-28 05:15:29,524 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-28 05:15:29,525 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.12 05:15:27" (1/3) ... [2019-12-28 05:15:29,526 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@30b1235c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 05:15:29, skipping insertion in model container [2019-12-28 05:15:29,526 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:15:28" (2/3) ... [2019-12-28 05:15:29,527 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@30b1235c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 05:15:29, skipping insertion in model container [2019-12-28 05:15:29,527 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 05:15:29" (3/3) ... [2019-12-28 05:15:29,529 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_power.oepc.i [2019-12-28 05:15:29,540 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-28 05:15:29,540 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-28 05:15:29,548 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-28 05:15:29,549 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-28 05:15:29,588 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,589 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,589 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,589 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,590 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,590 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,590 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,591 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,591 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,592 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,592 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,592 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,592 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,593 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,593 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,593 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,594 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,595 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,601 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,601 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,604 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,605 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,608 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,609 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,609 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,609 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,609 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,610 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,610 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,610 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,610 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,611 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,611 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,612 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,613 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,613 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,613 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,613 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,614 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,614 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,614 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,614 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,621 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,621 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,622 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,622 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,622 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,622 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,623 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,623 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,623 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,623 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,624 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,624 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,627 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,627 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,627 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,628 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,628 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,628 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,628 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,629 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,629 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,629 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:15:29,646 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-28 05:15:29,667 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-28 05:15:29,668 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-28 05:15:29,668 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-28 05:15:29,668 INFO L376 AbstractCegarLoop]: Backedges is MCR [2019-12-28 05:15:29,668 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-28 05:15:29,668 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-28 05:15:29,668 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-28 05:15:29,669 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-28 05:15:29,710 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 145 places, 179 transitions [2019-12-28 05:15:31,082 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22509 states. [2019-12-28 05:15:31,084 INFO L276 IsEmpty]: Start isEmpty. Operand 22509 states. [2019-12-28 05:15:31,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-28 05:15:31,092 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:15:31,093 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:15:31,094 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:15:31,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:15:31,101 INFO L82 PathProgramCache]: Analyzing trace with hash -641553760, now seen corresponding path program 1 times [2019-12-28 05:15:31,112 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:15:31,113 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1918404404] [2019-12-28 05:15:31,113 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:15:31,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:15:31,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:15:31,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1918404404] [2019-12-28 05:15:31,374 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:15:31,374 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:15:31,375 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1981971049] [2019-12-28 05:15:31,376 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:15:31,382 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:15:31,401 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 33 states and 32 transitions. [2019-12-28 05:15:31,401 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:15:31,406 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:15:31,406 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:15:31,407 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:15:31,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:15:31,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:15:31,424 INFO L87 Difference]: Start difference. First operand 22509 states. Second operand 4 states. [2019-12-28 05:15:32,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:15:32,114 INFO L93 Difference]: Finished difference Result 23453 states and 91770 transitions. [2019-12-28 05:15:32,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 05:15:32,116 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2019-12-28 05:15:32,117 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:15:32,373 INFO L225 Difference]: With dead ends: 23453 [2019-12-28 05:15:32,373 INFO L226 Difference]: Without dead ends: 21277 [2019-12-28 05:15:32,377 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:15:33,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21277 states. [2019-12-28 05:15:34,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21277 to 21277. [2019-12-28 05:15:34,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21277 states. [2019-12-28 05:15:34,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21277 states to 21277 states and 83794 transitions. [2019-12-28 05:15:34,294 INFO L78 Accepts]: Start accepts. Automaton has 21277 states and 83794 transitions. Word has length 32 [2019-12-28 05:15:34,296 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:15:34,296 INFO L462 AbstractCegarLoop]: Abstraction has 21277 states and 83794 transitions. [2019-12-28 05:15:34,296 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:15:34,296 INFO L276 IsEmpty]: Start isEmpty. Operand 21277 states and 83794 transitions. [2019-12-28 05:15:34,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-28 05:15:34,309 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:15:34,309 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:15:34,310 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:15:34,310 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:15:34,310 INFO L82 PathProgramCache]: Analyzing trace with hash -2036668926, now seen corresponding path program 1 times [2019-12-28 05:15:34,311 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:15:34,311 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [153724573] [2019-12-28 05:15:34,312 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:15:34,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:15:34,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:15:34,506 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [153724573] [2019-12-28 05:15:34,506 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:15:34,507 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:15:34,507 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [630814875] [2019-12-28 05:15:34,507 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:15:34,512 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:15:34,520 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 44 states and 43 transitions. [2019-12-28 05:15:34,520 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:15:34,521 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:15:34,523 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:15:34,523 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:15:34,523 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:15:34,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:15:34,525 INFO L87 Difference]: Start difference. First operand 21277 states and 83794 transitions. Second operand 5 states. [2019-12-28 05:15:35,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:15:35,541 INFO L93 Difference]: Finished difference Result 34711 states and 129090 transitions. [2019-12-28 05:15:35,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:15:35,543 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-12-28 05:15:35,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:15:35,707 INFO L225 Difference]: With dead ends: 34711 [2019-12-28 05:15:35,707 INFO L226 Difference]: Without dead ends: 34567 [2019-12-28 05:15:35,709 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:15:35,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34567 states. [2019-12-28 05:15:37,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34567 to 33067. [2019-12-28 05:15:37,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33067 states. [2019-12-28 05:15:38,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33067 states to 33067 states and 123978 transitions. [2019-12-28 05:15:38,071 INFO L78 Accepts]: Start accepts. Automaton has 33067 states and 123978 transitions. Word has length 43 [2019-12-28 05:15:38,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:15:38,073 INFO L462 AbstractCegarLoop]: Abstraction has 33067 states and 123978 transitions. [2019-12-28 05:15:38,073 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:15:38,073 INFO L276 IsEmpty]: Start isEmpty. Operand 33067 states and 123978 transitions. [2019-12-28 05:15:38,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-28 05:15:38,077 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:15:38,077 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:15:38,078 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:15:38,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:15:38,078 INFO L82 PathProgramCache]: Analyzing trace with hash -1802978339, now seen corresponding path program 1 times [2019-12-28 05:15:38,079 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:15:38,079 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [52341218] [2019-12-28 05:15:38,079 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:15:38,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:15:38,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:15:38,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [52341218] [2019-12-28 05:15:38,204 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:15:38,205 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:15:38,205 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1642538711] [2019-12-28 05:15:38,205 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:15:38,209 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:15:38,213 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 45 states and 44 transitions. [2019-12-28 05:15:38,213 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:15:38,214 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:15:38,214 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:15:38,215 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:15:38,215 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:15:38,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:15:38,216 INFO L87 Difference]: Start difference. First operand 33067 states and 123978 transitions. Second operand 5 states. [2019-12-28 05:15:38,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:15:38,802 INFO L93 Difference]: Finished difference Result 40219 states and 148647 transitions. [2019-12-28 05:15:38,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:15:38,803 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-12-28 05:15:38,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:15:39,045 INFO L225 Difference]: With dead ends: 40219 [2019-12-28 05:15:39,045 INFO L226 Difference]: Without dead ends: 40059 [2019-12-28 05:15:39,046 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:15:39,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40059 states. [2019-12-28 05:15:41,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40059 to 34640. [2019-12-28 05:15:41,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34640 states. [2019-12-28 05:15:41,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34640 states to 34640 states and 129274 transitions. [2019-12-28 05:15:41,980 INFO L78 Accepts]: Start accepts. Automaton has 34640 states and 129274 transitions. Word has length 44 [2019-12-28 05:15:41,981 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:15:41,981 INFO L462 AbstractCegarLoop]: Abstraction has 34640 states and 129274 transitions. [2019-12-28 05:15:41,981 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:15:41,981 INFO L276 IsEmpty]: Start isEmpty. Operand 34640 states and 129274 transitions. [2019-12-28 05:15:41,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-28 05:15:41,994 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:15:41,994 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:15:41,995 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:15:41,995 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:15:41,995 INFO L82 PathProgramCache]: Analyzing trace with hash 1187379522, now seen corresponding path program 1 times [2019-12-28 05:15:41,996 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:15:41,996 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [592000987] [2019-12-28 05:15:41,996 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:15:42,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:15:42,135 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:15:42,135 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [592000987] [2019-12-28 05:15:42,137 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:15:42,138 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:15:42,138 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2126286652] [2019-12-28 05:15:42,138 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:15:42,146 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:15:42,158 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 91 states and 129 transitions. [2019-12-28 05:15:42,158 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:15:42,290 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:15:42,291 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-28 05:15:42,291 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:15:42,291 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-28 05:15:42,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:15:42,292 INFO L87 Difference]: Start difference. First operand 34640 states and 129274 transitions. Second operand 10 states. [2019-12-28 05:15:45,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:15:45,016 INFO L93 Difference]: Finished difference Result 93376 states and 348364 transitions. [2019-12-28 05:15:45,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-28 05:15:45,017 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 51 [2019-12-28 05:15:45,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:15:45,940 INFO L225 Difference]: With dead ends: 93376 [2019-12-28 05:15:45,940 INFO L226 Difference]: Without dead ends: 93088 [2019-12-28 05:15:45,941 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=213, Invalid=543, Unknown=0, NotChecked=0, Total=756 [2019-12-28 05:15:46,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93088 states. [2019-12-28 05:15:49,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93088 to 34470. [2019-12-28 05:15:49,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34470 states. [2019-12-28 05:15:49,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34470 states to 34470 states and 128650 transitions. [2019-12-28 05:15:49,452 INFO L78 Accepts]: Start accepts. Automaton has 34470 states and 128650 transitions. Word has length 51 [2019-12-28 05:15:49,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:15:49,452 INFO L462 AbstractCegarLoop]: Abstraction has 34470 states and 128650 transitions. [2019-12-28 05:15:49,453 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-28 05:15:49,453 INFO L276 IsEmpty]: Start isEmpty. Operand 34470 states and 128650 transitions. [2019-12-28 05:15:49,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-28 05:15:49,487 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:15:49,487 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:15:49,487 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:15:49,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:15:49,488 INFO L82 PathProgramCache]: Analyzing trace with hash -2042153850, now seen corresponding path program 1 times [2019-12-28 05:15:49,489 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:15:49,489 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1473961263] [2019-12-28 05:15:49,489 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:15:49,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:15:49,613 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:15:49,613 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1473961263] [2019-12-28 05:15:49,613 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:15:49,614 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:15:49,614 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [858764652] [2019-12-28 05:15:49,614 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:15:49,624 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:15:49,633 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 59 states and 58 transitions. [2019-12-28 05:15:49,634 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:15:49,634 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:15:49,635 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:15:49,635 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:15:49,635 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:15:49,636 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:15:49,636 INFO L87 Difference]: Start difference. First operand 34470 states and 128650 transitions. Second operand 6 states. [2019-12-28 05:15:50,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:15:50,316 INFO L93 Difference]: Finished difference Result 46942 states and 171083 transitions. [2019-12-28 05:15:50,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 05:15:50,317 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-28 05:15:50,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:15:50,809 INFO L225 Difference]: With dead ends: 46942 [2019-12-28 05:15:50,809 INFO L226 Difference]: Without dead ends: 46702 [2019-12-28 05:15:50,809 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-28 05:15:50,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46702 states. [2019-12-28 05:15:51,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46702 to 40831. [2019-12-28 05:15:51,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40831 states. [2019-12-28 05:15:52,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40831 states to 40831 states and 150574 transitions. [2019-12-28 05:15:52,096 INFO L78 Accepts]: Start accepts. Automaton has 40831 states and 150574 transitions. Word has length 58 [2019-12-28 05:15:52,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:15:52,096 INFO L462 AbstractCegarLoop]: Abstraction has 40831 states and 150574 transitions. [2019-12-28 05:15:52,096 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:15:52,096 INFO L276 IsEmpty]: Start isEmpty. Operand 40831 states and 150574 transitions. [2019-12-28 05:15:52,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-28 05:15:52,128 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:15:52,128 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:15:52,128 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:15:52,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:15:52,129 INFO L82 PathProgramCache]: Analyzing trace with hash 1541499923, now seen corresponding path program 1 times [2019-12-28 05:15:52,129 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:15:52,129 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2102245922] [2019-12-28 05:15:52,130 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:15:52,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:15:52,207 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:15:52,207 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2102245922] [2019-12-28 05:15:52,208 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:15:52,208 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:15:52,208 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1189820825] [2019-12-28 05:15:52,208 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:15:52,218 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:15:52,230 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 61 states and 60 transitions. [2019-12-28 05:15:52,230 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:15:52,230 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:15:52,231 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:15:52,231 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:15:52,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:15:52,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:15:52,232 INFO L87 Difference]: Start difference. First operand 40831 states and 150574 transitions. Second operand 3 states. [2019-12-28 05:15:52,505 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:15:52,505 INFO L93 Difference]: Finished difference Result 51282 states and 185913 transitions. [2019-12-28 05:15:52,506 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:15:52,506 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2019-12-28 05:15:52,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:15:52,612 INFO L225 Difference]: With dead ends: 51282 [2019-12-28 05:15:52,612 INFO L226 Difference]: Without dead ends: 51282 [2019-12-28 05:15:52,612 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:15:52,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51282 states. [2019-12-28 05:15:55,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51282 to 44846. [2019-12-28 05:15:55,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44846 states. [2019-12-28 05:15:55,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44846 states to 44846 states and 164292 transitions. [2019-12-28 05:15:55,183 INFO L78 Accepts]: Start accepts. Automaton has 44846 states and 164292 transitions. Word has length 60 [2019-12-28 05:15:55,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:15:55,183 INFO L462 AbstractCegarLoop]: Abstraction has 44846 states and 164292 transitions. [2019-12-28 05:15:55,183 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:15:55,183 INFO L276 IsEmpty]: Start isEmpty. Operand 44846 states and 164292 transitions. [2019-12-28 05:15:55,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-28 05:15:55,216 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:15:55,216 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:15:55,216 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:15:55,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:15:55,217 INFO L82 PathProgramCache]: Analyzing trace with hash 1207224336, now seen corresponding path program 1 times [2019-12-28 05:15:55,217 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:15:55,217 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118004428] [2019-12-28 05:15:55,218 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:15:55,233 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:15:55,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:15:55,325 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118004428] [2019-12-28 05:15:55,332 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:15:55,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:15:55,333 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1528703257] [2019-12-28 05:15:55,333 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:15:55,346 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:15:55,362 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 65 states and 64 transitions. [2019-12-28 05:15:55,362 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:15:55,363 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:15:55,363 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:15:55,363 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:15:55,364 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:15:55,364 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:15:55,365 INFO L87 Difference]: Start difference. First operand 44846 states and 164292 transitions. Second operand 7 states. [2019-12-28 05:15:56,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:15:56,670 INFO L93 Difference]: Finished difference Result 56842 states and 204026 transitions. [2019-12-28 05:15:56,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-28 05:15:56,671 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-28 05:15:56,671 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:15:56,795 INFO L225 Difference]: With dead ends: 56842 [2019-12-28 05:15:56,796 INFO L226 Difference]: Without dead ends: 56602 [2019-12-28 05:15:56,796 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-12-28 05:15:57,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56602 states. [2019-12-28 05:15:59,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56602 to 46072. [2019-12-28 05:15:59,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46072 states. [2019-12-28 05:16:00,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46072 states to 46072 states and 168459 transitions. [2019-12-28 05:16:00,062 INFO L78 Accepts]: Start accepts. Automaton has 46072 states and 168459 transitions. Word has length 64 [2019-12-28 05:16:00,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:00,063 INFO L462 AbstractCegarLoop]: Abstraction has 46072 states and 168459 transitions. [2019-12-28 05:16:00,063 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:16:00,063 INFO L276 IsEmpty]: Start isEmpty. Operand 46072 states and 168459 transitions. [2019-12-28 05:16:00,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-28 05:16:00,101 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:00,101 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:00,101 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:00,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:00,102 INFO L82 PathProgramCache]: Analyzing trace with hash 2064437065, now seen corresponding path program 1 times [2019-12-28 05:16:00,102 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:00,102 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [511694291] [2019-12-28 05:16:00,103 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:00,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:00,178 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:00,179 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [511694291] [2019-12-28 05:16:00,179 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:00,179 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:16:00,179 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1105178445] [2019-12-28 05:16:00,180 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:00,190 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:00,216 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 114 states and 156 transitions. [2019-12-28 05:16:00,216 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:00,336 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 10 times. [2019-12-28 05:16:00,337 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-28 05:16:00,337 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:00,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-28 05:16:00,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2019-12-28 05:16:00,338 INFO L87 Difference]: Start difference. First operand 46072 states and 168459 transitions. Second operand 11 states. [2019-12-28 05:16:04,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:04,474 INFO L93 Difference]: Finished difference Result 173291 states and 630181 transitions. [2019-12-28 05:16:04,475 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-28 05:16:04,475 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-28 05:16:04,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:04,915 INFO L225 Difference]: With dead ends: 173291 [2019-12-28 05:16:04,915 INFO L226 Difference]: Without dead ends: 173019 [2019-12-28 05:16:04,915 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 246 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=353, Invalid=907, Unknown=0, NotChecked=0, Total=1260 [2019-12-28 05:16:05,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173019 states. [2019-12-28 05:16:10,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173019 to 58438. [2019-12-28 05:16:10,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58438 states. [2019-12-28 05:16:10,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58438 states to 58438 states and 215742 transitions. [2019-12-28 05:16:10,885 INFO L78 Accepts]: Start accepts. Automaton has 58438 states and 215742 transitions. Word has length 65 [2019-12-28 05:16:10,885 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:10,885 INFO L462 AbstractCegarLoop]: Abstraction has 58438 states and 215742 transitions. [2019-12-28 05:16:10,885 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-28 05:16:10,885 INFO L276 IsEmpty]: Start isEmpty. Operand 58438 states and 215742 transitions. [2019-12-28 05:16:10,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-28 05:16:10,927 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:10,927 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:10,927 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:10,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:10,927 INFO L82 PathProgramCache]: Analyzing trace with hash -978936533, now seen corresponding path program 2 times [2019-12-28 05:16:10,928 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:10,928 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437580003] [2019-12-28 05:16:10,928 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:10,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:10,997 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:10,998 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1437580003] [2019-12-28 05:16:10,998 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:10,998 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:16:10,998 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [697999954] [2019-12-28 05:16:10,998 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:11,009 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:11,032 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 105 states and 141 transitions. [2019-12-28 05:16:11,032 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:11,125 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:16:11,125 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-28 05:16:11,126 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:11,126 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-28 05:16:11,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2019-12-28 05:16:11,127 INFO L87 Difference]: Start difference. First operand 58438 states and 215742 transitions. Second operand 11 states. [2019-12-28 05:16:15,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:15,923 INFO L93 Difference]: Finished difference Result 151820 states and 556627 transitions. [2019-12-28 05:16:15,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-28 05:16:15,923 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-28 05:16:15,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:16,333 INFO L225 Difference]: With dead ends: 151820 [2019-12-28 05:16:16,333 INFO L226 Difference]: Without dead ends: 151356 [2019-12-28 05:16:16,333 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 235 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=296, Invalid=964, Unknown=0, NotChecked=0, Total=1260 [2019-12-28 05:16:16,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151356 states. [2019-12-28 05:16:18,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151356 to 53493. [2019-12-28 05:16:18,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53493 states. [2019-12-28 05:16:18,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53493 states to 53493 states and 198468 transitions. [2019-12-28 05:16:18,655 INFO L78 Accepts]: Start accepts. Automaton has 53493 states and 198468 transitions. Word has length 65 [2019-12-28 05:16:18,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:18,656 INFO L462 AbstractCegarLoop]: Abstraction has 53493 states and 198468 transitions. [2019-12-28 05:16:18,656 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-28 05:16:18,656 INFO L276 IsEmpty]: Start isEmpty. Operand 53493 states and 198468 transitions. [2019-12-28 05:16:18,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:16:18,707 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:18,707 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:18,708 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:18,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:18,708 INFO L82 PathProgramCache]: Analyzing trace with hash 379551327, now seen corresponding path program 1 times [2019-12-28 05:16:18,708 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:18,709 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261930252] [2019-12-28 05:16:18,709 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:18,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:18,747 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:18,747 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1261930252] [2019-12-28 05:16:18,747 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:18,748 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:16:18,748 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [916075572] [2019-12-28 05:16:18,748 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:18,758 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:18,770 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 74 states and 79 transitions. [2019-12-28 05:16:18,771 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:18,771 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:18,771 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:16:18,771 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:18,772 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:16:18,772 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:16:18,772 INFO L87 Difference]: Start difference. First operand 53493 states and 198468 transitions. Second operand 3 states. [2019-12-28 05:16:19,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:19,261 INFO L93 Difference]: Finished difference Result 73480 states and 271657 transitions. [2019-12-28 05:16:19,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:16:19,262 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-28 05:16:19,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:19,435 INFO L225 Difference]: With dead ends: 73480 [2019-12-28 05:16:19,435 INFO L226 Difference]: Without dead ends: 73480 [2019-12-28 05:16:19,436 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:16:19,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73480 states. [2019-12-28 05:16:21,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73480 to 63179. [2019-12-28 05:16:21,131 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63179 states. [2019-12-28 05:16:21,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63179 states to 63179 states and 235337 transitions. [2019-12-28 05:16:21,299 INFO L78 Accepts]: Start accepts. Automaton has 63179 states and 235337 transitions. Word has length 67 [2019-12-28 05:16:21,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:21,299 INFO L462 AbstractCegarLoop]: Abstraction has 63179 states and 235337 transitions. [2019-12-28 05:16:21,299 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:16:21,300 INFO L276 IsEmpty]: Start isEmpty. Operand 63179 states and 235337 transitions. [2019-12-28 05:16:21,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:16:21,368 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:21,368 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:21,368 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:21,368 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:21,368 INFO L82 PathProgramCache]: Analyzing trace with hash 1904207583, now seen corresponding path program 1 times [2019-12-28 05:16:21,369 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:21,369 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1082250736] [2019-12-28 05:16:21,369 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:21,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:21,459 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:21,459 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1082250736] [2019-12-28 05:16:21,459 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:21,460 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:16:21,460 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1130692524] [2019-12-28 05:16:21,460 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:21,470 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:21,484 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 74 states and 79 transitions. [2019-12-28 05:16:21,484 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:21,485 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:21,485 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:16:21,485 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:21,486 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:16:21,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:16:21,486 INFO L87 Difference]: Start difference. First operand 63179 states and 235337 transitions. Second operand 6 states. [2019-12-28 05:16:22,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:22,787 INFO L93 Difference]: Finished difference Result 77546 states and 284841 transitions. [2019-12-28 05:16:22,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:16:22,787 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-28 05:16:22,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:22,967 INFO L225 Difference]: With dead ends: 77546 [2019-12-28 05:16:22,967 INFO L226 Difference]: Without dead ends: 76902 [2019-12-28 05:16:22,967 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:16:23,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76902 states. [2019-12-28 05:16:24,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76902 to 65811. [2019-12-28 05:16:24,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65811 states. [2019-12-28 05:16:24,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65811 states to 65811 states and 244122 transitions. [2019-12-28 05:16:24,295 INFO L78 Accepts]: Start accepts. Automaton has 65811 states and 244122 transitions. Word has length 67 [2019-12-28 05:16:24,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:24,295 INFO L462 AbstractCegarLoop]: Abstraction has 65811 states and 244122 transitions. [2019-12-28 05:16:24,295 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:16:24,295 INFO L276 IsEmpty]: Start isEmpty. Operand 65811 states and 244122 transitions. [2019-12-28 05:16:24,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:16:24,345 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:24,346 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:24,346 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:24,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:24,346 INFO L82 PathProgramCache]: Analyzing trace with hash -1429145696, now seen corresponding path program 1 times [2019-12-28 05:16:24,346 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:24,347 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1419190514] [2019-12-28 05:16:24,347 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:24,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:24,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:24,471 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1419190514] [2019-12-28 05:16:24,471 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:24,472 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:16:24,472 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1417899654] [2019-12-28 05:16:24,472 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:24,827 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:24,841 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 74 states and 79 transitions. [2019-12-28 05:16:24,842 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:24,842 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:24,843 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:16:24,843 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:24,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:16:24,844 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:16:24,844 INFO L87 Difference]: Start difference. First operand 65811 states and 244122 transitions. Second operand 7 states. [2019-12-28 05:16:25,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:25,981 INFO L93 Difference]: Finished difference Result 95559 states and 342889 transitions. [2019-12-28 05:16:25,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-28 05:16:25,982 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-28 05:16:25,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:26,202 INFO L225 Difference]: With dead ends: 95559 [2019-12-28 05:16:26,202 INFO L226 Difference]: Without dead ends: 95559 [2019-12-28 05:16:26,202 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:16:26,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95559 states. [2019-12-28 05:16:28,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95559 to 87235. [2019-12-28 05:16:28,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87235 states. [2019-12-28 05:16:28,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87235 states to 87235 states and 316238 transitions. [2019-12-28 05:16:28,441 INFO L78 Accepts]: Start accepts. Automaton has 87235 states and 316238 transitions. Word has length 67 [2019-12-28 05:16:28,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:28,441 INFO L462 AbstractCegarLoop]: Abstraction has 87235 states and 316238 transitions. [2019-12-28 05:16:28,441 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:16:28,441 INFO L276 IsEmpty]: Start isEmpty. Operand 87235 states and 316238 transitions. [2019-12-28 05:16:28,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:16:28,516 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:28,517 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:28,517 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:28,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:28,517 INFO L82 PathProgramCache]: Analyzing trace with hash -184381215, now seen corresponding path program 1 times [2019-12-28 05:16:28,518 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:28,518 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591744047] [2019-12-28 05:16:28,518 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:28,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:28,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:28,588 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591744047] [2019-12-28 05:16:28,588 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:28,588 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:16:28,588 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [413358723] [2019-12-28 05:16:28,589 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:28,598 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:28,611 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 74 states and 79 transitions. [2019-12-28 05:16:28,612 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:28,616 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:16:28,616 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:16:28,616 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:28,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:16:28,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:16:28,617 INFO L87 Difference]: Start difference. First operand 87235 states and 316238 transitions. Second operand 4 states. [2019-12-28 05:16:28,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:28,707 INFO L93 Difference]: Finished difference Result 18802 states and 60206 transitions. [2019-12-28 05:16:28,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:16:28,707 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-28 05:16:28,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:28,735 INFO L225 Difference]: With dead ends: 18802 [2019-12-28 05:16:28,736 INFO L226 Difference]: Without dead ends: 18324 [2019-12-28 05:16:28,736 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:16:28,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18324 states. [2019-12-28 05:16:28,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18324 to 18312. [2019-12-28 05:16:28,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18312 states. [2019-12-28 05:16:28,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18312 states to 18312 states and 58701 transitions. [2019-12-28 05:16:28,987 INFO L78 Accepts]: Start accepts. Automaton has 18312 states and 58701 transitions. Word has length 67 [2019-12-28 05:16:28,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:28,987 INFO L462 AbstractCegarLoop]: Abstraction has 18312 states and 58701 transitions. [2019-12-28 05:16:28,987 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:16:28,987 INFO L276 IsEmpty]: Start isEmpty. Operand 18312 states and 58701 transitions. [2019-12-28 05:16:29,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-28 05:16:29,001 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:29,002 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:29,002 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:29,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:29,002 INFO L82 PathProgramCache]: Analyzing trace with hash 1457085175, now seen corresponding path program 1 times [2019-12-28 05:16:29,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:29,003 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1044446867] [2019-12-28 05:16:29,003 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:29,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:29,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:29,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1044446867] [2019-12-28 05:16:29,069 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:29,070 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:16:29,070 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [712978730] [2019-12-28 05:16:29,070 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:29,107 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:29,136 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 78 states and 77 transitions. [2019-12-28 05:16:29,136 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:29,137 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:29,137 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:16:29,137 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:29,138 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:16:29,138 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:16:29,138 INFO L87 Difference]: Start difference. First operand 18312 states and 58701 transitions. Second operand 4 states. [2019-12-28 05:16:29,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:29,379 INFO L93 Difference]: Finished difference Result 23892 states and 75556 transitions. [2019-12-28 05:16:29,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:16:29,380 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2019-12-28 05:16:29,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:29,418 INFO L225 Difference]: With dead ends: 23892 [2019-12-28 05:16:29,418 INFO L226 Difference]: Without dead ends: 23892 [2019-12-28 05:16:29,418 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:16:29,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23892 states. [2019-12-28 05:16:29,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23892 to 19188. [2019-12-28 05:16:29,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19188 states. [2019-12-28 05:16:29,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19188 states to 19188 states and 61260 transitions. [2019-12-28 05:16:29,705 INFO L78 Accepts]: Start accepts. Automaton has 19188 states and 61260 transitions. Word has length 77 [2019-12-28 05:16:29,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:29,705 INFO L462 AbstractCegarLoop]: Abstraction has 19188 states and 61260 transitions. [2019-12-28 05:16:29,705 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:16:29,705 INFO L276 IsEmpty]: Start isEmpty. Operand 19188 states and 61260 transitions. [2019-12-28 05:16:29,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-28 05:16:29,810 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:29,810 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:29,810 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:29,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:29,811 INFO L82 PathProgramCache]: Analyzing trace with hash 1202348630, now seen corresponding path program 1 times [2019-12-28 05:16:29,811 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:29,813 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [956898020] [2019-12-28 05:16:29,813 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:29,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:29,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:29,926 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [956898020] [2019-12-28 05:16:29,926 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:29,927 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 05:16:29,927 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [302212086] [2019-12-28 05:16:29,927 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:29,943 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:29,970 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 78 states and 77 transitions. [2019-12-28 05:16:29,971 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:29,971 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:29,971 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 05:16:29,971 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:29,972 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 05:16:29,972 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:16:29,972 INFO L87 Difference]: Start difference. First operand 19188 states and 61260 transitions. Second operand 8 states. [2019-12-28 05:16:31,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:31,170 INFO L93 Difference]: Finished difference Result 23487 states and 73735 transitions. [2019-12-28 05:16:31,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-28 05:16:31,171 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 77 [2019-12-28 05:16:31,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:31,207 INFO L225 Difference]: With dead ends: 23487 [2019-12-28 05:16:31,208 INFO L226 Difference]: Without dead ends: 23439 [2019-12-28 05:16:31,208 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-12-28 05:16:31,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23439 states. [2019-12-28 05:16:31,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23439 to 17676. [2019-12-28 05:16:31,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17676 states. [2019-12-28 05:16:31,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17676 states to 17676 states and 56619 transitions. [2019-12-28 05:16:31,486 INFO L78 Accepts]: Start accepts. Automaton has 17676 states and 56619 transitions. Word has length 77 [2019-12-28 05:16:31,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:31,487 INFO L462 AbstractCegarLoop]: Abstraction has 17676 states and 56619 transitions. [2019-12-28 05:16:31,487 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 05:16:31,487 INFO L276 IsEmpty]: Start isEmpty. Operand 17676 states and 56619 transitions. [2019-12-28 05:16:31,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-12-28 05:16:31,507 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:31,507 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:31,507 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:31,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:31,508 INFO L82 PathProgramCache]: Analyzing trace with hash -155414719, now seen corresponding path program 1 times [2019-12-28 05:16:31,508 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:31,509 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1968899846] [2019-12-28 05:16:31,509 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:31,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:31,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:31,550 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1968899846] [2019-12-28 05:16:31,553 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:31,553 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:16:31,554 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [351853657] [2019-12-28 05:16:31,554 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:31,582 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:31,604 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 84 states and 88 transitions. [2019-12-28 05:16:31,605 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:31,605 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:31,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:16:31,606 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:31,606 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:16:31,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:16:31,606 INFO L87 Difference]: Start difference. First operand 17676 states and 56619 transitions. Second operand 3 states. [2019-12-28 05:16:31,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:31,888 INFO L93 Difference]: Finished difference Result 19033 states and 60538 transitions. [2019-12-28 05:16:31,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:16:31,889 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 78 [2019-12-28 05:16:31,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:31,921 INFO L225 Difference]: With dead ends: 19033 [2019-12-28 05:16:31,922 INFO L226 Difference]: Without dead ends: 19033 [2019-12-28 05:16:31,922 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:16:31,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19033 states. [2019-12-28 05:16:32,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19033 to 18376. [2019-12-28 05:16:32,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18376 states. [2019-12-28 05:16:32,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18376 states to 18376 states and 58615 transitions. [2019-12-28 05:16:32,180 INFO L78 Accepts]: Start accepts. Automaton has 18376 states and 58615 transitions. Word has length 78 [2019-12-28 05:16:32,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:32,180 INFO L462 AbstractCegarLoop]: Abstraction has 18376 states and 58615 transitions. [2019-12-28 05:16:32,180 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:16:32,180 INFO L276 IsEmpty]: Start isEmpty. Operand 18376 states and 58615 transitions. [2019-12-28 05:16:32,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-12-28 05:16:32,198 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:32,199 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:32,199 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:32,199 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:32,199 INFO L82 PathProgramCache]: Analyzing trace with hash 2033602545, now seen corresponding path program 1 times [2019-12-28 05:16:32,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:32,200 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [663569170] [2019-12-28 05:16:32,200 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:32,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:32,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:32,253 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [663569170] [2019-12-28 05:16:32,253 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:32,253 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:16:32,253 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2095849232] [2019-12-28 05:16:32,254 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:32,284 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:32,324 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 132 states and 183 transitions. [2019-12-28 05:16:32,324 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:32,325 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:32,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:16:32,325 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:32,325 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:16:32,326 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:16:32,326 INFO L87 Difference]: Start difference. First operand 18376 states and 58615 transitions. Second operand 4 states. [2019-12-28 05:16:32,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:32,649 INFO L93 Difference]: Finished difference Result 21886 states and 68807 transitions. [2019-12-28 05:16:32,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 05:16:32,650 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-12-28 05:16:32,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:32,683 INFO L225 Difference]: With dead ends: 21886 [2019-12-28 05:16:32,684 INFO L226 Difference]: Without dead ends: 21886 [2019-12-28 05:16:32,684 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:16:32,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21886 states. [2019-12-28 05:16:33,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21886 to 20500. [2019-12-28 05:16:33,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20500 states. [2019-12-28 05:16:33,175 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20500 states to 20500 states and 64880 transitions. [2019-12-28 05:16:33,175 INFO L78 Accepts]: Start accepts. Automaton has 20500 states and 64880 transitions. Word has length 79 [2019-12-28 05:16:33,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:33,176 INFO L462 AbstractCegarLoop]: Abstraction has 20500 states and 64880 transitions. [2019-12-28 05:16:33,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:16:33,176 INFO L276 IsEmpty]: Start isEmpty. Operand 20500 states and 64880 transitions. [2019-12-28 05:16:33,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-12-28 05:16:33,195 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:33,195 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:33,195 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:33,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:33,195 INFO L82 PathProgramCache]: Analyzing trace with hash 332862066, now seen corresponding path program 1 times [2019-12-28 05:16:33,196 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:33,196 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1969792307] [2019-12-28 05:16:33,196 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:33,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:33,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:33,254 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1969792307] [2019-12-28 05:16:33,254 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:33,254 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:16:33,254 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2069072711] [2019-12-28 05:16:33,255 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:33,270 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:33,306 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 132 states and 183 transitions. [2019-12-28 05:16:33,307 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:33,307 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:33,307 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:16:33,308 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:33,308 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:16:33,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:16:33,308 INFO L87 Difference]: Start difference. First operand 20500 states and 64880 transitions. Second operand 3 states. [2019-12-28 05:16:33,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:33,551 INFO L93 Difference]: Finished difference Result 22149 states and 69667 transitions. [2019-12-28 05:16:33,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:16:33,551 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-12-28 05:16:33,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:33,585 INFO L225 Difference]: With dead ends: 22149 [2019-12-28 05:16:33,585 INFO L226 Difference]: Without dead ends: 22149 [2019-12-28 05:16:33,585 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:16:33,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22149 states. [2019-12-28 05:16:33,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22149 to 21480. [2019-12-28 05:16:33,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21480 states. [2019-12-28 05:16:33,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21480 states to 21480 states and 67708 transitions. [2019-12-28 05:16:33,905 INFO L78 Accepts]: Start accepts. Automaton has 21480 states and 67708 transitions. Word has length 79 [2019-12-28 05:16:33,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:33,905 INFO L462 AbstractCegarLoop]: Abstraction has 21480 states and 67708 transitions. [2019-12-28 05:16:33,906 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:16:33,906 INFO L276 IsEmpty]: Start isEmpty. Operand 21480 states and 67708 transitions. [2019-12-28 05:16:33,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:16:33,927 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:33,927 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:33,928 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:33,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:33,928 INFO L82 PathProgramCache]: Analyzing trace with hash 1580742388, now seen corresponding path program 1 times [2019-12-28 05:16:33,928 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:33,929 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813087513] [2019-12-28 05:16:33,929 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:33,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:34,045 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:34,045 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1813087513] [2019-12-28 05:16:34,045 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:34,045 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 05:16:34,046 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [693726203] [2019-12-28 05:16:34,046 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:34,061 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:34,085 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 86 states and 90 transitions. [2019-12-28 05:16:34,085 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:34,087 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:34,088 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 05:16:34,088 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:34,088 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 05:16:34,089 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:16:34,089 INFO L87 Difference]: Start difference. First operand 21480 states and 67708 transitions. Second operand 8 states. [2019-12-28 05:16:37,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:37,020 INFO L93 Difference]: Finished difference Result 60004 states and 183043 transitions. [2019-12-28 05:16:37,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-28 05:16:37,020 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 80 [2019-12-28 05:16:37,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:37,119 INFO L225 Difference]: With dead ends: 60004 [2019-12-28 05:16:37,119 INFO L226 Difference]: Without dead ends: 59455 [2019-12-28 05:16:37,120 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=153, Invalid=497, Unknown=0, NotChecked=0, Total=650 [2019-12-28 05:16:37,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59455 states. [2019-12-28 05:16:37,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59455 to 32033. [2019-12-28 05:16:37,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32033 states. [2019-12-28 05:16:38,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32033 states to 32033 states and 100216 transitions. [2019-12-28 05:16:38,027 INFO L78 Accepts]: Start accepts. Automaton has 32033 states and 100216 transitions. Word has length 80 [2019-12-28 05:16:38,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:38,027 INFO L462 AbstractCegarLoop]: Abstraction has 32033 states and 100216 transitions. [2019-12-28 05:16:38,027 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 05:16:38,027 INFO L276 IsEmpty]: Start isEmpty. Operand 32033 states and 100216 transitions. [2019-12-28 05:16:38,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:16:38,060 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:38,060 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:38,060 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:38,060 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:38,061 INFO L82 PathProgramCache]: Analyzing trace with hash -507846410, now seen corresponding path program 1 times [2019-12-28 05:16:38,061 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:38,061 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1464596244] [2019-12-28 05:16:38,062 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:38,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:38,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:38,161 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1464596244] [2019-12-28 05:16:38,161 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:38,161 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:16:38,161 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1663762273] [2019-12-28 05:16:38,161 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:38,174 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:38,199 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 86 states and 90 transitions. [2019-12-28 05:16:38,199 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:38,200 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:38,200 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:16:38,200 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:38,200 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:16:38,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:16:38,201 INFO L87 Difference]: Start difference. First operand 32033 states and 100216 transitions. Second operand 6 states. [2019-12-28 05:16:38,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:38,811 INFO L93 Difference]: Finished difference Result 33785 states and 104772 transitions. [2019-12-28 05:16:38,811 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:16:38,811 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-12-28 05:16:38,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:38,862 INFO L225 Difference]: With dead ends: 33785 [2019-12-28 05:16:38,862 INFO L226 Difference]: Without dead ends: 33785 [2019-12-28 05:16:38,862 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:16:38,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33785 states. [2019-12-28 05:16:39,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33785 to 32500. [2019-12-28 05:16:39,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32500 states. [2019-12-28 05:16:39,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32500 states to 32500 states and 101118 transitions. [2019-12-28 05:16:39,353 INFO L78 Accepts]: Start accepts. Automaton has 32500 states and 101118 transitions. Word has length 80 [2019-12-28 05:16:39,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:39,354 INFO L462 AbstractCegarLoop]: Abstraction has 32500 states and 101118 transitions. [2019-12-28 05:16:39,354 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:16:39,354 INFO L276 IsEmpty]: Start isEmpty. Operand 32500 states and 101118 transitions. [2019-12-28 05:16:39,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:16:39,384 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:39,384 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:39,384 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:39,384 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:39,384 INFO L82 PathProgramCache]: Analyzing trace with hash 1851460599, now seen corresponding path program 1 times [2019-12-28 05:16:39,385 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:39,385 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2050357230] [2019-12-28 05:16:39,385 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:39,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:39,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:39,473 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2050357230] [2019-12-28 05:16:39,473 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:39,474 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:16:39,474 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [820305610] [2019-12-28 05:16:39,474 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:39,491 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:39,516 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 86 states and 90 transitions. [2019-12-28 05:16:39,516 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:39,517 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:39,517 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:16:39,517 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:39,518 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:16:39,518 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:16:39,518 INFO L87 Difference]: Start difference. First operand 32500 states and 101118 transitions. Second operand 7 states. [2019-12-28 05:16:40,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:40,101 INFO L93 Difference]: Finished difference Result 34185 states and 105826 transitions. [2019-12-28 05:16:40,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-28 05:16:40,101 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-12-28 05:16:40,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:40,152 INFO L225 Difference]: With dead ends: 34185 [2019-12-28 05:16:40,152 INFO L226 Difference]: Without dead ends: 34185 [2019-12-28 05:16:40,152 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:16:40,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34185 states. [2019-12-28 05:16:40,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34185 to 32863. [2019-12-28 05:16:40,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32863 states. [2019-12-28 05:16:40,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32863 states to 32863 states and 101983 transitions. [2019-12-28 05:16:40,639 INFO L78 Accepts]: Start accepts. Automaton has 32863 states and 101983 transitions. Word has length 80 [2019-12-28 05:16:40,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:40,640 INFO L462 AbstractCegarLoop]: Abstraction has 32863 states and 101983 transitions. [2019-12-28 05:16:40,640 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:16:40,640 INFO L276 IsEmpty]: Start isEmpty. Operand 32863 states and 101983 transitions. [2019-12-28 05:16:40,672 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:16:40,673 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:40,673 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:40,673 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:40,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:40,673 INFO L82 PathProgramCache]: Analyzing trace with hash -2113740936, now seen corresponding path program 1 times [2019-12-28 05:16:40,674 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:40,674 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245702567] [2019-12-28 05:16:40,674 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:40,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:40,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:40,850 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245702567] [2019-12-28 05:16:40,850 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:40,850 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:16:40,851 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1084772394] [2019-12-28 05:16:40,851 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:40,864 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:40,889 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 86 states and 90 transitions. [2019-12-28 05:16:40,889 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:40,889 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:40,890 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:16:40,890 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:40,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:16:40,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:16:40,890 INFO L87 Difference]: Start difference. First operand 32863 states and 101983 transitions. Second operand 3 states. [2019-12-28 05:16:41,036 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:41,036 INFO L93 Difference]: Finished difference Result 25144 states and 77530 transitions. [2019-12-28 05:16:41,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:16:41,037 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-12-28 05:16:41,037 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:41,089 INFO L225 Difference]: With dead ends: 25144 [2019-12-28 05:16:41,090 INFO L226 Difference]: Without dead ends: 25144 [2019-12-28 05:16:41,090 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:16:41,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25144 states. [2019-12-28 05:16:41,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25144 to 23988. [2019-12-28 05:16:41,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23988 states. [2019-12-28 05:16:41,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23988 states to 23988 states and 74053 transitions. [2019-12-28 05:16:41,515 INFO L78 Accepts]: Start accepts. Automaton has 23988 states and 74053 transitions. Word has length 80 [2019-12-28 05:16:41,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:41,516 INFO L462 AbstractCegarLoop]: Abstraction has 23988 states and 74053 transitions. [2019-12-28 05:16:41,516 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:16:41,516 INFO L276 IsEmpty]: Start isEmpty. Operand 23988 states and 74053 transitions. [2019-12-28 05:16:41,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:16:41,538 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:41,539 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:41,539 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:41,539 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:41,539 INFO L82 PathProgramCache]: Analyzing trace with hash 1936604585, now seen corresponding path program 1 times [2019-12-28 05:16:41,540 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:41,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361558283] [2019-12-28 05:16:41,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:41,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:41,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:41,630 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361558283] [2019-12-28 05:16:41,630 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:41,630 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:16:41,630 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [758363497] [2019-12-28 05:16:41,631 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:41,644 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:41,671 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 86 states and 90 transitions. [2019-12-28 05:16:41,671 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:41,672 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:41,672 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:16:41,672 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:41,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:16:41,673 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:16:41,673 INFO L87 Difference]: Start difference. First operand 23988 states and 74053 transitions. Second operand 7 states. [2019-12-28 05:16:42,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:42,589 INFO L93 Difference]: Finished difference Result 42720 states and 131342 transitions. [2019-12-28 05:16:42,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 05:16:42,589 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-12-28 05:16:42,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:42,655 INFO L225 Difference]: With dead ends: 42720 [2019-12-28 05:16:42,656 INFO L226 Difference]: Without dead ends: 42720 [2019-12-28 05:16:42,656 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:16:42,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42720 states. [2019-12-28 05:16:43,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42720 to 25777. [2019-12-28 05:16:43,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25777 states. [2019-12-28 05:16:43,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25777 states to 25777 states and 79405 transitions. [2019-12-28 05:16:43,106 INFO L78 Accepts]: Start accepts. Automaton has 25777 states and 79405 transitions. Word has length 80 [2019-12-28 05:16:43,106 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:43,106 INFO L462 AbstractCegarLoop]: Abstraction has 25777 states and 79405 transitions. [2019-12-28 05:16:43,106 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:16:43,106 INFO L276 IsEmpty]: Start isEmpty. Operand 25777 states and 79405 transitions. [2019-12-28 05:16:43,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:16:43,127 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:43,127 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:43,127 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:43,127 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:43,128 INFO L82 PathProgramCache]: Analyzing trace with hash -632881814, now seen corresponding path program 1 times [2019-12-28 05:16:43,128 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:43,128 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728798439] [2019-12-28 05:16:43,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:43,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:43,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:43,198 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728798439] [2019-12-28 05:16:43,198 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:43,198 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:16:43,198 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1127134764] [2019-12-28 05:16:43,199 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:43,213 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:43,237 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 86 states and 90 transitions. [2019-12-28 05:16:43,237 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:43,238 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:43,238 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:16:43,238 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:43,238 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:16:43,239 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:16:43,239 INFO L87 Difference]: Start difference. First operand 25777 states and 79405 transitions. Second operand 5 states. [2019-12-28 05:16:43,304 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:43,305 INFO L93 Difference]: Finished difference Result 3274 states and 8033 transitions. [2019-12-28 05:16:43,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 05:16:43,305 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 80 [2019-12-28 05:16:43,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:43,310 INFO L225 Difference]: With dead ends: 3274 [2019-12-28 05:16:43,311 INFO L226 Difference]: Without dead ends: 2815 [2019-12-28 05:16:43,311 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:16:43,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2815 states. [2019-12-28 05:16:43,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2815 to 2541. [2019-12-28 05:16:43,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2541 states. [2019-12-28 05:16:43,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2541 states to 2541 states and 6203 transitions. [2019-12-28 05:16:43,364 INFO L78 Accepts]: Start accepts. Automaton has 2541 states and 6203 transitions. Word has length 80 [2019-12-28 05:16:43,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:43,365 INFO L462 AbstractCegarLoop]: Abstraction has 2541 states and 6203 transitions. [2019-12-28 05:16:43,365 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:16:43,365 INFO L276 IsEmpty]: Start isEmpty. Operand 2541 states and 6203 transitions. [2019-12-28 05:16:43,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:16:43,370 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:43,370 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:43,370 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:43,371 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:43,371 INFO L82 PathProgramCache]: Analyzing trace with hash 211784789, now seen corresponding path program 1 times [2019-12-28 05:16:43,372 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:43,372 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1530028541] [2019-12-28 05:16:43,372 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:43,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:43,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:43,463 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1530028541] [2019-12-28 05:16:43,463 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:43,463 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:16:43,464 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1965677179] [2019-12-28 05:16:43,464 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:43,498 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:43,618 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 186 states and 277 transitions. [2019-12-28 05:16:43,618 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:43,749 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 5 times. [2019-12-28 05:16:43,749 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 05:16:43,750 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:43,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 05:16:43,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:16:43,750 INFO L87 Difference]: Start difference. First operand 2541 states and 6203 transitions. Second operand 9 states. [2019-12-28 05:16:44,291 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 25 [2019-12-28 05:16:45,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:45,359 INFO L93 Difference]: Finished difference Result 5060 states and 12393 transitions. [2019-12-28 05:16:45,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-28 05:16:45,360 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 92 [2019-12-28 05:16:45,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:45,367 INFO L225 Difference]: With dead ends: 5060 [2019-12-28 05:16:45,367 INFO L226 Difference]: Without dead ends: 5015 [2019-12-28 05:16:45,367 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=125, Invalid=255, Unknown=0, NotChecked=0, Total=380 [2019-12-28 05:16:45,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5015 states. [2019-12-28 05:16:45,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5015 to 2790. [2019-12-28 05:16:45,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2790 states. [2019-12-28 05:16:45,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2790 states to 2790 states and 6803 transitions. [2019-12-28 05:16:45,402 INFO L78 Accepts]: Start accepts. Automaton has 2790 states and 6803 transitions. Word has length 92 [2019-12-28 05:16:45,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:45,402 INFO L462 AbstractCegarLoop]: Abstraction has 2790 states and 6803 transitions. [2019-12-28 05:16:45,402 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 05:16:45,402 INFO L276 IsEmpty]: Start isEmpty. Operand 2790 states and 6803 transitions. [2019-12-28 05:16:45,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:16:45,404 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:45,405 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:45,405 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:45,405 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:45,405 INFO L82 PathProgramCache]: Analyzing trace with hash 1173398806, now seen corresponding path program 1 times [2019-12-28 05:16:45,406 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:45,406 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1424456452] [2019-12-28 05:16:45,406 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:45,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:45,493 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:45,493 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1424456452] [2019-12-28 05:16:45,493 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:45,493 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:16:45,494 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [452674326] [2019-12-28 05:16:45,494 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:45,508 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:45,577 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 186 states and 277 transitions. [2019-12-28 05:16:45,577 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:45,611 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:16:45,611 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:16:45,611 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:45,611 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:16:45,612 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:16:45,612 INFO L87 Difference]: Start difference. First operand 2790 states and 6803 transitions. Second operand 7 states. [2019-12-28 05:16:45,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:46,000 INFO L93 Difference]: Finished difference Result 2990 states and 7156 transitions. [2019-12-28 05:16:46,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:16:46,000 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-12-28 05:16:46,000 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:46,005 INFO L225 Difference]: With dead ends: 2990 [2019-12-28 05:16:46,005 INFO L226 Difference]: Without dead ends: 2938 [2019-12-28 05:16:46,005 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:16:46,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2938 states. [2019-12-28 05:16:46,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2938 to 2881. [2019-12-28 05:16:46,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2881 states. [2019-12-28 05:16:46,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2881 states to 2881 states and 6969 transitions. [2019-12-28 05:16:46,033 INFO L78 Accepts]: Start accepts. Automaton has 2881 states and 6969 transitions. Word has length 92 [2019-12-28 05:16:46,033 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:46,033 INFO L462 AbstractCegarLoop]: Abstraction has 2881 states and 6969 transitions. [2019-12-28 05:16:46,033 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:16:46,033 INFO L276 IsEmpty]: Start isEmpty. Operand 2881 states and 6969 transitions. [2019-12-28 05:16:46,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:16:46,035 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:46,035 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:46,036 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:46,036 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:46,036 INFO L82 PathProgramCache]: Analyzing trace with hash 738198895, now seen corresponding path program 1 times [2019-12-28 05:16:46,036 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:46,037 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1327432750] [2019-12-28 05:16:46,037 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:46,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:46,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:46,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1327432750] [2019-12-28 05:16:46,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:46,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:16:46,100 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [909307292] [2019-12-28 05:16:46,101 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:46,115 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:46,205 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 156 states and 217 transitions. [2019-12-28 05:16:46,205 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:46,206 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:46,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:16:46,206 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:46,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:16:46,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:16:46,207 INFO L87 Difference]: Start difference. First operand 2881 states and 6969 transitions. Second operand 4 states. [2019-12-28 05:16:46,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:46,256 INFO L93 Difference]: Finished difference Result 2703 states and 6512 transitions. [2019-12-28 05:16:46,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:16:46,256 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 92 [2019-12-28 05:16:46,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:46,260 INFO L225 Difference]: With dead ends: 2703 [2019-12-28 05:16:46,260 INFO L226 Difference]: Without dead ends: 2703 [2019-12-28 05:16:46,261 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:16:46,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2703 states. [2019-12-28 05:16:46,301 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2703 to 2624. [2019-12-28 05:16:46,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2624 states. [2019-12-28 05:16:46,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2624 states to 2624 states and 6310 transitions. [2019-12-28 05:16:46,307 INFO L78 Accepts]: Start accepts. Automaton has 2624 states and 6310 transitions. Word has length 92 [2019-12-28 05:16:46,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:46,307 INFO L462 AbstractCegarLoop]: Abstraction has 2624 states and 6310 transitions. [2019-12-28 05:16:46,307 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:16:46,307 INFO L276 IsEmpty]: Start isEmpty. Operand 2624 states and 6310 transitions. [2019-12-28 05:16:46,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:16:46,312 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:46,312 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:46,312 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:46,312 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:46,313 INFO L82 PathProgramCache]: Analyzing trace with hash 1220152845, now seen corresponding path program 1 times [2019-12-28 05:16:46,314 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:46,314 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1990264303] [2019-12-28 05:16:46,314 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:46,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:46,390 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:46,391 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1990264303] [2019-12-28 05:16:46,391 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:46,392 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:16:46,392 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1131656277] [2019-12-28 05:16:46,392 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:46,416 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:46,501 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 156 states and 216 transitions. [2019-12-28 05:16:46,501 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:46,602 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:16:46,603 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 05:16:46,603 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:46,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 05:16:46,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:16:46,604 INFO L87 Difference]: Start difference. First operand 2624 states and 6310 transitions. Second operand 9 states. [2019-12-28 05:16:48,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:48,189 INFO L93 Difference]: Finished difference Result 3987 states and 9191 transitions. [2019-12-28 05:16:48,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-28 05:16:48,190 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 92 [2019-12-28 05:16:48,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:48,195 INFO L225 Difference]: With dead ends: 3987 [2019-12-28 05:16:48,195 INFO L226 Difference]: Without dead ends: 3947 [2019-12-28 05:16:48,196 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 13 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 175 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=197, Invalid=673, Unknown=0, NotChecked=0, Total=870 [2019-12-28 05:16:48,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3947 states. [2019-12-28 05:16:48,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3947 to 2810. [2019-12-28 05:16:48,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2810 states. [2019-12-28 05:16:48,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2810 states to 2810 states and 6700 transitions. [2019-12-28 05:16:48,227 INFO L78 Accepts]: Start accepts. Automaton has 2810 states and 6700 transitions. Word has length 92 [2019-12-28 05:16:48,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:48,227 INFO L462 AbstractCegarLoop]: Abstraction has 2810 states and 6700 transitions. [2019-12-28 05:16:48,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 05:16:48,227 INFO L276 IsEmpty]: Start isEmpty. Operand 2810 states and 6700 transitions. [2019-12-28 05:16:48,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:16:48,230 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:48,230 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:48,230 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:48,230 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:48,230 INFO L82 PathProgramCache]: Analyzing trace with hash -1870165018, now seen corresponding path program 1 times [2019-12-28 05:16:48,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:48,231 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [176903145] [2019-12-28 05:16:48,231 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:48,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:48,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:48,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [176903145] [2019-12-28 05:16:48,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:48,355 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:16:48,355 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [976799174] [2019-12-28 05:16:48,355 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:48,369 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:48,425 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 158 states and 217 transitions. [2019-12-28 05:16:48,425 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:48,426 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:48,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:16:48,426 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:48,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:16:48,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:16:48,427 INFO L87 Difference]: Start difference. First operand 2810 states and 6700 transitions. Second operand 7 states. [2019-12-28 05:16:48,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:48,856 INFO L93 Difference]: Finished difference Result 4065 states and 9518 transitions. [2019-12-28 05:16:48,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-28 05:16:48,856 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-12-28 05:16:48,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:48,862 INFO L225 Difference]: With dead ends: 4065 [2019-12-28 05:16:48,862 INFO L226 Difference]: Without dead ends: 4047 [2019-12-28 05:16:48,863 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2019-12-28 05:16:48,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4047 states. [2019-12-28 05:16:48,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4047 to 3502. [2019-12-28 05:16:48,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3502 states. [2019-12-28 05:16:48,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3502 states to 3502 states and 8242 transitions. [2019-12-28 05:16:48,900 INFO L78 Accepts]: Start accepts. Automaton has 3502 states and 8242 transitions. Word has length 92 [2019-12-28 05:16:48,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:48,900 INFO L462 AbstractCegarLoop]: Abstraction has 3502 states and 8242 transitions. [2019-12-28 05:16:48,900 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:16:48,901 INFO L276 IsEmpty]: Start isEmpty. Operand 3502 states and 8242 transitions. [2019-12-28 05:16:48,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:16:48,903 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:48,904 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:48,904 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:48,904 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:48,904 INFO L82 PathProgramCache]: Analyzing trace with hash -908551001, now seen corresponding path program 1 times [2019-12-28 05:16:48,904 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:48,905 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [334062308] [2019-12-28 05:16:48,905 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:48,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:48,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:48,994 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [334062308] [2019-12-28 05:16:48,994 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:48,994 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:16:48,995 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1215920166] [2019-12-28 05:16:48,995 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:49,008 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:49,071 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 158 states and 217 transitions. [2019-12-28 05:16:49,071 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:49,296 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 16 times. [2019-12-28 05:16:49,296 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-28 05:16:49,297 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:49,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-28 05:16:49,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-28 05:16:49,297 INFO L87 Difference]: Start difference. First operand 3502 states and 8242 transitions. Second operand 15 states. [2019-12-28 05:16:51,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:51,389 INFO L93 Difference]: Finished difference Result 7471 states and 17823 transitions. [2019-12-28 05:16:51,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-28 05:16:51,389 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 92 [2019-12-28 05:16:51,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:51,398 INFO L225 Difference]: With dead ends: 7471 [2019-12-28 05:16:51,399 INFO L226 Difference]: Without dead ends: 7471 [2019-12-28 05:16:51,399 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-12-28 05:16:51,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7471 states. [2019-12-28 05:16:51,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7471 to 3887. [2019-12-28 05:16:51,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3887 states. [2019-12-28 05:16:51,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3887 states to 3887 states and 9167 transitions. [2019-12-28 05:16:51,449 INFO L78 Accepts]: Start accepts. Automaton has 3887 states and 9167 transitions. Word has length 92 [2019-12-28 05:16:51,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:51,450 INFO L462 AbstractCegarLoop]: Abstraction has 3887 states and 9167 transitions. [2019-12-28 05:16:51,450 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-28 05:16:51,450 INFO L276 IsEmpty]: Start isEmpty. Operand 3887 states and 9167 transitions. [2019-12-28 05:16:51,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:16:51,453 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:51,453 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:51,453 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:51,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:51,453 INFO L82 PathProgramCache]: Analyzing trace with hash 336213480, now seen corresponding path program 1 times [2019-12-28 05:16:51,454 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:51,454 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [477541394] [2019-12-28 05:16:51,454 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:51,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:51,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:51,538 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [477541394] [2019-12-28 05:16:51,538 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:51,538 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:16:51,538 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1323845822] [2019-12-28 05:16:51,538 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:51,552 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:51,609 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 158 states and 217 transitions. [2019-12-28 05:16:51,610 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:51,610 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:51,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:16:51,610 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:51,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:16:51,611 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:16:51,611 INFO L87 Difference]: Start difference. First operand 3887 states and 9167 transitions. Second operand 6 states. [2019-12-28 05:16:51,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:51,892 INFO L93 Difference]: Finished difference Result 4276 states and 10041 transitions. [2019-12-28 05:16:51,892 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 05:16:51,892 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-12-28 05:16:51,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:51,898 INFO L225 Difference]: With dead ends: 4276 [2019-12-28 05:16:51,898 INFO L226 Difference]: Without dead ends: 4276 [2019-12-28 05:16:51,899 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:16:51,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4276 states. [2019-12-28 05:16:51,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4276 to 3859. [2019-12-28 05:16:51,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3859 states. [2019-12-28 05:16:51,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3859 states to 3859 states and 9111 transitions. [2019-12-28 05:16:51,937 INFO L78 Accepts]: Start accepts. Automaton has 3859 states and 9111 transitions. Word has length 92 [2019-12-28 05:16:51,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:51,938 INFO L462 AbstractCegarLoop]: Abstraction has 3859 states and 9111 transitions. [2019-12-28 05:16:51,938 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:16:51,938 INFO L276 IsEmpty]: Start isEmpty. Operand 3859 states and 9111 transitions. [2019-12-28 05:16:51,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:16:51,941 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:51,941 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:51,941 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:51,941 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:51,942 INFO L82 PathProgramCache]: Analyzing trace with hash 414386220, now seen corresponding path program 1 times [2019-12-28 05:16:51,942 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:51,942 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235867904] [2019-12-28 05:16:51,942 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:51,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:52,044 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:52,045 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235867904] [2019-12-28 05:16:52,045 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:52,045 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:16:52,045 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1017625222] [2019-12-28 05:16:52,045 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:52,059 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:52,127 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 147 states and 195 transitions. [2019-12-28 05:16:52,127 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:52,128 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:52,128 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:16:52,128 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:52,129 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:16:52,129 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:16:52,129 INFO L87 Difference]: Start difference. First operand 3859 states and 9111 transitions. Second operand 6 states. [2019-12-28 05:16:52,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:52,344 INFO L93 Difference]: Finished difference Result 4253 states and 9713 transitions. [2019-12-28 05:16:52,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 05:16:52,345 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-12-28 05:16:52,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:52,350 INFO L225 Difference]: With dead ends: 4253 [2019-12-28 05:16:52,351 INFO L226 Difference]: Without dead ends: 4253 [2019-12-28 05:16:52,351 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:16:52,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4253 states. [2019-12-28 05:16:52,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4253 to 3973. [2019-12-28 05:16:52,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3973 states. [2019-12-28 05:16:52,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3973 states to 3973 states and 9173 transitions. [2019-12-28 05:16:52,391 INFO L78 Accepts]: Start accepts. Automaton has 3973 states and 9173 transitions. Word has length 92 [2019-12-28 05:16:52,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:52,391 INFO L462 AbstractCegarLoop]: Abstraction has 3973 states and 9173 transitions. [2019-12-28 05:16:52,391 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:16:52,391 INFO L276 IsEmpty]: Start isEmpty. Operand 3973 states and 9173 transitions. [2019-12-28 05:16:52,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:16:52,395 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:52,395 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:52,395 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:52,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:52,395 INFO L82 PathProgramCache]: Analyzing trace with hash 538459467, now seen corresponding path program 1 times [2019-12-28 05:16:52,396 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:52,396 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [603874150] [2019-12-28 05:16:52,396 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:52,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:52,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:52,505 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [603874150] [2019-12-28 05:16:52,505 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:52,505 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 05:16:52,505 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [658849493] [2019-12-28 05:16:52,505 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:52,520 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:52,589 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 147 states and 195 transitions. [2019-12-28 05:16:52,590 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:52,591 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 05:16:52,591 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 05:16:52,591 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:52,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 05:16:52,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:16:52,592 INFO L87 Difference]: Start difference. First operand 3973 states and 9173 transitions. Second operand 8 states. [2019-12-28 05:16:53,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:53,063 INFO L93 Difference]: Finished difference Result 4920 states and 11315 transitions. [2019-12-28 05:16:53,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-28 05:16:53,063 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 92 [2019-12-28 05:16:53,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:53,070 INFO L225 Difference]: With dead ends: 4920 [2019-12-28 05:16:53,070 INFO L226 Difference]: Without dead ends: 4902 [2019-12-28 05:16:53,070 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2019-12-28 05:16:53,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4902 states. [2019-12-28 05:16:53,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4902 to 3360. [2019-12-28 05:16:53,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3360 states. [2019-12-28 05:16:53,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3360 states to 3360 states and 7870 transitions. [2019-12-28 05:16:53,109 INFO L78 Accepts]: Start accepts. Automaton has 3360 states and 7870 transitions. Word has length 92 [2019-12-28 05:16:53,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:53,109 INFO L462 AbstractCegarLoop]: Abstraction has 3360 states and 7870 transitions. [2019-12-28 05:16:53,110 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 05:16:53,110 INFO L276 IsEmpty]: Start isEmpty. Operand 3360 states and 7870 transitions. [2019-12-28 05:16:53,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:16:53,113 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:53,113 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:53,113 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:53,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:53,113 INFO L82 PathProgramCache]: Analyzing trace with hash 1500073484, now seen corresponding path program 1 times [2019-12-28 05:16:53,114 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:53,114 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738938658] [2019-12-28 05:16:53,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:53,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:53,223 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:53,224 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1738938658] [2019-12-28 05:16:53,224 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:53,224 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:16:53,224 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [868354679] [2019-12-28 05:16:53,224 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:53,234 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:53,284 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 147 states and 195 transitions. [2019-12-28 05:16:53,284 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:53,285 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:53,285 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:16:53,285 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:53,285 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:16:53,285 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:16:53,286 INFO L87 Difference]: Start difference. First operand 3360 states and 7870 transitions. Second operand 6 states. [2019-12-28 05:16:53,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:53,492 INFO L93 Difference]: Finished difference Result 3063 states and 6997 transitions. [2019-12-28 05:16:53,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 05:16:53,492 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-12-28 05:16:53,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:53,497 INFO L225 Difference]: With dead ends: 3063 [2019-12-28 05:16:53,497 INFO L226 Difference]: Without dead ends: 3063 [2019-12-28 05:16:53,497 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:16:53,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3063 states. [2019-12-28 05:16:53,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3063 to 2170. [2019-12-28 05:16:53,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2170 states. [2019-12-28 05:16:53,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2170 states to 2170 states and 5090 transitions. [2019-12-28 05:16:53,522 INFO L78 Accepts]: Start accepts. Automaton has 2170 states and 5090 transitions. Word has length 92 [2019-12-28 05:16:53,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:53,522 INFO L462 AbstractCegarLoop]: Abstraction has 2170 states and 5090 transitions. [2019-12-28 05:16:53,522 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:16:53,522 INFO L276 IsEmpty]: Start isEmpty. Operand 2170 states and 5090 transitions. [2019-12-28 05:16:53,525 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:16:53,525 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:53,525 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:53,525 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:53,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:53,526 INFO L82 PathProgramCache]: Analyzing trace with hash -572704409, now seen corresponding path program 1 times [2019-12-28 05:16:53,526 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:53,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [752867807] [2019-12-28 05:16:53,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:53,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:53,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:53,603 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [752867807] [2019-12-28 05:16:53,603 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:53,603 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:16:53,603 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1149374771] [2019-12-28 05:16:53,603 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:53,618 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:53,710 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 188 states and 278 transitions. [2019-12-28 05:16:53,710 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:53,710 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:53,711 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:16:53,711 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:53,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:16:53,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:16:53,711 INFO L87 Difference]: Start difference. First operand 2170 states and 5090 transitions. Second operand 5 states. [2019-12-28 05:16:53,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:53,906 INFO L93 Difference]: Finished difference Result 2422 states and 5669 transitions. [2019-12-28 05:16:53,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 05:16:53,907 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-12-28 05:16:53,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:53,910 INFO L225 Difference]: With dead ends: 2422 [2019-12-28 05:16:53,910 INFO L226 Difference]: Without dead ends: 2404 [2019-12-28 05:16:53,910 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:16:53,913 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2404 states. [2019-12-28 05:16:53,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2404 to 2197. [2019-12-28 05:16:53,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2197 states. [2019-12-28 05:16:53,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2197 states to 2197 states and 5144 transitions. [2019-12-28 05:16:53,932 INFO L78 Accepts]: Start accepts. Automaton has 2197 states and 5144 transitions. Word has length 94 [2019-12-28 05:16:53,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:53,932 INFO L462 AbstractCegarLoop]: Abstraction has 2197 states and 5144 transitions. [2019-12-28 05:16:53,932 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:16:53,933 INFO L276 IsEmpty]: Start isEmpty. Operand 2197 states and 5144 transitions. [2019-12-28 05:16:53,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:16:53,934 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:53,935 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:53,935 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:53,935 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:53,935 INFO L82 PathProgramCache]: Analyzing trace with hash 672060072, now seen corresponding path program 1 times [2019-12-28 05:16:53,936 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:53,936 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706785936] [2019-12-28 05:16:53,936 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:53,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:54,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:54,093 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [706785936] [2019-12-28 05:16:54,093 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:54,093 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-28 05:16:54,093 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2089743770] [2019-12-28 05:16:54,093 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:54,103 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:54,171 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 188 states and 278 transitions. [2019-12-28 05:16:54,171 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:54,489 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 16 times. [2019-12-28 05:16:54,490 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-28 05:16:54,490 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:54,490 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-28 05:16:54,490 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2019-12-28 05:16:54,490 INFO L87 Difference]: Start difference. First operand 2197 states and 5144 transitions. Second operand 21 states. [2019-12-28 05:16:54,714 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 43 [2019-12-28 05:16:57,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:57,265 INFO L93 Difference]: Finished difference Result 3710 states and 8699 transitions. [2019-12-28 05:16:57,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-28 05:16:57,272 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 94 [2019-12-28 05:16:57,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:57,276 INFO L225 Difference]: With dead ends: 3710 [2019-12-28 05:16:57,276 INFO L226 Difference]: Without dead ends: 3071 [2019-12-28 05:16:57,277 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 287 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=347, Invalid=1723, Unknown=0, NotChecked=0, Total=2070 [2019-12-28 05:16:57,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3071 states. [2019-12-28 05:16:57,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3071 to 2648. [2019-12-28 05:16:57,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2648 states. [2019-12-28 05:16:57,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2648 states to 2648 states and 6141 transitions. [2019-12-28 05:16:57,309 INFO L78 Accepts]: Start accepts. Automaton has 2648 states and 6141 transitions. Word has length 94 [2019-12-28 05:16:57,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:57,309 INFO L462 AbstractCegarLoop]: Abstraction has 2648 states and 6141 transitions. [2019-12-28 05:16:57,309 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-28 05:16:57,309 INFO L276 IsEmpty]: Start isEmpty. Operand 2648 states and 6141 transitions. [2019-12-28 05:16:57,311 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:16:57,311 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:57,311 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:57,311 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:57,311 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:57,312 INFO L82 PathProgramCache]: Analyzing trace with hash 718924530, now seen corresponding path program 2 times [2019-12-28 05:16:57,312 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:57,312 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [686752243] [2019-12-28 05:16:57,312 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:57,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 05:16:57,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 05:16:57,394 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-28 05:16:57,394 INFO L476 BasicCegarLoop]: Counterexample might be feasible [2019-12-28 05:16:57,537 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.12 05:16:57 BasicIcfg [2019-12-28 05:16:57,537 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-28 05:16:57,539 INFO L168 Benchmark]: Toolchain (without parser) took 89737.72 ms. Allocated memory was 139.5 MB in the beginning and 3.2 GB in the end (delta: 3.0 GB). Free memory was 100.9 MB in the beginning and 2.1 GB in the end (delta: -2.0 GB). Peak memory consumption was 1.0 GB. Max. memory is 7.1 GB. [2019-12-28 05:16:57,539 INFO L168 Benchmark]: CDTParser took 0.21 ms. Allocated memory is still 139.5 MB. Free memory was 121.4 MB in the beginning and 121.2 MB in the end (delta: 210.1 kB). Peak memory consumption was 210.1 kB. Max. memory is 7.1 GB. [2019-12-28 05:16:57,540 INFO L168 Benchmark]: CACSL2BoogieTranslator took 734.44 ms. Allocated memory was 139.5 MB in the beginning and 201.9 MB in the end (delta: 62.4 MB). Free memory was 100.7 MB in the beginning and 156.3 MB in the end (delta: -55.6 MB). Peak memory consumption was 24.7 MB. Max. memory is 7.1 GB. [2019-12-28 05:16:57,540 INFO L168 Benchmark]: Boogie Procedure Inliner took 82.05 ms. Allocated memory is still 201.9 MB. Free memory was 156.3 MB in the beginning and 153.1 MB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 7.1 GB. [2019-12-28 05:16:57,541 INFO L168 Benchmark]: Boogie Preprocessor took 37.84 ms. Allocated memory is still 201.9 MB. Free memory was 153.1 MB in the beginning and 151.2 MB in the end (delta: 1.9 MB). Peak memory consumption was 1.9 MB. Max. memory is 7.1 GB. [2019-12-28 05:16:57,541 INFO L168 Benchmark]: RCFGBuilder took 861.32 ms. Allocated memory is still 201.9 MB. Free memory was 151.2 MB in the beginning and 106.9 MB in the end (delta: 44.3 MB). Peak memory consumption was 44.3 MB. Max. memory is 7.1 GB. [2019-12-28 05:16:57,541 INFO L168 Benchmark]: TraceAbstraction took 88016.51 ms. Allocated memory was 201.9 MB in the beginning and 3.2 GB in the end (delta: 3.0 GB). Free memory was 106.9 MB in the beginning and 2.1 GB in the end (delta: -2.0 GB). Peak memory consumption was 984.4 MB. Max. memory is 7.1 GB. [2019-12-28 05:16:57,546 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.21 ms. Allocated memory is still 139.5 MB. Free memory was 121.4 MB in the beginning and 121.2 MB in the end (delta: 210.1 kB). Peak memory consumption was 210.1 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 734.44 ms. Allocated memory was 139.5 MB in the beginning and 201.9 MB in the end (delta: 62.4 MB). Free memory was 100.7 MB in the beginning and 156.3 MB in the end (delta: -55.6 MB). Peak memory consumption was 24.7 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 82.05 ms. Allocated memory is still 201.9 MB. Free memory was 156.3 MB in the beginning and 153.1 MB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 37.84 ms. Allocated memory is still 201.9 MB. Free memory was 153.1 MB in the beginning and 151.2 MB in the end (delta: 1.9 MB). Peak memory consumption was 1.9 MB. Max. memory is 7.1 GB. * RCFGBuilder took 861.32 ms. Allocated memory is still 201.9 MB. Free memory was 151.2 MB in the beginning and 106.9 MB in the end (delta: 44.3 MB). Peak memory consumption was 44.3 MB. Max. memory is 7.1 GB. * TraceAbstraction took 88016.51 ms. Allocated memory was 201.9 MB in the beginning and 3.2 GB in the end (delta: 3.0 GB). Free memory was 106.9 MB in the beginning and 2.1 GB in the end (delta: -2.0 GB). Peak memory consumption was 984.4 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L695] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0] [L696] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] 0 int x = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] 0 int y = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L701] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L702] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L703] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L707] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L708] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L709] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L710] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L711] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L712] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L713] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L714] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L715] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L776] 0 pthread_t t2473; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] FCALL, FORK 0 pthread_create(&t2473, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L720] 1 y$w_buff1 = y$w_buff0 [L721] 1 y$w_buff0 = 2 [L722] 1 y$w_buff1_used = y$w_buff0_used [L723] 1 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L725] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L726] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L727] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L728] 1 y$r_buff0_thd1 = (_Bool)1 [L731] 1 x = 1 VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L778] 0 pthread_t t2474; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L779] FCALL, FORK 0 pthread_create(&t2474, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L748] 2 x = 2 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L735] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L735] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L754] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L736] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L754] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L737] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L737] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L738] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L738] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L741] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L755] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L756] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L758] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L761] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L786] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L786] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L787] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L788] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L788] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L789] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 y$flush_delayed = weak$$choice2 [L795] 0 y$mem_tmp = y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L796] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L796] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L797] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L797] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L798] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L799] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L800] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 0 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L802] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y = y$flush_delayed ? y$mem_tmp : y [L805] 0 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 139 locations, 2 error locations. Result: UNSAFE, OverallTime: 87.7s, OverallIterations: 37, TraceHistogramMax: 1, AutomataDifference: 41.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10570 SDtfs, 14481 SDslu, 30044 SDs, 0 SdLazy, 19316 SolverSat, 1101 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 19.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 589 GetRequests, 163 SyntacticMatches, 17 SemanticMatches, 409 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1642 ImplicationChecksByTransitivity, 7.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=87235occurred in iteration=12, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 36.6s AutomataMinimizationTime, 36 MinimizatonAttempts, 403516 StatesRemovedByMinimization, 35 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 2.5s InterpolantComputationTime, 2822 NumberOfCodeBlocks, 2822 NumberOfCodeBlocksAsserted, 37 NumberOfCheckSat, 2692 ConstructedInterpolants, 0 QuantifiedInterpolants, 490986 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 36 InterpolantComputations, 36 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...