/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf -i ../../../trunk/examples/svcomp/pthread-wmm/safe029_pso.oepc.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-4336eb1 [2019-12-28 05:16:44,296 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-28 05:16:44,299 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-28 05:16:44,311 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-28 05:16:44,312 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-28 05:16:44,313 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-28 05:16:44,314 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-28 05:16:44,316 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-28 05:16:44,318 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-28 05:16:44,319 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-28 05:16:44,320 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-28 05:16:44,321 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-28 05:16:44,321 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-28 05:16:44,322 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-28 05:16:44,323 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-28 05:16:44,325 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-28 05:16:44,325 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-28 05:16:44,326 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-28 05:16:44,328 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-28 05:16:44,331 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-28 05:16:44,333 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-28 05:16:44,334 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-28 05:16:44,335 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-28 05:16:44,336 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-28 05:16:44,341 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-28 05:16:44,342 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-28 05:16:44,342 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-28 05:16:44,343 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-28 05:16:44,344 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-28 05:16:44,347 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-28 05:16:44,348 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-28 05:16:44,349 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-28 05:16:44,349 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-28 05:16:44,350 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-28 05:16:44,351 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-28 05:16:44,351 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-28 05:16:44,352 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-28 05:16:44,352 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-28 05:16:44,353 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-28 05:16:44,353 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-28 05:16:44,354 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-28 05:16:44,355 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf [2019-12-28 05:16:44,370 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-28 05:16:44,370 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-28 05:16:44,372 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-28 05:16:44,372 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-28 05:16:44,372 INFO L138 SettingsManager]: * Use SBE=true [2019-12-28 05:16:44,372 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-28 05:16:44,373 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-28 05:16:44,373 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-28 05:16:44,373 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-28 05:16:44,373 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-28 05:16:44,373 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-28 05:16:44,374 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-28 05:16:44,374 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-28 05:16:44,374 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-28 05:16:44,374 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-28 05:16:44,374 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-28 05:16:44,375 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-28 05:16:44,375 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-28 05:16:44,375 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-28 05:16:44,375 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-28 05:16:44,375 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-28 05:16:44,376 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 05:16:44,376 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-28 05:16:44,376 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-28 05:16:44,376 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-28 05:16:44,376 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-28 05:16:44,377 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-28 05:16:44,377 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2019-12-28 05:16:44,377 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2019-12-28 05:16:44,377 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-28 05:16:44,377 INFO L138 SettingsManager]: * Interpolant automaton=MCR [2019-12-28 05:16:44,378 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-28 05:16:44,679 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-28 05:16:44,692 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-28 05:16:44,696 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-28 05:16:44,697 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-28 05:16:44,698 INFO L275 PluginConnector]: CDTParser initialized [2019-12-28 05:16:44,698 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/safe029_pso.oepc.i [2019-12-28 05:16:44,779 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5bddcf33c/812d38456508423b87e4cbb556d14765/FLAG716904226 [2019-12-28 05:16:45,334 INFO L306 CDTParser]: Found 1 translation units. [2019-12-28 05:16:45,334 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe029_pso.oepc.i [2019-12-28 05:16:45,359 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5bddcf33c/812d38456508423b87e4cbb556d14765/FLAG716904226 [2019-12-28 05:16:45,634 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5bddcf33c/812d38456508423b87e4cbb556d14765 [2019-12-28 05:16:45,642 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-28 05:16:45,645 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-12-28 05:16:45,646 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-28 05:16:45,646 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-28 05:16:45,650 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-28 05:16:45,651 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 05:16:45" (1/1) ... [2019-12-28 05:16:45,654 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@691f4c0a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:45, skipping insertion in model container [2019-12-28 05:16:45,654 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 05:16:45" (1/1) ... [2019-12-28 05:16:45,662 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-28 05:16:45,720 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-28 05:16:46,288 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 05:16:46,304 INFO L203 MainTranslator]: Completed pre-run [2019-12-28 05:16:46,388 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 05:16:46,469 INFO L208 MainTranslator]: Completed translation [2019-12-28 05:16:46,469 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:46 WrapperNode [2019-12-28 05:16:46,469 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-28 05:16:46,470 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-28 05:16:46,471 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-28 05:16:46,471 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-28 05:16:46,479 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:46" (1/1) ... [2019-12-28 05:16:46,498 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:46" (1/1) ... [2019-12-28 05:16:46,538 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-28 05:16:46,538 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-28 05:16:46,538 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-28 05:16:46,538 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-28 05:16:46,549 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:46" (1/1) ... [2019-12-28 05:16:46,549 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:46" (1/1) ... [2019-12-28 05:16:46,554 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:46" (1/1) ... [2019-12-28 05:16:46,555 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:46" (1/1) ... [2019-12-28 05:16:46,564 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:46" (1/1) ... [2019-12-28 05:16:46,571 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:46" (1/1) ... [2019-12-28 05:16:46,574 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:46" (1/1) ... [2019-12-28 05:16:46,579 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-28 05:16:46,580 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-28 05:16:46,580 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-28 05:16:46,580 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-28 05:16:46,581 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:46" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 05:16:46,652 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-28 05:16:46,653 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-28 05:16:46,653 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-28 05:16:46,653 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-28 05:16:46,654 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-28 05:16:46,654 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-28 05:16:46,654 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-28 05:16:46,654 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-28 05:16:46,655 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-28 05:16:46,655 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-28 05:16:46,655 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-28 05:16:46,657 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-28 05:16:47,367 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-28 05:16:47,368 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-28 05:16:47,369 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 05:16:47 BoogieIcfgContainer [2019-12-28 05:16:47,369 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-28 05:16:47,370 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-28 05:16:47,371 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-28 05:16:47,374 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-28 05:16:47,375 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.12 05:16:45" (1/3) ... [2019-12-28 05:16:47,376 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2f687bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 05:16:47, skipping insertion in model container [2019-12-28 05:16:47,376 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:16:46" (2/3) ... [2019-12-28 05:16:47,377 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2f687bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 05:16:47, skipping insertion in model container [2019-12-28 05:16:47,377 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 05:16:47" (3/3) ... [2019-12-28 05:16:47,379 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_pso.oepc.i [2019-12-28 05:16:47,390 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-28 05:16:47,391 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-28 05:16:47,405 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-28 05:16:47,406 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-28 05:16:47,465 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,465 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,466 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,466 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,466 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,466 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,467 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,467 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,468 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,468 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,468 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,469 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,469 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,469 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,470 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,470 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,470 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,470 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,471 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,471 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,471 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,472 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,473 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,473 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,473 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,474 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,474 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,474 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,475 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,475 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,475 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,475 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,476 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,476 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,476 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,476 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,477 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,478 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,478 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,479 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,479 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,480 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,480 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,481 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,482 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,482 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,482 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,482 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,483 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,483 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,483 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,483 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,484 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,485 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,486 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,486 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,486 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,486 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,487 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,487 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,487 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,487 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,492 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,492 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,493 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,493 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,493 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,493 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,494 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,494 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,494 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,494 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,495 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,500 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,500 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,501 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,502 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,503 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,503 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,504 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,504 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:16:47,523 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-28 05:16:47,549 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-28 05:16:47,549 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-28 05:16:47,549 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-28 05:16:47,550 INFO L376 AbstractCegarLoop]: Backedges is MCR [2019-12-28 05:16:47,550 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-28 05:16:47,550 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-28 05:16:47,550 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-28 05:16:47,550 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-28 05:16:47,573 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 145 places, 179 transitions [2019-12-28 05:16:48,989 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22509 states. [2019-12-28 05:16:48,991 INFO L276 IsEmpty]: Start isEmpty. Operand 22509 states. [2019-12-28 05:16:48,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-28 05:16:48,999 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:49,000 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:49,000 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:49,006 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:49,006 INFO L82 PathProgramCache]: Analyzing trace with hash -641553760, now seen corresponding path program 1 times [2019-12-28 05:16:49,016 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:49,017 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073984693] [2019-12-28 05:16:49,017 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:49,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:49,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:49,309 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1073984693] [2019-12-28 05:16:49,310 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:49,311 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:16:49,312 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [553360276] [2019-12-28 05:16:49,314 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:49,321 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:49,352 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 33 states and 32 transitions. [2019-12-28 05:16:49,352 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:49,358 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:49,359 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:16:49,360 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:49,375 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:16:49,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:16:49,378 INFO L87 Difference]: Start difference. First operand 22509 states. Second operand 4 states. [2019-12-28 05:16:49,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:49,991 INFO L93 Difference]: Finished difference Result 23453 states and 91770 transitions. [2019-12-28 05:16:49,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 05:16:49,993 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2019-12-28 05:16:49,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:50,191 INFO L225 Difference]: With dead ends: 23453 [2019-12-28 05:16:50,191 INFO L226 Difference]: Without dead ends: 21277 [2019-12-28 05:16:50,195 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:16:50,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21277 states. [2019-12-28 05:16:51,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21277 to 21277. [2019-12-28 05:16:51,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21277 states. [2019-12-28 05:16:52,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21277 states to 21277 states and 83794 transitions. [2019-12-28 05:16:52,097 INFO L78 Accepts]: Start accepts. Automaton has 21277 states and 83794 transitions. Word has length 32 [2019-12-28 05:16:52,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:52,098 INFO L462 AbstractCegarLoop]: Abstraction has 21277 states and 83794 transitions. [2019-12-28 05:16:52,098 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:16:52,099 INFO L276 IsEmpty]: Start isEmpty. Operand 21277 states and 83794 transitions. [2019-12-28 05:16:52,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-28 05:16:52,111 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:52,112 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:52,112 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:52,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:52,113 INFO L82 PathProgramCache]: Analyzing trace with hash -2036668926, now seen corresponding path program 1 times [2019-12-28 05:16:52,113 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:52,113 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1206188326] [2019-12-28 05:16:52,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:52,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:52,281 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:52,282 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1206188326] [2019-12-28 05:16:52,282 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:52,282 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:16:52,283 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [912445749] [2019-12-28 05:16:52,283 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:52,291 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:52,299 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 44 states and 43 transitions. [2019-12-28 05:16:52,300 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:52,300 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:52,302 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:16:52,303 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:52,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:16:52,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:16:52,304 INFO L87 Difference]: Start difference. First operand 21277 states and 83794 transitions. Second operand 5 states. [2019-12-28 05:16:54,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:54,200 INFO L93 Difference]: Finished difference Result 34711 states and 129090 transitions. [2019-12-28 05:16:54,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:16:54,201 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 43 [2019-12-28 05:16:54,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:54,370 INFO L225 Difference]: With dead ends: 34711 [2019-12-28 05:16:54,370 INFO L226 Difference]: Without dead ends: 34567 [2019-12-28 05:16:54,373 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:16:54,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34567 states. [2019-12-28 05:16:55,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34567 to 33067. [2019-12-28 05:16:55,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33067 states. [2019-12-28 05:16:55,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33067 states to 33067 states and 123978 transitions. [2019-12-28 05:16:55,454 INFO L78 Accepts]: Start accepts. Automaton has 33067 states and 123978 transitions. Word has length 43 [2019-12-28 05:16:55,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:55,456 INFO L462 AbstractCegarLoop]: Abstraction has 33067 states and 123978 transitions. [2019-12-28 05:16:55,456 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:16:55,456 INFO L276 IsEmpty]: Start isEmpty. Operand 33067 states and 123978 transitions. [2019-12-28 05:16:55,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-28 05:16:55,461 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:55,461 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:55,461 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:55,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:55,462 INFO L82 PathProgramCache]: Analyzing trace with hash -1802978339, now seen corresponding path program 1 times [2019-12-28 05:16:55,463 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:55,463 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1029384565] [2019-12-28 05:16:55,463 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:55,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:55,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:55,562 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1029384565] [2019-12-28 05:16:55,563 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:55,563 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:16:55,563 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [162386479] [2019-12-28 05:16:55,564 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:55,568 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:55,571 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 45 states and 44 transitions. [2019-12-28 05:16:55,572 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:55,572 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:16:55,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:16:55,573 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:55,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:16:55,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:16:55,574 INFO L87 Difference]: Start difference. First operand 33067 states and 123978 transitions. Second operand 5 states. [2019-12-28 05:16:56,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:16:56,419 INFO L93 Difference]: Finished difference Result 40219 states and 148647 transitions. [2019-12-28 05:16:56,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:16:56,420 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-12-28 05:16:56,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:16:56,591 INFO L225 Difference]: With dead ends: 40219 [2019-12-28 05:16:56,591 INFO L226 Difference]: Without dead ends: 40059 [2019-12-28 05:16:56,591 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:16:56,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40059 states. [2019-12-28 05:16:58,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40059 to 34640. [2019-12-28 05:16:58,888 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34640 states. [2019-12-28 05:16:58,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34640 states to 34640 states and 129274 transitions. [2019-12-28 05:16:58,977 INFO L78 Accepts]: Start accepts. Automaton has 34640 states and 129274 transitions. Word has length 44 [2019-12-28 05:16:58,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:16:58,977 INFO L462 AbstractCegarLoop]: Abstraction has 34640 states and 129274 transitions. [2019-12-28 05:16:58,977 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:16:58,978 INFO L276 IsEmpty]: Start isEmpty. Operand 34640 states and 129274 transitions. [2019-12-28 05:16:58,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-28 05:16:58,996 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:16:58,997 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:16:58,997 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:16:58,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:16:58,998 INFO L82 PathProgramCache]: Analyzing trace with hash 1187379522, now seen corresponding path program 1 times [2019-12-28 05:16:59,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:16:59,004 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [16793019] [2019-12-28 05:16:59,004 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:16:59,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:16:59,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:16:59,160 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [16793019] [2019-12-28 05:16:59,161 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:16:59,161 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:16:59,161 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2019626518] [2019-12-28 05:16:59,161 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:16:59,168 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:16:59,180 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 91 states and 129 transitions. [2019-12-28 05:16:59,180 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:16:59,451 WARN L192 SmtUtils]: Spent 242.00 ms on a formula simplification that was a NOOP. DAG size: 11 [2019-12-28 05:16:59,550 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:16:59,550 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-28 05:16:59,551 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:16:59,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-28 05:16:59,551 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:16:59,551 INFO L87 Difference]: Start difference. First operand 34640 states and 129274 transitions. Second operand 10 states. [2019-12-28 05:17:03,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:03,466 INFO L93 Difference]: Finished difference Result 93376 states and 348364 transitions. [2019-12-28 05:17:03,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-28 05:17:03,467 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 51 [2019-12-28 05:17:03,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:03,822 INFO L225 Difference]: With dead ends: 93376 [2019-12-28 05:17:03,822 INFO L226 Difference]: Without dead ends: 93088 [2019-12-28 05:17:03,823 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=213, Invalid=543, Unknown=0, NotChecked=0, Total=756 [2019-12-28 05:17:04,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93088 states. [2019-12-28 05:17:05,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93088 to 34470. [2019-12-28 05:17:05,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34470 states. [2019-12-28 05:17:05,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34470 states to 34470 states and 128650 transitions. [2019-12-28 05:17:05,632 INFO L78 Accepts]: Start accepts. Automaton has 34470 states and 128650 transitions. Word has length 51 [2019-12-28 05:17:05,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:05,633 INFO L462 AbstractCegarLoop]: Abstraction has 34470 states and 128650 transitions. [2019-12-28 05:17:05,633 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-28 05:17:05,633 INFO L276 IsEmpty]: Start isEmpty. Operand 34470 states and 128650 transitions. [2019-12-28 05:17:05,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-28 05:17:05,668 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:05,668 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:05,668 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:05,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:05,668 INFO L82 PathProgramCache]: Analyzing trace with hash -2042153850, now seen corresponding path program 1 times [2019-12-28 05:17:05,669 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:05,669 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [58266858] [2019-12-28 05:17:05,670 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:05,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:05,766 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:05,767 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [58266858] [2019-12-28 05:17:05,767 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:05,767 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:17:05,767 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [781265010] [2019-12-28 05:17:05,768 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:05,776 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:05,786 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 59 states and 58 transitions. [2019-12-28 05:17:05,786 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:05,787 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:05,787 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:17:05,787 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:05,788 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:17:05,788 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:17:05,788 INFO L87 Difference]: Start difference. First operand 34470 states and 128650 transitions. Second operand 6 states. [2019-12-28 05:17:06,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:06,848 INFO L93 Difference]: Finished difference Result 46942 states and 171083 transitions. [2019-12-28 05:17:06,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 05:17:06,849 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-28 05:17:06,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:06,948 INFO L225 Difference]: With dead ends: 46942 [2019-12-28 05:17:06,948 INFO L226 Difference]: Without dead ends: 46702 [2019-12-28 05:17:06,949 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-28 05:17:07,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46702 states. [2019-12-28 05:17:09,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46702 to 40831. [2019-12-28 05:17:09,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40831 states. [2019-12-28 05:17:09,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40831 states to 40831 states and 150574 transitions. [2019-12-28 05:17:09,738 INFO L78 Accepts]: Start accepts. Automaton has 40831 states and 150574 transitions. Word has length 58 [2019-12-28 05:17:09,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:09,739 INFO L462 AbstractCegarLoop]: Abstraction has 40831 states and 150574 transitions. [2019-12-28 05:17:09,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:17:09,739 INFO L276 IsEmpty]: Start isEmpty. Operand 40831 states and 150574 transitions. [2019-12-28 05:17:09,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-28 05:17:09,770 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:09,771 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:09,771 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:09,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:09,771 INFO L82 PathProgramCache]: Analyzing trace with hash 1541499923, now seen corresponding path program 1 times [2019-12-28 05:17:09,772 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:09,772 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541177020] [2019-12-28 05:17:09,772 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:09,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:09,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:09,820 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [541177020] [2019-12-28 05:17:09,820 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:09,820 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:17:09,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [111001106] [2019-12-28 05:17:09,821 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:09,831 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:09,843 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 61 states and 60 transitions. [2019-12-28 05:17:09,843 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:09,844 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:09,844 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:17:09,844 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:09,845 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:17:09,845 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:09,845 INFO L87 Difference]: Start difference. First operand 40831 states and 150574 transitions. Second operand 3 states. [2019-12-28 05:17:10,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:10,077 INFO L93 Difference]: Finished difference Result 51282 states and 185913 transitions. [2019-12-28 05:17:10,077 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:17:10,078 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2019-12-28 05:17:10,078 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:10,179 INFO L225 Difference]: With dead ends: 51282 [2019-12-28 05:17:10,179 INFO L226 Difference]: Without dead ends: 51282 [2019-12-28 05:17:10,180 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:10,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51282 states. [2019-12-28 05:17:11,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51282 to 44846. [2019-12-28 05:17:11,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44846 states. [2019-12-28 05:17:11,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44846 states to 44846 states and 164292 transitions. [2019-12-28 05:17:11,241 INFO L78 Accepts]: Start accepts. Automaton has 44846 states and 164292 transitions. Word has length 60 [2019-12-28 05:17:11,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:11,241 INFO L462 AbstractCegarLoop]: Abstraction has 44846 states and 164292 transitions. [2019-12-28 05:17:11,241 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:17:11,242 INFO L276 IsEmpty]: Start isEmpty. Operand 44846 states and 164292 transitions. [2019-12-28 05:17:11,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-28 05:17:11,280 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:11,280 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:11,280 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:11,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:11,281 INFO L82 PathProgramCache]: Analyzing trace with hash 1207224336, now seen corresponding path program 1 times [2019-12-28 05:17:11,281 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:11,281 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1334247172] [2019-12-28 05:17:11,282 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:11,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:11,389 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:11,395 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1334247172] [2019-12-28 05:17:11,395 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:11,395 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:17:11,396 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2129747041] [2019-12-28 05:17:11,396 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:11,406 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:11,419 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 65 states and 64 transitions. [2019-12-28 05:17:11,420 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:11,420 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:11,420 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:17:11,420 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:11,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:17:11,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:17:11,422 INFO L87 Difference]: Start difference. First operand 44846 states and 164292 transitions. Second operand 7 states. [2019-12-28 05:17:12,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:12,749 INFO L93 Difference]: Finished difference Result 56842 states and 204026 transitions. [2019-12-28 05:17:12,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-28 05:17:12,750 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-28 05:17:12,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:12,873 INFO L225 Difference]: With dead ends: 56842 [2019-12-28 05:17:12,873 INFO L226 Difference]: Without dead ends: 56602 [2019-12-28 05:17:12,873 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-12-28 05:17:13,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56602 states. [2019-12-28 05:17:13,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56602 to 46072. [2019-12-28 05:17:13,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46072 states. [2019-12-28 05:17:16,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46072 states to 46072 states and 168459 transitions. [2019-12-28 05:17:16,337 INFO L78 Accepts]: Start accepts. Automaton has 46072 states and 168459 transitions. Word has length 64 [2019-12-28 05:17:16,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:16,338 INFO L462 AbstractCegarLoop]: Abstraction has 46072 states and 168459 transitions. [2019-12-28 05:17:16,338 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:17:16,338 INFO L276 IsEmpty]: Start isEmpty. Operand 46072 states and 168459 transitions. [2019-12-28 05:17:16,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-28 05:17:16,376 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:16,376 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:16,377 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:16,377 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:16,377 INFO L82 PathProgramCache]: Analyzing trace with hash 2064437065, now seen corresponding path program 1 times [2019-12-28 05:17:16,378 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:16,378 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013375274] [2019-12-28 05:17:16,378 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:16,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:16,483 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:16,483 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2013375274] [2019-12-28 05:17:16,483 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:16,484 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:17:16,484 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1716249301] [2019-12-28 05:17:16,484 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:16,494 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:16,522 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 114 states and 156 transitions. [2019-12-28 05:17:16,523 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:16,654 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 10 times. [2019-12-28 05:17:16,655 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-28 05:17:16,655 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:16,655 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-28 05:17:16,655 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2019-12-28 05:17:16,656 INFO L87 Difference]: Start difference. First operand 46072 states and 168459 transitions. Second operand 11 states. [2019-12-28 05:17:20,881 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:20,881 INFO L93 Difference]: Finished difference Result 173291 states and 630181 transitions. [2019-12-28 05:17:20,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-28 05:17:20,882 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-28 05:17:20,882 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:21,326 INFO L225 Difference]: With dead ends: 173291 [2019-12-28 05:17:21,326 INFO L226 Difference]: Without dead ends: 173019 [2019-12-28 05:17:21,327 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 246 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=353, Invalid=907, Unknown=0, NotChecked=0, Total=1260 [2019-12-28 05:17:21,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173019 states. [2019-12-28 05:17:23,704 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173019 to 58438. [2019-12-28 05:17:23,704 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58438 states. [2019-12-28 05:17:23,856 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58438 states to 58438 states and 215742 transitions. [2019-12-28 05:17:23,856 INFO L78 Accepts]: Start accepts. Automaton has 58438 states and 215742 transitions. Word has length 65 [2019-12-28 05:17:23,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:23,857 INFO L462 AbstractCegarLoop]: Abstraction has 58438 states and 215742 transitions. [2019-12-28 05:17:23,857 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-28 05:17:23,857 INFO L276 IsEmpty]: Start isEmpty. Operand 58438 states and 215742 transitions. [2019-12-28 05:17:23,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-28 05:17:23,899 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:23,899 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:23,899 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:23,899 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:23,900 INFO L82 PathProgramCache]: Analyzing trace with hash -978936533, now seen corresponding path program 2 times [2019-12-28 05:17:23,900 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:23,900 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225491147] [2019-12-28 05:17:23,901 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:23,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:23,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:23,989 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225491147] [2019-12-28 05:17:23,989 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:23,989 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:17:23,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1248544809] [2019-12-28 05:17:23,990 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:24,000 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:24,017 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 105 states and 141 transitions. [2019-12-28 05:17:24,017 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:24,110 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:17:24,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-28 05:17:24,111 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:24,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-28 05:17:24,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2019-12-28 05:17:24,112 INFO L87 Difference]: Start difference. First operand 58438 states and 215742 transitions. Second operand 11 states. [2019-12-28 05:17:28,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:28,226 INFO L93 Difference]: Finished difference Result 151820 states and 556627 transitions. [2019-12-28 05:17:28,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-28 05:17:28,227 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 65 [2019-12-28 05:17:28,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:31,567 INFO L225 Difference]: With dead ends: 151820 [2019-12-28 05:17:31,568 INFO L226 Difference]: Without dead ends: 151356 [2019-12-28 05:17:31,568 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 235 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=296, Invalid=964, Unknown=0, NotChecked=0, Total=1260 [2019-12-28 05:17:31,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151356 states. [2019-12-28 05:17:33,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151356 to 53493. [2019-12-28 05:17:33,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53493 states. [2019-12-28 05:17:33,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53493 states to 53493 states and 198468 transitions. [2019-12-28 05:17:33,552 INFO L78 Accepts]: Start accepts. Automaton has 53493 states and 198468 transitions. Word has length 65 [2019-12-28 05:17:33,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:33,552 INFO L462 AbstractCegarLoop]: Abstraction has 53493 states and 198468 transitions. [2019-12-28 05:17:33,552 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-28 05:17:33,552 INFO L276 IsEmpty]: Start isEmpty. Operand 53493 states and 198468 transitions. [2019-12-28 05:17:33,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:17:33,606 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:33,606 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:33,607 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:33,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:33,607 INFO L82 PathProgramCache]: Analyzing trace with hash 379551327, now seen corresponding path program 1 times [2019-12-28 05:17:33,607 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:33,607 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [865224766] [2019-12-28 05:17:33,608 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:33,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:33,656 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:33,656 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [865224766] [2019-12-28 05:17:33,656 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:33,657 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:17:33,657 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1990653634] [2019-12-28 05:17:33,657 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:33,669 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:33,681 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 74 states and 79 transitions. [2019-12-28 05:17:33,682 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:33,682 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:33,682 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:17:33,683 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:33,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:17:33,683 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:33,683 INFO L87 Difference]: Start difference. First operand 53493 states and 198468 transitions. Second operand 3 states. [2019-12-28 05:17:34,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:34,149 INFO L93 Difference]: Finished difference Result 73480 states and 271657 transitions. [2019-12-28 05:17:34,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:17:34,150 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-28 05:17:34,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:34,321 INFO L225 Difference]: With dead ends: 73480 [2019-12-28 05:17:34,322 INFO L226 Difference]: Without dead ends: 73480 [2019-12-28 05:17:34,322 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:34,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73480 states. [2019-12-28 05:17:36,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73480 to 63179. [2019-12-28 05:17:36,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63179 states. [2019-12-28 05:17:36,217 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63179 states to 63179 states and 235337 transitions. [2019-12-28 05:17:36,217 INFO L78 Accepts]: Start accepts. Automaton has 63179 states and 235337 transitions. Word has length 67 [2019-12-28 05:17:36,217 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:36,217 INFO L462 AbstractCegarLoop]: Abstraction has 63179 states and 235337 transitions. [2019-12-28 05:17:36,218 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:17:36,218 INFO L276 IsEmpty]: Start isEmpty. Operand 63179 states and 235337 transitions. [2019-12-28 05:17:36,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:17:36,283 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:36,283 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:36,283 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:36,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:36,283 INFO L82 PathProgramCache]: Analyzing trace with hash 1904207583, now seen corresponding path program 1 times [2019-12-28 05:17:36,284 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:36,284 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1576321044] [2019-12-28 05:17:36,284 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:36,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:36,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:36,393 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1576321044] [2019-12-28 05:17:36,393 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:36,393 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:17:36,394 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1753116529] [2019-12-28 05:17:36,394 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:36,404 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:36,417 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 74 states and 79 transitions. [2019-12-28 05:17:36,417 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:36,418 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:36,418 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:17:36,418 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:36,418 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:17:36,418 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:17:36,419 INFO L87 Difference]: Start difference. First operand 63179 states and 235337 transitions. Second operand 6 states. [2019-12-28 05:17:37,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:37,281 INFO L93 Difference]: Finished difference Result 77546 states and 284841 transitions. [2019-12-28 05:17:37,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:17:37,281 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-28 05:17:37,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:37,461 INFO L225 Difference]: With dead ends: 77546 [2019-12-28 05:17:37,461 INFO L226 Difference]: Without dead ends: 76902 [2019-12-28 05:17:37,462 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:17:37,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76902 states. [2019-12-28 05:17:41,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76902 to 65811. [2019-12-28 05:17:41,500 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65811 states. [2019-12-28 05:17:41,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65811 states to 65811 states and 244122 transitions. [2019-12-28 05:17:41,674 INFO L78 Accepts]: Start accepts. Automaton has 65811 states and 244122 transitions. Word has length 67 [2019-12-28 05:17:41,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:41,674 INFO L462 AbstractCegarLoop]: Abstraction has 65811 states and 244122 transitions. [2019-12-28 05:17:41,674 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:17:41,674 INFO L276 IsEmpty]: Start isEmpty. Operand 65811 states and 244122 transitions. [2019-12-28 05:17:41,725 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:17:41,725 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:41,725 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:41,725 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:41,725 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:41,725 INFO L82 PathProgramCache]: Analyzing trace with hash -1429145696, now seen corresponding path program 1 times [2019-12-28 05:17:41,726 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:41,726 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1223424686] [2019-12-28 05:17:41,726 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:41,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:41,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:41,825 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1223424686] [2019-12-28 05:17:41,826 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:41,826 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:17:41,826 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1643473799] [2019-12-28 05:17:41,826 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:41,836 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:41,849 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 74 states and 79 transitions. [2019-12-28 05:17:41,849 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:41,850 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:41,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:17:41,851 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:41,851 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:17:41,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:17:41,851 INFO L87 Difference]: Start difference. First operand 65811 states and 244122 transitions. Second operand 7 states. [2019-12-28 05:17:42,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:42,987 INFO L93 Difference]: Finished difference Result 95559 states and 342889 transitions. [2019-12-28 05:17:42,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-28 05:17:42,988 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-28 05:17:42,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:43,210 INFO L225 Difference]: With dead ends: 95559 [2019-12-28 05:17:43,210 INFO L226 Difference]: Without dead ends: 95559 [2019-12-28 05:17:43,210 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:17:44,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95559 states. [2019-12-28 05:17:45,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95559 to 87235. [2019-12-28 05:17:45,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87235 states. [2019-12-28 05:17:45,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87235 states to 87235 states and 316238 transitions. [2019-12-28 05:17:45,468 INFO L78 Accepts]: Start accepts. Automaton has 87235 states and 316238 transitions. Word has length 67 [2019-12-28 05:17:45,469 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:45,469 INFO L462 AbstractCegarLoop]: Abstraction has 87235 states and 316238 transitions. [2019-12-28 05:17:45,469 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:17:45,469 INFO L276 IsEmpty]: Start isEmpty. Operand 87235 states and 316238 transitions. [2019-12-28 05:17:45,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:17:45,544 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:45,544 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:45,544 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:45,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:45,544 INFO L82 PathProgramCache]: Analyzing trace with hash -184381215, now seen corresponding path program 1 times [2019-12-28 05:17:45,545 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:45,545 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225615811] [2019-12-28 05:17:45,545 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:45,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:45,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:45,613 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225615811] [2019-12-28 05:17:45,613 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:45,613 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:17:45,613 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [331528671] [2019-12-28 05:17:45,614 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:45,625 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:45,639 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 74 states and 79 transitions. [2019-12-28 05:17:45,639 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:45,651 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:17:45,651 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:17:45,651 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:45,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:17:45,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:17:45,652 INFO L87 Difference]: Start difference. First operand 87235 states and 316238 transitions. Second operand 4 states. [2019-12-28 05:17:48,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:48,019 INFO L93 Difference]: Finished difference Result 18802 states and 60206 transitions. [2019-12-28 05:17:48,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:17:48,019 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-28 05:17:48,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:48,059 INFO L225 Difference]: With dead ends: 18802 [2019-12-28 05:17:48,059 INFO L226 Difference]: Without dead ends: 18324 [2019-12-28 05:17:48,060 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:17:48,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18324 states. [2019-12-28 05:17:48,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18324 to 18312. [2019-12-28 05:17:48,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18312 states. [2019-12-28 05:17:48,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18312 states to 18312 states and 58701 transitions. [2019-12-28 05:17:48,332 INFO L78 Accepts]: Start accepts. Automaton has 18312 states and 58701 transitions. Word has length 67 [2019-12-28 05:17:48,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:48,332 INFO L462 AbstractCegarLoop]: Abstraction has 18312 states and 58701 transitions. [2019-12-28 05:17:48,332 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:17:48,332 INFO L276 IsEmpty]: Start isEmpty. Operand 18312 states and 58701 transitions. [2019-12-28 05:17:48,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-28 05:17:48,347 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:48,348 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:48,348 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:48,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:48,348 INFO L82 PathProgramCache]: Analyzing trace with hash 1457085175, now seen corresponding path program 1 times [2019-12-28 05:17:48,349 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:48,349 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1873710894] [2019-12-28 05:17:48,349 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:48,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:48,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:48,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1873710894] [2019-12-28 05:17:48,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:48,434 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:17:48,435 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [351758829] [2019-12-28 05:17:48,435 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:48,465 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:48,491 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 78 states and 77 transitions. [2019-12-28 05:17:48,492 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:48,492 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:48,492 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:17:48,493 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:48,493 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:17:48,493 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:17:48,493 INFO L87 Difference]: Start difference. First operand 18312 states and 58701 transitions. Second operand 4 states. [2019-12-28 05:17:48,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:48,767 INFO L93 Difference]: Finished difference Result 23892 states and 75556 transitions. [2019-12-28 05:17:48,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:17:48,768 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 77 [2019-12-28 05:17:48,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:48,805 INFO L225 Difference]: With dead ends: 23892 [2019-12-28 05:17:48,805 INFO L226 Difference]: Without dead ends: 23892 [2019-12-28 05:17:48,805 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:17:48,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23892 states. [2019-12-28 05:17:49,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23892 to 19188. [2019-12-28 05:17:49,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19188 states. [2019-12-28 05:17:49,082 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19188 states to 19188 states and 61260 transitions. [2019-12-28 05:17:49,082 INFO L78 Accepts]: Start accepts. Automaton has 19188 states and 61260 transitions. Word has length 77 [2019-12-28 05:17:49,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:49,083 INFO L462 AbstractCegarLoop]: Abstraction has 19188 states and 61260 transitions. [2019-12-28 05:17:49,083 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:17:49,083 INFO L276 IsEmpty]: Start isEmpty. Operand 19188 states and 61260 transitions. [2019-12-28 05:17:49,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-28 05:17:49,098 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:49,098 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:49,098 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:49,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:49,099 INFO L82 PathProgramCache]: Analyzing trace with hash 1202348630, now seen corresponding path program 1 times [2019-12-28 05:17:49,100 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:49,100 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [797052230] [2019-12-28 05:17:49,100 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:49,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:49,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:49,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [797052230] [2019-12-28 05:17:49,204 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:49,205 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 05:17:49,205 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [952118278] [2019-12-28 05:17:49,205 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:49,219 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:49,238 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 78 states and 77 transitions. [2019-12-28 05:17:49,238 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:49,238 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:49,239 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 05:17:49,239 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:49,239 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 05:17:49,239 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:17:49,239 INFO L87 Difference]: Start difference. First operand 19188 states and 61260 transitions. Second operand 8 states. [2019-12-28 05:17:50,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:50,396 INFO L93 Difference]: Finished difference Result 23487 states and 73735 transitions. [2019-12-28 05:17:50,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-28 05:17:50,397 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 77 [2019-12-28 05:17:50,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:50,435 INFO L225 Difference]: With dead ends: 23487 [2019-12-28 05:17:50,435 INFO L226 Difference]: Without dead ends: 23439 [2019-12-28 05:17:50,436 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-12-28 05:17:50,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23439 states. [2019-12-28 05:17:50,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23439 to 17676. [2019-12-28 05:17:50,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17676 states. [2019-12-28 05:17:50,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17676 states to 17676 states and 56619 transitions. [2019-12-28 05:17:50,712 INFO L78 Accepts]: Start accepts. Automaton has 17676 states and 56619 transitions. Word has length 77 [2019-12-28 05:17:50,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:50,712 INFO L462 AbstractCegarLoop]: Abstraction has 17676 states and 56619 transitions. [2019-12-28 05:17:50,713 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 05:17:50,713 INFO L276 IsEmpty]: Start isEmpty. Operand 17676 states and 56619 transitions. [2019-12-28 05:17:50,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-12-28 05:17:50,727 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:50,728 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:50,728 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:50,728 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:50,728 INFO L82 PathProgramCache]: Analyzing trace with hash -155414719, now seen corresponding path program 1 times [2019-12-28 05:17:50,729 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:50,729 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1142423444] [2019-12-28 05:17:50,729 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:50,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:50,774 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:50,775 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1142423444] [2019-12-28 05:17:50,775 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:50,775 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:17:50,776 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [360961036] [2019-12-28 05:17:50,776 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:50,790 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:50,814 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 84 states and 88 transitions. [2019-12-28 05:17:50,814 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:50,815 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:50,815 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:17:50,815 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:50,816 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:17:50,816 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:50,816 INFO L87 Difference]: Start difference. First operand 17676 states and 56619 transitions. Second operand 3 states. [2019-12-28 05:17:51,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:51,261 INFO L93 Difference]: Finished difference Result 19033 states and 60538 transitions. [2019-12-28 05:17:51,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:17:51,261 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 78 [2019-12-28 05:17:51,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:51,290 INFO L225 Difference]: With dead ends: 19033 [2019-12-28 05:17:51,290 INFO L226 Difference]: Without dead ends: 19033 [2019-12-28 05:17:51,290 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:51,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19033 states. [2019-12-28 05:17:51,505 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19033 to 18376. [2019-12-28 05:17:51,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18376 states. [2019-12-28 05:17:51,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18376 states to 18376 states and 58615 transitions. [2019-12-28 05:17:51,541 INFO L78 Accepts]: Start accepts. Automaton has 18376 states and 58615 transitions. Word has length 78 [2019-12-28 05:17:51,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:51,541 INFO L462 AbstractCegarLoop]: Abstraction has 18376 states and 58615 transitions. [2019-12-28 05:17:51,541 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:17:51,541 INFO L276 IsEmpty]: Start isEmpty. Operand 18376 states and 58615 transitions. [2019-12-28 05:17:51,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-12-28 05:17:51,557 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:51,557 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:51,558 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:51,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:51,558 INFO L82 PathProgramCache]: Analyzing trace with hash 2033602545, now seen corresponding path program 1 times [2019-12-28 05:17:51,559 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:51,559 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1702656372] [2019-12-28 05:17:51,559 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:51,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:51,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:51,625 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1702656372] [2019-12-28 05:17:51,625 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:51,625 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:17:51,626 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1349649985] [2019-12-28 05:17:51,626 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:51,656 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:51,698 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 132 states and 183 transitions. [2019-12-28 05:17:51,698 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:51,699 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:51,699 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:17:51,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:51,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:17:51,700 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:17:51,700 INFO L87 Difference]: Start difference. First operand 18376 states and 58615 transitions. Second operand 4 states. [2019-12-28 05:17:52,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:52,030 INFO L93 Difference]: Finished difference Result 21886 states and 68807 transitions. [2019-12-28 05:17:52,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 05:17:52,030 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-12-28 05:17:52,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:52,065 INFO L225 Difference]: With dead ends: 21886 [2019-12-28 05:17:52,065 INFO L226 Difference]: Without dead ends: 21886 [2019-12-28 05:17:52,068 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:17:52,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21886 states. [2019-12-28 05:17:52,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21886 to 20500. [2019-12-28 05:17:52,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20500 states. [2019-12-28 05:17:52,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20500 states to 20500 states and 64880 transitions. [2019-12-28 05:17:52,379 INFO L78 Accepts]: Start accepts. Automaton has 20500 states and 64880 transitions. Word has length 79 [2019-12-28 05:17:52,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:52,379 INFO L462 AbstractCegarLoop]: Abstraction has 20500 states and 64880 transitions. [2019-12-28 05:17:52,379 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:17:52,379 INFO L276 IsEmpty]: Start isEmpty. Operand 20500 states and 64880 transitions. [2019-12-28 05:17:52,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-12-28 05:17:52,398 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:52,398 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:52,398 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:52,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:52,398 INFO L82 PathProgramCache]: Analyzing trace with hash 332862066, now seen corresponding path program 1 times [2019-12-28 05:17:52,399 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:52,399 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1611708016] [2019-12-28 05:17:52,399 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:52,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:52,459 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:52,460 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1611708016] [2019-12-28 05:17:52,460 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:52,460 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:17:52,460 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2112551185] [2019-12-28 05:17:52,461 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:52,475 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:52,514 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 132 states and 183 transitions. [2019-12-28 05:17:52,514 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:52,515 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:52,515 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:17:52,516 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:52,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:17:52,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:52,517 INFO L87 Difference]: Start difference. First operand 20500 states and 64880 transitions. Second operand 3 states. [2019-12-28 05:17:52,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:52,765 INFO L93 Difference]: Finished difference Result 22149 states and 69667 transitions. [2019-12-28 05:17:52,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:17:52,765 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-12-28 05:17:52,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:52,800 INFO L225 Difference]: With dead ends: 22149 [2019-12-28 05:17:52,800 INFO L226 Difference]: Without dead ends: 22149 [2019-12-28 05:17:52,800 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:52,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22149 states. [2019-12-28 05:17:53,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22149 to 21480. [2019-12-28 05:17:53,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21480 states. [2019-12-28 05:17:53,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21480 states to 21480 states and 67708 transitions. [2019-12-28 05:17:53,102 INFO L78 Accepts]: Start accepts. Automaton has 21480 states and 67708 transitions. Word has length 79 [2019-12-28 05:17:53,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:53,102 INFO L462 AbstractCegarLoop]: Abstraction has 21480 states and 67708 transitions. [2019-12-28 05:17:53,102 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:17:53,102 INFO L276 IsEmpty]: Start isEmpty. Operand 21480 states and 67708 transitions. [2019-12-28 05:17:53,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:17:53,123 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:53,123 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:53,123 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:53,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:53,123 INFO L82 PathProgramCache]: Analyzing trace with hash 1580742388, now seen corresponding path program 1 times [2019-12-28 05:17:53,124 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:53,124 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1398657028] [2019-12-28 05:17:53,124 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:53,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:53,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:53,216 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1398657028] [2019-12-28 05:17:53,216 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:53,216 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 05:17:53,216 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [111642058] [2019-12-28 05:17:53,217 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:53,229 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:53,253 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 86 states and 90 transitions. [2019-12-28 05:17:53,253 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:53,254 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:53,254 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 05:17:53,254 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:53,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 05:17:53,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:17:53,255 INFO L87 Difference]: Start difference. First operand 21480 states and 67708 transitions. Second operand 8 states. [2019-12-28 05:17:56,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:56,279 INFO L93 Difference]: Finished difference Result 60004 states and 183043 transitions. [2019-12-28 05:17:56,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-28 05:17:56,279 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 80 [2019-12-28 05:17:56,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:56,378 INFO L225 Difference]: With dead ends: 60004 [2019-12-28 05:17:56,378 INFO L226 Difference]: Without dead ends: 59455 [2019-12-28 05:17:56,379 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=153, Invalid=497, Unknown=0, NotChecked=0, Total=650 [2019-12-28 05:17:56,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59455 states. [2019-12-28 05:17:56,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59455 to 32033. [2019-12-28 05:17:56,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32033 states. [2019-12-28 05:17:57,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32033 states to 32033 states and 100216 transitions. [2019-12-28 05:17:57,001 INFO L78 Accepts]: Start accepts. Automaton has 32033 states and 100216 transitions. Word has length 80 [2019-12-28 05:17:57,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:57,001 INFO L462 AbstractCegarLoop]: Abstraction has 32033 states and 100216 transitions. [2019-12-28 05:17:57,001 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 05:17:57,001 INFO L276 IsEmpty]: Start isEmpty. Operand 32033 states and 100216 transitions. [2019-12-28 05:17:57,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:17:57,034 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:57,034 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:57,034 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:57,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:57,035 INFO L82 PathProgramCache]: Analyzing trace with hash -507846410, now seen corresponding path program 1 times [2019-12-28 05:17:57,035 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:57,035 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1592068495] [2019-12-28 05:17:57,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:57,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:57,132 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:57,133 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1592068495] [2019-12-28 05:17:57,133 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:57,133 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:17:57,133 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [294727191] [2019-12-28 05:17:57,134 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:57,146 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:57,178 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 86 states and 90 transitions. [2019-12-28 05:17:57,179 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:57,179 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:57,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:17:57,179 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:57,180 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:17:57,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:17:57,180 INFO L87 Difference]: Start difference. First operand 32033 states and 100216 transitions. Second operand 6 states. [2019-12-28 05:17:57,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:57,825 INFO L93 Difference]: Finished difference Result 33785 states and 104772 transitions. [2019-12-28 05:17:57,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:17:57,825 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-12-28 05:17:57,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:57,877 INFO L225 Difference]: With dead ends: 33785 [2019-12-28 05:17:57,877 INFO L226 Difference]: Without dead ends: 33785 [2019-12-28 05:17:57,877 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:17:57,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33785 states. [2019-12-28 05:17:58,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33785 to 32500. [2019-12-28 05:17:58,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32500 states. [2019-12-28 05:17:58,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32500 states to 32500 states and 101118 transitions. [2019-12-28 05:17:58,332 INFO L78 Accepts]: Start accepts. Automaton has 32500 states and 101118 transitions. Word has length 80 [2019-12-28 05:17:58,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:58,332 INFO L462 AbstractCegarLoop]: Abstraction has 32500 states and 101118 transitions. [2019-12-28 05:17:58,332 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:17:58,332 INFO L276 IsEmpty]: Start isEmpty. Operand 32500 states and 101118 transitions. [2019-12-28 05:17:58,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:17:58,362 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:58,363 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:58,363 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:58,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:58,363 INFO L82 PathProgramCache]: Analyzing trace with hash 1851460599, now seen corresponding path program 1 times [2019-12-28 05:17:58,363 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:58,364 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [476699540] [2019-12-28 05:17:58,364 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:58,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:58,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:58,448 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [476699540] [2019-12-28 05:17:58,448 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:58,448 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:17:58,448 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1959722022] [2019-12-28 05:17:58,448 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:58,460 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:58,485 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 86 states and 90 transitions. [2019-12-28 05:17:58,485 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:58,486 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:58,486 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:17:58,486 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:58,487 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:17:58,487 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:17:58,487 INFO L87 Difference]: Start difference. First operand 32500 states and 101118 transitions. Second operand 7 states. [2019-12-28 05:17:59,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:59,317 INFO L93 Difference]: Finished difference Result 34185 states and 105826 transitions. [2019-12-28 05:17:59,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-28 05:17:59,317 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-12-28 05:17:59,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:59,368 INFO L225 Difference]: With dead ends: 34185 [2019-12-28 05:17:59,369 INFO L226 Difference]: Without dead ends: 34185 [2019-12-28 05:17:59,369 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:17:59,419 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34185 states. [2019-12-28 05:17:59,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34185 to 32863. [2019-12-28 05:17:59,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32863 states. [2019-12-28 05:17:59,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32863 states to 32863 states and 101983 transitions. [2019-12-28 05:17:59,817 INFO L78 Accepts]: Start accepts. Automaton has 32863 states and 101983 transitions. Word has length 80 [2019-12-28 05:17:59,817 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:59,817 INFO L462 AbstractCegarLoop]: Abstraction has 32863 states and 101983 transitions. [2019-12-28 05:17:59,817 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:17:59,817 INFO L276 IsEmpty]: Start isEmpty. Operand 32863 states and 101983 transitions. [2019-12-28 05:17:59,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:17:59,850 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:59,850 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:59,851 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:59,851 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:59,851 INFO L82 PathProgramCache]: Analyzing trace with hash -2113740936, now seen corresponding path program 1 times [2019-12-28 05:17:59,852 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:59,852 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1491895833] [2019-12-28 05:17:59,852 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:59,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:59,900 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:59,900 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1491895833] [2019-12-28 05:17:59,901 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:59,901 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:17:59,901 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [593701825] [2019-12-28 05:17:59,901 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:59,911 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:59,935 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 86 states and 90 transitions. [2019-12-28 05:17:59,935 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:59,936 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:59,936 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:17:59,936 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:59,936 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:17:59,936 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:59,937 INFO L87 Difference]: Start difference. First operand 32863 states and 101983 transitions. Second operand 3 states. [2019-12-28 05:18:00,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:00,038 INFO L93 Difference]: Finished difference Result 25144 states and 77530 transitions. [2019-12-28 05:18:00,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:18:00,038 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-12-28 05:18:00,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:00,076 INFO L225 Difference]: With dead ends: 25144 [2019-12-28 05:18:00,076 INFO L226 Difference]: Without dead ends: 25144 [2019-12-28 05:18:00,077 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:18:00,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25144 states. [2019-12-28 05:18:00,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25144 to 23988. [2019-12-28 05:18:00,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23988 states. [2019-12-28 05:18:00,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23988 states to 23988 states and 74053 transitions. [2019-12-28 05:18:00,407 INFO L78 Accepts]: Start accepts. Automaton has 23988 states and 74053 transitions. Word has length 80 [2019-12-28 05:18:00,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:00,407 INFO L462 AbstractCegarLoop]: Abstraction has 23988 states and 74053 transitions. [2019-12-28 05:18:00,407 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:18:00,407 INFO L276 IsEmpty]: Start isEmpty. Operand 23988 states and 74053 transitions. [2019-12-28 05:18:00,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:18:00,430 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:00,430 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:00,431 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:00,431 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:00,431 INFO L82 PathProgramCache]: Analyzing trace with hash 1936604585, now seen corresponding path program 1 times [2019-12-28 05:18:00,431 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:00,432 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1248466238] [2019-12-28 05:18:00,432 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:00,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:00,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:00,527 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1248466238] [2019-12-28 05:18:00,527 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:00,527 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:18:00,527 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1718945679] [2019-12-28 05:18:00,527 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:00,538 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:00,566 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 86 states and 90 transitions. [2019-12-28 05:18:00,566 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:00,567 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:00,567 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:18:00,567 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:00,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:18:00,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:00,568 INFO L87 Difference]: Start difference. First operand 23988 states and 74053 transitions. Second operand 7 states. [2019-12-28 05:18:01,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:01,413 INFO L93 Difference]: Finished difference Result 42720 states and 131342 transitions. [2019-12-28 05:18:01,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 05:18:01,414 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-12-28 05:18:01,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:01,482 INFO L225 Difference]: With dead ends: 42720 [2019-12-28 05:18:01,482 INFO L226 Difference]: Without dead ends: 42720 [2019-12-28 05:18:01,483 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:18:01,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42720 states. [2019-12-28 05:18:01,883 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42720 to 25777. [2019-12-28 05:18:01,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25777 states. [2019-12-28 05:18:01,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25777 states to 25777 states and 79405 transitions. [2019-12-28 05:18:01,931 INFO L78 Accepts]: Start accepts. Automaton has 25777 states and 79405 transitions. Word has length 80 [2019-12-28 05:18:01,931 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:01,931 INFO L462 AbstractCegarLoop]: Abstraction has 25777 states and 79405 transitions. [2019-12-28 05:18:01,931 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:18:01,931 INFO L276 IsEmpty]: Start isEmpty. Operand 25777 states and 79405 transitions. [2019-12-28 05:18:01,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:18:01,952 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:01,952 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:01,953 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:01,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:01,953 INFO L82 PathProgramCache]: Analyzing trace with hash -632881814, now seen corresponding path program 1 times [2019-12-28 05:18:01,953 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:01,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [53812041] [2019-12-28 05:18:01,954 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:02,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:02,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:02,168 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [53812041] [2019-12-28 05:18:02,168 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:02,168 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:18:02,169 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [183778767] [2019-12-28 05:18:02,169 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:02,179 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:02,202 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 86 states and 90 transitions. [2019-12-28 05:18:02,203 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:02,203 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:02,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:18:02,203 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:02,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:18:02,205 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:18:02,205 INFO L87 Difference]: Start difference. First operand 25777 states and 79405 transitions. Second operand 5 states. [2019-12-28 05:18:02,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:02,245 INFO L93 Difference]: Finished difference Result 3274 states and 8033 transitions. [2019-12-28 05:18:02,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 05:18:02,246 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 80 [2019-12-28 05:18:02,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:02,249 INFO L225 Difference]: With dead ends: 3274 [2019-12-28 05:18:02,249 INFO L226 Difference]: Without dead ends: 2815 [2019-12-28 05:18:02,250 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:02,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2815 states. [2019-12-28 05:18:02,271 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2815 to 2541. [2019-12-28 05:18:02,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2541 states. [2019-12-28 05:18:02,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2541 states to 2541 states and 6203 transitions. [2019-12-28 05:18:02,274 INFO L78 Accepts]: Start accepts. Automaton has 2541 states and 6203 transitions. Word has length 80 [2019-12-28 05:18:02,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:02,275 INFO L462 AbstractCegarLoop]: Abstraction has 2541 states and 6203 transitions. [2019-12-28 05:18:02,275 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:18:02,275 INFO L276 IsEmpty]: Start isEmpty. Operand 2541 states and 6203 transitions. [2019-12-28 05:18:02,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:02,277 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:02,277 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:02,277 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:02,277 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:02,278 INFO L82 PathProgramCache]: Analyzing trace with hash 211784789, now seen corresponding path program 1 times [2019-12-28 05:18:02,278 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:02,279 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [370924239] [2019-12-28 05:18:02,279 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:02,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:02,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:02,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [370924239] [2019-12-28 05:18:02,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:02,354 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:02,354 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2016558056] [2019-12-28 05:18:02,355 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:02,369 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:02,488 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 186 states and 277 transitions. [2019-12-28 05:18:02,488 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:02,618 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 5 times. [2019-12-28 05:18:02,618 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 05:18:02,618 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:02,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 05:18:02,619 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=49, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:18:02,619 INFO L87 Difference]: Start difference. First operand 2541 states and 6203 transitions. Second operand 9 states. [2019-12-28 05:18:04,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:04,104 INFO L93 Difference]: Finished difference Result 5060 states and 12393 transitions. [2019-12-28 05:18:04,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-28 05:18:04,105 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 92 [2019-12-28 05:18:04,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:04,111 INFO L225 Difference]: With dead ends: 5060 [2019-12-28 05:18:04,111 INFO L226 Difference]: Without dead ends: 5015 [2019-12-28 05:18:04,112 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 50 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=125, Invalid=255, Unknown=0, NotChecked=0, Total=380 [2019-12-28 05:18:04,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5015 states. [2019-12-28 05:18:04,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5015 to 2790. [2019-12-28 05:18:04,144 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2790 states. [2019-12-28 05:18:04,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2790 states to 2790 states and 6803 transitions. [2019-12-28 05:18:04,148 INFO L78 Accepts]: Start accepts. Automaton has 2790 states and 6803 transitions. Word has length 92 [2019-12-28 05:18:04,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:04,148 INFO L462 AbstractCegarLoop]: Abstraction has 2790 states and 6803 transitions. [2019-12-28 05:18:04,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 05:18:04,148 INFO L276 IsEmpty]: Start isEmpty. Operand 2790 states and 6803 transitions. [2019-12-28 05:18:04,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:04,151 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:04,151 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:04,151 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:04,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:04,151 INFO L82 PathProgramCache]: Analyzing trace with hash 1173398806, now seen corresponding path program 1 times [2019-12-28 05:18:04,152 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:04,152 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1152301389] [2019-12-28 05:18:04,152 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:04,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:04,231 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:04,232 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1152301389] [2019-12-28 05:18:04,232 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:04,232 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:04,232 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1897151129] [2019-12-28 05:18:04,232 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:04,247 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:04,347 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 186 states and 277 transitions. [2019-12-28 05:18:04,347 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:04,413 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:18:04,413 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:18:04,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:04,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:18:04,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:04,415 INFO L87 Difference]: Start difference. First operand 2790 states and 6803 transitions. Second operand 7 states. [2019-12-28 05:18:04,929 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:04,930 INFO L93 Difference]: Finished difference Result 2990 states and 7156 transitions. [2019-12-28 05:18:04,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:18:04,930 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-12-28 05:18:04,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:04,936 INFO L225 Difference]: With dead ends: 2990 [2019-12-28 05:18:04,936 INFO L226 Difference]: Without dead ends: 2938 [2019-12-28 05:18:04,937 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:18:04,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2938 states. [2019-12-28 05:18:04,989 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2938 to 2881. [2019-12-28 05:18:04,990 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2881 states. [2019-12-28 05:18:04,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2881 states to 2881 states and 6969 transitions. [2019-12-28 05:18:04,998 INFO L78 Accepts]: Start accepts. Automaton has 2881 states and 6969 transitions. Word has length 92 [2019-12-28 05:18:04,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:04,998 INFO L462 AbstractCegarLoop]: Abstraction has 2881 states and 6969 transitions. [2019-12-28 05:18:04,999 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:18:04,999 INFO L276 IsEmpty]: Start isEmpty. Operand 2881 states and 6969 transitions. [2019-12-28 05:18:05,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:05,004 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:05,004 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:05,004 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:05,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:05,004 INFO L82 PathProgramCache]: Analyzing trace with hash 738198895, now seen corresponding path program 1 times [2019-12-28 05:18:05,005 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:05,006 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1942657049] [2019-12-28 05:18:05,006 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:05,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:05,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:05,105 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1942657049] [2019-12-28 05:18:05,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:05,106 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:18:05,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1585847076] [2019-12-28 05:18:05,106 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:05,128 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:05,210 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 156 states and 217 transitions. [2019-12-28 05:18:05,211 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:05,212 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:05,212 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:18:05,212 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:05,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:18:05,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:18:05,213 INFO L87 Difference]: Start difference. First operand 2881 states and 6969 transitions. Second operand 4 states. [2019-12-28 05:18:05,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:05,251 INFO L93 Difference]: Finished difference Result 2703 states and 6512 transitions. [2019-12-28 05:18:05,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:18:05,251 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 92 [2019-12-28 05:18:05,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:05,255 INFO L225 Difference]: With dead ends: 2703 [2019-12-28 05:18:05,255 INFO L226 Difference]: Without dead ends: 2703 [2019-12-28 05:18:05,255 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:18:05,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2703 states. [2019-12-28 05:18:05,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2703 to 2624. [2019-12-28 05:18:05,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2624 states. [2019-12-28 05:18:05,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2624 states to 2624 states and 6310 transitions. [2019-12-28 05:18:05,289 INFO L78 Accepts]: Start accepts. Automaton has 2624 states and 6310 transitions. Word has length 92 [2019-12-28 05:18:05,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:05,289 INFO L462 AbstractCegarLoop]: Abstraction has 2624 states and 6310 transitions. [2019-12-28 05:18:05,289 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:18:05,290 INFO L276 IsEmpty]: Start isEmpty. Operand 2624 states and 6310 transitions. [2019-12-28 05:18:05,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:05,293 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:05,293 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:05,293 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:05,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:05,294 INFO L82 PathProgramCache]: Analyzing trace with hash 1220152845, now seen corresponding path program 1 times [2019-12-28 05:18:05,295 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:05,295 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1838889754] [2019-12-28 05:18:05,295 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:05,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:05,375 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:05,375 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1838889754] [2019-12-28 05:18:05,375 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:05,376 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:18:05,376 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1480286322] [2019-12-28 05:18:05,376 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:05,391 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:05,472 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 156 states and 216 transitions. [2019-12-28 05:18:05,473 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:05,582 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:18:05,582 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 05:18:05,582 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:05,583 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 05:18:05,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:18:05,583 INFO L87 Difference]: Start difference. First operand 2624 states and 6310 transitions. Second operand 9 states. [2019-12-28 05:18:07,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:07,227 INFO L93 Difference]: Finished difference Result 3987 states and 9191 transitions. [2019-12-28 05:18:07,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-28 05:18:07,227 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 92 [2019-12-28 05:18:07,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:07,233 INFO L225 Difference]: With dead ends: 3987 [2019-12-28 05:18:07,234 INFO L226 Difference]: Without dead ends: 3947 [2019-12-28 05:18:07,234 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 13 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 175 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=197, Invalid=673, Unknown=0, NotChecked=0, Total=870 [2019-12-28 05:18:07,239 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3947 states. [2019-12-28 05:18:07,260 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3947 to 2810. [2019-12-28 05:18:07,260 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2810 states. [2019-12-28 05:18:07,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2810 states to 2810 states and 6700 transitions. [2019-12-28 05:18:07,264 INFO L78 Accepts]: Start accepts. Automaton has 2810 states and 6700 transitions. Word has length 92 [2019-12-28 05:18:07,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:07,265 INFO L462 AbstractCegarLoop]: Abstraction has 2810 states and 6700 transitions. [2019-12-28 05:18:07,265 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 05:18:07,265 INFO L276 IsEmpty]: Start isEmpty. Operand 2810 states and 6700 transitions. [2019-12-28 05:18:07,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:07,267 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:07,267 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:07,267 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:07,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:07,268 INFO L82 PathProgramCache]: Analyzing trace with hash -1870165018, now seen corresponding path program 1 times [2019-12-28 05:18:07,268 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:07,268 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2086188125] [2019-12-28 05:18:07,268 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:07,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:07,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:07,361 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2086188125] [2019-12-28 05:18:07,361 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:07,361 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:18:07,362 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [246798935] [2019-12-28 05:18:07,362 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:07,377 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:07,445 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 158 states and 217 transitions. [2019-12-28 05:18:07,445 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:07,446 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:07,446 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:18:07,446 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:07,446 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:18:07,446 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:07,446 INFO L87 Difference]: Start difference. First operand 2810 states and 6700 transitions. Second operand 7 states. [2019-12-28 05:18:07,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:07,918 INFO L93 Difference]: Finished difference Result 4065 states and 9518 transitions. [2019-12-28 05:18:07,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-28 05:18:07,918 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-12-28 05:18:07,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:07,924 INFO L225 Difference]: With dead ends: 4065 [2019-12-28 05:18:07,924 INFO L226 Difference]: Without dead ends: 4047 [2019-12-28 05:18:07,925 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2019-12-28 05:18:07,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4047 states. [2019-12-28 05:18:07,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4047 to 3502. [2019-12-28 05:18:07,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3502 states. [2019-12-28 05:18:07,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3502 states to 3502 states and 8242 transitions. [2019-12-28 05:18:07,959 INFO L78 Accepts]: Start accepts. Automaton has 3502 states and 8242 transitions. Word has length 92 [2019-12-28 05:18:07,959 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:07,959 INFO L462 AbstractCegarLoop]: Abstraction has 3502 states and 8242 transitions. [2019-12-28 05:18:07,959 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:18:07,959 INFO L276 IsEmpty]: Start isEmpty. Operand 3502 states and 8242 transitions. [2019-12-28 05:18:07,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:07,962 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:07,962 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:07,963 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:07,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:07,963 INFO L82 PathProgramCache]: Analyzing trace with hash -908551001, now seen corresponding path program 1 times [2019-12-28 05:18:07,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:07,964 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197805531] [2019-12-28 05:18:07,964 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:07,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:08,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:08,055 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197805531] [2019-12-28 05:18:08,057 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:08,057 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:18:08,057 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [636711652] [2019-12-28 05:18:08,057 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:08,071 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:08,127 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 158 states and 217 transitions. [2019-12-28 05:18:08,128 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:08,359 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 16 times. [2019-12-28 05:18:08,359 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-28 05:18:08,360 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:08,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-28 05:18:08,360 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-28 05:18:08,360 INFO L87 Difference]: Start difference. First operand 3502 states and 8242 transitions. Second operand 15 states. [2019-12-28 05:18:10,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:10,424 INFO L93 Difference]: Finished difference Result 7471 states and 17823 transitions. [2019-12-28 05:18:10,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-28 05:18:10,425 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 92 [2019-12-28 05:18:10,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:10,434 INFO L225 Difference]: With dead ends: 7471 [2019-12-28 05:18:10,434 INFO L226 Difference]: Without dead ends: 7471 [2019-12-28 05:18:10,435 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 16 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=165, Invalid=591, Unknown=0, NotChecked=0, Total=756 [2019-12-28 05:18:10,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7471 states. [2019-12-28 05:18:10,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7471 to 3887. [2019-12-28 05:18:10,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3887 states. [2019-12-28 05:18:10,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3887 states to 3887 states and 9167 transitions. [2019-12-28 05:18:10,486 INFO L78 Accepts]: Start accepts. Automaton has 3887 states and 9167 transitions. Word has length 92 [2019-12-28 05:18:10,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:10,487 INFO L462 AbstractCegarLoop]: Abstraction has 3887 states and 9167 transitions. [2019-12-28 05:18:10,487 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-28 05:18:10,487 INFO L276 IsEmpty]: Start isEmpty. Operand 3887 states and 9167 transitions. [2019-12-28 05:18:10,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:10,490 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:10,490 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:10,490 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:10,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:10,491 INFO L82 PathProgramCache]: Analyzing trace with hash 336213480, now seen corresponding path program 1 times [2019-12-28 05:18:10,491 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:10,491 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [30253639] [2019-12-28 05:18:10,491 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:10,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:10,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:10,590 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [30253639] [2019-12-28 05:18:10,590 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:10,591 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:10,591 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1641144847] [2019-12-28 05:18:10,591 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:10,606 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:10,704 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 158 states and 217 transitions. [2019-12-28 05:18:10,705 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:10,706 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:10,706 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:18:10,706 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:10,707 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:18:10,707 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:18:10,707 INFO L87 Difference]: Start difference. First operand 3887 states and 9167 transitions. Second operand 6 states. [2019-12-28 05:18:11,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:11,110 INFO L93 Difference]: Finished difference Result 4276 states and 10041 transitions. [2019-12-28 05:18:11,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 05:18:11,111 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-12-28 05:18:11,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:11,119 INFO L225 Difference]: With dead ends: 4276 [2019-12-28 05:18:11,119 INFO L226 Difference]: Without dead ends: 4276 [2019-12-28 05:18:11,120 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:18:11,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4276 states. [2019-12-28 05:18:11,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4276 to 3859. [2019-12-28 05:18:11,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3859 states. [2019-12-28 05:18:11,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3859 states to 3859 states and 9111 transitions. [2019-12-28 05:18:11,196 INFO L78 Accepts]: Start accepts. Automaton has 3859 states and 9111 transitions. Word has length 92 [2019-12-28 05:18:11,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:11,197 INFO L462 AbstractCegarLoop]: Abstraction has 3859 states and 9111 transitions. [2019-12-28 05:18:11,197 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:18:11,197 INFO L276 IsEmpty]: Start isEmpty. Operand 3859 states and 9111 transitions. [2019-12-28 05:18:11,204 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:11,204 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:11,204 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:11,205 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:11,205 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:11,205 INFO L82 PathProgramCache]: Analyzing trace with hash 414386220, now seen corresponding path program 1 times [2019-12-28 05:18:11,206 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:11,207 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1331946904] [2019-12-28 05:18:11,207 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:11,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:11,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:11,356 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1331946904] [2019-12-28 05:18:11,357 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:11,357 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:11,357 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [210704440] [2019-12-28 05:18:11,357 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:11,378 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:11,467 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 147 states and 195 transitions. [2019-12-28 05:18:11,468 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:11,469 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:11,469 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:18:11,469 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:11,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:18:11,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:18:11,470 INFO L87 Difference]: Start difference. First operand 3859 states and 9111 transitions. Second operand 6 states. [2019-12-28 05:18:11,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:11,695 INFO L93 Difference]: Finished difference Result 4253 states and 9713 transitions. [2019-12-28 05:18:11,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 05:18:11,696 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-12-28 05:18:11,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:11,701 INFO L225 Difference]: With dead ends: 4253 [2019-12-28 05:18:11,702 INFO L226 Difference]: Without dead ends: 4253 [2019-12-28 05:18:11,702 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:18:11,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4253 states. [2019-12-28 05:18:11,751 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4253 to 3973. [2019-12-28 05:18:11,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3973 states. [2019-12-28 05:18:11,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3973 states to 3973 states and 9173 transitions. [2019-12-28 05:18:11,759 INFO L78 Accepts]: Start accepts. Automaton has 3973 states and 9173 transitions. Word has length 92 [2019-12-28 05:18:11,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:11,759 INFO L462 AbstractCegarLoop]: Abstraction has 3973 states and 9173 transitions. [2019-12-28 05:18:11,759 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:18:11,759 INFO L276 IsEmpty]: Start isEmpty. Operand 3973 states and 9173 transitions. [2019-12-28 05:18:11,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:11,764 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:11,764 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:11,764 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:11,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:11,765 INFO L82 PathProgramCache]: Analyzing trace with hash 538459467, now seen corresponding path program 1 times [2019-12-28 05:18:11,765 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:11,766 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1094603654] [2019-12-28 05:18:11,766 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:11,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:11,877 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:11,877 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1094603654] [2019-12-28 05:18:11,877 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:11,878 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 05:18:11,878 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1842492638] [2019-12-28 05:18:11,878 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:11,893 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:11,974 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 147 states and 195 transitions. [2019-12-28 05:18:11,974 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:11,975 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 05:18:11,975 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 05:18:11,976 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:11,976 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 05:18:11,976 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:18:11,976 INFO L87 Difference]: Start difference. First operand 3973 states and 9173 transitions. Second operand 8 states. [2019-12-28 05:18:12,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:12,473 INFO L93 Difference]: Finished difference Result 4920 states and 11315 transitions. [2019-12-28 05:18:12,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-28 05:18:12,473 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 92 [2019-12-28 05:18:12,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:12,479 INFO L225 Difference]: With dead ends: 4920 [2019-12-28 05:18:12,479 INFO L226 Difference]: Without dead ends: 4902 [2019-12-28 05:18:12,479 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=139, Unknown=0, NotChecked=0, Total=182 [2019-12-28 05:18:12,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4902 states. [2019-12-28 05:18:12,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4902 to 3360. [2019-12-28 05:18:12,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3360 states. [2019-12-28 05:18:12,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3360 states to 3360 states and 7870 transitions. [2019-12-28 05:18:12,517 INFO L78 Accepts]: Start accepts. Automaton has 3360 states and 7870 transitions. Word has length 92 [2019-12-28 05:18:12,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:12,517 INFO L462 AbstractCegarLoop]: Abstraction has 3360 states and 7870 transitions. [2019-12-28 05:18:12,517 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 05:18:12,518 INFO L276 IsEmpty]: Start isEmpty. Operand 3360 states and 7870 transitions. [2019-12-28 05:18:12,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:12,520 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:12,521 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:12,521 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:12,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:12,521 INFO L82 PathProgramCache]: Analyzing trace with hash 1500073484, now seen corresponding path program 1 times [2019-12-28 05:18:12,522 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:12,522 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1368915896] [2019-12-28 05:18:12,522 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:12,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:12,631 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:12,631 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1368915896] [2019-12-28 05:18:12,632 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:12,632 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:12,632 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [949495623] [2019-12-28 05:18:12,632 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:12,647 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:12,718 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 147 states and 195 transitions. [2019-12-28 05:18:12,718 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:12,719 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:12,719 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:18:12,719 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:12,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:18:12,720 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:18:12,720 INFO L87 Difference]: Start difference. First operand 3360 states and 7870 transitions. Second operand 6 states. [2019-12-28 05:18:12,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:12,930 INFO L93 Difference]: Finished difference Result 3063 states and 6997 transitions. [2019-12-28 05:18:12,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 05:18:12,931 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-12-28 05:18:12,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:12,935 INFO L225 Difference]: With dead ends: 3063 [2019-12-28 05:18:12,936 INFO L226 Difference]: Without dead ends: 3063 [2019-12-28 05:18:12,936 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:18:12,940 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3063 states. [2019-12-28 05:18:12,956 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3063 to 2170. [2019-12-28 05:18:12,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2170 states. [2019-12-28 05:18:12,959 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2170 states to 2170 states and 5090 transitions. [2019-12-28 05:18:12,960 INFO L78 Accepts]: Start accepts. Automaton has 2170 states and 5090 transitions. Word has length 92 [2019-12-28 05:18:12,960 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:12,960 INFO L462 AbstractCegarLoop]: Abstraction has 2170 states and 5090 transitions. [2019-12-28 05:18:12,960 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:18:12,960 INFO L276 IsEmpty]: Start isEmpty. Operand 2170 states and 5090 transitions. [2019-12-28 05:18:12,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:18:12,962 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:12,962 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:12,963 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:12,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:12,963 INFO L82 PathProgramCache]: Analyzing trace with hash -572704409, now seen corresponding path program 1 times [2019-12-28 05:18:12,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:12,964 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [690949306] [2019-12-28 05:18:12,964 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:12,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:13,046 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:13,047 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [690949306] [2019-12-28 05:18:13,047 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:13,047 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:18:13,047 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [819725978] [2019-12-28 05:18:13,047 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:13,065 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:13,254 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 188 states and 278 transitions. [2019-12-28 05:18:13,255 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:13,255 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:13,256 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:18:13,256 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:13,256 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:18:13,256 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:18:13,256 INFO L87 Difference]: Start difference. First operand 2170 states and 5090 transitions. Second operand 5 states. [2019-12-28 05:18:13,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:13,457 INFO L93 Difference]: Finished difference Result 2422 states and 5669 transitions. [2019-12-28 05:18:13,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 05:18:13,457 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-12-28 05:18:13,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:13,461 INFO L225 Difference]: With dead ends: 2422 [2019-12-28 05:18:13,461 INFO L226 Difference]: Without dead ends: 2404 [2019-12-28 05:18:13,462 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:13,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2404 states. [2019-12-28 05:18:13,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2404 to 2197. [2019-12-28 05:18:13,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2197 states. [2019-12-28 05:18:13,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2197 states to 2197 states and 5144 transitions. [2019-12-28 05:18:13,485 INFO L78 Accepts]: Start accepts. Automaton has 2197 states and 5144 transitions. Word has length 94 [2019-12-28 05:18:13,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:13,485 INFO L462 AbstractCegarLoop]: Abstraction has 2197 states and 5144 transitions. [2019-12-28 05:18:13,485 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:18:13,485 INFO L276 IsEmpty]: Start isEmpty. Operand 2197 states and 5144 transitions. [2019-12-28 05:18:13,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:18:13,487 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:13,487 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:13,488 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:13,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:13,488 INFO L82 PathProgramCache]: Analyzing trace with hash 672060072, now seen corresponding path program 1 times [2019-12-28 05:18:13,488 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:13,488 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1147930986] [2019-12-28 05:18:13,489 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:13,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:13,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:13,686 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1147930986] [2019-12-28 05:18:13,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:13,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-28 05:18:13,686 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2082699085] [2019-12-28 05:18:13,686 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:13,696 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:13,766 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 188 states and 278 transitions. [2019-12-28 05:18:13,766 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:14,072 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 16 times. [2019-12-28 05:18:14,073 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-28 05:18:14,073 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:14,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-28 05:18:14,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=371, Unknown=0, NotChecked=0, Total=420 [2019-12-28 05:18:14,074 INFO L87 Difference]: Start difference. First operand 2197 states and 5144 transitions. Second operand 21 states. [2019-12-28 05:18:14,301 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 43 [2019-12-28 05:18:16,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:16,828 INFO L93 Difference]: Finished difference Result 3710 states and 8699 transitions. [2019-12-28 05:18:16,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-28 05:18:16,828 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 94 [2019-12-28 05:18:16,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:16,833 INFO L225 Difference]: With dead ends: 3710 [2019-12-28 05:18:16,833 INFO L226 Difference]: Without dead ends: 3071 [2019-12-28 05:18:16,834 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 287 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=347, Invalid=1723, Unknown=0, NotChecked=0, Total=2070 [2019-12-28 05:18:16,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3071 states. [2019-12-28 05:18:16,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3071 to 2648. [2019-12-28 05:18:16,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2648 states. [2019-12-28 05:18:16,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2648 states to 2648 states and 6141 transitions. [2019-12-28 05:18:16,860 INFO L78 Accepts]: Start accepts. Automaton has 2648 states and 6141 transitions. Word has length 94 [2019-12-28 05:18:16,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:16,860 INFO L462 AbstractCegarLoop]: Abstraction has 2648 states and 6141 transitions. [2019-12-28 05:18:16,860 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-28 05:18:16,861 INFO L276 IsEmpty]: Start isEmpty. Operand 2648 states and 6141 transitions. [2019-12-28 05:18:16,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:18:16,863 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:16,863 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:16,863 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:16,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:16,863 INFO L82 PathProgramCache]: Analyzing trace with hash 718924530, now seen corresponding path program 2 times [2019-12-28 05:18:16,864 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:16,864 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1213803686] [2019-12-28 05:18:16,864 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:16,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 05:18:16,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 05:18:16,947 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-28 05:18:16,948 INFO L476 BasicCegarLoop]: Counterexample might be feasible [2019-12-28 05:18:17,112 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.12 05:18:17 BasicIcfg [2019-12-28 05:18:17,113 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-28 05:18:17,114 INFO L168 Benchmark]: Toolchain (without parser) took 91470.52 ms. Allocated memory was 143.7 MB in the beginning and 3.1 GB in the end (delta: 2.9 GB). Free memory was 99.5 MB in the beginning and 1.9 GB in the end (delta: -1.8 GB). Peak memory consumption was 1.1 GB. Max. memory is 7.1 GB. [2019-12-28 05:18:17,115 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 143.7 MB. Free memory was 119.9 MB in the beginning and 119.7 MB in the end (delta: 209.7 kB). Peak memory consumption was 209.7 kB. Max. memory is 7.1 GB. [2019-12-28 05:18:17,115 INFO L168 Benchmark]: CACSL2BoogieTranslator took 823.75 ms. Allocated memory was 143.7 MB in the beginning and 201.3 MB in the end (delta: 57.7 MB). Free memory was 99.3 MB in the beginning and 153.4 MB in the end (delta: -54.1 MB). Peak memory consumption was 20.4 MB. Max. memory is 7.1 GB. [2019-12-28 05:18:17,116 INFO L168 Benchmark]: Boogie Procedure Inliner took 67.57 ms. Allocated memory is still 201.3 MB. Free memory was 153.4 MB in the beginning and 150.6 MB in the end (delta: 2.8 MB). Peak memory consumption was 2.8 MB. Max. memory is 7.1 GB. [2019-12-28 05:18:17,116 INFO L168 Benchmark]: Boogie Preprocessor took 41.15 ms. Allocated memory is still 201.3 MB. Free memory was 150.6 MB in the beginning and 148.6 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 7.1 GB. [2019-12-28 05:18:17,116 INFO L168 Benchmark]: RCFGBuilder took 789.70 ms. Allocated memory is still 201.3 MB. Free memory was 148.6 MB in the beginning and 104.0 MB in the end (delta: 44.5 MB). Peak memory consumption was 44.5 MB. Max. memory is 7.1 GB. [2019-12-28 05:18:17,117 INFO L168 Benchmark]: TraceAbstraction took 89742.23 ms. Allocated memory was 201.3 MB in the beginning and 3.1 GB in the end (delta: 2.9 GB). Free memory was 104.0 MB in the beginning and 1.9 GB in the end (delta: -1.8 GB). Peak memory consumption was 1.0 GB. Max. memory is 7.1 GB. [2019-12-28 05:18:17,119 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 143.7 MB. Free memory was 119.9 MB in the beginning and 119.7 MB in the end (delta: 209.7 kB). Peak memory consumption was 209.7 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 823.75 ms. Allocated memory was 143.7 MB in the beginning and 201.3 MB in the end (delta: 57.7 MB). Free memory was 99.3 MB in the beginning and 153.4 MB in the end (delta: -54.1 MB). Peak memory consumption was 20.4 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 67.57 ms. Allocated memory is still 201.3 MB. Free memory was 153.4 MB in the beginning and 150.6 MB in the end (delta: 2.8 MB). Peak memory consumption was 2.8 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 41.15 ms. Allocated memory is still 201.3 MB. Free memory was 150.6 MB in the beginning and 148.6 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 7.1 GB. * RCFGBuilder took 789.70 ms. Allocated memory is still 201.3 MB. Free memory was 148.6 MB in the beginning and 104.0 MB in the end (delta: 44.5 MB). Peak memory consumption was 44.5 MB. Max. memory is 7.1 GB. * TraceAbstraction took 89742.23 ms. Allocated memory was 201.3 MB in the beginning and 3.1 GB in the end (delta: 2.9 GB). Free memory was 104.0 MB in the beginning and 1.9 GB in the end (delta: -1.8 GB). Peak memory consumption was 1.0 GB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L695] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0] [L696] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] 0 int x = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L700] 0 int y = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0] [L701] 0 _Bool y$flush_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0] [L702] 0 int y$mem_tmp; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0] [L703] 0 _Bool y$r_buff0_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0] [L704] 0 _Bool y$r_buff0_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0] [L705] 0 _Bool y$r_buff0_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0] [L706] 0 _Bool y$r_buff1_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0] [L707] 0 _Bool y$r_buff1_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0] [L708] 0 _Bool y$r_buff1_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0] [L709] 0 _Bool y$read_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0] [L710] 0 int *y$read_delayed_var; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}] [L711] 0 int y$w_buff0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0] [L712] 0 _Bool y$w_buff0_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0] [L713] 0 int y$w_buff1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0] [L714] 0 _Bool y$w_buff1_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L715] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L716] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L776] 0 pthread_t t2477; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L777] FCALL, FORK 0 pthread_create(&t2477, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L720] 1 y$w_buff1 = y$w_buff0 [L721] 1 y$w_buff0 = 2 [L722] 1 y$w_buff1_used = y$w_buff0_used [L723] 1 y$w_buff0_used = (_Bool)1 [L4] COND FALSE 1 !(!expression) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L725] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L726] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L727] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L728] 1 y$r_buff0_thd1 = (_Bool)1 [L731] 1 x = 1 VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L778] 0 pthread_t t2478; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L779] FCALL, FORK 0 pthread_create(&t2478, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L748] 2 x = 2 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L735] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L735] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L754] EXPR 2 y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L736] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L754] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y)=2, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L754] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L755] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L737] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L737] 1 y$r_buff0_thd1 = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$r_buff0_thd1 [L738] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L738] 1 y$r_buff1_thd1 = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$r_buff1_thd1 [L741] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L755] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L756] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used=0, y$w_buff1=0, y$w_buff1_used=0] [L756] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L757] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L758] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2=0, y$w_buff1=0, y$w_buff1_used=0] [L758] 2 y$r_buff1_thd2 = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$r_buff1_thd2 [L761] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] EXPR 0 y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L785] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L786] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L786] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L787] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L788] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L788] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L789] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L789] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 y$flush_delayed = weak$$choice2 [L795] 0 y$mem_tmp = y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L796] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L796] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L797] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L797] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L798] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L799] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L800] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L800] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 0 weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$r_buff0_thd0 = weak$$choice2 ? y$r_buff0_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff0_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0)) [L802] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] EXPR 0 y$flush_delayed ? y$mem_tmp : y VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y = y$flush_delayed ? y$mem_tmp : y [L805] 0 y$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=0, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 139 locations, 2 error locations. Result: UNSAFE, OverallTime: 89.4s, OverallIterations: 37, TraceHistogramMax: 1, AutomataDifference: 47.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10570 SDtfs, 14481 SDslu, 30044 SDs, 0 SdLazy, 19316 SolverSat, 1101 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 19.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 589 GetRequests, 163 SyntacticMatches, 17 SemanticMatches, 409 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1642 ImplicationChecksByTransitivity, 7.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=87235occurred in iteration=12, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 31.8s AutomataMinimizationTime, 36 MinimizatonAttempts, 403516 StatesRemovedByMinimization, 35 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 2.6s InterpolantComputationTime, 2822 NumberOfCodeBlocks, 2822 NumberOfCodeBlocksAsserted, 37 NumberOfCheckSat, 2692 ConstructedInterpolants, 0 QuantifiedInterpolants, 490986 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 36 InterpolantComputations, 36 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...