/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf -i ../../../trunk/examples/svcomp/pthread-wmm/safe029_pso.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-4336eb1 [2019-12-28 05:16:59,794 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-28 05:16:59,797 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-28 05:16:59,816 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-28 05:16:59,817 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-28 05:16:59,819 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-28 05:16:59,821 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-28 05:16:59,831 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-28 05:16:59,835 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-28 05:16:59,837 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-28 05:16:59,838 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-28 05:16:59,840 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-28 05:16:59,840 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-28 05:16:59,843 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-28 05:16:59,844 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-28 05:16:59,845 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-28 05:16:59,847 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-28 05:16:59,852 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-28 05:16:59,853 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-28 05:16:59,857 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-28 05:16:59,858 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-28 05:16:59,862 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-28 05:16:59,864 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-28 05:16:59,867 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-28 05:16:59,870 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2019-12-28 05:16:59,876 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-28 05:16:59,877 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-28 05:16:59,879 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-28 05:16:59,880 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-28 05:16:59,884 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-28 05:16:59,884 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-28 05:16:59,885 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-28 05:16:59,885 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-28 05:16:59,886 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-28 05:16:59,888 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-28 05:16:59,890 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-28 05:16:59,891 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf [2019-12-28 05:16:59,927 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-28 05:16:59,927 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-28 05:16:59,928 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-28 05:16:59,929 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-28 05:16:59,929 INFO L138 SettingsManager]: * Use SBE=true [2019-12-28 05:16:59,929 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-28 05:16:59,929 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-28 05:16:59,930 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-28 05:16:59,930 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-28 05:16:59,930 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-28 05:16:59,930 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-28 05:16:59,930 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-28 05:16:59,931 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-28 05:16:59,931 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-28 05:16:59,931 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-28 05:16:59,931 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-28 05:16:59,931 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-28 05:16:59,931 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-28 05:16:59,932 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-28 05:16:59,932 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-28 05:16:59,932 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-28 05:16:59,932 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 05:16:59,932 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-28 05:16:59,933 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-28 05:16:59,933 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-28 05:16:59,933 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-28 05:16:59,933 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-28 05:16:59,933 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2019-12-28 05:16:59,934 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2019-12-28 05:16:59,934 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-28 05:16:59,934 INFO L138 SettingsManager]: * Interpolant automaton=MCR [2019-12-28 05:16:59,934 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-28 05:17:00,221 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-28 05:17:00,236 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-28 05:17:00,240 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-28 05:17:00,242 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-28 05:17:00,242 INFO L275 PluginConnector]: CDTParser initialized [2019-12-28 05:17:00,246 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/safe029_pso.opt.i [2019-12-28 05:17:00,327 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9aa445a63/6581f9a125aa430bacc9add2e2946fe4/FLAGfd4da4282 [2019-12-28 05:17:00,903 INFO L306 CDTParser]: Found 1 translation units. [2019-12-28 05:17:00,904 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe029_pso.opt.i [2019-12-28 05:17:00,921 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9aa445a63/6581f9a125aa430bacc9add2e2946fe4/FLAGfd4da4282 [2019-12-28 05:17:01,211 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/9aa445a63/6581f9a125aa430bacc9add2e2946fe4 [2019-12-28 05:17:01,220 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-28 05:17:01,222 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-12-28 05:17:01,223 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-28 05:17:01,223 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-28 05:17:01,227 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-28 05:17:01,228 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 05:17:01" (1/1) ... [2019-12-28 05:17:01,231 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@75edc707 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01, skipping insertion in model container [2019-12-28 05:17:01,231 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 05:17:01" (1/1) ... [2019-12-28 05:17:01,239 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-28 05:17:01,300 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-28 05:17:01,807 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 05:17:01,820 INFO L203 MainTranslator]: Completed pre-run [2019-12-28 05:17:01,905 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 05:17:01,980 INFO L208 MainTranslator]: Completed translation [2019-12-28 05:17:01,980 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01 WrapperNode [2019-12-28 05:17:01,980 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-28 05:17:01,981 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-28 05:17:01,981 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-28 05:17:01,982 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-28 05:17:01,991 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01" (1/1) ... [2019-12-28 05:17:02,011 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01" (1/1) ... [2019-12-28 05:17:02,048 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-28 05:17:02,049 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-28 05:17:02,049 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-28 05:17:02,049 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-28 05:17:02,060 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01" (1/1) ... [2019-12-28 05:17:02,060 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01" (1/1) ... [2019-12-28 05:17:02,065 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01" (1/1) ... [2019-12-28 05:17:02,065 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01" (1/1) ... [2019-12-28 05:17:02,075 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01" (1/1) ... [2019-12-28 05:17:02,079 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01" (1/1) ... [2019-12-28 05:17:02,082 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01" (1/1) ... [2019-12-28 05:17:02,087 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-28 05:17:02,088 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-28 05:17:02,088 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-28 05:17:02,088 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-28 05:17:02,089 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 05:17:02,154 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-28 05:17:02,154 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-28 05:17:02,154 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-28 05:17:02,154 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-28 05:17:02,154 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-28 05:17:02,155 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-28 05:17:02,155 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-28 05:17:02,155 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-28 05:17:02,155 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-28 05:17:02,155 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-28 05:17:02,155 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-28 05:17:02,157 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-28 05:17:02,922 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-28 05:17:02,923 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-28 05:17:02,925 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 05:17:02 BoogieIcfgContainer [2019-12-28 05:17:02,925 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-28 05:17:02,927 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-28 05:17:02,927 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-28 05:17:02,936 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-28 05:17:02,938 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.12 05:17:01" (1/3) ... [2019-12-28 05:17:02,939 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@30b1235c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 05:17:02, skipping insertion in model container [2019-12-28 05:17:02,939 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:17:01" (2/3) ... [2019-12-28 05:17:02,939 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@30b1235c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 05:17:02, skipping insertion in model container [2019-12-28 05:17:02,941 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 05:17:02" (3/3) ... [2019-12-28 05:17:02,944 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_pso.opt.i [2019-12-28 05:17:02,957 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-28 05:17:02,957 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-28 05:17:02,967 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-28 05:17:02,968 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-28 05:17:03,002 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,002 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,003 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,003 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,004 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,004 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,004 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,004 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,005 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,005 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,005 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,006 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,006 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,006 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,006 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,007 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,007 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,007 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,008 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,008 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,008 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,008 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,009 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,009 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,009 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,010 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,010 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,010 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,010 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,011 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,012 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,012 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,012 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,012 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,012 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,013 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,013 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,013 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,014 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,014 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,014 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,015 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,015 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,015 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,015 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,025 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,025 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,025 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,026 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,026 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,026 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,026 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,027 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,027 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,027 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,031 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,031 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,032 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,032 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,032 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,032 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,032 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,034 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,035 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,035 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,035 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,035 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:17:03,052 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-28 05:17:03,074 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-28 05:17:03,074 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-28 05:17:03,075 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-28 05:17:03,075 INFO L376 AbstractCegarLoop]: Backedges is MCR [2019-12-28 05:17:03,075 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-28 05:17:03,075 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-28 05:17:03,075 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-28 05:17:03,076 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-28 05:17:03,091 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 145 places, 179 transitions [2019-12-28 05:17:04,453 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22493 states. [2019-12-28 05:17:04,455 INFO L276 IsEmpty]: Start isEmpty. Operand 22493 states. [2019-12-28 05:17:04,465 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-12-28 05:17:04,465 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:04,466 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:04,467 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:04,476 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:04,477 INFO L82 PathProgramCache]: Analyzing trace with hash -2054349026, now seen corresponding path program 1 times [2019-12-28 05:17:04,488 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:04,489 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1891277874] [2019-12-28 05:17:04,489 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:04,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:04,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:04,808 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1891277874] [2019-12-28 05:17:04,809 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:04,809 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:17:04,810 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [174954461] [2019-12-28 05:17:04,811 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:04,818 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:04,842 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 37 states and 36 transitions. [2019-12-28 05:17:04,843 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:04,848 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:04,848 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:17:04,849 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:04,861 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:17:04,862 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:17:04,864 INFO L87 Difference]: Start difference. First operand 22493 states. Second operand 4 states. [2019-12-28 05:17:05,475 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:05,475 INFO L93 Difference]: Finished difference Result 23445 states and 91746 transitions. [2019-12-28 05:17:05,476 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 05:17:05,477 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2019-12-28 05:17:05,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:05,699 INFO L225 Difference]: With dead ends: 23445 [2019-12-28 05:17:05,699 INFO L226 Difference]: Without dead ends: 21269 [2019-12-28 05:17:05,703 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:17:06,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21269 states. [2019-12-28 05:17:07,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21269 to 21269. [2019-12-28 05:17:07,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21269 states. [2019-12-28 05:17:07,580 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21269 states to 21269 states and 83770 transitions. [2019-12-28 05:17:07,582 INFO L78 Accepts]: Start accepts. Automaton has 21269 states and 83770 transitions. Word has length 36 [2019-12-28 05:17:07,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:07,582 INFO L462 AbstractCegarLoop]: Abstraction has 21269 states and 83770 transitions. [2019-12-28 05:17:07,583 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:17:07,583 INFO L276 IsEmpty]: Start isEmpty. Operand 21269 states and 83770 transitions. [2019-12-28 05:17:07,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-28 05:17:07,593 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:07,593 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:07,594 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:07,595 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:07,595 INFO L82 PathProgramCache]: Analyzing trace with hash 99870175, now seen corresponding path program 1 times [2019-12-28 05:17:07,596 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:07,596 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [757044604] [2019-12-28 05:17:07,596 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:07,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:07,791 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:07,791 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [757044604] [2019-12-28 05:17:07,792 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:07,792 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:17:07,793 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [509002133] [2019-12-28 05:17:07,793 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:07,802 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:07,815 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 72 states and 99 transitions. [2019-12-28 05:17:07,816 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:07,877 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:17:07,879 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:17:07,879 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:07,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:17:07,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:17:07,880 INFO L87 Difference]: Start difference. First operand 21269 states and 83770 transitions. Second operand 6 states. [2019-12-28 05:17:09,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:09,320 INFO L93 Difference]: Finished difference Result 34703 states and 129062 transitions. [2019-12-28 05:17:09,320 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:17:09,320 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-28 05:17:09,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:09,489 INFO L225 Difference]: With dead ends: 34703 [2019-12-28 05:17:09,489 INFO L226 Difference]: Without dead ends: 34559 [2019-12-28 05:17:09,492 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:17:09,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34559 states. [2019-12-28 05:17:11,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34559 to 33059. [2019-12-28 05:17:11,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33059 states. [2019-12-28 05:17:11,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33059 states to 33059 states and 123950 transitions. [2019-12-28 05:17:11,938 INFO L78 Accepts]: Start accepts. Automaton has 33059 states and 123950 transitions. Word has length 43 [2019-12-28 05:17:11,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:11,951 INFO L462 AbstractCegarLoop]: Abstraction has 33059 states and 123950 transitions. [2019-12-28 05:17:11,951 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:17:11,951 INFO L276 IsEmpty]: Start isEmpty. Operand 33059 states and 123950 transitions. [2019-12-28 05:17:11,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-28 05:17:11,963 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:11,964 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:11,967 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:11,967 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:11,968 INFO L82 PathProgramCache]: Analyzing trace with hash 268512672, now seen corresponding path program 1 times [2019-12-28 05:17:11,968 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:11,968 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1431548447] [2019-12-28 05:17:11,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:11,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:12,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:12,090 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1431548447] [2019-12-28 05:17:12,090 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:12,090 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:17:12,090 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2061110394] [2019-12-28 05:17:12,091 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:12,095 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:12,099 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 45 states and 44 transitions. [2019-12-28 05:17:12,100 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:12,100 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:12,101 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:17:12,101 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:12,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:17:12,102 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:17:12,102 INFO L87 Difference]: Start difference. First operand 33059 states and 123950 transitions. Second operand 5 states. [2019-12-28 05:17:12,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:12,735 INFO L93 Difference]: Finished difference Result 40211 states and 148619 transitions. [2019-12-28 05:17:12,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:17:12,736 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-12-28 05:17:12,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:13,007 INFO L225 Difference]: With dead ends: 40211 [2019-12-28 05:17:13,007 INFO L226 Difference]: Without dead ends: 40051 [2019-12-28 05:17:13,008 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:17:14,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40051 states. [2019-12-28 05:17:15,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40051 to 34632. [2019-12-28 05:17:15,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34632 states. [2019-12-28 05:17:15,585 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34632 states to 34632 states and 129246 transitions. [2019-12-28 05:17:15,585 INFO L78 Accepts]: Start accepts. Automaton has 34632 states and 129246 transitions. Word has length 44 [2019-12-28 05:17:15,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:15,586 INFO L462 AbstractCegarLoop]: Abstraction has 34632 states and 129246 transitions. [2019-12-28 05:17:15,586 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:17:15,586 INFO L276 IsEmpty]: Start isEmpty. Operand 34632 states and 129246 transitions. [2019-12-28 05:17:15,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-28 05:17:15,608 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:15,608 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:15,608 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:15,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:15,609 INFO L82 PathProgramCache]: Analyzing trace with hash 2144969569, now seen corresponding path program 1 times [2019-12-28 05:17:15,614 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:15,614 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [191005000] [2019-12-28 05:17:15,614 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:15,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:15,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:15,769 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [191005000] [2019-12-28 05:17:15,769 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:15,770 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:17:15,771 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2084032763] [2019-12-28 05:17:15,771 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:15,778 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:15,790 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 94 states and 135 transitions. [2019-12-28 05:17:15,790 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:15,825 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:17:15,826 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:17:15,826 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:15,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:17:15,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:17:15,828 INFO L87 Difference]: Start difference. First operand 34632 states and 129246 transitions. Second operand 7 states. [2019-12-28 05:17:16,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:16,955 INFO L93 Difference]: Finished difference Result 45660 states and 166140 transitions. [2019-12-28 05:17:16,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-28 05:17:16,956 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 51 [2019-12-28 05:17:16,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:17,211 INFO L225 Difference]: With dead ends: 45660 [2019-12-28 05:17:17,212 INFO L226 Difference]: Without dead ends: 45516 [2019-12-28 05:17:17,212 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=173, Unknown=0, NotChecked=0, Total=240 [2019-12-28 05:17:17,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45516 states. [2019-12-28 05:17:18,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45516 to 33595. [2019-12-28 05:17:18,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33595 states. [2019-12-28 05:17:18,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33595 states to 33595 states and 125401 transitions. [2019-12-28 05:17:18,597 INFO L78 Accepts]: Start accepts. Automaton has 33595 states and 125401 transitions. Word has length 51 [2019-12-28 05:17:18,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:18,597 INFO L462 AbstractCegarLoop]: Abstraction has 33595 states and 125401 transitions. [2019-12-28 05:17:18,598 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:17:18,598 INFO L276 IsEmpty]: Start isEmpty. Operand 33595 states and 125401 transitions. [2019-12-28 05:17:18,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-28 05:17:18,629 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:18,629 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:18,629 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:18,630 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:18,630 INFO L82 PathProgramCache]: Analyzing trace with hash -1490455740, now seen corresponding path program 1 times [2019-12-28 05:17:18,630 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:18,631 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [69374533] [2019-12-28 05:17:18,631 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:18,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:18,751 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:18,752 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [69374533] [2019-12-28 05:17:18,752 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:18,752 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:17:18,753 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1101306501] [2019-12-28 05:17:18,753 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:18,761 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:19,835 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 59 states and 58 transitions. [2019-12-28 05:17:19,836 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:19,836 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:19,837 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:17:19,837 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:19,837 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:17:19,837 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:17:19,838 INFO L87 Difference]: Start difference. First operand 33595 states and 125401 transitions. Second operand 6 states. [2019-12-28 05:17:20,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:20,549 INFO L93 Difference]: Finished difference Result 46067 states and 167834 transitions. [2019-12-28 05:17:20,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 05:17:20,550 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-28 05:17:20,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:20,649 INFO L225 Difference]: With dead ends: 46067 [2019-12-28 05:17:20,649 INFO L226 Difference]: Without dead ends: 45827 [2019-12-28 05:17:20,650 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-28 05:17:20,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45827 states. [2019-12-28 05:17:21,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45827 to 39956. [2019-12-28 05:17:21,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39956 states. [2019-12-28 05:17:21,581 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39956 states to 39956 states and 147325 transitions. [2019-12-28 05:17:21,582 INFO L78 Accepts]: Start accepts. Automaton has 39956 states and 147325 transitions. Word has length 58 [2019-12-28 05:17:21,582 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:21,582 INFO L462 AbstractCegarLoop]: Abstraction has 39956 states and 147325 transitions. [2019-12-28 05:17:21,582 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:17:21,582 INFO L276 IsEmpty]: Start isEmpty. Operand 39956 states and 147325 transitions. [2019-12-28 05:17:21,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-28 05:17:21,614 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:21,614 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:21,615 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:21,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:21,615 INFO L82 PathProgramCache]: Analyzing trace with hash -1015725706, now seen corresponding path program 1 times [2019-12-28 05:17:21,616 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:21,616 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1896114201] [2019-12-28 05:17:21,616 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:21,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:21,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:21,670 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1896114201] [2019-12-28 05:17:21,671 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:21,671 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:17:21,671 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [41182894] [2019-12-28 05:17:21,671 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:21,680 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:21,691 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 61 states and 60 transitions. [2019-12-28 05:17:21,691 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:21,692 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:21,692 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:17:21,692 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:21,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:17:21,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:21,693 INFO L87 Difference]: Start difference. First operand 39956 states and 147325 transitions. Second operand 3 states. [2019-12-28 05:17:21,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:21,939 INFO L93 Difference]: Finished difference Result 50254 states and 182160 transitions. [2019-12-28 05:17:21,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:17:21,940 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2019-12-28 05:17:21,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:22,043 INFO L225 Difference]: With dead ends: 50254 [2019-12-28 05:17:22,043 INFO L226 Difference]: Without dead ends: 50254 [2019-12-28 05:17:22,044 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:22,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50254 states. [2019-12-28 05:17:23,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50254 to 43886. [2019-12-28 05:17:23,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43886 states. [2019-12-28 05:17:25,562 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43886 states to 43886 states and 160763 transitions. [2019-12-28 05:17:25,562 INFO L78 Accepts]: Start accepts. Automaton has 43886 states and 160763 transitions. Word has length 60 [2019-12-28 05:17:25,562 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:25,563 INFO L462 AbstractCegarLoop]: Abstraction has 43886 states and 160763 transitions. [2019-12-28 05:17:25,563 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:17:25,563 INFO L276 IsEmpty]: Start isEmpty. Operand 43886 states and 160763 transitions. [2019-12-28 05:17:25,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-28 05:17:25,597 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:25,598 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:25,598 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:25,598 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:25,598 INFO L82 PathProgramCache]: Analyzing trace with hash 1067966230, now seen corresponding path program 1 times [2019-12-28 05:17:25,598 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:25,599 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1679639753] [2019-12-28 05:17:25,599 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:25,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:25,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:25,697 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1679639753] [2019-12-28 05:17:25,698 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:25,698 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:17:25,698 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [826569397] [2019-12-28 05:17:25,698 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:25,711 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:25,724 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 65 states and 64 transitions. [2019-12-28 05:17:25,724 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:25,725 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:25,725 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:17:25,725 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:25,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:17:25,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:17:25,727 INFO L87 Difference]: Start difference. First operand 43886 states and 160763 transitions. Second operand 7 states. [2019-12-28 05:17:26,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:26,792 INFO L93 Difference]: Finished difference Result 55882 states and 200497 transitions. [2019-12-28 05:17:26,792 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-28 05:17:26,792 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-28 05:17:26,792 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:26,915 INFO L225 Difference]: With dead ends: 55882 [2019-12-28 05:17:26,915 INFO L226 Difference]: Without dead ends: 55642 [2019-12-28 05:17:26,915 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-12-28 05:17:27,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55642 states. [2019-12-28 05:17:27,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55642 to 45112. [2019-12-28 05:17:27,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45112 states. [2019-12-28 05:17:27,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45112 states to 45112 states and 164930 transitions. [2019-12-28 05:17:27,995 INFO L78 Accepts]: Start accepts. Automaton has 45112 states and 164930 transitions. Word has length 64 [2019-12-28 05:17:27,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:27,996 INFO L462 AbstractCegarLoop]: Abstraction has 45112 states and 164930 transitions. [2019-12-28 05:17:27,996 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:17:27,996 INFO L276 IsEmpty]: Start isEmpty. Operand 45112 states and 164930 transitions. [2019-12-28 05:17:28,031 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-28 05:17:28,032 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:28,032 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:28,032 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:28,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:28,033 INFO L82 PathProgramCache]: Analyzing trace with hash -2097396923, now seen corresponding path program 1 times [2019-12-28 05:17:28,033 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:28,034 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079831873] [2019-12-28 05:17:28,034 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:28,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:28,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:28,127 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1079831873] [2019-12-28 05:17:28,128 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:28,128 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:17:28,128 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [501250422] [2019-12-28 05:17:28,128 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:28,139 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:28,162 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 108 states and 149 transitions. [2019-12-28 05:17:28,162 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:28,183 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:17:28,184 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 05:17:28,184 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:28,184 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 05:17:28,184 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:17:28,185 INFO L87 Difference]: Start difference. First operand 45112 states and 164930 transitions. Second operand 8 states. [2019-12-28 05:17:29,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:29,455 INFO L93 Difference]: Finished difference Result 55096 states and 197674 transitions. [2019-12-28 05:17:29,456 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-28 05:17:29,456 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 65 [2019-12-28 05:17:29,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:30,002 INFO L225 Difference]: With dead ends: 55096 [2019-12-28 05:17:30,002 INFO L226 Difference]: Without dead ends: 54896 [2019-12-28 05:17:30,003 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=117, Invalid=389, Unknown=0, NotChecked=0, Total=506 [2019-12-28 05:17:30,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54896 states. [2019-12-28 05:17:30,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54896 to 45990. [2019-12-28 05:17:30,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45990 states. [2019-12-28 05:17:30,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45990 states to 45990 states and 167801 transitions. [2019-12-28 05:17:30,873 INFO L78 Accepts]: Start accepts. Automaton has 45990 states and 167801 transitions. Word has length 65 [2019-12-28 05:17:30,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:30,874 INFO L462 AbstractCegarLoop]: Abstraction has 45990 states and 167801 transitions. [2019-12-28 05:17:30,874 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 05:17:30,874 INFO L276 IsEmpty]: Start isEmpty. Operand 45990 states and 167801 transitions. [2019-12-28 05:17:30,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:17:30,909 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:30,909 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:30,909 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:30,909 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:30,910 INFO L82 PathProgramCache]: Analyzing trace with hash 823868575, now seen corresponding path program 1 times [2019-12-28 05:17:30,910 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:30,910 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1315238543] [2019-12-28 05:17:30,910 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:30,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:31,038 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:31,038 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1315238543] [2019-12-28 05:17:31,039 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:31,039 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:17:31,041 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [15537972] [2019-12-28 05:17:31,041 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:31,052 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:31,065 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 70 states and 71 transitions. [2019-12-28 05:17:31,065 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:31,065 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:31,066 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:17:31,066 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:31,066 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:17:31,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:17:31,068 INFO L87 Difference]: Start difference. First operand 45990 states and 167801 transitions. Second operand 6 states. [2019-12-28 05:17:32,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:32,175 INFO L93 Difference]: Finished difference Result 65550 states and 237328 transitions. [2019-12-28 05:17:32,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:17:32,176 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-28 05:17:32,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:32,326 INFO L225 Difference]: With dead ends: 65550 [2019-12-28 05:17:32,326 INFO L226 Difference]: Without dead ends: 64906 [2019-12-28 05:17:32,326 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:17:32,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64906 states. [2019-12-28 05:17:35,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64906 to 56040. [2019-12-28 05:17:35,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56040 states. [2019-12-28 05:17:35,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56040 states to 56040 states and 204331 transitions. [2019-12-28 05:17:35,686 INFO L78 Accepts]: Start accepts. Automaton has 56040 states and 204331 transitions. Word has length 67 [2019-12-28 05:17:35,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:35,686 INFO L462 AbstractCegarLoop]: Abstraction has 56040 states and 204331 transitions. [2019-12-28 05:17:35,686 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:17:35,686 INFO L276 IsEmpty]: Start isEmpty. Operand 56040 states and 204331 transitions. [2019-12-28 05:17:35,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:17:35,738 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:35,739 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:35,739 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:35,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:35,739 INFO L82 PathProgramCache]: Analyzing trace with hash 1785482592, now seen corresponding path program 1 times [2019-12-28 05:17:35,740 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:35,740 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1194071159] [2019-12-28 05:17:35,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:35,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:35,848 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:35,848 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1194071159] [2019-12-28 05:17:35,848 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:35,848 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:17:35,849 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1905347728] [2019-12-28 05:17:35,849 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:35,860 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:35,871 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 70 states and 71 transitions. [2019-12-28 05:17:35,872 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:35,872 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:35,872 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:17:35,873 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:35,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:17:35,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:17:35,873 INFO L87 Difference]: Start difference. First operand 56040 states and 204331 transitions. Second operand 7 states. [2019-12-28 05:17:37,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:37,012 INFO L93 Difference]: Finished difference Result 83028 states and 292759 transitions. [2019-12-28 05:17:37,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-28 05:17:37,013 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-28 05:17:37,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:37,195 INFO L225 Difference]: With dead ends: 83028 [2019-12-28 05:17:37,195 INFO L226 Difference]: Without dead ends: 83028 [2019-12-28 05:17:37,195 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:17:37,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83028 states. [2019-12-28 05:17:38,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83028 to 76077. [2019-12-28 05:17:38,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76077 states. [2019-12-28 05:17:39,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76077 states to 76077 states and 270626 transitions. [2019-12-28 05:17:39,032 INFO L78 Accepts]: Start accepts. Automaton has 76077 states and 270626 transitions. Word has length 67 [2019-12-28 05:17:39,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:39,032 INFO L462 AbstractCegarLoop]: Abstraction has 76077 states and 270626 transitions. [2019-12-28 05:17:39,033 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:17:39,033 INFO L276 IsEmpty]: Start isEmpty. Operand 76077 states and 270626 transitions. [2019-12-28 05:17:39,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:17:39,108 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:39,108 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:39,108 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:39,108 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:39,109 INFO L82 PathProgramCache]: Analyzing trace with hash -1264720223, now seen corresponding path program 1 times [2019-12-28 05:17:39,109 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:39,109 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [481832471] [2019-12-28 05:17:39,109 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:39,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:39,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:39,227 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [481832471] [2019-12-28 05:17:39,227 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:39,227 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:17:39,228 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [109009419] [2019-12-28 05:17:39,228 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:39,238 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:39,250 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 70 states and 71 transitions. [2019-12-28 05:17:39,250 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:39,254 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:17:39,255 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:17:39,255 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:39,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:17:39,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:17:39,256 INFO L87 Difference]: Start difference. First operand 76077 states and 270626 transitions. Second operand 4 states. [2019-12-28 05:17:39,354 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:39,354 INFO L93 Difference]: Finished difference Result 17222 states and 54504 transitions. [2019-12-28 05:17:39,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:17:39,355 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-28 05:17:39,355 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:39,388 INFO L225 Difference]: With dead ends: 17222 [2019-12-28 05:17:39,388 INFO L226 Difference]: Without dead ends: 16744 [2019-12-28 05:17:39,389 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:17:39,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16744 states. [2019-12-28 05:17:40,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16744 to 16732. [2019-12-28 05:17:40,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16732 states. [2019-12-28 05:17:40,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16732 states to 16732 states and 52999 transitions. [2019-12-28 05:17:40,248 INFO L78 Accepts]: Start accepts. Automaton has 16732 states and 52999 transitions. Word has length 67 [2019-12-28 05:17:40,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:40,249 INFO L462 AbstractCegarLoop]: Abstraction has 16732 states and 52999 transitions. [2019-12-28 05:17:40,249 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:17:40,249 INFO L276 IsEmpty]: Start isEmpty. Operand 16732 states and 52999 transitions. [2019-12-28 05:17:40,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-28 05:17:40,260 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:40,261 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:40,261 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:40,261 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:40,261 INFO L82 PathProgramCache]: Analyzing trace with hash -357405743, now seen corresponding path program 1 times [2019-12-28 05:17:40,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:40,262 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1801287517] [2019-12-28 05:17:40,262 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:40,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:40,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:40,335 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1801287517] [2019-12-28 05:17:40,335 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:40,335 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:17:40,335 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1249920084] [2019-12-28 05:17:40,335 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:40,352 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:40,392 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 130 states and 181 transitions. [2019-12-28 05:17:40,392 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:40,426 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 05:17:40,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:17:40,427 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:40,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:17:40,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:17:40,427 INFO L87 Difference]: Start difference. First operand 16732 states and 52999 transitions. Second operand 6 states. [2019-12-28 05:17:40,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:40,716 INFO L93 Difference]: Finished difference Result 22096 states and 69080 transitions. [2019-12-28 05:17:40,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:17:40,717 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 77 [2019-12-28 05:17:40,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:40,749 INFO L225 Difference]: With dead ends: 22096 [2019-12-28 05:17:40,749 INFO L226 Difference]: Without dead ends: 22096 [2019-12-28 05:17:40,749 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:17:40,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22096 states. [2019-12-28 05:17:40,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22096 to 17608. [2019-12-28 05:17:40,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17608 states. [2019-12-28 05:17:40,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17608 states to 17608 states and 55558 transitions. [2019-12-28 05:17:40,998 INFO L78 Accepts]: Start accepts. Automaton has 17608 states and 55558 transitions. Word has length 77 [2019-12-28 05:17:40,999 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:40,999 INFO L462 AbstractCegarLoop]: Abstraction has 17608 states and 55558 transitions. [2019-12-28 05:17:40,999 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:17:40,999 INFO L276 IsEmpty]: Start isEmpty. Operand 17608 states and 55558 transitions. [2019-12-28 05:17:41,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-28 05:17:41,011 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:41,012 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:41,012 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:41,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:41,012 INFO L82 PathProgramCache]: Analyzing trace with hash -612142288, now seen corresponding path program 1 times [2019-12-28 05:17:41,013 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:41,013 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114952153] [2019-12-28 05:17:41,013 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:41,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:41,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:41,130 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114952153] [2019-12-28 05:17:41,130 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:41,131 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 05:17:41,131 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [88312247] [2019-12-28 05:17:41,131 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:41,171 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:41,211 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 130 states and 181 transitions. [2019-12-28 05:17:41,211 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:41,234 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:17:41,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 05:17:41,234 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:41,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 05:17:41,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:17:41,235 INFO L87 Difference]: Start difference. First operand 17608 states and 55558 transitions. Second operand 9 states. [2019-12-28 05:17:42,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:42,494 INFO L93 Difference]: Finished difference Result 19702 states and 61634 transitions. [2019-12-28 05:17:42,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-28 05:17:42,495 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 77 [2019-12-28 05:17:42,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:42,525 INFO L225 Difference]: With dead ends: 19702 [2019-12-28 05:17:42,526 INFO L226 Difference]: Without dead ends: 19654 [2019-12-28 05:17:42,526 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=175, Invalid=637, Unknown=0, NotChecked=0, Total=812 [2019-12-28 05:17:42,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19654 states. [2019-12-28 05:17:42,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19654 to 15526. [2019-12-28 05:17:42,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15526 states. [2019-12-28 05:17:42,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15526 states to 15526 states and 49292 transitions. [2019-12-28 05:17:42,764 INFO L78 Accepts]: Start accepts. Automaton has 15526 states and 49292 transitions. Word has length 77 [2019-12-28 05:17:42,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:42,764 INFO L462 AbstractCegarLoop]: Abstraction has 15526 states and 49292 transitions. [2019-12-28 05:17:42,765 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 05:17:42,765 INFO L276 IsEmpty]: Start isEmpty. Operand 15526 states and 49292 transitions. [2019-12-28 05:17:42,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-12-28 05:17:42,778 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:42,778 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:42,779 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:42,779 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:42,779 INFO L82 PathProgramCache]: Analyzing trace with hash -2124522827, now seen corresponding path program 1 times [2019-12-28 05:17:42,780 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:42,780 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [712781669] [2019-12-28 05:17:42,780 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:42,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:42,816 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:42,816 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [712781669] [2019-12-28 05:17:42,817 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:42,817 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:17:42,817 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [867386945] [2019-12-28 05:17:42,817 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:42,832 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:42,856 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 84 states and 88 transitions. [2019-12-28 05:17:42,856 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:42,857 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:42,857 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:17:42,857 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:42,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:17:42,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:42,858 INFO L87 Difference]: Start difference. First operand 15526 states and 49292 transitions. Second operand 3 states. [2019-12-28 05:17:43,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:43,258 INFO L93 Difference]: Finished difference Result 16790 states and 53005 transitions. [2019-12-28 05:17:43,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:17:43,258 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 78 [2019-12-28 05:17:43,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:43,292 INFO L225 Difference]: With dead ends: 16790 [2019-12-28 05:17:43,292 INFO L226 Difference]: Without dead ends: 16790 [2019-12-28 05:17:43,292 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:43,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16790 states. [2019-12-28 05:17:43,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16790 to 16142. [2019-12-28 05:17:43,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16142 states. [2019-12-28 05:17:43,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16142 states to 16142 states and 51106 transitions. [2019-12-28 05:17:43,520 INFO L78 Accepts]: Start accepts. Automaton has 16142 states and 51106 transitions. Word has length 78 [2019-12-28 05:17:43,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:43,520 INFO L462 AbstractCegarLoop]: Abstraction has 16142 states and 51106 transitions. [2019-12-28 05:17:43,520 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:17:43,520 INFO L276 IsEmpty]: Start isEmpty. Operand 16142 states and 51106 transitions. [2019-12-28 05:17:43,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-12-28 05:17:43,534 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:43,534 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:43,534 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:43,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:43,535 INFO L82 PathProgramCache]: Analyzing trace with hash 2047654897, now seen corresponding path program 1 times [2019-12-28 05:17:43,535 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:43,535 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1891799281] [2019-12-28 05:17:43,536 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:43,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:43,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:43,607 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1891799281] [2019-12-28 05:17:43,607 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:43,608 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:17:43,608 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1842791354] [2019-12-28 05:17:43,608 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:43,617 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:43,633 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 80 states and 79 transitions. [2019-12-28 05:17:43,633 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:43,634 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:43,634 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:17:43,634 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:43,634 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:17:43,634 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:17:43,635 INFO L87 Difference]: Start difference. First operand 16142 states and 51106 transitions. Second operand 4 states. [2019-12-28 05:17:44,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:44,007 INFO L93 Difference]: Finished difference Result 19270 states and 60152 transitions. [2019-12-28 05:17:44,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 05:17:44,008 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-12-28 05:17:44,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:44,037 INFO L225 Difference]: With dead ends: 19270 [2019-12-28 05:17:44,038 INFO L226 Difference]: Without dead ends: 19270 [2019-12-28 05:17:44,038 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:17:44,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19270 states. [2019-12-28 05:17:44,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19270 to 18247. [2019-12-28 05:17:44,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18247 states. [2019-12-28 05:17:44,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18247 states to 18247 states and 57268 transitions. [2019-12-28 05:17:44,291 INFO L78 Accepts]: Start accepts. Automaton has 18247 states and 57268 transitions. Word has length 79 [2019-12-28 05:17:44,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:44,291 INFO L462 AbstractCegarLoop]: Abstraction has 18247 states and 57268 transitions. [2019-12-28 05:17:44,291 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:17:44,291 INFO L276 IsEmpty]: Start isEmpty. Operand 18247 states and 57268 transitions. [2019-12-28 05:17:44,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-12-28 05:17:44,308 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:44,308 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:44,308 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:44,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:44,308 INFO L82 PathProgramCache]: Analyzing trace with hash 111994610, now seen corresponding path program 1 times [2019-12-28 05:17:44,309 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:44,309 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895196932] [2019-12-28 05:17:44,309 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:44,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:44,357 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:44,358 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1895196932] [2019-12-28 05:17:44,358 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:44,358 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:17:44,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1232866253] [2019-12-28 05:17:44,359 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:44,373 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:44,393 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 80 states and 79 transitions. [2019-12-28 05:17:44,394 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:44,394 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:44,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:17:44,395 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:44,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:17:44,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:44,395 INFO L87 Difference]: Start difference. First operand 18247 states and 57268 transitions. Second operand 3 states. [2019-12-28 05:17:44,665 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:44,666 INFO L93 Difference]: Finished difference Result 19578 states and 61167 transitions. [2019-12-28 05:17:44,666 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:17:44,666 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-12-28 05:17:44,666 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:44,696 INFO L225 Difference]: With dead ends: 19578 [2019-12-28 05:17:44,696 INFO L226 Difference]: Without dead ends: 19578 [2019-12-28 05:17:44,696 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:17:44,730 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19578 states. [2019-12-28 05:17:44,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19578 to 18919. [2019-12-28 05:17:44,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18919 states. [2019-12-28 05:17:44,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18919 states to 18919 states and 59232 transitions. [2019-12-28 05:17:44,951 INFO L78 Accepts]: Start accepts. Automaton has 18919 states and 59232 transitions. Word has length 79 [2019-12-28 05:17:44,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:44,952 INFO L462 AbstractCegarLoop]: Abstraction has 18919 states and 59232 transitions. [2019-12-28 05:17:44,952 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:17:44,952 INFO L276 IsEmpty]: Start isEmpty. Operand 18919 states and 59232 transitions. [2019-12-28 05:17:44,967 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:17:44,967 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:44,967 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:44,967 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:44,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:44,968 INFO L82 PathProgramCache]: Analyzing trace with hash 1909076484, now seen corresponding path program 1 times [2019-12-28 05:17:44,968 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:44,969 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [309133518] [2019-12-28 05:17:44,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:44,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:45,084 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:45,085 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [309133518] [2019-12-28 05:17:45,085 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:45,085 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:17:45,086 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [410455970] [2019-12-28 05:17:45,086 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:45,101 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:45,284 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 136 states and 190 transitions. [2019-12-28 05:17:45,284 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:45,285 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:45,285 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:17:45,285 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:45,286 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:17:45,286 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:17:45,286 INFO L87 Difference]: Start difference. First operand 18919 states and 59232 transitions. Second operand 6 states. [2019-12-28 05:17:46,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:46,181 INFO L93 Difference]: Finished difference Result 30232 states and 93411 transitions. [2019-12-28 05:17:46,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 05:17:46,181 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-12-28 05:17:46,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:46,227 INFO L225 Difference]: With dead ends: 30232 [2019-12-28 05:17:46,227 INFO L226 Difference]: Without dead ends: 30232 [2019-12-28 05:17:46,227 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:17:46,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30232 states. [2019-12-28 05:17:46,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30232 to 21553. [2019-12-28 05:17:46,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21553 states. [2019-12-28 05:17:46,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21553 states to 21553 states and 66907 transitions. [2019-12-28 05:17:46,598 INFO L78 Accepts]: Start accepts. Automaton has 21553 states and 66907 transitions. Word has length 80 [2019-12-28 05:17:46,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:46,598 INFO L462 AbstractCegarLoop]: Abstraction has 21553 states and 66907 transitions. [2019-12-28 05:17:46,598 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:17:46,598 INFO L276 IsEmpty]: Start isEmpty. Operand 21553 states and 66907 transitions. [2019-12-28 05:17:46,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:17:46,616 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:46,616 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:46,617 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:46,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:46,617 INFO L82 PathProgramCache]: Analyzing trace with hash -1141126331, now seen corresponding path program 1 times [2019-12-28 05:17:46,617 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:46,618 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1482992806] [2019-12-28 05:17:46,618 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:46,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:46,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:46,679 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1482992806] [2019-12-28 05:17:46,679 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:46,679 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:17:46,680 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [899035661] [2019-12-28 05:17:46,680 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:46,694 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:46,735 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 136 states and 190 transitions. [2019-12-28 05:17:46,735 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:46,851 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:17:46,852 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:17:46,852 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:46,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:17:46,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:17:46,853 INFO L87 Difference]: Start difference. First operand 21553 states and 66907 transitions. Second operand 7 states. [2019-12-28 05:17:47,773 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:47,773 INFO L93 Difference]: Finished difference Result 28569 states and 87453 transitions. [2019-12-28 05:17:47,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:17:47,774 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-12-28 05:17:47,774 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:47,817 INFO L225 Difference]: With dead ends: 28569 [2019-12-28 05:17:47,817 INFO L226 Difference]: Without dead ends: 28569 [2019-12-28 05:17:47,818 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:17:47,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28569 states. [2019-12-28 05:17:48,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28569 to 25906. [2019-12-28 05:17:48,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25906 states. [2019-12-28 05:17:48,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25906 states to 25906 states and 79893 transitions. [2019-12-28 05:17:48,189 INFO L78 Accepts]: Start accepts. Automaton has 25906 states and 79893 transitions. Word has length 80 [2019-12-28 05:17:48,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:48,189 INFO L462 AbstractCegarLoop]: Abstraction has 25906 states and 79893 transitions. [2019-12-28 05:17:48,189 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:17:48,189 INFO L276 IsEmpty]: Start isEmpty. Operand 25906 states and 79893 transitions. [2019-12-28 05:17:48,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:17:48,212 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:48,212 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:48,213 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:48,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:48,213 INFO L82 PathProgramCache]: Analyzing trace with hash -502495842, now seen corresponding path program 1 times [2019-12-28 05:17:48,213 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:48,214 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [291455656] [2019-12-28 05:17:48,214 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:48,248 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:48,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:48,314 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [291455656] [2019-12-28 05:17:48,315 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:48,315 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:17:48,315 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [24835366] [2019-12-28 05:17:48,315 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:48,331 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:48,368 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 118 states and 153 transitions. [2019-12-28 05:17:48,368 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:48,369 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:17:48,371 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:17:48,371 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:48,371 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:17:48,371 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:17:48,371 INFO L87 Difference]: Start difference. First operand 25906 states and 79893 transitions. Second operand 5 states. [2019-12-28 05:17:48,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:48,620 INFO L93 Difference]: Finished difference Result 26880 states and 82704 transitions. [2019-12-28 05:17:48,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:17:48,620 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 80 [2019-12-28 05:17:48,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:48,867 INFO L225 Difference]: With dead ends: 26880 [2019-12-28 05:17:48,868 INFO L226 Difference]: Without dead ends: 26880 [2019-12-28 05:17:48,868 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:17:48,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26880 states. [2019-12-28 05:17:49,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26880 to 26365. [2019-12-28 05:17:49,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26365 states. [2019-12-28 05:17:49,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26365 states to 26365 states and 81218 transitions. [2019-12-28 05:17:49,468 INFO L78 Accepts]: Start accepts. Automaton has 26365 states and 81218 transitions. Word has length 80 [2019-12-28 05:17:49,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:49,468 INFO L462 AbstractCegarLoop]: Abstraction has 26365 states and 81218 transitions. [2019-12-28 05:17:49,468 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:17:49,468 INFO L276 IsEmpty]: Start isEmpty. Operand 26365 states and 81218 transitions. [2019-12-28 05:17:49,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:17:49,497 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:49,497 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:49,498 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:49,498 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:49,498 INFO L82 PathProgramCache]: Analyzing trace with hash 1222985055, now seen corresponding path program 1 times [2019-12-28 05:17:49,498 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:49,499 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [13088884] [2019-12-28 05:17:49,499 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:49,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:49,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:49,622 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [13088884] [2019-12-28 05:17:49,622 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:49,622 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-28 05:17:49,623 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [873996977] [2019-12-28 05:17:49,623 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:49,646 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:49,689 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 118 states and 153 transitions. [2019-12-28 05:17:49,690 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:49,773 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 05:17:49,773 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-28 05:17:49,773 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:49,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-28 05:17:49,774 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2019-12-28 05:17:49,775 INFO L87 Difference]: Start difference. First operand 26365 states and 81218 transitions. Second operand 11 states. [2019-12-28 05:17:53,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:53,846 INFO L93 Difference]: Finished difference Result 47314 states and 142923 transitions. [2019-12-28 05:17:53,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-28 05:17:53,848 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 80 [2019-12-28 05:17:53,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:53,922 INFO L225 Difference]: With dead ends: 47314 [2019-12-28 05:17:53,922 INFO L226 Difference]: Without dead ends: 46786 [2019-12-28 05:17:53,923 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=98, Invalid=408, Unknown=0, NotChecked=0, Total=506 [2019-12-28 05:17:53,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46786 states. [2019-12-28 05:17:54,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46786 to 32360. [2019-12-28 05:17:54,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32360 states. [2019-12-28 05:17:54,780 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32360 states to 32360 states and 100100 transitions. [2019-12-28 05:17:54,781 INFO L78 Accepts]: Start accepts. Automaton has 32360 states and 100100 transitions. Word has length 80 [2019-12-28 05:17:54,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:54,781 INFO L462 AbstractCegarLoop]: Abstraction has 32360 states and 100100 transitions. [2019-12-28 05:17:54,781 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-28 05:17:54,781 INFO L276 IsEmpty]: Start isEmpty. Operand 32360 states and 100100 transitions. [2019-12-28 05:17:54,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:17:54,808 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:54,808 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:54,808 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:54,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:54,809 INFO L82 PathProgramCache]: Analyzing trace with hash -1300203548, now seen corresponding path program 1 times [2019-12-28 05:17:54,809 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:54,809 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [774710187] [2019-12-28 05:17:54,809 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:54,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:54,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:54,905 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [774710187] [2019-12-28 05:17:54,905 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:54,905 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:17:54,906 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1058080321] [2019-12-28 05:17:54,906 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:54,921 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:54,964 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 136 states and 190 transitions. [2019-12-28 05:17:54,964 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:55,089 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:17:55,090 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 05:17:55,090 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:55,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 05:17:55,092 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:17:55,092 INFO L87 Difference]: Start difference. First operand 32360 states and 100100 transitions. Second operand 9 states. [2019-12-28 05:17:56,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:56,188 INFO L93 Difference]: Finished difference Result 33657 states and 103522 transitions. [2019-12-28 05:17:56,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:17:56,189 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 80 [2019-12-28 05:17:56,190 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:56,283 INFO L225 Difference]: With dead ends: 33657 [2019-12-28 05:17:56,283 INFO L226 Difference]: Without dead ends: 33657 [2019-12-28 05:17:56,284 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 4 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-28 05:17:56,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33657 states. [2019-12-28 05:17:56,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33657 to 32960. [2019-12-28 05:17:56,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32960 states. [2019-12-28 05:17:56,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32960 states to 32960 states and 101659 transitions. [2019-12-28 05:17:56,998 INFO L78 Accepts]: Start accepts. Automaton has 32960 states and 101659 transitions. Word has length 80 [2019-12-28 05:17:56,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:56,998 INFO L462 AbstractCegarLoop]: Abstraction has 32960 states and 101659 transitions. [2019-12-28 05:17:56,999 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 05:17:56,999 INFO L276 IsEmpty]: Start isEmpty. Operand 32960 states and 101659 transitions. [2019-12-28 05:17:57,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:17:57,047 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:57,047 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:57,048 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:57,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:57,048 INFO L82 PathProgramCache]: Analyzing trace with hash 332600451, now seen corresponding path program 1 times [2019-12-28 05:17:57,048 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:57,049 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [72870845] [2019-12-28 05:17:57,049 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:57,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:57,155 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:57,156 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [72870845] [2019-12-28 05:17:57,156 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:57,156 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:17:57,157 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1479834739] [2019-12-28 05:17:57,157 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:57,172 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:57,214 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 136 states and 190 transitions. [2019-12-28 05:17:57,214 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:57,234 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 05:17:57,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:17:57,235 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:57,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:17:57,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:17:57,235 INFO L87 Difference]: Start difference. First operand 32960 states and 101659 transitions. Second operand 6 states. [2019-12-28 05:17:57,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:57,290 INFO L93 Difference]: Finished difference Result 4187 states and 10306 transitions. [2019-12-28 05:17:57,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 05:17:57,290 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-12-28 05:17:57,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:57,294 INFO L225 Difference]: With dead ends: 4187 [2019-12-28 05:17:57,294 INFO L226 Difference]: Without dead ends: 3449 [2019-12-28 05:17:57,295 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=32, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:17:57,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3449 states. [2019-12-28 05:17:57,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3449 to 3179. [2019-12-28 05:17:57,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3179 states. [2019-12-28 05:17:57,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3179 states to 3179 states and 7713 transitions. [2019-12-28 05:17:57,326 INFO L78 Accepts]: Start accepts. Automaton has 3179 states and 7713 transitions. Word has length 80 [2019-12-28 05:17:57,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:57,326 INFO L462 AbstractCegarLoop]: Abstraction has 3179 states and 7713 transitions. [2019-12-28 05:17:57,326 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:17:57,326 INFO L276 IsEmpty]: Start isEmpty. Operand 3179 states and 7713 transitions. [2019-12-28 05:17:57,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-12-28 05:17:57,329 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:57,329 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:57,329 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:57,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:57,330 INFO L82 PathProgramCache]: Analyzing trace with hash -171156109, now seen corresponding path program 1 times [2019-12-28 05:17:57,330 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:57,330 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [506403701] [2019-12-28 05:17:57,330 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:57,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:57,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:57,446 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [506403701] [2019-12-28 05:17:57,446 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:57,446 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:17:57,447 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1397186015] [2019-12-28 05:17:57,447 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:57,468 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:57,527 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 128 states and 160 transitions. [2019-12-28 05:17:57,527 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:57,617 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 9 times. [2019-12-28 05:17:57,617 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-28 05:17:57,617 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:57,618 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-28 05:17:57,618 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:17:57,618 INFO L87 Difference]: Start difference. First operand 3179 states and 7713 transitions. Second operand 10 states. [2019-12-28 05:17:59,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:17:59,213 INFO L93 Difference]: Finished difference Result 8175 states and 19619 transitions. [2019-12-28 05:17:59,213 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-28 05:17:59,213 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 90 [2019-12-28 05:17:59,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:17:59,224 INFO L225 Difference]: With dead ends: 8175 [2019-12-28 05:17:59,224 INFO L226 Difference]: Without dead ends: 8016 [2019-12-28 05:17:59,225 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=83, Invalid=189, Unknown=0, NotChecked=0, Total=272 [2019-12-28 05:17:59,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8016 states. [2019-12-28 05:17:59,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8016 to 3378. [2019-12-28 05:17:59,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3378 states. [2019-12-28 05:17:59,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3378 states to 3378 states and 8153 transitions. [2019-12-28 05:17:59,278 INFO L78 Accepts]: Start accepts. Automaton has 3378 states and 8153 transitions. Word has length 90 [2019-12-28 05:17:59,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:17:59,278 INFO L462 AbstractCegarLoop]: Abstraction has 3378 states and 8153 transitions. [2019-12-28 05:17:59,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-28 05:17:59,278 INFO L276 IsEmpty]: Start isEmpty. Operand 3378 states and 8153 transitions. [2019-12-28 05:17:59,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-12-28 05:17:59,281 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:17:59,281 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:17:59,281 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:17:59,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:17:59,282 INFO L82 PathProgramCache]: Analyzing trace with hash 1799783348, now seen corresponding path program 1 times [2019-12-28 05:17:59,282 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:17:59,282 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830328576] [2019-12-28 05:17:59,283 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:17:59,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:17:59,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:17:59,345 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830328576] [2019-12-28 05:17:59,345 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:17:59,345 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:17:59,345 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1047235382] [2019-12-28 05:17:59,346 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:17:59,361 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:17:59,468 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 128 states and 160 transitions. [2019-12-28 05:17:59,469 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:17:59,495 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 5 times. [2019-12-28 05:17:59,495 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:17:59,495 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:17:59,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:17:59,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:17:59,496 INFO L87 Difference]: Start difference. First operand 3378 states and 8153 transitions. Second operand 6 states. [2019-12-28 05:18:00,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:00,281 INFO L93 Difference]: Finished difference Result 5178 states and 12483 transitions. [2019-12-28 05:18:00,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 05:18:00,282 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 90 [2019-12-28 05:18:00,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:00,289 INFO L225 Difference]: With dead ends: 5178 [2019-12-28 05:18:00,289 INFO L226 Difference]: Without dead ends: 5128 [2019-12-28 05:18:00,292 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 10 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=90, Unknown=0, NotChecked=0, Total=132 [2019-12-28 05:18:00,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5128 states. [2019-12-28 05:18:00,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5128 to 3548. [2019-12-28 05:18:00,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3548 states. [2019-12-28 05:18:00,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3548 states to 3548 states and 8535 transitions. [2019-12-28 05:18:00,352 INFO L78 Accepts]: Start accepts. Automaton has 3548 states and 8535 transitions. Word has length 90 [2019-12-28 05:18:00,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:00,352 INFO L462 AbstractCegarLoop]: Abstraction has 3548 states and 8535 transitions. [2019-12-28 05:18:00,352 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:18:00,352 INFO L276 IsEmpty]: Start isEmpty. Operand 3548 states and 8535 transitions. [2019-12-28 05:18:00,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:00,358 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:00,358 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:00,358 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:00,359 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:00,359 INFO L82 PathProgramCache]: Analyzing trace with hash 2051379953, now seen corresponding path program 1 times [2019-12-28 05:18:00,360 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:00,360 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1299563568] [2019-12-28 05:18:00,360 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:00,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:00,400 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:00,401 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1299563568] [2019-12-28 05:18:00,401 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:00,401 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:18:00,401 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1521576515] [2019-12-28 05:18:00,401 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:00,419 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:00,500 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 146 states and 198 transitions. [2019-12-28 05:18:00,500 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:00,531 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 05:18:00,532 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:18:00,532 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:00,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:18:00,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:18:00,533 INFO L87 Difference]: Start difference. First operand 3548 states and 8535 transitions. Second operand 6 states. [2019-12-28 05:18:00,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:00,775 INFO L93 Difference]: Finished difference Result 5936 states and 14442 transitions. [2019-12-28 05:18:00,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:18:00,775 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 92 [2019-12-28 05:18:00,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:00,782 INFO L225 Difference]: With dead ends: 5936 [2019-12-28 05:18:00,782 INFO L226 Difference]: Without dead ends: 5819 [2019-12-28 05:18:00,783 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:18:00,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5819 states. [2019-12-28 05:18:00,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5819 to 3174. [2019-12-28 05:18:00,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3174 states. [2019-12-28 05:18:00,824 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3174 states to 3174 states and 7555 transitions. [2019-12-28 05:18:00,825 INFO L78 Accepts]: Start accepts. Automaton has 3174 states and 7555 transitions. Word has length 92 [2019-12-28 05:18:00,825 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:00,825 INFO L462 AbstractCegarLoop]: Abstraction has 3174 states and 7555 transitions. [2019-12-28 05:18:00,825 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:18:00,825 INFO L276 IsEmpty]: Start isEmpty. Operand 3174 states and 7555 transitions. [2019-12-28 05:18:00,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:00,827 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:00,828 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:00,828 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:00,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:00,828 INFO L82 PathProgramCache]: Analyzing trace with hash -175095664, now seen corresponding path program 1 times [2019-12-28 05:18:00,830 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:00,830 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2017425535] [2019-12-28 05:18:00,830 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:00,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:00,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:00,966 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2017425535] [2019-12-28 05:18:00,966 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:00,967 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:18:00,967 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1248769696] [2019-12-28 05:18:00,967 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:00,984 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:01,059 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 149 states and 204 transitions. [2019-12-28 05:18:01,059 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:01,116 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 8 times. [2019-12-28 05:18:01,116 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-28 05:18:01,116 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:01,117 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-28 05:18:01,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:18:01,117 INFO L87 Difference]: Start difference. First operand 3174 states and 7555 transitions. Second operand 10 states. [2019-12-28 05:18:02,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:02,039 INFO L93 Difference]: Finished difference Result 2746 states and 6484 transitions. [2019-12-28 05:18:02,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-28 05:18:02,040 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 92 [2019-12-28 05:18:02,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:02,044 INFO L225 Difference]: With dead ends: 2746 [2019-12-28 05:18:02,044 INFO L226 Difference]: Without dead ends: 2746 [2019-12-28 05:18:02,045 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=56, Invalid=154, Unknown=0, NotChecked=0, Total=210 [2019-12-28 05:18:02,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2746 states. [2019-12-28 05:18:02,067 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2746 to 2605. [2019-12-28 05:18:02,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2605 states. [2019-12-28 05:18:02,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2605 states to 2605 states and 6199 transitions. [2019-12-28 05:18:02,071 INFO L78 Accepts]: Start accepts. Automaton has 2605 states and 6199 transitions. Word has length 92 [2019-12-28 05:18:02,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:02,071 INFO L462 AbstractCegarLoop]: Abstraction has 2605 states and 6199 transitions. [2019-12-28 05:18:02,071 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-28 05:18:02,071 INFO L276 IsEmpty]: Start isEmpty. Operand 2605 states and 6199 transitions. [2019-12-28 05:18:02,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:02,073 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:02,073 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:02,073 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:02,074 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:02,074 INFO L82 PathProgramCache]: Analyzing trace with hash -869143036, now seen corresponding path program 1 times [2019-12-28 05:18:02,074 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:02,074 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [106568899] [2019-12-28 05:18:02,074 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:02,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:02,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:02,188 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [106568899] [2019-12-28 05:18:02,189 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:02,189 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:02,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [600536539] [2019-12-28 05:18:02,189 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:02,203 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:02,269 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 139 states and 183 transitions. [2019-12-28 05:18:02,270 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:02,310 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:18:02,310 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 05:18:02,310 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:02,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 05:18:02,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:18:02,311 INFO L87 Difference]: Start difference. First operand 2605 states and 6199 transitions. Second operand 8 states. [2019-12-28 05:18:02,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:02,542 INFO L93 Difference]: Finished difference Result 2899 states and 6768 transitions. [2019-12-28 05:18:02,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 05:18:02,543 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 92 [2019-12-28 05:18:02,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:02,547 INFO L225 Difference]: With dead ends: 2899 [2019-12-28 05:18:02,548 INFO L226 Difference]: Without dead ends: 2871 [2019-12-28 05:18:02,548 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:18:02,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2871 states. [2019-12-28 05:18:02,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2871 to 2630. [2019-12-28 05:18:02,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2630 states. [2019-12-28 05:18:02,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2630 states to 2630 states and 6222 transitions. [2019-12-28 05:18:02,574 INFO L78 Accepts]: Start accepts. Automaton has 2630 states and 6222 transitions. Word has length 92 [2019-12-28 05:18:02,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:02,574 INFO L462 AbstractCegarLoop]: Abstraction has 2630 states and 6222 transitions. [2019-12-28 05:18:02,574 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 05:18:02,574 INFO L276 IsEmpty]: Start isEmpty. Operand 2630 states and 6222 transitions. [2019-12-28 05:18:02,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:02,576 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:02,576 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:02,576 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:02,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:02,577 INFO L82 PathProgramCache]: Analyzing trace with hash 1404367329, now seen corresponding path program 1 times [2019-12-28 05:18:02,577 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:02,577 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [606465984] [2019-12-28 05:18:02,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:02,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:02,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:02,670 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [606465984] [2019-12-28 05:18:02,671 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:02,671 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:02,671 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2064434973] [2019-12-28 05:18:02,671 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:02,686 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:02,752 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 140 states and 185 transitions. [2019-12-28 05:18:02,752 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:02,792 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:18:02,792 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 05:18:02,792 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:02,793 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 05:18:02,793 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:18:02,793 INFO L87 Difference]: Start difference. First operand 2630 states and 6222 transitions. Second operand 9 states. [2019-12-28 05:18:03,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:03,546 INFO L93 Difference]: Finished difference Result 6853 states and 16407 transitions. [2019-12-28 05:18:03,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 05:18:03,547 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 92 [2019-12-28 05:18:03,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:03,556 INFO L225 Difference]: With dead ends: 6853 [2019-12-28 05:18:03,556 INFO L226 Difference]: Without dead ends: 6853 [2019-12-28 05:18:03,557 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 7 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=100, Unknown=0, NotChecked=0, Total=156 [2019-12-28 05:18:03,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6853 states. [2019-12-28 05:18:03,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6853 to 2639. [2019-12-28 05:18:03,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2639 states. [2019-12-28 05:18:03,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2639 states to 2639 states and 6247 transitions. [2019-12-28 05:18:03,603 INFO L78 Accepts]: Start accepts. Automaton has 2639 states and 6247 transitions. Word has length 92 [2019-12-28 05:18:03,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:03,603 INFO L462 AbstractCegarLoop]: Abstraction has 2639 states and 6247 transitions. [2019-12-28 05:18:03,603 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 05:18:03,603 INFO L276 IsEmpty]: Start isEmpty. Operand 2639 states and 6247 transitions. [2019-12-28 05:18:03,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:03,605 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:03,606 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:03,606 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:03,606 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:03,606 INFO L82 PathProgramCache]: Analyzing trace with hash 1528440576, now seen corresponding path program 1 times [2019-12-28 05:18:03,607 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:03,607 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2108900955] [2019-12-28 05:18:03,607 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:03,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:03,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:03,730 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2108900955] [2019-12-28 05:18:03,730 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:03,730 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:18:03,730 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [304076206] [2019-12-28 05:18:03,730 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:03,747 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:03,816 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 140 states and 185 transitions. [2019-12-28 05:18:03,816 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:03,894 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 05:18:03,895 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-28 05:18:03,895 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:03,896 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-28 05:18:03,896 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:18:03,896 INFO L87 Difference]: Start difference. First operand 2639 states and 6247 transitions. Second operand 10 states. [2019-12-28 05:18:05,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:05,451 INFO L93 Difference]: Finished difference Result 7401 states and 17514 transitions. [2019-12-28 05:18:05,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-28 05:18:05,455 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 92 [2019-12-28 05:18:05,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:05,463 INFO L225 Difference]: With dead ends: 7401 [2019-12-28 05:18:05,463 INFO L226 Difference]: Without dead ends: 7311 [2019-12-28 05:18:05,464 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 77 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=142, Invalid=364, Unknown=0, NotChecked=0, Total=506 [2019-12-28 05:18:05,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7311 states. [2019-12-28 05:18:05,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7311 to 2702. [2019-12-28 05:18:05,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2702 states. [2019-12-28 05:18:05,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2702 states to 2702 states and 6388 transitions. [2019-12-28 05:18:05,508 INFO L78 Accepts]: Start accepts. Automaton has 2702 states and 6388 transitions. Word has length 92 [2019-12-28 05:18:05,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:05,508 INFO L462 AbstractCegarLoop]: Abstraction has 2702 states and 6388 transitions. [2019-12-28 05:18:05,508 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-28 05:18:05,508 INFO L276 IsEmpty]: Start isEmpty. Operand 2702 states and 6388 transitions. [2019-12-28 05:18:05,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:05,510 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:05,510 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:05,510 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:05,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:05,510 INFO L82 PathProgramCache]: Analyzing trace with hash 1245290112, now seen corresponding path program 1 times [2019-12-28 05:18:05,511 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:05,511 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [682837427] [2019-12-28 05:18:05,511 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:05,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:05,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:05,589 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [682837427] [2019-12-28 05:18:05,589 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:05,589 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:18:05,589 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1807549908] [2019-12-28 05:18:05,589 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:05,604 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:05,667 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 140 states and 185 transitions. [2019-12-28 05:18:05,668 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:05,669 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:18:05,669 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:18:05,670 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:05,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:18:05,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:05,670 INFO L87 Difference]: Start difference. First operand 2702 states and 6388 transitions. Second operand 7 states. [2019-12-28 05:18:06,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:06,012 INFO L93 Difference]: Finished difference Result 3525 states and 8307 transitions. [2019-12-28 05:18:06,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:18:06,012 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-12-28 05:18:06,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:06,017 INFO L225 Difference]: With dead ends: 3525 [2019-12-28 05:18:06,017 INFO L226 Difference]: Without dead ends: 3525 [2019-12-28 05:18:06,018 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=93, Unknown=0, NotChecked=0, Total=132 [2019-12-28 05:18:06,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3525 states. [2019-12-28 05:18:06,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3525 to 2938. [2019-12-28 05:18:06,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2938 states. [2019-12-28 05:18:06,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2938 states to 2938 states and 6978 transitions. [2019-12-28 05:18:06,047 INFO L78 Accepts]: Start accepts. Automaton has 2938 states and 6978 transitions. Word has length 92 [2019-12-28 05:18:06,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:06,048 INFO L462 AbstractCegarLoop]: Abstraction has 2938 states and 6978 transitions. [2019-12-28 05:18:06,048 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:18:06,048 INFO L276 IsEmpty]: Start isEmpty. Operand 2938 states and 6978 transitions. [2019-12-28 05:18:06,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:06,050 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:06,050 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:06,050 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:06,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:06,051 INFO L82 PathProgramCache]: Analyzing trace with hash -1804912703, now seen corresponding path program 1 times [2019-12-28 05:18:06,051 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:06,051 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [578662024] [2019-12-28 05:18:06,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:06,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:06,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:06,129 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [578662024] [2019-12-28 05:18:06,130 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:06,130 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:06,130 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [287395661] [2019-12-28 05:18:06,130 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:06,145 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:06,211 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 140 states and 185 transitions. [2019-12-28 05:18:06,212 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:06,249 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:18:06,249 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 05:18:06,249 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:06,250 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 05:18:06,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=36, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:18:06,250 INFO L87 Difference]: Start difference. First operand 2938 states and 6978 transitions. Second operand 8 states. [2019-12-28 05:18:06,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:06,511 INFO L93 Difference]: Finished difference Result 2972 states and 7024 transitions. [2019-12-28 05:18:06,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:18:06,512 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 92 [2019-12-28 05:18:06,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:06,517 INFO L225 Difference]: With dead ends: 2972 [2019-12-28 05:18:06,518 INFO L226 Difference]: Without dead ends: 2972 [2019-12-28 05:18:06,518 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=58, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:18:06,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2972 states. [2019-12-28 05:18:06,552 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2972 to 2955. [2019-12-28 05:18:06,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2955 states. [2019-12-28 05:18:06,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2955 states to 2955 states and 6989 transitions. [2019-12-28 05:18:06,559 INFO L78 Accepts]: Start accepts. Automaton has 2955 states and 6989 transitions. Word has length 92 [2019-12-28 05:18:06,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:06,559 INFO L462 AbstractCegarLoop]: Abstraction has 2955 states and 6989 transitions. [2019-12-28 05:18:06,559 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 05:18:06,560 INFO L276 IsEmpty]: Start isEmpty. Operand 2955 states and 6989 transitions. [2019-12-28 05:18:06,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:06,563 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:06,563 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:06,563 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:06,564 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:06,564 INFO L82 PathProgramCache]: Analyzing trace with hash -1090876316, now seen corresponding path program 1 times [2019-12-28 05:18:06,564 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:06,565 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1622694995] [2019-12-28 05:18:06,565 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:06,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:06,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:06,671 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1622694995] [2019-12-28 05:18:06,671 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:06,671 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:18:06,671 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1146714147] [2019-12-28 05:18:06,671 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:06,687 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:06,751 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 139 states and 183 transitions. [2019-12-28 05:18:06,751 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:06,797 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 7 times. [2019-12-28 05:18:06,798 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:18:06,798 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:06,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:18:06,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:06,798 INFO L87 Difference]: Start difference. First operand 2955 states and 6989 transitions. Second operand 7 states. [2019-12-28 05:18:07,198 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:07,199 INFO L93 Difference]: Finished difference Result 2920 states and 6879 transitions. [2019-12-28 05:18:07,199 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:18:07,199 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-12-28 05:18:07,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:07,205 INFO L225 Difference]: With dead ends: 2920 [2019-12-28 05:18:07,205 INFO L226 Difference]: Without dead ends: 2920 [2019-12-28 05:18:07,207 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 7 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:18:07,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2920 states. [2019-12-28 05:18:07,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2920 to 2656. [2019-12-28 05:18:07,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2656 states. [2019-12-28 05:18:07,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2656 states to 2656 states and 6310 transitions. [2019-12-28 05:18:07,258 INFO L78 Accepts]: Start accepts. Automaton has 2656 states and 6310 transitions. Word has length 92 [2019-12-28 05:18:07,259 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:07,259 INFO L462 AbstractCegarLoop]: Abstraction has 2656 states and 6310 transitions. [2019-12-28 05:18:07,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:18:07,259 INFO L276 IsEmpty]: Start isEmpty. Operand 2656 states and 6310 transitions. [2019-12-28 05:18:07,262 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:18:07,262 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:07,263 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:07,263 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:07,263 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:07,263 INFO L82 PathProgramCache]: Analyzing trace with hash -1928417086, now seen corresponding path program 1 times [2019-12-28 05:18:07,264 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:07,264 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1368488132] [2019-12-28 05:18:07,264 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:07,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:07,440 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:07,441 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1368488132] [2019-12-28 05:18:07,442 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:07,442 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:07,442 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1753161643] [2019-12-28 05:18:07,442 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:07,471 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:07,559 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 139 states and 183 transitions. [2019-12-28 05:18:07,560 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:07,579 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 3 times. [2019-12-28 05:18:07,579 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:18:07,579 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:07,579 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:18:07,580 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:07,580 INFO L87 Difference]: Start difference. First operand 2656 states and 6310 transitions. Second operand 7 states. [2019-12-28 05:18:07,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:07,804 INFO L93 Difference]: Finished difference Result 2476 states and 5728 transitions. [2019-12-28 05:18:07,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 05:18:07,804 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-12-28 05:18:07,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:07,808 INFO L225 Difference]: With dead ends: 2476 [2019-12-28 05:18:07,808 INFO L226 Difference]: Without dead ends: 2476 [2019-12-28 05:18:07,809 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:18:07,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2476 states. [2019-12-28 05:18:07,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2476 to 1816. [2019-12-28 05:18:07,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1816 states. [2019-12-28 05:18:07,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1816 states to 1816 states and 4273 transitions. [2019-12-28 05:18:07,837 INFO L78 Accepts]: Start accepts. Automaton has 1816 states and 4273 transitions. Word has length 92 [2019-12-28 05:18:07,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:07,838 INFO L462 AbstractCegarLoop]: Abstraction has 1816 states and 4273 transitions. [2019-12-28 05:18:07,838 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:18:07,838 INFO L276 IsEmpty]: Start isEmpty. Operand 1816 states and 4273 transitions. [2019-12-28 05:18:07,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:18:07,840 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:07,840 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:07,841 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:07,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:07,841 INFO L82 PathProgramCache]: Analyzing trace with hash -1154922491, now seen corresponding path program 1 times [2019-12-28 05:18:07,842 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:07,842 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1514482008] [2019-12-28 05:18:07,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:07,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:07,915 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:07,916 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1514482008] [2019-12-28 05:18:07,916 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:07,916 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:18:07,916 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1669128312] [2019-12-28 05:18:07,916 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:07,941 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:08,021 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 159 states and 222 transitions. [2019-12-28 05:18:08,021 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:08,022 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 05:18:08,022 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:18:08,023 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:08,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:18:08,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:18:08,023 INFO L87 Difference]: Start difference. First operand 1816 states and 4273 transitions. Second operand 5 states. [2019-12-28 05:18:08,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:08,254 INFO L93 Difference]: Finished difference Result 2068 states and 4852 transitions. [2019-12-28 05:18:08,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 05:18:08,255 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-12-28 05:18:08,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:08,259 INFO L225 Difference]: With dead ends: 2068 [2019-12-28 05:18:08,259 INFO L226 Difference]: Without dead ends: 2050 [2019-12-28 05:18:08,260 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:08,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2050 states. [2019-12-28 05:18:08,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2050 to 1843. [2019-12-28 05:18:08,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1843 states. [2019-12-28 05:18:08,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1843 states to 1843 states and 4327 transitions. [2019-12-28 05:18:08,294 INFO L78 Accepts]: Start accepts. Automaton has 1843 states and 4327 transitions. Word has length 94 [2019-12-28 05:18:08,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:08,295 INFO L462 AbstractCegarLoop]: Abstraction has 1843 states and 4327 transitions. [2019-12-28 05:18:08,295 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:18:08,295 INFO L276 IsEmpty]: Start isEmpty. Operand 1843 states and 4327 transitions. [2019-12-28 05:18:08,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:18:08,298 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:08,298 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:08,298 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:08,298 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:08,299 INFO L82 PathProgramCache]: Analyzing trace with hash 89841990, now seen corresponding path program 1 times [2019-12-28 05:18:08,301 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:08,306 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1665483093] [2019-12-28 05:18:08,306 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:08,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:08,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:08,448 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1665483093] [2019-12-28 05:18:08,448 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:08,448 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:08,448 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1608898721] [2019-12-28 05:18:08,448 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:08,463 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:08,544 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 159 states and 222 transitions. [2019-12-28 05:18:08,544 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:08,546 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 05:18:08,547 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:18:08,547 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:08,547 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:18:08,547 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:18:08,547 INFO L87 Difference]: Start difference. First operand 1843 states and 4327 transitions. Second operand 6 states. [2019-12-28 05:18:08,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:08,623 INFO L93 Difference]: Finished difference Result 2968 states and 7090 transitions. [2019-12-28 05:18:08,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 05:18:08,624 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-12-28 05:18:08,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:08,626 INFO L225 Difference]: With dead ends: 2968 [2019-12-28 05:18:08,626 INFO L226 Difference]: Without dead ends: 1192 [2019-12-28 05:18:08,626 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:18:08,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1192 states. [2019-12-28 05:18:08,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1192 to 1192. [2019-12-28 05:18:08,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1192 states. [2019-12-28 05:18:08,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1192 states to 1192 states and 2866 transitions. [2019-12-28 05:18:08,642 INFO L78 Accepts]: Start accepts. Automaton has 1192 states and 2866 transitions. Word has length 94 [2019-12-28 05:18:08,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:08,643 INFO L462 AbstractCegarLoop]: Abstraction has 1192 states and 2866 transitions. [2019-12-28 05:18:08,643 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:18:08,643 INFO L276 IsEmpty]: Start isEmpty. Operand 1192 states and 2866 transitions. [2019-12-28 05:18:08,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:18:08,644 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:08,645 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:08,645 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:08,645 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:08,645 INFO L82 PathProgramCache]: Analyzing trace with hash 104916029, now seen corresponding path program 1 times [2019-12-28 05:18:08,646 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:08,646 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1103805834] [2019-12-28 05:18:08,646 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:08,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:08,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:08,742 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1103805834] [2019-12-28 05:18:08,743 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:08,743 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:18:08,743 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1019604476] [2019-12-28 05:18:08,743 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:08,754 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:08,798 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 129 states and 155 transitions. [2019-12-28 05:18:08,799 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:08,799 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:08,799 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:18:08,799 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:08,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:18:08,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:18:08,800 INFO L87 Difference]: Start difference. First operand 1192 states and 2866 transitions. Second operand 5 states. [2019-12-28 05:18:08,828 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:08,829 INFO L93 Difference]: Finished difference Result 1192 states and 2845 transitions. [2019-12-28 05:18:08,829 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:18:08,829 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-12-28 05:18:08,829 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:08,830 INFO L225 Difference]: With dead ends: 1192 [2019-12-28 05:18:08,831 INFO L226 Difference]: Without dead ends: 1192 [2019-12-28 05:18:08,831 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:18:08,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1192 states. [2019-12-28 05:18:08,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1192 to 1192. [2019-12-28 05:18:08,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1192 states. [2019-12-28 05:18:08,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1192 states to 1192 states and 2845 transitions. [2019-12-28 05:18:08,842 INFO L78 Accepts]: Start accepts. Automaton has 1192 states and 2845 transitions. Word has length 94 [2019-12-28 05:18:08,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:08,842 INFO L462 AbstractCegarLoop]: Abstraction has 1192 states and 2845 transitions. [2019-12-28 05:18:08,843 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:18:08,843 INFO L276 IsEmpty]: Start isEmpty. Operand 1192 states and 2845 transitions. [2019-12-28 05:18:08,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:18:08,844 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:08,844 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:08,844 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:08,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:08,844 INFO L82 PathProgramCache]: Analyzing trace with hash -919777892, now seen corresponding path program 2 times [2019-12-28 05:18:08,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:08,845 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [770483206] [2019-12-28 05:18:08,845 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:08,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:08,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:08,986 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [770483206] [2019-12-28 05:18:08,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:08,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-28 05:18:08,986 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [49741914] [2019-12-28 05:18:08,986 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:08,996 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:09,041 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 129 states and 155 transitions. [2019-12-28 05:18:09,041 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:09,118 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 8 times. [2019-12-28 05:18:09,118 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-28 05:18:09,119 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:09,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-28 05:18:09,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2019-12-28 05:18:09,119 INFO L87 Difference]: Start difference. First operand 1192 states and 2845 transitions. Second operand 14 states. [2019-12-28 05:18:10,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:10,021 INFO L93 Difference]: Finished difference Result 2571 states and 6104 transitions. [2019-12-28 05:18:10,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-28 05:18:10,022 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 94 [2019-12-28 05:18:10,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:10,025 INFO L225 Difference]: With dead ends: 2571 [2019-12-28 05:18:10,025 INFO L226 Difference]: Without dead ends: 1932 [2019-12-28 05:18:10,026 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=163, Invalid=767, Unknown=0, NotChecked=0, Total=930 [2019-12-28 05:18:10,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1932 states. [2019-12-28 05:18:10,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1932 to 1558. [2019-12-28 05:18:10,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1558 states. [2019-12-28 05:18:10,042 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1558 states to 1558 states and 3612 transitions. [2019-12-28 05:18:10,042 INFO L78 Accepts]: Start accepts. Automaton has 1558 states and 3612 transitions. Word has length 94 [2019-12-28 05:18:10,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:10,042 INFO L462 AbstractCegarLoop]: Abstraction has 1558 states and 3612 transitions. [2019-12-28 05:18:10,043 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-28 05:18:10,043 INFO L276 IsEmpty]: Start isEmpty. Operand 1558 states and 3612 transitions. [2019-12-28 05:18:10,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:18:10,044 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:10,045 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:10,045 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:10,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:10,045 INFO L82 PathProgramCache]: Analyzing trace with hash -1370490878, now seen corresponding path program 3 times [2019-12-28 05:18:10,046 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:10,046 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169161040] [2019-12-28 05:18:10,046 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:10,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 05:18:10,077 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 05:18:10,125 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-28 05:18:10,125 INFO L476 BasicCegarLoop]: Counterexample might be feasible [2019-12-28 05:18:10,290 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.12 05:18:10 BasicIcfg [2019-12-28 05:18:10,290 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-28 05:18:10,292 INFO L168 Benchmark]: Toolchain (without parser) took 69070.31 ms. Allocated memory was 138.9 MB in the beginning and 2.6 GB in the end (delta: 2.4 GB). Free memory was 101.8 MB in the beginning and 1.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 1.0 GB. Max. memory is 7.1 GB. [2019-12-28 05:18:10,293 INFO L168 Benchmark]: CDTParser took 0.41 ms. Allocated memory is still 138.9 MB. Free memory was 122.1 MB in the beginning and 121.9 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. [2019-12-28 05:18:10,293 INFO L168 Benchmark]: CACSL2BoogieTranslator took 757.65 ms. Allocated memory was 138.9 MB in the beginning and 203.9 MB in the end (delta: 65.0 MB). Free memory was 101.6 MB in the beginning and 158.1 MB in the end (delta: -56.5 MB). Peak memory consumption was 25.7 MB. Max. memory is 7.1 GB. [2019-12-28 05:18:10,293 INFO L168 Benchmark]: Boogie Procedure Inliner took 67.37 ms. Allocated memory is still 203.9 MB. Free memory was 158.1 MB in the beginning and 155.5 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 7.1 GB. [2019-12-28 05:18:10,294 INFO L168 Benchmark]: Boogie Preprocessor took 38.40 ms. Allocated memory is still 203.9 MB. Free memory was 155.5 MB in the beginning and 152.8 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. [2019-12-28 05:18:10,294 INFO L168 Benchmark]: RCFGBuilder took 837.85 ms. Allocated memory is still 203.9 MB. Free memory was 152.8 MB in the beginning and 109.4 MB in the end (delta: 43.4 MB). Peak memory consumption was 43.4 MB. Max. memory is 7.1 GB. [2019-12-28 05:18:10,294 INFO L168 Benchmark]: TraceAbstraction took 67363.47 ms. Allocated memory was 203.9 MB in the beginning and 2.6 GB in the end (delta: 2.4 GB). Free memory was 108.7 MB in the beginning and 1.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 942.2 MB. Max. memory is 7.1 GB. [2019-12-28 05:18:10,297 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.41 ms. Allocated memory is still 138.9 MB. Free memory was 122.1 MB in the beginning and 121.9 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 757.65 ms. Allocated memory was 138.9 MB in the beginning and 203.9 MB in the end (delta: 65.0 MB). Free memory was 101.6 MB in the beginning and 158.1 MB in the end (delta: -56.5 MB). Peak memory consumption was 25.7 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 67.37 ms. Allocated memory is still 203.9 MB. Free memory was 158.1 MB in the beginning and 155.5 MB in the end (delta: 2.6 MB). Peak memory consumption was 2.6 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 38.40 ms. Allocated memory is still 203.9 MB. Free memory was 155.5 MB in the beginning and 152.8 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. * RCFGBuilder took 837.85 ms. Allocated memory is still 203.9 MB. Free memory was 152.8 MB in the beginning and 109.4 MB in the end (delta: 43.4 MB). Peak memory consumption was 43.4 MB. Max. memory is 7.1 GB. * TraceAbstraction took 67363.47 ms. Allocated memory was 203.9 MB in the beginning and 2.6 GB in the end (delta: 2.4 GB). Free memory was 108.7 MB in the beginning and 1.5 GB in the end (delta: -1.4 GB). Peak memory consumption was 942.2 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L695] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0] [L696] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] 0 int x = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L699] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L700] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L701] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L702] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L703] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L704] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L705] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L706] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L707] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L708] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L709] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L710] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L711] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L712] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L714] 0 int y = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L715] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L716] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L776] 0 pthread_t t2479; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L777] FCALL, FORK 0 pthread_create(&t2479, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L778] 0 pthread_t t2480; VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L779] FCALL, FORK 0 pthread_create(&t2480, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L740] 2 x$w_buff1 = x$w_buff0 [L741] 2 x$w_buff0 = 2 [L742] 2 x$w_buff1_used = x$w_buff0_used [L743] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L745] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L746] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L747] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L748] 2 x$r_buff0_thd2 = (_Bool)1 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L754] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L720] 1 y = 2 [L723] 1 x = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L754] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L755] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L726] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L726] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=2] [L726] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=2] [L726] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L727] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L727] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L728] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L729] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L729] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L730] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L733] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L755] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L756] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L757] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L757] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L758] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L758] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L761] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L786] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L786] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L787] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L788] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L788] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L789] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L789] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 x$flush_delayed = weak$$choice2 [L795] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L797] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L797] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L798] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L798] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L799] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L799] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L800] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L800] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L801] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L802] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L802] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L804] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L804] 0 x = x$flush_delayed ? x$mem_tmp : x [L805] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 139 locations, 2 error locations. Result: UNSAFE, OverallTime: 67.0s, OverallIterations: 38, TraceHistogramMax: 1, AutomataDifference: 30.8s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10317 SDtfs, 13077 SDslu, 27143 SDs, 0 SdLazy, 14882 SolverSat, 920 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 16.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 538 GetRequests, 171 SyntacticMatches, 27 SemanticMatches, 340 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 820 ImplicationChecksByTransitivity, 5.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76077occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 25.4s AutomataMinimizationTime, 37 MinimizatonAttempts, 124717 StatesRemovedByMinimization, 34 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 2.9s InterpolantComputationTime, 2970 NumberOfCodeBlocks, 2970 NumberOfCodeBlocksAsserted, 38 NumberOfCheckSat, 2839 ConstructedInterpolants, 0 QuantifiedInterpolants, 519052 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 37 InterpolantComputations, 37 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...