/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf -i ../../../trunk/examples/svcomp/pthread-wmm/safe029_rmo.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-4336eb1 [2019-12-28 05:18:19,478 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-28 05:18:19,480 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-28 05:18:19,493 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-28 05:18:19,493 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-28 05:18:19,494 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-28 05:18:19,496 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-28 05:18:19,497 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-28 05:18:19,499 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-28 05:18:19,500 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-28 05:18:19,501 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-28 05:18:19,502 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-28 05:18:19,503 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-28 05:18:19,504 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-28 05:18:19,504 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-28 05:18:19,506 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-28 05:18:19,506 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-28 05:18:19,507 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-28 05:18:19,509 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-28 05:18:19,512 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-28 05:18:19,513 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-28 05:18:19,515 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-28 05:18:19,516 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-28 05:18:19,517 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-28 05:18:19,519 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-28 05:18:19,519 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-28 05:18:19,520 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-28 05:18:19,521 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-28 05:18:19,521 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-28 05:18:19,522 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-28 05:18:19,522 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-28 05:18:19,524 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-28 05:18:19,525 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-28 05:18:19,525 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-28 05:18:19,526 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-28 05:18:19,527 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-28 05:18:19,527 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-28 05:18:19,527 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-28 05:18:19,528 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-28 05:18:19,529 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-28 05:18:19,529 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-28 05:18:19,530 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-NoLbe-MCR.epf [2019-12-28 05:18:19,545 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-28 05:18:19,545 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-28 05:18:19,546 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-28 05:18:19,547 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-28 05:18:19,547 INFO L138 SettingsManager]: * Use SBE=true [2019-12-28 05:18:19,547 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-28 05:18:19,547 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-28 05:18:19,548 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-28 05:18:19,548 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-28 05:18:19,548 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-28 05:18:19,548 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-28 05:18:19,548 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-28 05:18:19,549 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-28 05:18:19,549 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-28 05:18:19,549 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-28 05:18:19,549 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-28 05:18:19,549 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-28 05:18:19,550 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-28 05:18:19,550 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-28 05:18:19,550 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-28 05:18:19,550 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-28 05:18:19,550 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 05:18:19,551 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-28 05:18:19,551 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-28 05:18:19,551 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-28 05:18:19,551 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-28 05:18:19,551 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-28 05:18:19,552 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2019-12-28 05:18:19,552 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=OFF [2019-12-28 05:18:19,552 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-28 05:18:19,552 INFO L138 SettingsManager]: * Interpolant automaton=MCR [2019-12-28 05:18:19,552 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-28 05:18:19,837 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-28 05:18:19,854 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-28 05:18:19,858 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-28 05:18:19,860 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-28 05:18:19,860 INFO L275 PluginConnector]: CDTParser initialized [2019-12-28 05:18:19,861 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/safe029_rmo.opt.i [2019-12-28 05:18:19,943 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b1a5c68aa/1477fe7a0934478f99fe3dff49d90a8f/FLAG6f031d65c [2019-12-28 05:18:20,522 INFO L306 CDTParser]: Found 1 translation units. [2019-12-28 05:18:20,523 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe029_rmo.opt.i [2019-12-28 05:18:20,546 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b1a5c68aa/1477fe7a0934478f99fe3dff49d90a8f/FLAG6f031d65c [2019-12-28 05:18:20,839 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/b1a5c68aa/1477fe7a0934478f99fe3dff49d90a8f [2019-12-28 05:18:20,847 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-28 05:18:20,849 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-12-28 05:18:20,851 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-28 05:18:20,851 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-28 05:18:20,854 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-28 05:18:20,855 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 05:18:20" (1/1) ... [2019-12-28 05:18:20,858 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@75a4072a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:20, skipping insertion in model container [2019-12-28 05:18:20,859 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 28.12 05:18:20" (1/1) ... [2019-12-28 05:18:20,867 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-28 05:18:20,930 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-28 05:18:21,456 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 05:18:21,472 INFO L203 MainTranslator]: Completed pre-run [2019-12-28 05:18:21,540 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-28 05:18:21,614 INFO L208 MainTranslator]: Completed translation [2019-12-28 05:18:21,615 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:21 WrapperNode [2019-12-28 05:18:21,615 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-28 05:18:21,616 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-28 05:18:21,616 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-28 05:18:21,616 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-28 05:18:21,626 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:21" (1/1) ... [2019-12-28 05:18:21,646 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:21" (1/1) ... [2019-12-28 05:18:21,685 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-28 05:18:21,686 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-28 05:18:21,686 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-28 05:18:21,686 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-28 05:18:21,697 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:21" (1/1) ... [2019-12-28 05:18:21,697 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:21" (1/1) ... [2019-12-28 05:18:21,702 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:21" (1/1) ... [2019-12-28 05:18:21,702 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:21" (1/1) ... [2019-12-28 05:18:21,719 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:21" (1/1) ... [2019-12-28 05:18:21,728 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:21" (1/1) ... [2019-12-28 05:18:21,732 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:21" (1/1) ... [2019-12-28 05:18:21,737 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-28 05:18:21,738 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-28 05:18:21,738 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-28 05:18:21,738 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-28 05:18:21,739 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:21" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-28 05:18:21,815 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-28 05:18:21,815 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-28 05:18:21,815 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-28 05:18:21,816 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-28 05:18:21,816 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-28 05:18:21,817 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-28 05:18:21,817 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-28 05:18:21,818 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-28 05:18:21,819 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-28 05:18:21,819 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-28 05:18:21,819 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-28 05:18:21,821 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-28 05:18:22,567 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-28 05:18:22,567 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-28 05:18:22,569 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 05:18:22 BoogieIcfgContainer [2019-12-28 05:18:22,569 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-28 05:18:22,570 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-28 05:18:22,571 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-28 05:18:22,574 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-28 05:18:22,574 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 28.12 05:18:20" (1/3) ... [2019-12-28 05:18:22,576 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2ca245c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 05:18:22, skipping insertion in model container [2019-12-28 05:18:22,576 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 28.12 05:18:21" (2/3) ... [2019-12-28 05:18:22,576 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2ca245c0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 28.12 05:18:22, skipping insertion in model container [2019-12-28 05:18:22,577 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 28.12 05:18:22" (3/3) ... [2019-12-28 05:18:22,579 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_rmo.opt.i [2019-12-28 05:18:22,590 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-28 05:18:22,590 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-28 05:18:22,608 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-28 05:18:22,609 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-28 05:18:22,664 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,665 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,665 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,666 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,666 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,667 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,667 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,667 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,667 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,668 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,669 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,669 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,669 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,670 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,671 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,672 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,673 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,674 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,675 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,676 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,676 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,676 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,676 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,677 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,678 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,678 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,679 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,680 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,682 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,683 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,684 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,685 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,686 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,686 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,686 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,687 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,688 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,692 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,692 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,693 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,693 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,693 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,694 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,694 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,694 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,694 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,694 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,699 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,700 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,700 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,702 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-28 05:18:22,715 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-28 05:18:22,737 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-28 05:18:22,737 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-28 05:18:22,737 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-28 05:18:22,737 INFO L376 AbstractCegarLoop]: Backedges is MCR [2019-12-28 05:18:22,737 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-28 05:18:22,738 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-28 05:18:22,738 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-28 05:18:22,738 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-28 05:18:22,753 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 145 places, 179 transitions [2019-12-28 05:18:24,084 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 22493 states. [2019-12-28 05:18:24,086 INFO L276 IsEmpty]: Start isEmpty. Operand 22493 states. [2019-12-28 05:18:24,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-12-28 05:18:24,095 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:24,096 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:24,097 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:24,104 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:24,104 INFO L82 PathProgramCache]: Analyzing trace with hash -2054349026, now seen corresponding path program 1 times [2019-12-28 05:18:24,114 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:24,115 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741280858] [2019-12-28 05:18:24,115 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:24,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:24,440 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:24,441 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [741280858] [2019-12-28 05:18:24,442 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:24,442 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:18:24,443 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [921877860] [2019-12-28 05:18:24,444 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:24,451 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:24,481 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 37 states and 36 transitions. [2019-12-28 05:18:24,482 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:24,491 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:24,491 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:18:24,491 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:24,506 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:18:24,507 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:18:24,508 INFO L87 Difference]: Start difference. First operand 22493 states. Second operand 4 states. [2019-12-28 05:18:25,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:25,199 INFO L93 Difference]: Finished difference Result 23445 states and 91746 transitions. [2019-12-28 05:18:25,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 05:18:25,201 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2019-12-28 05:18:25,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:25,395 INFO L225 Difference]: With dead ends: 23445 [2019-12-28 05:18:25,395 INFO L226 Difference]: Without dead ends: 21269 [2019-12-28 05:18:25,397 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:18:25,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21269 states. [2019-12-28 05:18:27,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21269 to 21269. [2019-12-28 05:18:27,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21269 states. [2019-12-28 05:18:27,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21269 states to 21269 states and 83770 transitions. [2019-12-28 05:18:27,360 INFO L78 Accepts]: Start accepts. Automaton has 21269 states and 83770 transitions. Word has length 36 [2019-12-28 05:18:27,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:27,361 INFO L462 AbstractCegarLoop]: Abstraction has 21269 states and 83770 transitions. [2019-12-28 05:18:27,361 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:18:27,361 INFO L276 IsEmpty]: Start isEmpty. Operand 21269 states and 83770 transitions. [2019-12-28 05:18:27,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2019-12-28 05:18:27,373 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:27,373 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:27,374 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:27,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:27,374 INFO L82 PathProgramCache]: Analyzing trace with hash 99870175, now seen corresponding path program 1 times [2019-12-28 05:18:27,375 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:27,375 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451282797] [2019-12-28 05:18:27,375 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:27,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:27,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:27,547 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451282797] [2019-12-28 05:18:27,547 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:27,548 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:18:27,548 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1327964589] [2019-12-28 05:18:27,548 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:27,555 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:27,573 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 72 states and 99 transitions. [2019-12-28 05:18:27,573 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:27,636 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:18:27,640 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:18:27,640 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:27,641 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:18:27,641 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:18:27,641 INFO L87 Difference]: Start difference. First operand 21269 states and 83770 transitions. Second operand 6 states. [2019-12-28 05:18:29,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:29,531 INFO L93 Difference]: Finished difference Result 34703 states and 129062 transitions. [2019-12-28 05:18:29,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:18:29,532 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2019-12-28 05:18:29,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:29,711 INFO L225 Difference]: With dead ends: 34703 [2019-12-28 05:18:29,711 INFO L226 Difference]: Without dead ends: 34559 [2019-12-28 05:18:29,718 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:18:29,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34559 states. [2019-12-28 05:18:30,915 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34559 to 33059. [2019-12-28 05:18:30,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33059 states. [2019-12-28 05:18:31,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33059 states to 33059 states and 123950 transitions. [2019-12-28 05:18:31,041 INFO L78 Accepts]: Start accepts. Automaton has 33059 states and 123950 transitions. Word has length 43 [2019-12-28 05:18:31,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:31,042 INFO L462 AbstractCegarLoop]: Abstraction has 33059 states and 123950 transitions. [2019-12-28 05:18:31,042 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:18:31,043 INFO L276 IsEmpty]: Start isEmpty. Operand 33059 states and 123950 transitions. [2019-12-28 05:18:31,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-28 05:18:31,047 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:31,047 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:31,047 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:31,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:31,048 INFO L82 PathProgramCache]: Analyzing trace with hash 268512672, now seen corresponding path program 1 times [2019-12-28 05:18:31,048 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:31,049 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [736474493] [2019-12-28 05:18:31,049 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:31,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:31,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:31,132 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [736474493] [2019-12-28 05:18:31,132 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:31,132 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:18:31,132 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1503262597] [2019-12-28 05:18:31,133 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:31,137 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:31,141 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 45 states and 44 transitions. [2019-12-28 05:18:31,141 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:31,142 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:31,142 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:18:31,143 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:31,143 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:18:31,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:18:31,144 INFO L87 Difference]: Start difference. First operand 33059 states and 123950 transitions. Second operand 5 states. [2019-12-28 05:18:31,999 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:32,000 INFO L93 Difference]: Finished difference Result 40211 states and 148619 transitions. [2019-12-28 05:18:32,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:18:32,001 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 44 [2019-12-28 05:18:32,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:32,143 INFO L225 Difference]: With dead ends: 40211 [2019-12-28 05:18:32,143 INFO L226 Difference]: Without dead ends: 40051 [2019-12-28 05:18:32,143 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:18:32,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40051 states. [2019-12-28 05:18:34,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40051 to 34632. [2019-12-28 05:18:34,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34632 states. [2019-12-28 05:18:34,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34632 states to 34632 states and 129246 transitions. [2019-12-28 05:18:34,696 INFO L78 Accepts]: Start accepts. Automaton has 34632 states and 129246 transitions. Word has length 44 [2019-12-28 05:18:34,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:34,697 INFO L462 AbstractCegarLoop]: Abstraction has 34632 states and 129246 transitions. [2019-12-28 05:18:34,697 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:18:34,697 INFO L276 IsEmpty]: Start isEmpty. Operand 34632 states and 129246 transitions. [2019-12-28 05:18:34,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-28 05:18:34,709 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:34,710 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:34,710 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:34,710 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:34,710 INFO L82 PathProgramCache]: Analyzing trace with hash 2144969569, now seen corresponding path program 1 times [2019-12-28 05:18:34,711 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:34,711 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [421780630] [2019-12-28 05:18:34,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:34,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:34,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:34,850 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [421780630] [2019-12-28 05:18:34,850 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:34,850 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:34,851 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1537849307] [2019-12-28 05:18:34,851 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:34,858 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:34,869 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 94 states and 135 transitions. [2019-12-28 05:18:34,869 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:34,901 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:18:34,901 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:18:34,902 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:34,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:18:34,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:34,902 INFO L87 Difference]: Start difference. First operand 34632 states and 129246 transitions. Second operand 7 states. [2019-12-28 05:18:36,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:36,177 INFO L93 Difference]: Finished difference Result 45660 states and 166140 transitions. [2019-12-28 05:18:36,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-28 05:18:36,178 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 51 [2019-12-28 05:18:36,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:36,320 INFO L225 Difference]: With dead ends: 45660 [2019-12-28 05:18:36,321 INFO L226 Difference]: Without dead ends: 45516 [2019-12-28 05:18:36,322 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=173, Unknown=0, NotChecked=0, Total=240 [2019-12-28 05:18:36,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45516 states. [2019-12-28 05:18:38,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45516 to 33595. [2019-12-28 05:18:38,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33595 states. [2019-12-28 05:18:38,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33595 states to 33595 states and 125401 transitions. [2019-12-28 05:18:38,760 INFO L78 Accepts]: Start accepts. Automaton has 33595 states and 125401 transitions. Word has length 51 [2019-12-28 05:18:38,760 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:38,760 INFO L462 AbstractCegarLoop]: Abstraction has 33595 states and 125401 transitions. [2019-12-28 05:18:38,760 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:18:38,760 INFO L276 IsEmpty]: Start isEmpty. Operand 33595 states and 125401 transitions. [2019-12-28 05:18:38,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2019-12-28 05:18:38,794 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:38,794 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:38,794 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:38,794 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:38,795 INFO L82 PathProgramCache]: Analyzing trace with hash -1490455740, now seen corresponding path program 1 times [2019-12-28 05:18:38,795 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:38,795 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [936524109] [2019-12-28 05:18:38,796 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:38,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:38,938 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:38,939 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [936524109] [2019-12-28 05:18:38,939 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:38,939 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:38,940 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [186316399] [2019-12-28 05:18:38,940 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:38,948 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:38,957 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 59 states and 58 transitions. [2019-12-28 05:18:38,958 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:38,958 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:38,959 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:18:38,959 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:38,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:18:38,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:18:38,960 INFO L87 Difference]: Start difference. First operand 33595 states and 125401 transitions. Second operand 6 states. [2019-12-28 05:18:39,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:39,965 INFO L93 Difference]: Finished difference Result 46067 states and 167834 transitions. [2019-12-28 05:18:39,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 05:18:39,967 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 58 [2019-12-28 05:18:39,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:40,070 INFO L225 Difference]: With dead ends: 46067 [2019-12-28 05:18:40,071 INFO L226 Difference]: Without dead ends: 45827 [2019-12-28 05:18:40,071 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-28 05:18:40,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45827 states. [2019-12-28 05:18:42,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45827 to 39956. [2019-12-28 05:18:42,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39956 states. [2019-12-28 05:18:42,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39956 states to 39956 states and 147325 transitions. [2019-12-28 05:18:42,776 INFO L78 Accepts]: Start accepts. Automaton has 39956 states and 147325 transitions. Word has length 58 [2019-12-28 05:18:42,776 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:42,777 INFO L462 AbstractCegarLoop]: Abstraction has 39956 states and 147325 transitions. [2019-12-28 05:18:42,777 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:18:42,777 INFO L276 IsEmpty]: Start isEmpty. Operand 39956 states and 147325 transitions. [2019-12-28 05:18:42,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-28 05:18:42,806 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:42,806 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:42,807 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:42,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:42,807 INFO L82 PathProgramCache]: Analyzing trace with hash -1015725706, now seen corresponding path program 1 times [2019-12-28 05:18:42,808 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:42,808 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [590206553] [2019-12-28 05:18:42,808 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:42,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:42,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:42,860 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [590206553] [2019-12-28 05:18:42,861 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:42,861 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:18:42,861 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1761179721] [2019-12-28 05:18:42,861 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:42,872 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:42,886 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 61 states and 60 transitions. [2019-12-28 05:18:42,886 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:42,888 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:42,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:18:42,888 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:42,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:18:42,889 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:18:42,889 INFO L87 Difference]: Start difference. First operand 39956 states and 147325 transitions. Second operand 3 states. [2019-12-28 05:18:43,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:43,122 INFO L93 Difference]: Finished difference Result 50254 states and 182160 transitions. [2019-12-28 05:18:43,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:18:43,122 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2019-12-28 05:18:43,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:43,228 INFO L225 Difference]: With dead ends: 50254 [2019-12-28 05:18:43,228 INFO L226 Difference]: Without dead ends: 50254 [2019-12-28 05:18:43,229 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:18:43,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50254 states. [2019-12-28 05:18:44,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50254 to 43886. [2019-12-28 05:18:44,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43886 states. [2019-12-28 05:18:44,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43886 states to 43886 states and 160763 transitions. [2019-12-28 05:18:44,311 INFO L78 Accepts]: Start accepts. Automaton has 43886 states and 160763 transitions. Word has length 60 [2019-12-28 05:18:44,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:44,312 INFO L462 AbstractCegarLoop]: Abstraction has 43886 states and 160763 transitions. [2019-12-28 05:18:44,312 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:18:44,312 INFO L276 IsEmpty]: Start isEmpty. Operand 43886 states and 160763 transitions. [2019-12-28 05:18:44,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-28 05:18:44,347 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:44,347 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:44,347 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:44,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:44,347 INFO L82 PathProgramCache]: Analyzing trace with hash 1067966230, now seen corresponding path program 1 times [2019-12-28 05:18:44,348 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:44,348 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [450417937] [2019-12-28 05:18:44,348 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:44,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:44,445 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:44,446 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [450417937] [2019-12-28 05:18:44,446 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:44,446 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:18:44,447 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [994452964] [2019-12-28 05:18:44,447 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:44,457 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:44,471 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 65 states and 64 transitions. [2019-12-28 05:18:44,471 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:44,472 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:44,472 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:18:44,472 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:44,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:18:44,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:44,473 INFO L87 Difference]: Start difference. First operand 43886 states and 160763 transitions. Second operand 7 states. [2019-12-28 05:18:45,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:45,994 INFO L93 Difference]: Finished difference Result 55882 states and 200497 transitions. [2019-12-28 05:18:45,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-28 05:18:45,995 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 64 [2019-12-28 05:18:45,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:46,117 INFO L225 Difference]: With dead ends: 55882 [2019-12-28 05:18:46,117 INFO L226 Difference]: Without dead ends: 55642 [2019-12-28 05:18:46,118 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 71 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=91, Invalid=289, Unknown=0, NotChecked=0, Total=380 [2019-12-28 05:18:46,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55642 states. [2019-12-28 05:18:46,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55642 to 45112. [2019-12-28 05:18:46,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45112 states. [2019-12-28 05:18:49,681 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45112 states to 45112 states and 164930 transitions. [2019-12-28 05:18:49,682 INFO L78 Accepts]: Start accepts. Automaton has 45112 states and 164930 transitions. Word has length 64 [2019-12-28 05:18:49,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:49,682 INFO L462 AbstractCegarLoop]: Abstraction has 45112 states and 164930 transitions. [2019-12-28 05:18:49,682 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:18:49,683 INFO L276 IsEmpty]: Start isEmpty. Operand 45112 states and 164930 transitions. [2019-12-28 05:18:49,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-28 05:18:49,721 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:49,721 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:49,722 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:49,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:49,722 INFO L82 PathProgramCache]: Analyzing trace with hash -2097396923, now seen corresponding path program 1 times [2019-12-28 05:18:49,723 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:49,723 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670306340] [2019-12-28 05:18:49,723 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:49,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:49,833 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:49,834 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670306340] [2019-12-28 05:18:49,834 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:49,834 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:18:49,835 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [517165354] [2019-12-28 05:18:49,835 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:49,846 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:49,873 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 108 states and 149 transitions. [2019-12-28 05:18:49,873 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:49,899 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:18:49,900 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 05:18:49,900 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:49,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 05:18:49,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:18:49,901 INFO L87 Difference]: Start difference. First operand 45112 states and 164930 transitions. Second operand 8 states. [2019-12-28 05:18:51,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:51,176 INFO L93 Difference]: Finished difference Result 55096 states and 197674 transitions. [2019-12-28 05:18:51,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-28 05:18:51,176 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 65 [2019-12-28 05:18:51,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:51,285 INFO L225 Difference]: With dead ends: 55096 [2019-12-28 05:18:51,286 INFO L226 Difference]: Without dead ends: 54896 [2019-12-28 05:18:51,286 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=117, Invalid=389, Unknown=0, NotChecked=0, Total=506 [2019-12-28 05:18:51,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54896 states. [2019-12-28 05:18:52,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54896 to 45990. [2019-12-28 05:18:52,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45990 states. [2019-12-28 05:18:52,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45990 states to 45990 states and 167801 transitions. [2019-12-28 05:18:52,339 INFO L78 Accepts]: Start accepts. Automaton has 45990 states and 167801 transitions. Word has length 65 [2019-12-28 05:18:52,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:52,339 INFO L462 AbstractCegarLoop]: Abstraction has 45990 states and 167801 transitions. [2019-12-28 05:18:52,339 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 05:18:52,339 INFO L276 IsEmpty]: Start isEmpty. Operand 45990 states and 167801 transitions. [2019-12-28 05:18:52,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:18:52,374 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:52,375 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:52,375 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:52,375 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:52,375 INFO L82 PathProgramCache]: Analyzing trace with hash 823868575, now seen corresponding path program 1 times [2019-12-28 05:18:52,376 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:52,376 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737510246] [2019-12-28 05:18:52,376 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:52,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:52,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:52,540 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [737510246] [2019-12-28 05:18:52,540 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:52,540 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:18:52,540 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1275225759] [2019-12-28 05:18:52,540 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:52,551 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:52,562 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 70 states and 71 transitions. [2019-12-28 05:18:52,563 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:52,563 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:52,563 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:18:52,564 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:52,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:18:52,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:18:52,564 INFO L87 Difference]: Start difference. First operand 45990 states and 167801 transitions. Second operand 6 states. [2019-12-28 05:18:53,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:53,359 INFO L93 Difference]: Finished difference Result 65550 states and 237328 transitions. [2019-12-28 05:18:53,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:18:53,360 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-28 05:18:53,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:53,501 INFO L225 Difference]: With dead ends: 65550 [2019-12-28 05:18:53,502 INFO L226 Difference]: Without dead ends: 64906 [2019-12-28 05:18:53,502 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:18:54,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64906 states. [2019-12-28 05:18:54,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64906 to 56040. [2019-12-28 05:18:54,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56040 states. [2019-12-28 05:18:54,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56040 states to 56040 states and 204331 transitions. [2019-12-28 05:18:54,919 INFO L78 Accepts]: Start accepts. Automaton has 56040 states and 204331 transitions. Word has length 67 [2019-12-28 05:18:54,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:54,919 INFO L462 AbstractCegarLoop]: Abstraction has 56040 states and 204331 transitions. [2019-12-28 05:18:54,919 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:18:54,919 INFO L276 IsEmpty]: Start isEmpty. Operand 56040 states and 204331 transitions. [2019-12-28 05:18:54,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:18:54,970 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:54,970 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:54,970 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:54,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:54,970 INFO L82 PathProgramCache]: Analyzing trace with hash 1785482592, now seen corresponding path program 1 times [2019-12-28 05:18:54,971 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:54,971 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68081822] [2019-12-28 05:18:54,971 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:54,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:55,086 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:55,086 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [68081822] [2019-12-28 05:18:55,086 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:55,087 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:18:55,087 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1745278586] [2019-12-28 05:18:55,087 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:55,097 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:55,109 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 70 states and 71 transitions. [2019-12-28 05:18:55,110 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:55,110 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:18:55,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:18:55,110 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:55,111 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:18:55,111 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:55,111 INFO L87 Difference]: Start difference. First operand 56040 states and 204331 transitions. Second operand 7 states. [2019-12-28 05:18:56,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:56,552 INFO L93 Difference]: Finished difference Result 83028 states and 292759 transitions. [2019-12-28 05:18:56,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-28 05:18:56,553 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-28 05:18:56,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:56,732 INFO L225 Difference]: With dead ends: 83028 [2019-12-28 05:18:56,733 INFO L226 Difference]: Without dead ends: 83028 [2019-12-28 05:18:56,733 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:18:57,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83028 states. [2019-12-28 05:18:58,424 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83028 to 76077. [2019-12-28 05:18:58,424 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76077 states. [2019-12-28 05:18:58,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76077 states to 76077 states and 270626 transitions. [2019-12-28 05:18:58,626 INFO L78 Accepts]: Start accepts. Automaton has 76077 states and 270626 transitions. Word has length 67 [2019-12-28 05:18:58,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:58,627 INFO L462 AbstractCegarLoop]: Abstraction has 76077 states and 270626 transitions. [2019-12-28 05:18:58,627 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:18:58,627 INFO L276 IsEmpty]: Start isEmpty. Operand 76077 states and 270626 transitions. [2019-12-28 05:18:58,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-28 05:18:58,708 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:58,708 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:58,708 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:58,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:58,708 INFO L82 PathProgramCache]: Analyzing trace with hash -1264720223, now seen corresponding path program 1 times [2019-12-28 05:18:58,709 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:58,709 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95093443] [2019-12-28 05:18:58,709 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:58,723 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:58,775 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:58,776 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [95093443] [2019-12-28 05:18:58,776 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:58,776 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:18:58,776 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1117519875] [2019-12-28 05:18:58,776 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:58,788 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:58,800 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 70 states and 71 transitions. [2019-12-28 05:18:58,801 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:58,805 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:18:58,806 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:18:58,806 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:58,806 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:18:58,806 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:18:58,807 INFO L87 Difference]: Start difference. First operand 76077 states and 270626 transitions. Second operand 4 states. [2019-12-28 05:18:58,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:58,904 INFO L93 Difference]: Finished difference Result 17222 states and 54504 transitions. [2019-12-28 05:18:58,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:18:58,904 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-28 05:18:58,905 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:58,937 INFO L225 Difference]: With dead ends: 17222 [2019-12-28 05:18:58,937 INFO L226 Difference]: Without dead ends: 16744 [2019-12-28 05:18:58,937 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:18:58,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16744 states. [2019-12-28 05:18:59,140 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16744 to 16732. [2019-12-28 05:18:59,140 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16732 states. [2019-12-28 05:18:59,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16732 states to 16732 states and 52999 transitions. [2019-12-28 05:18:59,170 INFO L78 Accepts]: Start accepts. Automaton has 16732 states and 52999 transitions. Word has length 67 [2019-12-28 05:18:59,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:18:59,170 INFO L462 AbstractCegarLoop]: Abstraction has 16732 states and 52999 transitions. [2019-12-28 05:18:59,170 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:18:59,170 INFO L276 IsEmpty]: Start isEmpty. Operand 16732 states and 52999 transitions. [2019-12-28 05:18:59,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-28 05:18:59,182 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:18:59,182 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:18:59,182 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:18:59,182 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:18:59,182 INFO L82 PathProgramCache]: Analyzing trace with hash -357405743, now seen corresponding path program 1 times [2019-12-28 05:18:59,183 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:18:59,183 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1944560898] [2019-12-28 05:18:59,183 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:18:59,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:18:59,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:18:59,247 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1944560898] [2019-12-28 05:18:59,247 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:18:59,247 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:18:59,247 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [725673719] [2019-12-28 05:18:59,248 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:18:59,264 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:18:59,303 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 130 states and 181 transitions. [2019-12-28 05:18:59,303 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:18:59,338 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 05:18:59,338 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:18:59,339 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:18:59,339 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:18:59,339 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:18:59,339 INFO L87 Difference]: Start difference. First operand 16732 states and 52999 transitions. Second operand 6 states. [2019-12-28 05:18:59,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:18:59,625 INFO L93 Difference]: Finished difference Result 22096 states and 69080 transitions. [2019-12-28 05:18:59,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:18:59,625 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 77 [2019-12-28 05:18:59,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:18:59,658 INFO L225 Difference]: With dead ends: 22096 [2019-12-28 05:18:59,658 INFO L226 Difference]: Without dead ends: 22096 [2019-12-28 05:18:59,658 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:18:59,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22096 states. [2019-12-28 05:19:00,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22096 to 17608. [2019-12-28 05:19:00,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17608 states. [2019-12-28 05:19:00,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17608 states to 17608 states and 55558 transitions. [2019-12-28 05:19:00,066 INFO L78 Accepts]: Start accepts. Automaton has 17608 states and 55558 transitions. Word has length 77 [2019-12-28 05:19:00,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:00,066 INFO L462 AbstractCegarLoop]: Abstraction has 17608 states and 55558 transitions. [2019-12-28 05:19:00,066 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:19:00,066 INFO L276 IsEmpty]: Start isEmpty. Operand 17608 states and 55558 transitions. [2019-12-28 05:19:00,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2019-12-28 05:19:00,080 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:00,080 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:00,080 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:00,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:00,080 INFO L82 PathProgramCache]: Analyzing trace with hash -612142288, now seen corresponding path program 1 times [2019-12-28 05:19:00,081 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:00,081 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805257799] [2019-12-28 05:19:00,081 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:00,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:00,218 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:00,218 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [805257799] [2019-12-28 05:19:00,219 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:00,219 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 05:19:00,219 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1114957190] [2019-12-28 05:19:00,219 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:00,237 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:00,284 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 130 states and 181 transitions. [2019-12-28 05:19:00,284 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:00,314 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-28 05:19:00,315 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 05:19:00,316 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:00,316 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 05:19:00,316 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:19:00,316 INFO L87 Difference]: Start difference. First operand 17608 states and 55558 transitions. Second operand 9 states. [2019-12-28 05:19:01,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:01,573 INFO L93 Difference]: Finished difference Result 19702 states and 61634 transitions. [2019-12-28 05:19:01,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-28 05:19:01,573 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 77 [2019-12-28 05:19:01,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:01,604 INFO L225 Difference]: With dead ends: 19702 [2019-12-28 05:19:01,604 INFO L226 Difference]: Without dead ends: 19654 [2019-12-28 05:19:01,605 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 157 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=175, Invalid=637, Unknown=0, NotChecked=0, Total=812 [2019-12-28 05:19:01,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19654 states. [2019-12-28 05:19:01,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19654 to 15526. [2019-12-28 05:19:01,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15526 states. [2019-12-28 05:19:01,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15526 states to 15526 states and 49292 transitions. [2019-12-28 05:19:01,839 INFO L78 Accepts]: Start accepts. Automaton has 15526 states and 49292 transitions. Word has length 77 [2019-12-28 05:19:01,839 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:01,840 INFO L462 AbstractCegarLoop]: Abstraction has 15526 states and 49292 transitions. [2019-12-28 05:19:01,840 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 05:19:01,840 INFO L276 IsEmpty]: Start isEmpty. Operand 15526 states and 49292 transitions. [2019-12-28 05:19:01,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2019-12-28 05:19:01,855 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:01,855 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:01,855 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:01,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:01,856 INFO L82 PathProgramCache]: Analyzing trace with hash -2124522827, now seen corresponding path program 1 times [2019-12-28 05:19:01,857 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:01,861 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1996956120] [2019-12-28 05:19:01,862 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:01,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:01,913 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:01,914 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1996956120] [2019-12-28 05:19:01,914 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:01,914 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:19:01,914 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1307013675] [2019-12-28 05:19:01,915 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:01,952 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:01,979 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 84 states and 88 transitions. [2019-12-28 05:19:01,979 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:01,980 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:19:01,980 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:19:01,980 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:01,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:19:01,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:19:01,981 INFO L87 Difference]: Start difference. First operand 15526 states and 49292 transitions. Second operand 3 states. [2019-12-28 05:19:02,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:02,241 INFO L93 Difference]: Finished difference Result 16790 states and 53005 transitions. [2019-12-28 05:19:02,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:19:02,241 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 78 [2019-12-28 05:19:02,242 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:02,266 INFO L225 Difference]: With dead ends: 16790 [2019-12-28 05:19:02,267 INFO L226 Difference]: Without dead ends: 16790 [2019-12-28 05:19:02,267 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:19:02,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16790 states. [2019-12-28 05:19:02,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16790 to 16142. [2019-12-28 05:19:02,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16142 states. [2019-12-28 05:19:02,495 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16142 states to 16142 states and 51106 transitions. [2019-12-28 05:19:02,495 INFO L78 Accepts]: Start accepts. Automaton has 16142 states and 51106 transitions. Word has length 78 [2019-12-28 05:19:02,495 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:02,495 INFO L462 AbstractCegarLoop]: Abstraction has 16142 states and 51106 transitions. [2019-12-28 05:19:02,495 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:19:02,495 INFO L276 IsEmpty]: Start isEmpty. Operand 16142 states and 51106 transitions. [2019-12-28 05:19:02,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-12-28 05:19:02,509 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:02,509 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:02,510 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:02,510 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:02,510 INFO L82 PathProgramCache]: Analyzing trace with hash 2047654897, now seen corresponding path program 1 times [2019-12-28 05:19:02,511 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:02,511 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031074083] [2019-12-28 05:19:02,511 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:02,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:02,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:02,564 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031074083] [2019-12-28 05:19:02,564 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:02,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:19:02,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [738669680] [2019-12-28 05:19:02,565 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:02,580 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:02,712 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 80 states and 79 transitions. [2019-12-28 05:19:02,712 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:02,713 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:19:02,713 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:19:02,713 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:02,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:19:02,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:19:02,714 INFO L87 Difference]: Start difference. First operand 16142 states and 51106 transitions. Second operand 4 states. [2019-12-28 05:19:03,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:03,081 INFO L93 Difference]: Finished difference Result 19270 states and 60152 transitions. [2019-12-28 05:19:03,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-28 05:19:03,081 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 79 [2019-12-28 05:19:03,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:03,110 INFO L225 Difference]: With dead ends: 19270 [2019-12-28 05:19:03,110 INFO L226 Difference]: Without dead ends: 19270 [2019-12-28 05:19:03,110 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:19:03,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19270 states. [2019-12-28 05:19:03,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19270 to 18247. [2019-12-28 05:19:03,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18247 states. [2019-12-28 05:19:03,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18247 states to 18247 states and 57268 transitions. [2019-12-28 05:19:03,350 INFO L78 Accepts]: Start accepts. Automaton has 18247 states and 57268 transitions. Word has length 79 [2019-12-28 05:19:03,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:03,350 INFO L462 AbstractCegarLoop]: Abstraction has 18247 states and 57268 transitions. [2019-12-28 05:19:03,350 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:19:03,350 INFO L276 IsEmpty]: Start isEmpty. Operand 18247 states and 57268 transitions. [2019-12-28 05:19:03,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2019-12-28 05:19:03,370 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:03,370 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:03,370 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:03,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:03,370 INFO L82 PathProgramCache]: Analyzing trace with hash 111994610, now seen corresponding path program 1 times [2019-12-28 05:19:03,371 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:03,371 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1633974896] [2019-12-28 05:19:03,371 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:03,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:03,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:03,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1633974896] [2019-12-28 05:19:03,424 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:03,424 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:19:03,424 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [757840482] [2019-12-28 05:19:03,424 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:03,440 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:03,461 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 80 states and 79 transitions. [2019-12-28 05:19:03,461 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:03,462 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:19:03,462 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:19:03,462 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:03,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:19:03,463 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:19:03,463 INFO L87 Difference]: Start difference. First operand 18247 states and 57268 transitions. Second operand 3 states. [2019-12-28 05:19:03,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:03,716 INFO L93 Difference]: Finished difference Result 19578 states and 61167 transitions. [2019-12-28 05:19:03,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:19:03,717 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 79 [2019-12-28 05:19:03,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:03,746 INFO L225 Difference]: With dead ends: 19578 [2019-12-28 05:19:03,746 INFO L226 Difference]: Without dead ends: 19578 [2019-12-28 05:19:03,746 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:19:03,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19578 states. [2019-12-28 05:19:03,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19578 to 18919. [2019-12-28 05:19:03,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18919 states. [2019-12-28 05:19:04,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18919 states to 18919 states and 59232 transitions. [2019-12-28 05:19:04,000 INFO L78 Accepts]: Start accepts. Automaton has 18919 states and 59232 transitions. Word has length 79 [2019-12-28 05:19:04,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:04,001 INFO L462 AbstractCegarLoop]: Abstraction has 18919 states and 59232 transitions. [2019-12-28 05:19:04,001 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:19:04,001 INFO L276 IsEmpty]: Start isEmpty. Operand 18919 states and 59232 transitions. [2019-12-28 05:19:04,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:19:04,016 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:04,016 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:04,016 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:04,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:04,017 INFO L82 PathProgramCache]: Analyzing trace with hash 1909076484, now seen corresponding path program 1 times [2019-12-28 05:19:04,018 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:04,019 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [261732784] [2019-12-28 05:19:04,019 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:04,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:04,136 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:04,136 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [261732784] [2019-12-28 05:19:04,137 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:04,137 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:19:04,137 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1349147304] [2019-12-28 05:19:04,137 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:04,154 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:04,196 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 136 states and 190 transitions. [2019-12-28 05:19:04,196 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:04,198 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:19:04,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:19:04,199 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:04,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:19:04,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:19:04,200 INFO L87 Difference]: Start difference. First operand 18919 states and 59232 transitions. Second operand 6 states. [2019-12-28 05:19:05,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:05,074 INFO L93 Difference]: Finished difference Result 30232 states and 93411 transitions. [2019-12-28 05:19:05,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 05:19:05,074 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-12-28 05:19:05,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:05,119 INFO L225 Difference]: With dead ends: 30232 [2019-12-28 05:19:05,120 INFO L226 Difference]: Without dead ends: 30232 [2019-12-28 05:19:05,120 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:19:05,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30232 states. [2019-12-28 05:19:05,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30232 to 21553. [2019-12-28 05:19:05,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21553 states. [2019-12-28 05:19:05,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21553 states to 21553 states and 66907 transitions. [2019-12-28 05:19:05,644 INFO L78 Accepts]: Start accepts. Automaton has 21553 states and 66907 transitions. Word has length 80 [2019-12-28 05:19:05,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:05,644 INFO L462 AbstractCegarLoop]: Abstraction has 21553 states and 66907 transitions. [2019-12-28 05:19:05,644 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:19:05,644 INFO L276 IsEmpty]: Start isEmpty. Operand 21553 states and 66907 transitions. [2019-12-28 05:19:05,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:19:05,663 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:05,663 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:05,663 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:05,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:05,663 INFO L82 PathProgramCache]: Analyzing trace with hash -1141126331, now seen corresponding path program 1 times [2019-12-28 05:19:05,664 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:05,664 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754979032] [2019-12-28 05:19:05,664 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:05,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:05,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:05,723 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1754979032] [2019-12-28 05:19:05,723 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:05,723 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:19:05,724 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1677989809] [2019-12-28 05:19:05,724 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:05,739 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:05,780 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 136 states and 190 transitions. [2019-12-28 05:19:05,780 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:05,864 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:19:05,864 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:19:05,864 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:05,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:19:05,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:19:05,865 INFO L87 Difference]: Start difference. First operand 21553 states and 66907 transitions. Second operand 7 states. [2019-12-28 05:19:06,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:06,784 INFO L93 Difference]: Finished difference Result 28569 states and 87453 transitions. [2019-12-28 05:19:06,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:19:06,785 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 80 [2019-12-28 05:19:06,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:06,844 INFO L225 Difference]: With dead ends: 28569 [2019-12-28 05:19:06,844 INFO L226 Difference]: Without dead ends: 28569 [2019-12-28 05:19:06,845 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:19:06,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28569 states. [2019-12-28 05:19:07,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28569 to 25906. [2019-12-28 05:19:07,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25906 states. [2019-12-28 05:19:07,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25906 states to 25906 states and 79893 transitions. [2019-12-28 05:19:07,239 INFO L78 Accepts]: Start accepts. Automaton has 25906 states and 79893 transitions. Word has length 80 [2019-12-28 05:19:07,239 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:07,239 INFO L462 AbstractCegarLoop]: Abstraction has 25906 states and 79893 transitions. [2019-12-28 05:19:07,239 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:19:07,239 INFO L276 IsEmpty]: Start isEmpty. Operand 25906 states and 79893 transitions. [2019-12-28 05:19:07,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:19:07,262 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:07,262 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:07,262 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:07,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:07,262 INFO L82 PathProgramCache]: Analyzing trace with hash -502495842, now seen corresponding path program 1 times [2019-12-28 05:19:07,263 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:07,263 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991809861] [2019-12-28 05:19:07,263 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:07,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:07,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:07,323 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1991809861] [2019-12-28 05:19:07,323 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:07,323 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-28 05:19:07,323 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [885445219] [2019-12-28 05:19:07,323 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:07,339 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:07,377 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 118 states and 153 transitions. [2019-12-28 05:19:07,377 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:07,377 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:19:07,379 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-28 05:19:07,379 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:07,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-28 05:19:07,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:19:07,380 INFO L87 Difference]: Start difference. First operand 25906 states and 79893 transitions. Second operand 3 states. [2019-12-28 05:19:07,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:07,561 INFO L93 Difference]: Finished difference Result 24700 states and 74782 transitions. [2019-12-28 05:19:07,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-28 05:19:07,562 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 80 [2019-12-28 05:19:07,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:07,622 INFO L225 Difference]: With dead ends: 24700 [2019-12-28 05:19:07,623 INFO L226 Difference]: Without dead ends: 24700 [2019-12-28 05:19:07,624 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-28 05:19:07,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24700 states. [2019-12-28 05:19:08,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24700 to 23473. [2019-12-28 05:19:08,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23473 states. [2019-12-28 05:19:08,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23473 states to 23473 states and 71381 transitions. [2019-12-28 05:19:08,145 INFO L78 Accepts]: Start accepts. Automaton has 23473 states and 71381 transitions. Word has length 80 [2019-12-28 05:19:08,145 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:08,145 INFO L462 AbstractCegarLoop]: Abstraction has 23473 states and 71381 transitions. [2019-12-28 05:19:08,145 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-28 05:19:08,145 INFO L276 IsEmpty]: Start isEmpty. Operand 23473 states and 71381 transitions. [2019-12-28 05:19:08,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:19:08,176 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:08,176 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:08,176 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:08,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:08,177 INFO L82 PathProgramCache]: Analyzing trace with hash -1017053084, now seen corresponding path program 1 times [2019-12-28 05:19:08,178 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:08,178 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1296529702] [2019-12-28 05:19:08,178 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:08,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:08,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:08,291 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1296529702] [2019-12-28 05:19:08,291 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:08,292 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:19:08,292 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1830723978] [2019-12-28 05:19:08,292 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:08,307 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:08,480 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 136 states and 190 transitions. [2019-12-28 05:19:08,480 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:08,576 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:19:08,576 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 05:19:08,577 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:08,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 05:19:08,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:19:08,577 INFO L87 Difference]: Start difference. First operand 23473 states and 71381 transitions. Second operand 9 states. [2019-12-28 05:19:09,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:09,159 INFO L93 Difference]: Finished difference Result 24021 states and 72777 transitions. [2019-12-28 05:19:09,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-28 05:19:09,159 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 80 [2019-12-28 05:19:09,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:09,204 INFO L225 Difference]: With dead ends: 24021 [2019-12-28 05:19:09,205 INFO L226 Difference]: Without dead ends: 24021 [2019-12-28 05:19:09,205 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 4 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-12-28 05:19:09,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24021 states. [2019-12-28 05:19:09,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24021 to 23419. [2019-12-28 05:19:09,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23419 states. [2019-12-28 05:19:09,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23419 states to 23419 states and 71162 transitions. [2019-12-28 05:19:09,529 INFO L78 Accepts]: Start accepts. Automaton has 23419 states and 71162 transitions. Word has length 80 [2019-12-28 05:19:09,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:09,529 INFO L462 AbstractCegarLoop]: Abstraction has 23419 states and 71162 transitions. [2019-12-28 05:19:09,529 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 05:19:09,530 INFO L276 IsEmpty]: Start isEmpty. Operand 23419 states and 71162 transitions. [2019-12-28 05:19:09,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:19:09,551 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:09,551 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:09,551 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:09,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:09,551 INFO L82 PathProgramCache]: Analyzing trace with hash 615750915, now seen corresponding path program 1 times [2019-12-28 05:19:09,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:09,552 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [455815070] [2019-12-28 05:19:09,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:09,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:09,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:09,666 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [455815070] [2019-12-28 05:19:09,666 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:09,666 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:19:09,666 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [710848247] [2019-12-28 05:19:09,667 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:09,683 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:09,724 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 136 states and 190 transitions. [2019-12-28 05:19:09,725 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:09,725 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:19:09,726 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:19:09,726 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:09,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:19:09,727 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:19:09,727 INFO L87 Difference]: Start difference. First operand 23419 states and 71162 transitions. Second operand 5 states. [2019-12-28 05:19:10,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:10,092 INFO L93 Difference]: Finished difference Result 23362 states and 70971 transitions. [2019-12-28 05:19:10,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:19:10,093 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 80 [2019-12-28 05:19:10,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:10,150 INFO L225 Difference]: With dead ends: 23362 [2019-12-28 05:19:10,150 INFO L226 Difference]: Without dead ends: 23362 [2019-12-28 05:19:10,151 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:19:10,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23362 states. [2019-12-28 05:19:10,669 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23362 to 23323. [2019-12-28 05:19:10,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23323 states. [2019-12-28 05:19:10,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23323 states to 23323 states and 70867 transitions. [2019-12-28 05:19:10,763 INFO L78 Accepts]: Start accepts. Automaton has 23323 states and 70867 transitions. Word has length 80 [2019-12-28 05:19:10,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:10,764 INFO L462 AbstractCegarLoop]: Abstraction has 23323 states and 70867 transitions. [2019-12-28 05:19:10,764 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:19:10,764 INFO L276 IsEmpty]: Start isEmpty. Operand 23323 states and 70867 transitions. [2019-12-28 05:19:10,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2019-12-28 05:19:10,808 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:10,808 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:10,809 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:10,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:10,809 INFO L82 PathProgramCache]: Analyzing trace with hash 332600451, now seen corresponding path program 1 times [2019-12-28 05:19:10,810 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:10,811 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [10389139] [2019-12-28 05:19:10,811 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:10,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:10,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:10,937 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [10389139] [2019-12-28 05:19:10,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:10,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:19:10,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1994710017] [2019-12-28 05:19:10,939 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:10,972 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:11,029 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 136 states and 190 transitions. [2019-12-28 05:19:11,030 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:11,052 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 05:19:11,052 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:19:11,052 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:11,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:19:11,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:19:11,054 INFO L87 Difference]: Start difference. First operand 23323 states and 70867 transitions. Second operand 6 states. [2019-12-28 05:19:11,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:11,113 INFO L93 Difference]: Finished difference Result 3175 states and 7725 transitions. [2019-12-28 05:19:11,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 05:19:11,113 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 80 [2019-12-28 05:19:11,114 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:11,118 INFO L225 Difference]: With dead ends: 3175 [2019-12-28 05:19:11,118 INFO L226 Difference]: Without dead ends: 2657 [2019-12-28 05:19:11,118 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=32, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:19:11,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2657 states. [2019-12-28 05:19:11,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2657 to 2500. [2019-12-28 05:19:11,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2500 states. [2019-12-28 05:19:11,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2500 states to 2500 states and 6046 transitions. [2019-12-28 05:19:11,156 INFO L78 Accepts]: Start accepts. Automaton has 2500 states and 6046 transitions. Word has length 80 [2019-12-28 05:19:11,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:11,156 INFO L462 AbstractCegarLoop]: Abstraction has 2500 states and 6046 transitions. [2019-12-28 05:19:11,157 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:19:11,157 INFO L276 IsEmpty]: Start isEmpty. Operand 2500 states and 6046 transitions. [2019-12-28 05:19:11,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:19:11,160 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:11,160 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:11,160 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:11,161 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:11,161 INFO L82 PathProgramCache]: Analyzing trace with hash -972148400, now seen corresponding path program 1 times [2019-12-28 05:19:11,161 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:11,164 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1295000151] [2019-12-28 05:19:11,164 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:11,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:11,238 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:11,242 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1295000151] [2019-12-28 05:19:11,243 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:11,243 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:19:11,243 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [558350112] [2019-12-28 05:19:11,243 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:11,268 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:11,333 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 136 states and 178 transitions. [2019-12-28 05:19:11,333 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:11,426 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 9 times. [2019-12-28 05:19:11,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 05:19:11,426 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:11,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 05:19:11,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:19:11,427 INFO L87 Difference]: Start difference. First operand 2500 states and 6046 transitions. Second operand 9 states. [2019-12-28 05:19:12,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:12,368 INFO L93 Difference]: Finished difference Result 3931 states and 9562 transitions. [2019-12-28 05:19:12,368 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 05:19:12,368 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 92 [2019-12-28 05:19:12,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:12,374 INFO L225 Difference]: With dead ends: 3931 [2019-12-28 05:19:12,375 INFO L226 Difference]: Without dead ends: 3931 [2019-12-28 05:19:12,375 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 9 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=63, Invalid=147, Unknown=0, NotChecked=0, Total=210 [2019-12-28 05:19:12,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3931 states. [2019-12-28 05:19:12,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3931 to 2578. [2019-12-28 05:19:12,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2578 states. [2019-12-28 05:19:12,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2578 states to 2578 states and 6210 transitions. [2019-12-28 05:19:12,405 INFO L78 Accepts]: Start accepts. Automaton has 2578 states and 6210 transitions. Word has length 92 [2019-12-28 05:19:12,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:12,405 INFO L462 AbstractCegarLoop]: Abstraction has 2578 states and 6210 transitions. [2019-12-28 05:19:12,405 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 05:19:12,405 INFO L276 IsEmpty]: Start isEmpty. Operand 2578 states and 6210 transitions. [2019-12-28 05:19:12,407 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:19:12,407 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:12,407 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:12,407 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:12,408 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:12,408 INFO L82 PathProgramCache]: Analyzing trace with hash 38995794, now seen corresponding path program 1 times [2019-12-28 05:19:12,408 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:12,408 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1103220874] [2019-12-28 05:19:12,409 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:12,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:12,552 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:12,552 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1103220874] [2019-12-28 05:19:12,553 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:12,553 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:19:12,553 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1231553840] [2019-12-28 05:19:12,553 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:12,603 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:12,693 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 146 states and 198 transitions. [2019-12-28 05:19:12,693 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:12,929 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 11 times. [2019-12-28 05:19:12,930 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-28 05:19:12,930 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:12,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-28 05:19:12,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2019-12-28 05:19:12,930 INFO L87 Difference]: Start difference. First operand 2578 states and 6210 transitions. Second operand 13 states. [2019-12-28 05:19:13,911 WARN L192 SmtUtils]: Spent 112.00 ms on a formula simplification. DAG size of input: 39 DAG size of output: 30 [2019-12-28 05:19:14,800 WARN L192 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 30 [2019-12-28 05:19:16,697 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:16,697 INFO L93 Difference]: Finished difference Result 2940 states and 6872 transitions. [2019-12-28 05:19:16,697 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-28 05:19:16,698 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 92 [2019-12-28 05:19:16,698 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:16,701 INFO L225 Difference]: With dead ends: 2940 [2019-12-28 05:19:16,702 INFO L226 Difference]: Without dead ends: 2940 [2019-12-28 05:19:16,702 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 364 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=327, Invalid=1233, Unknown=0, NotChecked=0, Total=1560 [2019-12-28 05:19:16,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2940 states. [2019-12-28 05:19:16,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2940 to 2417. [2019-12-28 05:19:16,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2417 states. [2019-12-28 05:19:16,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2417 states to 2417 states and 5739 transitions. [2019-12-28 05:19:16,727 INFO L78 Accepts]: Start accepts. Automaton has 2417 states and 5739 transitions. Word has length 92 [2019-12-28 05:19:16,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:16,727 INFO L462 AbstractCegarLoop]: Abstraction has 2417 states and 5739 transitions. [2019-12-28 05:19:16,727 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-28 05:19:16,728 INFO L276 IsEmpty]: Start isEmpty. Operand 2417 states and 5739 transitions. [2019-12-28 05:19:16,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:19:16,729 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:16,730 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:16,730 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:16,730 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:16,730 INFO L82 PathProgramCache]: Analyzing trace with hash 856337861, now seen corresponding path program 1 times [2019-12-28 05:19:16,731 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:16,731 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1216017941] [2019-12-28 05:19:16,731 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:16,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:16,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:16,845 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1216017941] [2019-12-28 05:19:16,846 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:16,846 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-28 05:19:16,846 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [585370382] [2019-12-28 05:19:16,846 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:16,869 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:16,954 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 139 states and 183 transitions. [2019-12-28 05:19:16,954 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:17,024 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:19:17,025 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-28 05:19:17,025 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:17,026 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-28 05:19:17,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:19:17,026 INFO L87 Difference]: Start difference. First operand 2417 states and 5739 transitions. Second operand 10 states. [2019-12-28 05:19:18,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:18,316 INFO L93 Difference]: Finished difference Result 6312 states and 15197 transitions. [2019-12-28 05:19:18,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-28 05:19:18,317 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 92 [2019-12-28 05:19:18,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:18,327 INFO L225 Difference]: With dead ends: 6312 [2019-12-28 05:19:18,328 INFO L226 Difference]: Without dead ends: 6258 [2019-12-28 05:19:18,328 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=137, Invalid=415, Unknown=0, NotChecked=0, Total=552 [2019-12-28 05:19:18,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6258 states. [2019-12-28 05:19:18,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6258 to 2849. [2019-12-28 05:19:18,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2849 states. [2019-12-28 05:19:18,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2849 states to 2849 states and 6724 transitions. [2019-12-28 05:19:18,393 INFO L78 Accepts]: Start accepts. Automaton has 2849 states and 6724 transitions. Word has length 92 [2019-12-28 05:19:18,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:18,394 INFO L462 AbstractCegarLoop]: Abstraction has 2849 states and 6724 transitions. [2019-12-28 05:19:18,394 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-28 05:19:18,394 INFO L276 IsEmpty]: Start isEmpty. Operand 2849 states and 6724 transitions. [2019-12-28 05:19:18,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:19:18,397 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:18,397 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:18,400 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:18,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:18,401 INFO L82 PathProgramCache]: Analyzing trace with hash 573187397, now seen corresponding path program 1 times [2019-12-28 05:19:18,402 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:18,402 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242155519] [2019-12-28 05:19:18,402 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:18,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:18,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:18,535 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242155519] [2019-12-28 05:19:18,535 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:18,535 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:19:18,535 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [236852694] [2019-12-28 05:19:18,536 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:18,558 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:18,623 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 139 states and 183 transitions. [2019-12-28 05:19:18,624 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:18,657 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:19:18,657 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-28 05:19:18,658 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:18,659 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-28 05:19:18,659 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-28 05:19:18,659 INFO L87 Difference]: Start difference. First operand 2849 states and 6724 transitions. Second operand 8 states. [2019-12-28 05:19:18,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:18,898 INFO L93 Difference]: Finished difference Result 3194 states and 7368 transitions. [2019-12-28 05:19:18,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 05:19:18,899 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 92 [2019-12-28 05:19:18,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:18,905 INFO L225 Difference]: With dead ends: 3194 [2019-12-28 05:19:18,906 INFO L226 Difference]: Without dead ends: 3135 [2019-12-28 05:19:18,906 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:19:18,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3135 states. [2019-12-28 05:19:18,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3135 to 2880. [2019-12-28 05:19:18,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2880 states. [2019-12-28 05:19:18,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2880 states to 2880 states and 6747 transitions. [2019-12-28 05:19:18,957 INFO L78 Accepts]: Start accepts. Automaton has 2880 states and 6747 transitions. Word has length 92 [2019-12-28 05:19:18,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:18,957 INFO L462 AbstractCegarLoop]: Abstraction has 2880 states and 6747 transitions. [2019-12-28 05:19:18,957 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-28 05:19:18,958 INFO L276 IsEmpty]: Start isEmpty. Operand 2880 states and 6747 transitions. [2019-12-28 05:19:18,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:19:18,963 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:18,963 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:18,964 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:18,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:18,964 INFO L82 PathProgramCache]: Analyzing trace with hash -1448269534, now seen corresponding path program 1 times [2019-12-28 05:19:18,965 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:18,965 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268021400] [2019-12-28 05:19:18,966 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:18,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:19,090 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:19,090 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1268021400] [2019-12-28 05:19:19,091 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:19,091 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:19:19,091 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [80322041] [2019-12-28 05:19:19,091 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:19,190 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:19,272 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 140 states and 185 transitions. [2019-12-28 05:19:19,273 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:19,317 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-28 05:19:19,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-28 05:19:19,318 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:19,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-28 05:19:19,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:19:19,319 INFO L87 Difference]: Start difference. First operand 2880 states and 6747 transitions. Second operand 9 states. [2019-12-28 05:19:20,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:20,008 INFO L93 Difference]: Finished difference Result 7102 states and 16904 transitions. [2019-12-28 05:19:20,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-28 05:19:20,009 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 92 [2019-12-28 05:19:20,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:20,018 INFO L225 Difference]: With dead ends: 7102 [2019-12-28 05:19:20,018 INFO L226 Difference]: Without dead ends: 7102 [2019-12-28 05:19:20,018 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 7 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=56, Invalid=100, Unknown=0, NotChecked=0, Total=156 [2019-12-28 05:19:20,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7102 states. [2019-12-28 05:19:20,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7102 to 2891. [2019-12-28 05:19:20,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2891 states. [2019-12-28 05:19:20,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2891 states to 2891 states and 6778 transitions. [2019-12-28 05:19:20,062 INFO L78 Accepts]: Start accepts. Automaton has 2891 states and 6778 transitions. Word has length 92 [2019-12-28 05:19:20,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:20,063 INFO L462 AbstractCegarLoop]: Abstraction has 2891 states and 6778 transitions. [2019-12-28 05:19:20,063 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-28 05:19:20,063 INFO L276 IsEmpty]: Start isEmpty. Operand 2891 states and 6778 transitions. [2019-12-28 05:19:20,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:19:20,065 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:20,065 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:20,065 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:20,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:20,066 INFO L82 PathProgramCache]: Analyzing trace with hash -1041045823, now seen corresponding path program 1 times [2019-12-28 05:19:20,066 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:20,066 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682657733] [2019-12-28 05:19:20,066 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:20,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:20,167 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:20,168 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1682657733] [2019-12-28 05:19:20,168 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:20,168 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:19:20,168 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [35806667] [2019-12-28 05:19:20,169 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:20,185 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:20,253 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 140 states and 185 transitions. [2019-12-28 05:19:20,253 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:20,329 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 05:19:20,329 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-28 05:19:20,330 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:20,330 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-28 05:19:20,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2019-12-28 05:19:20,331 INFO L87 Difference]: Start difference. First operand 2891 states and 6778 transitions. Second operand 10 states. [2019-12-28 05:19:21,793 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:21,793 INFO L93 Difference]: Finished difference Result 8274 states and 19368 transitions. [2019-12-28 05:19:21,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-28 05:19:21,794 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 92 [2019-12-28 05:19:21,794 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:21,803 INFO L225 Difference]: With dead ends: 8274 [2019-12-28 05:19:21,803 INFO L226 Difference]: Without dead ends: 8184 [2019-12-28 05:19:21,804 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=155, Invalid=445, Unknown=0, NotChecked=0, Total=600 [2019-12-28 05:19:21,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8184 states. [2019-12-28 05:19:21,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8184 to 2924. [2019-12-28 05:19:21,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2924 states. [2019-12-28 05:19:21,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2924 states to 2924 states and 6834 transitions. [2019-12-28 05:19:21,853 INFO L78 Accepts]: Start accepts. Automaton has 2924 states and 6834 transitions. Word has length 92 [2019-12-28 05:19:21,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:21,853 INFO L462 AbstractCegarLoop]: Abstraction has 2924 states and 6834 transitions. [2019-12-28 05:19:21,853 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-28 05:19:21,853 INFO L276 IsEmpty]: Start isEmpty. Operand 2924 states and 6834 transitions. [2019-12-28 05:19:21,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-28 05:19:21,855 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:21,855 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:21,856 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:21,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:21,856 INFO L82 PathProgramCache]: Analyzing trace with hash -1324196287, now seen corresponding path program 1 times [2019-12-28 05:19:21,856 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:21,857 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1152266542] [2019-12-28 05:19:21,857 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:21,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:21,954 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:21,955 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1152266542] [2019-12-28 05:19:21,955 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:21,955 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:19:21,955 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1748175314] [2019-12-28 05:19:21,955 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:21,972 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:22,041 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 140 states and 185 transitions. [2019-12-28 05:19:22,041 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:22,054 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 3 times. [2019-12-28 05:19:22,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:19:22,055 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:22,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:19:22,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:19:22,055 INFO L87 Difference]: Start difference. First operand 2924 states and 6834 transitions. Second operand 7 states. [2019-12-28 05:19:22,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:22,271 INFO L93 Difference]: Finished difference Result 2834 states and 6516 transitions. [2019-12-28 05:19:22,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 05:19:22,271 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 92 [2019-12-28 05:19:22,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:22,276 INFO L225 Difference]: With dead ends: 2834 [2019-12-28 05:19:22,277 INFO L226 Difference]: Without dead ends: 2834 [2019-12-28 05:19:22,277 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=44, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:19:22,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2834 states. [2019-12-28 05:19:22,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2834 to 1966. [2019-12-28 05:19:22,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1966 states. [2019-12-28 05:19:22,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1966 states to 1966 states and 4627 transitions. [2019-12-28 05:19:22,314 INFO L78 Accepts]: Start accepts. Automaton has 1966 states and 4627 transitions. Word has length 92 [2019-12-28 05:19:22,314 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:22,314 INFO L462 AbstractCegarLoop]: Abstraction has 1966 states and 4627 transitions. [2019-12-28 05:19:22,315 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:19:22,315 INFO L276 IsEmpty]: Start isEmpty. Operand 1966 states and 4627 transitions. [2019-12-28 05:19:22,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:19:22,318 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:22,318 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:22,318 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:22,319 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:22,319 INFO L82 PathProgramCache]: Analyzing trace with hash -1484688252, now seen corresponding path program 1 times [2019-12-28 05:19:22,320 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:22,320 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [344575989] [2019-12-28 05:19:22,320 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:22,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:22,424 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:22,424 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [344575989] [2019-12-28 05:19:22,424 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:22,425 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-28 05:19:22,425 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [542397565] [2019-12-28 05:19:22,425 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:22,441 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:22,526 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 159 states and 222 transitions. [2019-12-28 05:19:22,526 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:22,528 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 3 times. [2019-12-28 05:19:22,529 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-28 05:19:22,531 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:22,531 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-28 05:19:22,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:19:22,531 INFO L87 Difference]: Start difference. First operand 1966 states and 4627 transitions. Second operand 7 states. [2019-12-28 05:19:23,075 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:23,075 INFO L93 Difference]: Finished difference Result 3021 states and 6981 transitions. [2019-12-28 05:19:23,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-28 05:19:23,076 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 94 [2019-12-28 05:19:23,076 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:23,081 INFO L225 Difference]: With dead ends: 3021 [2019-12-28 05:19:23,081 INFO L226 Difference]: Without dead ends: 3003 [2019-12-28 05:19:23,082 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=159, Unknown=0, NotChecked=0, Total=210 [2019-12-28 05:19:23,086 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3003 states. [2019-12-28 05:19:23,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3003 to 2386. [2019-12-28 05:19:23,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2386 states. [2019-12-28 05:19:23,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2386 states to 2386 states and 5585 transitions. [2019-12-28 05:19:23,107 INFO L78 Accepts]: Start accepts. Automaton has 2386 states and 5585 transitions. Word has length 94 [2019-12-28 05:19:23,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:23,108 INFO L462 AbstractCegarLoop]: Abstraction has 2386 states and 5585 transitions. [2019-12-28 05:19:23,108 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-28 05:19:23,108 INFO L276 IsEmpty]: Start isEmpty. Operand 2386 states and 5585 transitions. [2019-12-28 05:19:23,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:19:23,110 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:23,110 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:23,110 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:23,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:23,110 INFO L82 PathProgramCache]: Analyzing trace with hash -239923771, now seen corresponding path program 1 times [2019-12-28 05:19:23,111 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:23,111 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [387756512] [2019-12-28 05:19:23,111 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:23,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:23,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:23,231 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [387756512] [2019-12-28 05:19:23,231 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:23,231 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:19:23,231 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1596780330] [2019-12-28 05:19:23,231 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:23,242 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:23,296 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 159 states and 222 transitions. [2019-12-28 05:19:23,296 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:23,298 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-28 05:19:23,298 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:19:23,298 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:23,298 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:19:23,298 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:19:23,299 INFO L87 Difference]: Start difference. First operand 2386 states and 5585 transitions. Second operand 6 states. [2019-12-28 05:19:23,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:23,442 INFO L93 Difference]: Finished difference Result 2440 states and 5643 transitions. [2019-12-28 05:19:23,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-28 05:19:23,443 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-12-28 05:19:23,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:23,445 INFO L225 Difference]: With dead ends: 2440 [2019-12-28 05:19:23,445 INFO L226 Difference]: Without dead ends: 2440 [2019-12-28 05:19:23,446 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=46, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:19:23,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2440 states. [2019-12-28 05:19:23,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2440 to 2311. [2019-12-28 05:19:23,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2311 states. [2019-12-28 05:19:23,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2311 states to 2311 states and 5390 transitions. [2019-12-28 05:19:23,467 INFO L78 Accepts]: Start accepts. Automaton has 2311 states and 5390 transitions. Word has length 94 [2019-12-28 05:19:23,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:23,467 INFO L462 AbstractCegarLoop]: Abstraction has 2311 states and 5390 transitions. [2019-12-28 05:19:23,467 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:19:23,467 INFO L276 IsEmpty]: Start isEmpty. Operand 2311 states and 5390 transitions. [2019-12-28 05:19:23,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:19:23,469 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:23,469 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:23,469 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:23,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:23,470 INFO L82 PathProgramCache]: Analyzing trace with hash -1154922491, now seen corresponding path program 1 times [2019-12-28 05:19:23,470 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:23,470 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [322066237] [2019-12-28 05:19:23,471 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:23,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:23,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:23,548 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [322066237] [2019-12-28 05:19:23,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:23,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-28 05:19:23,549 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [136019173] [2019-12-28 05:19:23,549 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:23,618 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:23,689 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 159 states and 222 transitions. [2019-12-28 05:19:23,690 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:23,691 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 05:19:23,691 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-28 05:19:23,692 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:23,692 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-28 05:19:23,692 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:19:23,692 INFO L87 Difference]: Start difference. First operand 2311 states and 5390 transitions. Second operand 5 states. [2019-12-28 05:19:23,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:23,886 INFO L93 Difference]: Finished difference Result 2563 states and 5969 transitions. [2019-12-28 05:19:23,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-28 05:19:23,886 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 94 [2019-12-28 05:19:23,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:23,890 INFO L225 Difference]: With dead ends: 2563 [2019-12-28 05:19:23,890 INFO L226 Difference]: Without dead ends: 2545 [2019-12-28 05:19:23,891 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-28 05:19:23,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2545 states. [2019-12-28 05:19:23,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2545 to 2010. [2019-12-28 05:19:23,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2010 states. [2019-12-28 05:19:23,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2010 states to 2010 states and 4698 transitions. [2019-12-28 05:19:23,913 INFO L78 Accepts]: Start accepts. Automaton has 2010 states and 4698 transitions. Word has length 94 [2019-12-28 05:19:23,913 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:23,914 INFO L462 AbstractCegarLoop]: Abstraction has 2010 states and 4698 transitions. [2019-12-28 05:19:23,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-28 05:19:23,914 INFO L276 IsEmpty]: Start isEmpty. Operand 2010 states and 4698 transitions. [2019-12-28 05:19:23,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:19:23,915 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:23,916 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:23,916 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:23,916 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:23,916 INFO L82 PathProgramCache]: Analyzing trace with hash 89841990, now seen corresponding path program 1 times [2019-12-28 05:19:23,917 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:23,917 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [399327520] [2019-12-28 05:19:23,917 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:23,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:24,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:24,024 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [399327520] [2019-12-28 05:19:24,024 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:24,024 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-28 05:19:24,024 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [826189873] [2019-12-28 05:19:24,025 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:24,041 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:24,115 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 159 states and 222 transitions. [2019-12-28 05:19:24,115 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:24,116 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-28 05:19:24,116 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-28 05:19:24,117 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:24,117 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-28 05:19:24,117 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-28 05:19:24,117 INFO L87 Difference]: Start difference. First operand 2010 states and 4698 transitions. Second operand 6 states. [2019-12-28 05:19:24,183 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:24,183 INFO L93 Difference]: Finished difference Result 3192 states and 7580 transitions. [2019-12-28 05:19:24,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-28 05:19:24,184 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 94 [2019-12-28 05:19:24,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:24,185 INFO L225 Difference]: With dead ends: 3192 [2019-12-28 05:19:24,186 INFO L226 Difference]: Without dead ends: 1251 [2019-12-28 05:19:24,186 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-28 05:19:24,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1251 states. [2019-12-28 05:19:24,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1251 to 1251. [2019-12-28 05:19:24,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1251 states. [2019-12-28 05:19:24,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1251 states to 1251 states and 2989 transitions. [2019-12-28 05:19:24,199 INFO L78 Accepts]: Start accepts. Automaton has 1251 states and 2989 transitions. Word has length 94 [2019-12-28 05:19:24,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:24,199 INFO L462 AbstractCegarLoop]: Abstraction has 1251 states and 2989 transitions. [2019-12-28 05:19:24,199 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-28 05:19:24,199 INFO L276 IsEmpty]: Start isEmpty. Operand 1251 states and 2989 transitions. [2019-12-28 05:19:24,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:19:24,201 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:24,201 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:24,201 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:24,201 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:24,201 INFO L82 PathProgramCache]: Analyzing trace with hash -919777892, now seen corresponding path program 2 times [2019-12-28 05:19:24,202 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:24,202 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1262509677] [2019-12-28 05:19:24,202 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:24,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:24,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:24,326 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1262509677] [2019-12-28 05:19:24,330 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:24,330 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-28 05:19:24,331 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [707699224] [2019-12-28 05:19:24,331 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:24,347 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:24,409 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 129 states and 155 transitions. [2019-12-28 05:19:24,409 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:24,470 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 8 times. [2019-12-28 05:19:24,470 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-28 05:19:24,470 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:24,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-28 05:19:24,471 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=154, Unknown=0, NotChecked=0, Total=182 [2019-12-28 05:19:24,471 INFO L87 Difference]: Start difference. First operand 1251 states and 2989 transitions. Second operand 14 states. [2019-12-28 05:19:25,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:25,460 INFO L93 Difference]: Finished difference Result 2779 states and 6574 transitions. [2019-12-28 05:19:25,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-28 05:19:25,461 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 94 [2019-12-28 05:19:25,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:25,464 INFO L225 Difference]: With dead ends: 2779 [2019-12-28 05:19:25,464 INFO L226 Difference]: Without dead ends: 2140 [2019-12-28 05:19:25,465 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=186, Invalid=870, Unknown=0, NotChecked=0, Total=1056 [2019-12-28 05:19:25,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2140 states. [2019-12-28 05:19:25,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2140 to 1674. [2019-12-28 05:19:25,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1674 states. [2019-12-28 05:19:25,490 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1674 states to 1674 states and 3896 transitions. [2019-12-28 05:19:25,491 INFO L78 Accepts]: Start accepts. Automaton has 1674 states and 3896 transitions. Word has length 94 [2019-12-28 05:19:25,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:25,491 INFO L462 AbstractCegarLoop]: Abstraction has 1674 states and 3896 transitions. [2019-12-28 05:19:25,491 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-28 05:19:25,491 INFO L276 IsEmpty]: Start isEmpty. Operand 1674 states and 3896 transitions. [2019-12-28 05:19:25,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:19:25,494 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:25,494 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:25,494 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:25,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:25,494 INFO L82 PathProgramCache]: Analyzing trace with hash 1169799134, now seen corresponding path program 1 times [2019-12-28 05:19:25,495 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:25,495 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1645738596] [2019-12-28 05:19:25,495 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:25,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-28 05:19:25,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-28 05:19:25,549 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1645738596] [2019-12-28 05:19:25,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-28 05:19:25,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-28 05:19:25,549 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1700730700] [2019-12-28 05:19:25,549 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-28 05:19:25,565 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-28 05:19:25,611 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 132 states and 166 transitions. [2019-12-28 05:19:25,611 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-28 05:19:25,612 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-28 05:19:25,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-28 05:19:25,612 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-28 05:19:25,612 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-28 05:19:25,612 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-28 05:19:25,612 INFO L87 Difference]: Start difference. First operand 1674 states and 3896 transitions. Second operand 4 states. [2019-12-28 05:19:25,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-28 05:19:25,636 INFO L93 Difference]: Finished difference Result 1674 states and 3862 transitions. [2019-12-28 05:19:25,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-28 05:19:25,637 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 94 [2019-12-28 05:19:25,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-28 05:19:25,638 INFO L225 Difference]: With dead ends: 1674 [2019-12-28 05:19:25,638 INFO L226 Difference]: Without dead ends: 1674 [2019-12-28 05:19:25,639 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-28 05:19:25,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1674 states. [2019-12-28 05:19:25,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1674 to 1594. [2019-12-28 05:19:25,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1594 states. [2019-12-28 05:19:25,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1594 states to 1594 states and 3710 transitions. [2019-12-28 05:19:25,657 INFO L78 Accepts]: Start accepts. Automaton has 1594 states and 3710 transitions. Word has length 94 [2019-12-28 05:19:25,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-28 05:19:25,657 INFO L462 AbstractCegarLoop]: Abstraction has 1594 states and 3710 transitions. [2019-12-28 05:19:25,658 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-28 05:19:25,658 INFO L276 IsEmpty]: Start isEmpty. Operand 1594 states and 3710 transitions. [2019-12-28 05:19:25,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2019-12-28 05:19:25,660 INFO L403 BasicCegarLoop]: Found error trace [2019-12-28 05:19:25,660 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-28 05:19:25,660 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-28 05:19:25,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-28 05:19:25,660 INFO L82 PathProgramCache]: Analyzing trace with hash -1370490878, now seen corresponding path program 3 times [2019-12-28 05:19:25,661 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-28 05:19:25,661 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1968852431] [2019-12-28 05:19:25,661 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-28 05:19:25,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 05:19:25,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-28 05:19:25,741 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-28 05:19:25,741 INFO L476 BasicCegarLoop]: Counterexample might be feasible [2019-12-28 05:19:25,911 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 28.12 05:19:25 BasicIcfg [2019-12-28 05:19:25,911 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-28 05:19:25,913 INFO L168 Benchmark]: Toolchain (without parser) took 65063.95 ms. Allocated memory was 144.2 MB in the beginning and 2.6 GB in the end (delta: 2.4 GB). Free memory was 100.7 MB in the beginning and 1.2 GB in the end (delta: -1.1 GB). Peak memory consumption was 1.3 GB. Max. memory is 7.1 GB. [2019-12-28 05:19:25,913 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 144.2 MB. Free memory was 120.5 MB in the beginning and 120.3 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. [2019-12-28 05:19:25,913 INFO L168 Benchmark]: CACSL2BoogieTranslator took 764.52 ms. Allocated memory was 144.2 MB in the beginning and 201.3 MB in the end (delta: 57.1 MB). Free memory was 100.3 MB in the beginning and 156.0 MB in the end (delta: -55.7 MB). Peak memory consumption was 21.6 MB. Max. memory is 7.1 GB. [2019-12-28 05:19:25,914 INFO L168 Benchmark]: Boogie Procedure Inliner took 69.84 ms. Allocated memory is still 201.3 MB. Free memory was 155.3 MB in the beginning and 152.6 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. [2019-12-28 05:19:25,914 INFO L168 Benchmark]: Boogie Preprocessor took 51.40 ms. Allocated memory is still 201.3 MB. Free memory was 152.6 MB in the beginning and 150.5 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 7.1 GB. [2019-12-28 05:19:25,914 INFO L168 Benchmark]: RCFGBuilder took 831.75 ms. Allocated memory is still 201.3 MB. Free memory was 150.5 MB in the beginning and 106.7 MB in the end (delta: 43.9 MB). Peak memory consumption was 43.9 MB. Max. memory is 7.1 GB. [2019-12-28 05:19:25,915 INFO L168 Benchmark]: TraceAbstraction took 63340.71 ms. Allocated memory was 201.3 MB in the beginning and 2.6 GB in the end (delta: 2.4 GB). Free memory was 106.0 MB in the beginning and 1.2 GB in the end (delta: -1.1 GB). Peak memory consumption was 1.3 GB. Max. memory is 7.1 GB. [2019-12-28 05:19:25,917 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 144.2 MB. Free memory was 120.5 MB in the beginning and 120.3 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 764.52 ms. Allocated memory was 144.2 MB in the beginning and 201.3 MB in the end (delta: 57.1 MB). Free memory was 100.3 MB in the beginning and 156.0 MB in the end (delta: -55.7 MB). Peak memory consumption was 21.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 69.84 ms. Allocated memory is still 201.3 MB. Free memory was 155.3 MB in the beginning and 152.6 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 51.40 ms. Allocated memory is still 201.3 MB. Free memory was 152.6 MB in the beginning and 150.5 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 7.1 GB. * RCFGBuilder took 831.75 ms. Allocated memory is still 201.3 MB. Free memory was 150.5 MB in the beginning and 106.7 MB in the end (delta: 43.9 MB). Peak memory consumption was 43.9 MB. Max. memory is 7.1 GB. * TraceAbstraction took 63340.71 ms. Allocated memory was 201.3 MB in the beginning and 2.6 GB in the end (delta: 2.4 GB). Free memory was 106.0 MB in the beginning and 1.2 GB in the end (delta: -1.1 GB). Peak memory consumption was 1.3 GB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L694] 0 int __unbuffered_cnt = 0; VAL [__unbuffered_cnt=0] [L695] 0 _Bool main$tmp_guard0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0] [L696] 0 _Bool main$tmp_guard1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0] [L698] 0 int x = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0] [L699] 0 _Bool x$flush_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0] [L700] 0 int x$mem_tmp; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0] [L701] 0 _Bool x$r_buff0_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0] [L702] 0 _Bool x$r_buff0_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0] [L703] 0 _Bool x$r_buff0_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0] [L704] 0 _Bool x$r_buff1_thd0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0] [L705] 0 _Bool x$r_buff1_thd1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0] [L706] 0 _Bool x$r_buff1_thd2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0] [L707] 0 _Bool x$read_delayed; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0] [L708] 0 int *x$read_delayed_var; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}] [L709] 0 int x$w_buff0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0] [L710] 0 _Bool x$w_buff0_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0] [L711] 0 int x$w_buff1; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0] [L712] 0 _Bool x$w_buff1_used; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0] [L714] 0 int y = 0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L715] 0 _Bool weak$$choice0; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L716] 0 _Bool weak$$choice2; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L776] 0 pthread_t t2483; VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L777] FCALL, FORK 0 pthread_create(&t2483, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L778] 0 pthread_t t2484; VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L779] FCALL, FORK 0 pthread_create(&t2484, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L740] 2 x$w_buff1 = x$w_buff0 [L741] 2 x$w_buff0 = 2 [L742] 2 x$w_buff1_used = x$w_buff0_used [L743] 2 x$w_buff0_used = (_Bool)1 [L4] COND FALSE 2 !(!expression) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L745] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L746] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L747] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L748] 2 x$r_buff0_thd2 = (_Bool)1 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L754] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L720] 1 y = 2 [L723] 1 x = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L754] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L755] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L726] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L726] EXPR 1 x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=2] [L726] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x)=2, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x=2, y=2] [L726] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L727] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L727] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L728] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L728] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L729] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L729] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L730] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L730] 1 x$r_buff1_thd1 = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$r_buff1_thd1 [L733] 1 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L755] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L756] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L756] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L757] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L757] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L758] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 VAL [__unbuffered_cnt=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L758] 2 x$r_buff1_thd2 = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$r_buff1_thd2 [L761] 2 __unbuffered_cnt = __unbuffered_cnt + 1 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] EXPR 0 x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L786] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L786] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L787] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L787] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L788] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L788] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L789] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L789] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 x$flush_delayed = weak$$choice2 [L795] 0 x$mem_tmp = x VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L797] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L797] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L798] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L798] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L799] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L799] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L800] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L800] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L801] EXPR 0 weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L801] 0 x$r_buff0_thd0 = weak$$choice2 ? x$r_buff0_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff0_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0)) [L802] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L802] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L804] EXPR 0 x$flush_delayed ? x$mem_tmp : x VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L804] 0 x = x$flush_delayed ? x$mem_tmp : x [L805] 0 x$flush_delayed = (_Bool)0 VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] COND TRUE 0 !expression VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L4] 0 __VERIFIER_error() VAL [__unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=0, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 139 locations, 2 error locations. Result: UNSAFE, OverallTime: 63.0s, OverallIterations: 36, TraceHistogramMax: 1, AutomataDifference: 29.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 9146 SDtfs, 11378 SDslu, 24243 SDs, 0 SdLazy, 12698 SolverSat, 801 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 13.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 542 GetRequests, 169 SyntacticMatches, 22 SemanticMatches, 351 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1230 ImplicationChecksByTransitivity, 6.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=76077occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 24.3s AutomataMinimizationTime, 35 MinimizatonAttempts, 108363 StatesRemovedByMinimization, 33 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 2.7s InterpolantComputationTime, 2794 NumberOfCodeBlocks, 2794 NumberOfCodeBlocksAsserted, 36 NumberOfCheckSat, 2665 ConstructedInterpolants, 0 QuantifiedInterpolants, 495584 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 35 InterpolantComputations, 35 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...