/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-SemanticLbe-MCR.epf -i ../../../trunk/examples/svcomp/pthread-wmm/safe029_power.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-4336eb1 [2019-12-27 18:46:00,483 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-27 18:46:00,488 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-27 18:46:00,506 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-27 18:46:00,506 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-27 18:46:00,508 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-27 18:46:00,510 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-27 18:46:00,522 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-27 18:46:00,526 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-27 18:46:00,528 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-27 18:46:00,529 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-27 18:46:00,532 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-27 18:46:00,532 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-27 18:46:00,534 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-27 18:46:00,537 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-27 18:46:00,539 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-27 18:46:00,540 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-27 18:46:00,541 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-27 18:46:00,542 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-27 18:46:00,548 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-27 18:46:00,553 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-27 18:46:00,558 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-27 18:46:00,560 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-27 18:46:00,560 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-27 18:46:00,563 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-27 18:46:00,563 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-27 18:46:00,563 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-27 18:46:00,565 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-27 18:46:00,567 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-27 18:46:00,568 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-27 18:46:00,568 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-27 18:46:00,569 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-27 18:46:00,570 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-27 18:46:00,571 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-27 18:46:00,572 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-27 18:46:00,572 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-27 18:46:00,573 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-27 18:46:00,573 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-27 18:46:00,573 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-27 18:46:00,574 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-27 18:46:00,575 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-27 18:46:00,576 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-SemanticLbe-MCR.epf [2019-12-27 18:46:00,612 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-27 18:46:00,612 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-27 18:46:00,614 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-27 18:46:00,617 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-27 18:46:00,617 INFO L138 SettingsManager]: * Use SBE=true [2019-12-27 18:46:00,617 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-27 18:46:00,618 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-27 18:46:00,618 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-27 18:46:00,618 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-27 18:46:00,618 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-27 18:46:00,618 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-27 18:46:00,619 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-27 18:46:00,619 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-27 18:46:00,619 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-27 18:46:00,619 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-27 18:46:00,619 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-27 18:46:00,622 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-27 18:46:00,622 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-27 18:46:00,622 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-27 18:46:00,623 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-27 18:46:00,623 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-27 18:46:00,623 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-27 18:46:00,623 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-27 18:46:00,624 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-27 18:46:00,624 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-27 18:46:00,624 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-27 18:46:00,624 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-27 18:46:00,624 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2019-12-27 18:46:00,626 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-27 18:46:00,626 INFO L138 SettingsManager]: * Interpolant automaton=MCR [2019-12-27 18:46:00,626 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-27 18:46:00,951 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-27 18:46:00,963 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-27 18:46:00,966 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-27 18:46:00,968 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-27 18:46:00,968 INFO L275 PluginConnector]: CDTParser initialized [2019-12-27 18:46:00,969 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/safe029_power.opt.i [2019-12-27 18:46:01,029 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c25a53e5e/abe0178a82fe4e60b2c14807dbf9411d/FLAGc026df0e0 [2019-12-27 18:46:01,544 INFO L306 CDTParser]: Found 1 translation units. [2019-12-27 18:46:01,545 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/safe029_power.opt.i [2019-12-27 18:46:01,567 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c25a53e5e/abe0178a82fe4e60b2c14807dbf9411d/FLAGc026df0e0 [2019-12-27 18:46:01,861 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/c25a53e5e/abe0178a82fe4e60b2c14807dbf9411d [2019-12-27 18:46:01,871 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-27 18:46:01,873 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-12-27 18:46:01,878 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-27 18:46:01,878 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-27 18:46:01,882 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-27 18:46:01,883 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.12 06:46:01" (1/1) ... [2019-12-27 18:46:01,885 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5ce4072b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:01, skipping insertion in model container [2019-12-27 18:46:01,886 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.12 06:46:01" (1/1) ... [2019-12-27 18:46:01,894 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-27 18:46:01,959 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-27 18:46:02,517 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-27 18:46:02,534 INFO L203 MainTranslator]: Completed pre-run [2019-12-27 18:46:02,630 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-27 18:46:02,719 INFO L208 MainTranslator]: Completed translation [2019-12-27 18:46:02,720 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:02 WrapperNode [2019-12-27 18:46:02,720 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-27 18:46:02,721 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-27 18:46:02,721 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-27 18:46:02,721 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-27 18:46:02,732 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:02" (1/1) ... [2019-12-27 18:46:02,760 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:02" (1/1) ... [2019-12-27 18:46:02,801 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-27 18:46:02,801 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-27 18:46:02,801 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-27 18:46:02,802 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-27 18:46:02,811 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:02" (1/1) ... [2019-12-27 18:46:02,812 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:02" (1/1) ... [2019-12-27 18:46:02,817 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:02" (1/1) ... [2019-12-27 18:46:02,817 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:02" (1/1) ... [2019-12-27 18:46:02,827 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:02" (1/1) ... [2019-12-27 18:46:02,831 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:02" (1/1) ... [2019-12-27 18:46:02,834 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:02" (1/1) ... [2019-12-27 18:46:02,839 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-27 18:46:02,846 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-27 18:46:02,846 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-27 18:46:02,846 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-27 18:46:02,847 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:02" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-27 18:46:02,913 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-27 18:46:02,913 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-27 18:46:02,913 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-27 18:46:02,914 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-27 18:46:02,914 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-27 18:46:02,914 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-27 18:46:02,914 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-27 18:46:02,914 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-27 18:46:02,914 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-27 18:46:02,914 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-27 18:46:02,915 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-27 18:46:02,916 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-27 18:46:03,572 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-27 18:46:03,573 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-27 18:46:03,574 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.12 06:46:03 BoogieIcfgContainer [2019-12-27 18:46:03,575 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-27 18:46:03,576 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-27 18:46:03,576 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-27 18:46:03,579 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-27 18:46:03,579 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.12 06:46:01" (1/3) ... [2019-12-27 18:46:03,580 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@382d81cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.12 06:46:03, skipping insertion in model container [2019-12-27 18:46:03,580 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 06:46:02" (2/3) ... [2019-12-27 18:46:03,581 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@382d81cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.12 06:46:03, skipping insertion in model container [2019-12-27 18:46:03,581 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.12 06:46:03" (3/3) ... [2019-12-27 18:46:03,583 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_power.opt.i [2019-12-27 18:46:03,593 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-27 18:46:03,593 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-27 18:46:03,601 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-27 18:46:03,602 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-27 18:46:03,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,637 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,637 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,638 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,638 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,638 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,639 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,639 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,639 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,640 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,640 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,642 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,642 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,642 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,642 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,643 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,643 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,643 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,643 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,644 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,644 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,644 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,644 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,645 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,645 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,646 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,646 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,646 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,646 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,647 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,648 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,648 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,648 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,649 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,649 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,649 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,650 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,651 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,652 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,653 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,654 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,656 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,657 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,658 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,659 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,659 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,660 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,660 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,660 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,661 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,661 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,661 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,661 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,662 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,662 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,666 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,667 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,667 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,682 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,682 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,682 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,683 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,683 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,683 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,683 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,688 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,689 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,689 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,689 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,690 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,691 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 18:46:03,708 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-27 18:46:03,731 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-27 18:46:03,731 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-27 18:46:03,731 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-27 18:46:03,731 INFO L376 AbstractCegarLoop]: Backedges is MCR [2019-12-27 18:46:03,731 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-27 18:46:03,731 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-27 18:46:03,732 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-27 18:46:03,732 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-27 18:46:03,754 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 145 places, 179 transitions [2019-12-27 18:46:03,756 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 145 places, 179 transitions [2019-12-27 18:46:03,868 INFO L132 PetriNetUnfolder]: 41/177 cut-off events. [2019-12-27 18:46:03,869 INFO L133 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-27 18:46:03,883 INFO L76 FinitePrefix]: Finished finitePrefix Result has 184 conditions, 177 events. 41/177 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 253 event pairs. 0/134 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-27 18:46:03,902 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 145 places, 179 transitions [2019-12-27 18:46:03,989 INFO L132 PetriNetUnfolder]: 41/177 cut-off events. [2019-12-27 18:46:03,989 INFO L133 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-27 18:46:03,999 INFO L76 FinitePrefix]: Finished finitePrefix Result has 184 conditions, 177 events. 41/177 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 5. Compared 253 event pairs. 0/134 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-27 18:46:04,018 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-12-27 18:46:04,019 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-27 18:46:08,330 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification that was a NOOP. DAG size: 67 [2019-12-27 18:46:08,599 WARN L192 SmtUtils]: Spent 212.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 77 [2019-12-27 18:46:08,726 INFO L206 etLargeBlockEncoding]: Checked pairs total: 47380 [2019-12-27 18:46:08,726 INFO L214 etLargeBlockEncoding]: Total number of compositions: 96 [2019-12-27 18:46:08,730 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 90 transitions [2019-12-27 18:46:09,201 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8608 states. [2019-12-27 18:46:09,203 INFO L276 IsEmpty]: Start isEmpty. Operand 8608 states. [2019-12-27 18:46:09,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-27 18:46:09,210 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:09,211 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-27 18:46:09,211 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:09,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:09,218 INFO L82 PathProgramCache]: Analyzing trace with hash 689103523, now seen corresponding path program 1 times [2019-12-27 18:46:09,229 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:09,230 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1331397198] [2019-12-27 18:46:09,230 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:09,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:09,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:09,469 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1331397198] [2019-12-27 18:46:09,470 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:09,470 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-27 18:46:09,471 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [386569959] [2019-12-27 18:46:09,471 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:09,476 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:09,489 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 6 states and 5 transitions. [2019-12-27 18:46:09,490 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:09,494 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 18:46:09,494 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-27 18:46:09,495 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:09,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-27 18:46:09,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-27 18:46:09,513 INFO L87 Difference]: Start difference. First operand 8608 states. Second operand 3 states. [2019-12-27 18:46:09,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:09,766 INFO L93 Difference]: Finished difference Result 8560 states and 27962 transitions. [2019-12-27 18:46:09,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-27 18:46:09,768 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-27 18:46:09,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:09,859 INFO L225 Difference]: With dead ends: 8560 [2019-12-27 18:46:09,859 INFO L226 Difference]: Without dead ends: 8391 [2019-12-27 18:46:09,863 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-27 18:46:10,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8391 states. [2019-12-27 18:46:10,322 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8391 to 8391. [2019-12-27 18:46:10,323 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8391 states. [2019-12-27 18:46:10,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8391 states to 8391 states and 27442 transitions. [2019-12-27 18:46:10,368 INFO L78 Accepts]: Start accepts. Automaton has 8391 states and 27442 transitions. Word has length 5 [2019-12-27 18:46:10,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:10,369 INFO L462 AbstractCegarLoop]: Abstraction has 8391 states and 27442 transitions. [2019-12-27 18:46:10,369 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-27 18:46:10,369 INFO L276 IsEmpty]: Start isEmpty. Operand 8391 states and 27442 transitions. [2019-12-27 18:46:10,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-27 18:46:10,371 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:10,372 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:10,372 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:10,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:10,373 INFO L82 PathProgramCache]: Analyzing trace with hash -1296433146, now seen corresponding path program 1 times [2019-12-27 18:46:10,373 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:10,373 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2012465352] [2019-12-27 18:46:10,373 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:10,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:10,486 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:10,486 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2012465352] [2019-12-27 18:46:10,487 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:10,487 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-27 18:46:10,487 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [767155706] [2019-12-27 18:46:10,487 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:10,490 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:10,493 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 24 states and 35 transitions. [2019-12-27 18:46:10,495 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:10,496 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 18:46:10,498 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-27 18:46:10,499 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:10,499 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-27 18:46:10,499 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-27 18:46:10,500 INFO L87 Difference]: Start difference. First operand 8391 states and 27442 transitions. Second operand 4 states. [2019-12-27 18:46:10,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:10,960 INFO L93 Difference]: Finished difference Result 13399 states and 41962 transitions. [2019-12-27 18:46:10,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-27 18:46:10,961 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-27 18:46:10,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:11,043 INFO L225 Difference]: With dead ends: 13399 [2019-12-27 18:46:11,043 INFO L226 Difference]: Without dead ends: 13392 [2019-12-27 18:46:11,044 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-27 18:46:11,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13392 states. [2019-12-27 18:46:11,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13392 to 11787. [2019-12-27 18:46:11,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11787 states. [2019-12-27 18:46:12,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11787 states to 11787 states and 37494 transitions. [2019-12-27 18:46:12,009 INFO L78 Accepts]: Start accepts. Automaton has 11787 states and 37494 transitions. Word has length 11 [2019-12-27 18:46:12,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:12,009 INFO L462 AbstractCegarLoop]: Abstraction has 11787 states and 37494 transitions. [2019-12-27 18:46:12,010 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-27 18:46:12,010 INFO L276 IsEmpty]: Start isEmpty. Operand 11787 states and 37494 transitions. [2019-12-27 18:46:12,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-27 18:46:12,012 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:12,012 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:12,013 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:12,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:12,013 INFO L82 PathProgramCache]: Analyzing trace with hash 825675890, now seen corresponding path program 1 times [2019-12-27 18:46:12,014 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:12,014 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [804020439] [2019-12-27 18:46:12,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:12,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:12,076 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:12,076 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [804020439] [2019-12-27 18:46:12,076 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:12,077 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-27 18:46:12,077 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1341294122] [2019-12-27 18:46:12,077 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:12,079 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:12,080 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 12 states and 11 transitions. [2019-12-27 18:46:12,081 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:12,081 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 18:46:12,081 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-27 18:46:12,082 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:12,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-27 18:46:12,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-27 18:46:12,083 INFO L87 Difference]: Start difference. First operand 11787 states and 37494 transitions. Second operand 4 states. [2019-12-27 18:46:12,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:12,452 INFO L93 Difference]: Finished difference Result 14846 states and 46774 transitions. [2019-12-27 18:46:12,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-27 18:46:12,453 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-27 18:46:12,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:12,501 INFO L225 Difference]: With dead ends: 14846 [2019-12-27 18:46:12,501 INFO L226 Difference]: Without dead ends: 14846 [2019-12-27 18:46:12,502 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-27 18:46:12,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14846 states. [2019-12-27 18:46:12,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14846 to 13070. [2019-12-27 18:46:12,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13070 states. [2019-12-27 18:46:12,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13070 states to 13070 states and 41519 transitions. [2019-12-27 18:46:12,908 INFO L78 Accepts]: Start accepts. Automaton has 13070 states and 41519 transitions. Word has length 11 [2019-12-27 18:46:12,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:12,908 INFO L462 AbstractCegarLoop]: Abstraction has 13070 states and 41519 transitions. [2019-12-27 18:46:12,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-27 18:46:12,909 INFO L276 IsEmpty]: Start isEmpty. Operand 13070 states and 41519 transitions. [2019-12-27 18:46:12,913 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-27 18:46:12,913 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:12,913 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:12,914 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:12,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:12,914 INFO L82 PathProgramCache]: Analyzing trace with hash 727521173, now seen corresponding path program 1 times [2019-12-27 18:46:12,915 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:12,915 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1319447815] [2019-12-27 18:46:12,915 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:12,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:12,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:12,983 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1319447815] [2019-12-27 18:46:12,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:12,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-27 18:46:12,987 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [170772240] [2019-12-27 18:46:12,987 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:12,989 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:12,993 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 36 states and 53 transitions. [2019-12-27 18:46:12,993 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:12,994 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 18:46:12,995 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-27 18:46:12,995 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:12,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-27 18:46:12,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-27 18:46:12,996 INFO L87 Difference]: Start difference. First operand 13070 states and 41519 transitions. Second operand 5 states. [2019-12-27 18:46:13,221 WARN L192 SmtUtils]: Spent 111.00 ms on a formula simplification that was a NOOP. DAG size: 8 [2019-12-27 18:46:13,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:13,564 INFO L93 Difference]: Finished difference Result 17840 states and 55421 transitions. [2019-12-27 18:46:13,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-27 18:46:13,565 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-12-27 18:46:13,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:13,628 INFO L225 Difference]: With dead ends: 17840 [2019-12-27 18:46:13,628 INFO L226 Difference]: Without dead ends: 17833 [2019-12-27 18:46:13,629 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-27 18:46:13,739 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17833 states. [2019-12-27 18:46:14,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17833 to 13112. [2019-12-27 18:46:14,059 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13112 states. [2019-12-27 18:46:14,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13112 states to 13112 states and 41511 transitions. [2019-12-27 18:46:14,097 INFO L78 Accepts]: Start accepts. Automaton has 13112 states and 41511 transitions. Word has length 17 [2019-12-27 18:46:14,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:14,098 INFO L462 AbstractCegarLoop]: Abstraction has 13112 states and 41511 transitions. [2019-12-27 18:46:14,098 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-27 18:46:14,098 INFO L276 IsEmpty]: Start isEmpty. Operand 13112 states and 41511 transitions. [2019-12-27 18:46:14,110 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-27 18:46:14,110 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:14,110 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:14,110 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:14,111 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:14,111 INFO L82 PathProgramCache]: Analyzing trace with hash -569311522, now seen corresponding path program 1 times [2019-12-27 18:46:14,111 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:14,112 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470679976] [2019-12-27 18:46:14,112 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:14,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:14,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:14,294 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [470679976] [2019-12-27 18:46:14,294 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:14,294 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-27 18:46:14,295 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [659287431] [2019-12-27 18:46:14,295 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:14,299 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:14,303 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 26 states and 25 transitions. [2019-12-27 18:46:14,303 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:14,304 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 18:46:14,304 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-27 18:46:14,304 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:14,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-27 18:46:14,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-27 18:46:14,305 INFO L87 Difference]: Start difference. First operand 13112 states and 41511 transitions. Second operand 3 states. [2019-12-27 18:46:14,412 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:14,412 INFO L93 Difference]: Finished difference Result 15933 states and 49812 transitions. [2019-12-27 18:46:14,412 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-27 18:46:14,413 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-12-27 18:46:14,413 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:14,456 INFO L225 Difference]: With dead ends: 15933 [2019-12-27 18:46:14,456 INFO L226 Difference]: Without dead ends: 15933 [2019-12-27 18:46:14,457 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-27 18:46:14,574 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15933 states. [2019-12-27 18:46:14,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15933 to 14126. [2019-12-27 18:46:14,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14126 states. [2019-12-27 18:46:14,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14126 states to 14126 states and 44593 transitions. [2019-12-27 18:46:14,869 INFO L78 Accepts]: Start accepts. Automaton has 14126 states and 44593 transitions. Word has length 25 [2019-12-27 18:46:14,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:14,871 INFO L462 AbstractCegarLoop]: Abstraction has 14126 states and 44593 transitions. [2019-12-27 18:46:14,871 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-27 18:46:14,871 INFO L276 IsEmpty]: Start isEmpty. Operand 14126 states and 44593 transitions. [2019-12-27 18:46:14,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-27 18:46:14,884 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:14,884 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:14,884 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:14,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:14,884 INFO L82 PathProgramCache]: Analyzing trace with hash -569496623, now seen corresponding path program 1 times [2019-12-27 18:46:14,885 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:14,885 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1211823899] [2019-12-27 18:46:14,885 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:14,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:14,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:14,992 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1211823899] [2019-12-27 18:46:14,992 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:14,992 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-27 18:46:14,993 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2014619592] [2019-12-27 18:46:14,993 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:14,998 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:15,002 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 26 states and 25 transitions. [2019-12-27 18:46:15,002 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:15,002 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 18:46:15,003 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-27 18:46:15,003 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:15,003 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-27 18:46:15,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-27 18:46:15,004 INFO L87 Difference]: Start difference. First operand 14126 states and 44593 transitions. Second operand 4 states. [2019-12-27 18:46:15,163 WARN L192 SmtUtils]: Spent 150.00 ms on a formula simplification that was a NOOP. DAG size: 10 [2019-12-27 18:46:15,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:15,187 INFO L93 Difference]: Finished difference Result 2310 states and 5267 transitions. [2019-12-27 18:46:15,187 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-27 18:46:15,188 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-27 18:46:15,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:15,191 INFO L225 Difference]: With dead ends: 2310 [2019-12-27 18:46:15,191 INFO L226 Difference]: Without dead ends: 2024 [2019-12-27 18:46:15,192 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-27 18:46:15,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2024 states. [2019-12-27 18:46:15,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2024 to 2024. [2019-12-27 18:46:15,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2024 states. [2019-12-27 18:46:15,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2024 states to 2024 states and 4476 transitions. [2019-12-27 18:46:15,233 INFO L78 Accepts]: Start accepts. Automaton has 2024 states and 4476 transitions. Word has length 25 [2019-12-27 18:46:15,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:15,233 INFO L462 AbstractCegarLoop]: Abstraction has 2024 states and 4476 transitions. [2019-12-27 18:46:15,233 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-27 18:46:15,233 INFO L276 IsEmpty]: Start isEmpty. Operand 2024 states and 4476 transitions. [2019-12-27 18:46:15,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-27 18:46:15,237 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:15,237 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:15,238 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:15,238 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:15,238 INFO L82 PathProgramCache]: Analyzing trace with hash 355873678, now seen corresponding path program 1 times [2019-12-27 18:46:15,239 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:15,239 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1974351937] [2019-12-27 18:46:15,239 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:15,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:15,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:15,377 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1974351937] [2019-12-27 18:46:15,378 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:15,378 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-27 18:46:15,378 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [60913154] [2019-12-27 18:46:15,378 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:15,386 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:15,403 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 62 states and 85 transitions. [2019-12-27 18:46:15,403 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:15,404 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 18:46:15,404 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-27 18:46:15,404 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:15,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-27 18:46:15,405 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-27 18:46:15,405 INFO L87 Difference]: Start difference. First operand 2024 states and 4476 transitions. Second operand 5 states. [2019-12-27 18:46:15,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:15,452 INFO L93 Difference]: Finished difference Result 426 states and 776 transitions. [2019-12-27 18:46:15,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-27 18:46:15,453 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-12-27 18:46:15,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:15,454 INFO L225 Difference]: With dead ends: 426 [2019-12-27 18:46:15,454 INFO L226 Difference]: Without dead ends: 380 [2019-12-27 18:46:15,455 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-27 18:46:15,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380 states. [2019-12-27 18:46:15,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380 to 345. [2019-12-27 18:46:15,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 345 states. [2019-12-27 18:46:15,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 621 transitions. [2019-12-27 18:46:15,460 INFO L78 Accepts]: Start accepts. Automaton has 345 states and 621 transitions. Word has length 37 [2019-12-27 18:46:15,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:15,461 INFO L462 AbstractCegarLoop]: Abstraction has 345 states and 621 transitions. [2019-12-27 18:46:15,461 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-27 18:46:15,461 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 621 transitions. [2019-12-27 18:46:15,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-27 18:46:15,462 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:15,463 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:15,463 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:15,463 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:15,463 INFO L82 PathProgramCache]: Analyzing trace with hash -1678296005, now seen corresponding path program 1 times [2019-12-27 18:46:15,464 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:15,464 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [297564262] [2019-12-27 18:46:15,464 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:15,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:15,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:15,565 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [297564262] [2019-12-27 18:46:15,565 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:15,565 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-27 18:46:15,565 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1080519342] [2019-12-27 18:46:15,565 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:15,581 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:15,612 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 78 states and 97 transitions. [2019-12-27 18:46:15,612 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:15,632 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-27 18:46:15,632 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-27 18:46:15,633 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:15,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-27 18:46:15,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-27 18:46:15,633 INFO L87 Difference]: Start difference. First operand 345 states and 621 transitions. Second operand 6 states. [2019-12-27 18:46:15,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:15,905 INFO L93 Difference]: Finished difference Result 540 states and 985 transitions. [2019-12-27 18:46:15,905 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-27 18:46:15,905 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-27 18:46:15,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:15,906 INFO L225 Difference]: With dead ends: 540 [2019-12-27 18:46:15,907 INFO L226 Difference]: Without dead ends: 540 [2019-12-27 18:46:15,907 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-12-27 18:46:15,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-12-27 18:46:15,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 435. [2019-12-27 18:46:15,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 435 states. [2019-12-27 18:46:15,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 435 states to 435 states and 785 transitions. [2019-12-27 18:46:15,915 INFO L78 Accepts]: Start accepts. Automaton has 435 states and 785 transitions. Word has length 52 [2019-12-27 18:46:15,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:15,916 INFO L462 AbstractCegarLoop]: Abstraction has 435 states and 785 transitions. [2019-12-27 18:46:15,916 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-27 18:46:15,916 INFO L276 IsEmpty]: Start isEmpty. Operand 435 states and 785 transitions. [2019-12-27 18:46:15,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-27 18:46:15,917 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:15,917 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:15,918 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:15,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:15,918 INFO L82 PathProgramCache]: Analyzing trace with hash -856791897, now seen corresponding path program 2 times [2019-12-27 18:46:15,919 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:15,919 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953171451] [2019-12-27 18:46:15,919 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:15,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:16,020 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:16,021 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953171451] [2019-12-27 18:46:16,021 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:16,021 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-27 18:46:16,021 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1912164753] [2019-12-27 18:46:16,021 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:16,038 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:16,075 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 89 states and 115 transitions. [2019-12-27 18:46:16,076 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:16,151 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 7 times. [2019-12-27 18:46:16,152 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-27 18:46:16,152 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:16,152 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-27 18:46:16,153 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-12-27 18:46:16,153 INFO L87 Difference]: Start difference. First operand 435 states and 785 transitions. Second operand 10 states. [2019-12-27 18:46:17,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:17,381 INFO L93 Difference]: Finished difference Result 950 states and 1636 transitions. [2019-12-27 18:46:17,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-27 18:46:17,382 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2019-12-27 18:46:17,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:17,384 INFO L225 Difference]: With dead ends: 950 [2019-12-27 18:46:17,385 INFO L226 Difference]: Without dead ends: 950 [2019-12-27 18:46:17,385 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 9 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=140, Invalid=322, Unknown=0, NotChecked=0, Total=462 [2019-12-27 18:46:17,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-12-27 18:46:17,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 480. [2019-12-27 18:46:17,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 480 states. [2019-12-27 18:46:17,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 480 states to 480 states and 875 transitions. [2019-12-27 18:46:17,393 INFO L78 Accepts]: Start accepts. Automaton has 480 states and 875 transitions. Word has length 52 [2019-12-27 18:46:17,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:17,394 INFO L462 AbstractCegarLoop]: Abstraction has 480 states and 875 transitions. [2019-12-27 18:46:17,394 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-27 18:46:17,394 INFO L276 IsEmpty]: Start isEmpty. Operand 480 states and 875 transitions. [2019-12-27 18:46:17,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-27 18:46:17,395 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:17,396 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:17,396 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:17,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:17,396 INFO L82 PathProgramCache]: Analyzing trace with hash 1692114105, now seen corresponding path program 3 times [2019-12-27 18:46:17,397 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:17,397 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1090125174] [2019-12-27 18:46:17,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:17,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:17,457 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:17,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1090125174] [2019-12-27 18:46:17,457 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:17,458 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-27 18:46:17,458 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1233500064] [2019-12-27 18:46:17,458 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:17,472 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:17,507 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 81 states and 104 transitions. [2019-12-27 18:46:17,507 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:17,523 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 3 times. [2019-12-27 18:46:17,524 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-27 18:46:17,524 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:17,525 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-27 18:46:17,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-27 18:46:17,525 INFO L87 Difference]: Start difference. First operand 480 states and 875 transitions. Second operand 5 states. [2019-12-27 18:46:17,677 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:17,678 INFO L93 Difference]: Finished difference Result 516 states and 900 transitions. [2019-12-27 18:46:17,678 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-27 18:46:17,678 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-12-27 18:46:17,678 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:17,680 INFO L225 Difference]: With dead ends: 516 [2019-12-27 18:46:17,680 INFO L226 Difference]: Without dead ends: 516 [2019-12-27 18:46:17,681 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-27 18:46:17,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 516 states. [2019-12-27 18:46:17,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 516 to 423. [2019-12-27 18:46:17,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 423 states. [2019-12-27 18:46:17,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 748 transitions. [2019-12-27 18:46:17,689 INFO L78 Accepts]: Start accepts. Automaton has 423 states and 748 transitions. Word has length 52 [2019-12-27 18:46:17,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:17,690 INFO L462 AbstractCegarLoop]: Abstraction has 423 states and 748 transitions. [2019-12-27 18:46:17,690 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-27 18:46:17,690 INFO L276 IsEmpty]: Start isEmpty. Operand 423 states and 748 transitions. [2019-12-27 18:46:17,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-27 18:46:17,691 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:17,691 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:17,692 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:17,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:17,692 INFO L82 PathProgramCache]: Analyzing trace with hash -798948617, now seen corresponding path program 1 times [2019-12-27 18:46:17,693 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:17,693 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [207079171] [2019-12-27 18:46:17,693 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:17,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:17,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:17,784 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [207079171] [2019-12-27 18:46:17,784 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:17,784 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-27 18:46:17,785 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [416609896] [2019-12-27 18:46:17,785 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:17,800 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:17,837 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 82 states and 109 transitions. [2019-12-27 18:46:17,837 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:17,868 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-27 18:46:17,868 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-27 18:46:17,868 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:17,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-27 18:46:17,869 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-27 18:46:17,869 INFO L87 Difference]: Start difference. First operand 423 states and 748 transitions. Second operand 5 states. [2019-12-27 18:46:18,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:18,031 INFO L93 Difference]: Finished difference Result 519 states and 916 transitions. [2019-12-27 18:46:18,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-27 18:46:18,032 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 53 [2019-12-27 18:46:18,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:18,033 INFO L225 Difference]: With dead ends: 519 [2019-12-27 18:46:18,033 INFO L226 Difference]: Without dead ends: 519 [2019-12-27 18:46:18,034 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 6 SyntacticMatches, 5 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-27 18:46:18,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 519 states. [2019-12-27 18:46:18,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 519 to 437. [2019-12-27 18:46:18,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 437 states. [2019-12-27 18:46:18,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 437 states to 437 states and 774 transitions. [2019-12-27 18:46:18,045 INFO L78 Accepts]: Start accepts. Automaton has 437 states and 774 transitions. Word has length 53 [2019-12-27 18:46:18,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:18,048 INFO L462 AbstractCegarLoop]: Abstraction has 437 states and 774 transitions. [2019-12-27 18:46:18,048 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-27 18:46:18,048 INFO L276 IsEmpty]: Start isEmpty. Operand 437 states and 774 transitions. [2019-12-27 18:46:18,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-27 18:46:18,050 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:18,050 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:18,051 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:18,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:18,051 INFO L82 PathProgramCache]: Analyzing trace with hash 1548250017, now seen corresponding path program 2 times [2019-12-27 18:46:18,052 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:18,053 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127477709] [2019-12-27 18:46:18,053 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:18,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:18,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:18,341 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [127477709] [2019-12-27 18:46:18,341 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:18,341 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-27 18:46:18,341 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1844075640] [2019-12-27 18:46:18,342 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:18,356 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:18,503 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 87 states and 119 transitions. [2019-12-27 18:46:18,504 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:18,597 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 12 times. [2019-12-27 18:46:18,597 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-27 18:46:18,597 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:18,597 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-27 18:46:18,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2019-12-27 18:46:18,598 INFO L87 Difference]: Start difference. First operand 437 states and 774 transitions. Second operand 11 states. [2019-12-27 18:46:19,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:19,290 INFO L93 Difference]: Finished difference Result 734 states and 1272 transitions. [2019-12-27 18:46:19,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-27 18:46:19,291 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 53 [2019-12-27 18:46:19,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:19,292 INFO L225 Difference]: With dead ends: 734 [2019-12-27 18:46:19,292 INFO L226 Difference]: Without dead ends: 734 [2019-12-27 18:46:19,293 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 11 SyntacticMatches, 5 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=97, Invalid=245, Unknown=0, NotChecked=0, Total=342 [2019-12-27 18:46:19,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 734 states. [2019-12-27 18:46:19,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 734 to 423. [2019-12-27 18:46:19,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 423 states. [2019-12-27 18:46:19,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 744 transitions. [2019-12-27 18:46:19,301 INFO L78 Accepts]: Start accepts. Automaton has 423 states and 744 transitions. Word has length 53 [2019-12-27 18:46:19,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:19,301 INFO L462 AbstractCegarLoop]: Abstraction has 423 states and 744 transitions. [2019-12-27 18:46:19,301 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-27 18:46:19,301 INFO L276 IsEmpty]: Start isEmpty. Operand 423 states and 744 transitions. [2019-12-27 18:46:19,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-27 18:46:19,302 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:19,303 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:19,303 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:19,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:19,303 INFO L82 PathProgramCache]: Analyzing trace with hash -1975941905, now seen corresponding path program 3 times [2019-12-27 18:46:19,304 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:19,304 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2037763593] [2019-12-27 18:46:19,304 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:19,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:19,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:19,370 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2037763593] [2019-12-27 18:46:19,371 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:19,371 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-27 18:46:19,371 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1950605045] [2019-12-27 18:46:19,371 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:19,385 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:19,422 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 88 states and 116 transitions. [2019-12-27 18:46:19,422 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:19,423 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 18:46:19,423 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-27 18:46:19,423 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:19,423 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-27 18:46:19,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-27 18:46:19,424 INFO L87 Difference]: Start difference. First operand 423 states and 744 transitions. Second operand 3 states. [2019-12-27 18:46:19,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:19,466 INFO L93 Difference]: Finished difference Result 422 states and 742 transitions. [2019-12-27 18:46:19,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-27 18:46:19,467 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-27 18:46:19,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:19,467 INFO L225 Difference]: With dead ends: 422 [2019-12-27 18:46:19,468 INFO L226 Difference]: Without dead ends: 422 [2019-12-27 18:46:19,468 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-27 18:46:19,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 422 states. [2019-12-27 18:46:19,473 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 422 to 344. [2019-12-27 18:46:19,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 344 states. [2019-12-27 18:46:19,474 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 344 states to 344 states and 597 transitions. [2019-12-27 18:46:19,474 INFO L78 Accepts]: Start accepts. Automaton has 344 states and 597 transitions. Word has length 53 [2019-12-27 18:46:19,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:19,475 INFO L462 AbstractCegarLoop]: Abstraction has 344 states and 597 transitions. [2019-12-27 18:46:19,475 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-27 18:46:19,475 INFO L276 IsEmpty]: Start isEmpty. Operand 344 states and 597 transitions. [2019-12-27 18:46:19,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-27 18:46:19,476 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:19,476 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:19,476 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:19,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:19,477 INFO L82 PathProgramCache]: Analyzing trace with hash 1826767497, now seen corresponding path program 1 times [2019-12-27 18:46:19,477 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:19,480 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1862480841] [2019-12-27 18:46:19,480 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:19,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:19,665 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:19,665 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1862480841] [2019-12-27 18:46:19,665 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:19,666 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-27 18:46:19,666 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1986946711] [2019-12-27 18:46:19,666 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:19,702 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:19,763 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 89 states and 122 transitions. [2019-12-27 18:46:19,764 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:19,767 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-27 18:46:19,767 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-27 18:46:19,767 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:19,768 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-27 18:46:19,768 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-27 18:46:19,768 INFO L87 Difference]: Start difference. First operand 344 states and 597 transitions. Second operand 6 states. [2019-12-27 18:46:19,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:19,858 INFO L93 Difference]: Finished difference Result 548 states and 951 transitions. [2019-12-27 18:46:19,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-27 18:46:19,859 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2019-12-27 18:46:19,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:19,860 INFO L225 Difference]: With dead ends: 548 [2019-12-27 18:46:19,860 INFO L226 Difference]: Without dead ends: 221 [2019-12-27 18:46:19,861 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-27 18:46:19,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2019-12-27 18:46:19,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 197. [2019-12-27 18:46:19,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2019-12-27 18:46:19,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 335 transitions. [2019-12-27 18:46:19,866 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 335 transitions. Word has length 54 [2019-12-27 18:46:19,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:19,866 INFO L462 AbstractCegarLoop]: Abstraction has 197 states and 335 transitions. [2019-12-27 18:46:19,866 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-27 18:46:19,867 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 335 transitions. [2019-12-27 18:46:19,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-27 18:46:19,867 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:19,867 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:19,868 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:19,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:19,868 INFO L82 PathProgramCache]: Analyzing trace with hash 584180705, now seen corresponding path program 2 times [2019-12-27 18:46:19,869 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:19,869 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757061485] [2019-12-27 18:46:19,869 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:19,925 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:20,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:20,633 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1757061485] [2019-12-27 18:46:20,633 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:20,633 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2019-12-27 18:46:20,633 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [618235478] [2019-12-27 18:46:20,634 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:20,655 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:20,710 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 81 states and 99 transitions. [2019-12-27 18:46:20,710 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:20,713 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 5 terms [2019-12-27 18:46:20,714 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 18:46:20,737 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 5 terms [2019-12-27 18:46:20,738 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 18:46:20,767 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 18:46:21,130 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 11 times. [2019-12-27 18:46:21,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 28 states [2019-12-27 18:46:21,131 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:21,131 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2019-12-27 18:46:21,131 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=622, Unknown=0, NotChecked=0, Total=756 [2019-12-27 18:46:21,132 INFO L87 Difference]: Start difference. First operand 197 states and 335 transitions. Second operand 28 states. [2019-12-27 18:46:23,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:23,801 INFO L93 Difference]: Finished difference Result 649 states and 1084 transitions. [2019-12-27 18:46:23,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-27 18:46:23,802 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 54 [2019-12-27 18:46:23,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:23,803 INFO L225 Difference]: With dead ends: 649 [2019-12-27 18:46:23,803 INFO L226 Difference]: Without dead ends: 617 [2019-12-27 18:46:23,805 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 3 SyntacticMatches, 6 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 827 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=553, Invalid=2527, Unknown=0, NotChecked=0, Total=3080 [2019-12-27 18:46:23,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 617 states. [2019-12-27 18:46:23,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 617 to 260. [2019-12-27 18:46:23,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 260 states. [2019-12-27 18:46:23,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260 states to 260 states and 438 transitions. [2019-12-27 18:46:23,810 INFO L78 Accepts]: Start accepts. Automaton has 260 states and 438 transitions. Word has length 54 [2019-12-27 18:46:23,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:23,811 INFO L462 AbstractCegarLoop]: Abstraction has 260 states and 438 transitions. [2019-12-27 18:46:23,811 INFO L463 AbstractCegarLoop]: Interpolant automaton has 28 states. [2019-12-27 18:46:23,811 INFO L276 IsEmpty]: Start isEmpty. Operand 260 states and 438 transitions. [2019-12-27 18:46:23,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-27 18:46:23,812 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:23,812 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:23,812 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:23,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:23,813 INFO L82 PathProgramCache]: Analyzing trace with hash 1277516739, now seen corresponding path program 3 times [2019-12-27 18:46:23,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:23,813 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156634618] [2019-12-27 18:46:23,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:23,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:24,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:24,642 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156634618] [2019-12-27 18:46:24,642 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:24,642 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2019-12-27 18:46:24,642 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1574776175] [2019-12-27 18:46:24,643 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:24,652 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:24,680 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 89 states and 115 transitions. [2019-12-27 18:46:24,680 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:24,681 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 6 terms [2019-12-27 18:46:24,682 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 18:46:24,720 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 6 terms [2019-12-27 18:46:24,720 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 18:46:24,735 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 5 terms [2019-12-27 18:46:24,735 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 18:46:25,179 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 16 times. [2019-12-27 18:46:25,179 INFO L442 AbstractCegarLoop]: Interpolant automaton has 31 states [2019-12-27 18:46:25,179 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:25,179 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2019-12-27 18:46:25,180 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=149, Invalid=781, Unknown=0, NotChecked=0, Total=930 [2019-12-27 18:46:25,180 INFO L87 Difference]: Start difference. First operand 260 states and 438 transitions. Second operand 31 states. [2019-12-27 18:46:28,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:28,152 INFO L93 Difference]: Finished difference Result 597 states and 1013 transitions. [2019-12-27 18:46:28,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-27 18:46:28,153 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 54 [2019-12-27 18:46:28,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:28,154 INFO L225 Difference]: With dead ends: 597 [2019-12-27 18:46:28,154 INFO L226 Difference]: Without dead ends: 565 [2019-12-27 18:46:28,156 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 4 SyntacticMatches, 9 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 856 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=616, Invalid=3044, Unknown=0, NotChecked=0, Total=3660 [2019-12-27 18:46:28,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 565 states. [2019-12-27 18:46:28,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 565 to 266. [2019-12-27 18:46:28,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 266 states. [2019-12-27 18:46:28,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 450 transitions. [2019-12-27 18:46:28,161 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 450 transitions. Word has length 54 [2019-12-27 18:46:28,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:28,162 INFO L462 AbstractCegarLoop]: Abstraction has 266 states and 450 transitions. [2019-12-27 18:46:28,162 INFO L463 AbstractCegarLoop]: Interpolant automaton has 31 states. [2019-12-27 18:46:28,162 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 450 transitions. [2019-12-27 18:46:28,162 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-27 18:46:28,163 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:28,163 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:28,163 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:28,163 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:28,163 INFO L82 PathProgramCache]: Analyzing trace with hash -310298433, now seen corresponding path program 4 times [2019-12-27 18:46:28,164 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:28,164 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267314973] [2019-12-27 18:46:28,164 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:28,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:28,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:28,474 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1267314973] [2019-12-27 18:46:28,474 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:28,474 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-27 18:46:28,474 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1129353482] [2019-12-27 18:46:28,475 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:28,485 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:28,514 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 85 states and 102 transitions. [2019-12-27 18:46:28,514 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:28,641 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-27 18:46:28,641 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-27 18:46:28,641 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:28,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-27 18:46:28,642 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=283, Unknown=0, NotChecked=0, Total=342 [2019-12-27 18:46:28,642 INFO L87 Difference]: Start difference. First operand 266 states and 450 transitions. Second operand 19 states. [2019-12-27 18:46:30,341 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:30,341 INFO L93 Difference]: Finished difference Result 673 states and 1083 transitions. [2019-12-27 18:46:30,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-27 18:46:30,342 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 54 [2019-12-27 18:46:30,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:30,343 INFO L225 Difference]: With dead ends: 673 [2019-12-27 18:46:30,343 INFO L226 Difference]: Without dead ends: 641 [2019-12-27 18:46:30,345 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 46 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 372 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=300, Invalid=1340, Unknown=0, NotChecked=0, Total=1640 [2019-12-27 18:46:30,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 641 states. [2019-12-27 18:46:30,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 641 to 286. [2019-12-27 18:46:30,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 286 states. [2019-12-27 18:46:30,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 286 states to 286 states and 489 transitions. [2019-12-27 18:46:30,358 INFO L78 Accepts]: Start accepts. Automaton has 286 states and 489 transitions. Word has length 54 [2019-12-27 18:46:30,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:30,358 INFO L462 AbstractCegarLoop]: Abstraction has 286 states and 489 transitions. [2019-12-27 18:46:30,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-27 18:46:30,359 INFO L276 IsEmpty]: Start isEmpty. Operand 286 states and 489 transitions. [2019-12-27 18:46:30,359 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-27 18:46:30,359 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:30,360 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:30,360 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:30,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:30,360 INFO L82 PathProgramCache]: Analyzing trace with hash 1572286481, now seen corresponding path program 5 times [2019-12-27 18:46:30,361 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:30,361 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [594085363] [2019-12-27 18:46:30,361 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:30,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:30,618 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:30,618 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [594085363] [2019-12-27 18:46:30,619 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:30,619 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-27 18:46:30,619 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [603631329] [2019-12-27 18:46:30,619 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:30,633 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:30,673 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 88 states and 108 transitions. [2019-12-27 18:46:30,673 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:30,738 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-27 18:46:30,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-27 18:46:30,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:30,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-27 18:46:30,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2019-12-27 18:46:30,739 INFO L87 Difference]: Start difference. First operand 286 states and 489 transitions. Second operand 16 states. [2019-12-27 18:46:32,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:32,342 INFO L93 Difference]: Finished difference Result 584 states and 956 transitions. [2019-12-27 18:46:32,343 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-27 18:46:32,343 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 54 [2019-12-27 18:46:32,343 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:32,344 INFO L225 Difference]: With dead ends: 584 [2019-12-27 18:46:32,344 INFO L226 Difference]: Without dead ends: 552 [2019-12-27 18:46:32,345 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 439 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=351, Invalid=1541, Unknown=0, NotChecked=0, Total=1892 [2019-12-27 18:46:32,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 552 states. [2019-12-27 18:46:32,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 552 to 297. [2019-12-27 18:46:32,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297 states. [2019-12-27 18:46:32,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297 states to 297 states and 506 transitions. [2019-12-27 18:46:32,350 INFO L78 Accepts]: Start accepts. Automaton has 297 states and 506 transitions. Word has length 54 [2019-12-27 18:46:32,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:32,351 INFO L462 AbstractCegarLoop]: Abstraction has 297 states and 506 transitions. [2019-12-27 18:46:32,351 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-27 18:46:32,351 INFO L276 IsEmpty]: Start isEmpty. Operand 297 states and 506 transitions. [2019-12-27 18:46:32,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-27 18:46:32,351 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:32,352 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:32,352 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:32,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:32,352 INFO L82 PathProgramCache]: Analyzing trace with hash -1111282689, now seen corresponding path program 6 times [2019-12-27 18:46:32,352 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:32,353 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [877260081] [2019-12-27 18:46:32,353 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:32,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:32,842 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:32,842 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [877260081] [2019-12-27 18:46:32,842 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:32,842 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-27 18:46:32,842 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [619581270] [2019-12-27 18:46:32,843 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:32,854 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:32,886 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 73 states and 86 transitions. [2019-12-27 18:46:32,887 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:33,004 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-27 18:46:33,004 INFO L442 AbstractCegarLoop]: Interpolant automaton has 21 states [2019-12-27 18:46:33,005 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:33,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-27 18:46:33,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=73, Invalid=347, Unknown=0, NotChecked=0, Total=420 [2019-12-27 18:46:33,005 INFO L87 Difference]: Start difference. First operand 297 states and 506 transitions. Second operand 21 states. [2019-12-27 18:46:34,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:34,146 INFO L93 Difference]: Finished difference Result 566 states and 941 transitions. [2019-12-27 18:46:34,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-27 18:46:34,146 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 54 [2019-12-27 18:46:34,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:34,147 INFO L225 Difference]: With dead ends: 566 [2019-12-27 18:46:34,147 INFO L226 Difference]: Without dead ends: 534 [2019-12-27 18:46:34,148 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 6 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 264 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=166, Invalid=890, Unknown=0, NotChecked=0, Total=1056 [2019-12-27 18:46:34,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 534 states. [2019-12-27 18:46:34,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 534 to 303. [2019-12-27 18:46:34,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 303 states. [2019-12-27 18:46:34,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 303 states to 303 states and 517 transitions. [2019-12-27 18:46:34,153 INFO L78 Accepts]: Start accepts. Automaton has 303 states and 517 transitions. Word has length 54 [2019-12-27 18:46:34,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:34,154 INFO L462 AbstractCegarLoop]: Abstraction has 303 states and 517 transitions. [2019-12-27 18:46:34,154 INFO L463 AbstractCegarLoop]: Interpolant automaton has 21 states. [2019-12-27 18:46:34,154 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 517 transitions. [2019-12-27 18:46:34,155 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-27 18:46:34,155 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:34,155 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:34,155 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:34,155 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:34,156 INFO L82 PathProgramCache]: Analyzing trace with hash -129579657, now seen corresponding path program 7 times [2019-12-27 18:46:34,156 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:34,156 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1432819422] [2019-12-27 18:46:34,156 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:34,178 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 18:46:34,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 18:46:34,474 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1432819422] [2019-12-27 18:46:34,474 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 18:46:34,474 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-27 18:46:34,474 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1607221507] [2019-12-27 18:46:34,474 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 18:46:34,486 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 18:46:34,522 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 76 states and 94 transitions. [2019-12-27 18:46:34,523 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 18:46:34,533 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-27 18:46:34,534 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-27 18:46:34,534 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 18:46:34,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-27 18:46:34,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2019-12-27 18:46:34,535 INFO L87 Difference]: Start difference. First operand 303 states and 517 transitions. Second operand 14 states. [2019-12-27 18:46:34,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 18:46:34,902 INFO L93 Difference]: Finished difference Result 405 states and 670 transitions. [2019-12-27 18:46:34,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-27 18:46:34,902 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-12-27 18:46:34,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 18:46:34,903 INFO L225 Difference]: With dead ends: 405 [2019-12-27 18:46:34,903 INFO L226 Difference]: Without dead ends: 373 [2019-12-27 18:46:34,903 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=100, Invalid=452, Unknown=0, NotChecked=0, Total=552 [2019-12-27 18:46:34,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 373 states. [2019-12-27 18:46:34,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 373 to 305. [2019-12-27 18:46:34,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 305 states. [2019-12-27 18:46:34,908 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 520 transitions. [2019-12-27 18:46:34,909 INFO L78 Accepts]: Start accepts. Automaton has 305 states and 520 transitions. Word has length 54 [2019-12-27 18:46:34,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 18:46:34,909 INFO L462 AbstractCegarLoop]: Abstraction has 305 states and 520 transitions. [2019-12-27 18:46:34,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-27 18:46:34,909 INFO L276 IsEmpty]: Start isEmpty. Operand 305 states and 520 transitions. [2019-12-27 18:46:34,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-27 18:46:34,910 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 18:46:34,910 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 18:46:34,910 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 18:46:34,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 18:46:34,911 INFO L82 PathProgramCache]: Analyzing trace with hash -695821945, now seen corresponding path program 8 times [2019-12-27 18:46:34,912 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 18:46:34,912 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958708646] [2019-12-27 18:46:34,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 18:46:34,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-27 18:46:34,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-27 18:46:35,008 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-27 18:46:35,009 INFO L476 BasicCegarLoop]: Counterexample might be feasible [2019-12-27 18:46:35,013 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] ULTIMATE.startENTRY-->L777: Formula: (let ((.cse0 (store |v_#valid_42| 0 0))) (and (= 0 v_~x$w_buff1_used~0_344) (= v_~x$r_buff0_thd0~0_298 0) (= v_~x$r_buff0_thd1~0_128 0) (= 0 v_~weak$$choice0~0_26) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2475~0.base_19|)) (= 0 |v_ULTIMATE.start_main_~#t2475~0.offset_16|) (= v_~x$r_buff1_thd2~0_87 0) (= v_~x$flush_delayed~0_47 0) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$w_buff1~0_200) (= v_~x$r_buff1_thd0~0_184 0) (= v_~y~0_77 0) (= 0 v_~x$w_buff0_used~0_631) (= v_~x$mem_tmp~0_31 0) (= 0 v_~x$read_delayed~0_7) (= v_~main$tmp_guard1~0_19 0) (= |v_#NULL.offset_5| 0) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2475~0.base_19| 4)) (= 0 v_~x$r_buff0_thd2~0_137) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2475~0.base_19| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2475~0.base_19|) |v_ULTIMATE.start_main_~#t2475~0.offset_16| 0)) |v_#memory_int_17|) (= 0 v_~x~0_143) (= v_~weak$$choice2~0_101 0) (= v_~x$r_buff1_thd1~0_135 0) (= 0 v_~__unbuffered_cnt~0_59) (= 0 v_~x$read_delayed_var~0.offset_7) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2475~0.base_19|) (= (store .cse0 |v_ULTIMATE.start_main_~#t2475~0.base_19| 1) |v_#valid_40|) (= v_~main$tmp_guard0~0_24 0) (= 0 |v_#NULL.base_5|) (= 0 v_~x$w_buff0~0_255) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_255, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~x$flush_delayed~0=v_~x$flush_delayed~0_47, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_27|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_135, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_31|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_35|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_57|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, #length=|v_#length_19|, ULTIMATE.start_main_~#t2476~0.base=|v_ULTIMATE.start_main_~#t2476~0.base_20|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_298, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_30|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_25|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_45|, ~x$w_buff1~0=v_~x$w_buff1~0_200, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_25|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_344, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_87, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_38|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_28|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_26, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_25|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, ~x~0=v_~x~0_143, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_128, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_23|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_29|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_38|, ~x$mem_tmp~0=v_~x$mem_tmp~0_31, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_27|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_39|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_21|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_40|, ULTIMATE.start_main_~#t2475~0.offset=|v_ULTIMATE.start_main_~#t2475~0.offset_16|, ~y~0=v_~y~0_77, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_45|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_25|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_29|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_184, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_137, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_27|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_30|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_631, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_25|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t2476~0.offset=|v_ULTIMATE.start_main_~#t2476~0.offset_16|, ULTIMATE.start_main_~#t2475~0.base=|v_ULTIMATE.start_main_~#t2475~0.base_19|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_16|, ~weak$$choice2~0=v_~weak$$choice2~0_101, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, #length, ULTIMATE.start_main_~#t2476~0.base, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t2475~0.offset, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2476~0.offset, ULTIMATE.start_main_~#t2475~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-27 18:46:35,014 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L777-1-->L779: Formula: (and (= |v_#valid_21| (store |v_#valid_22| |v_ULTIMATE.start_main_~#t2476~0.base_10| 1)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2476~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2476~0.base_10|) |v_ULTIMATE.start_main_~#t2476~0.offset_9| 1))) (not (= 0 |v_ULTIMATE.start_main_~#t2476~0.base_10|)) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t2476~0.base_10|) (= 0 |v_ULTIMATE.start_main_~#t2476~0.offset_9|) (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t2476~0.base_10| 4)) (= (select |v_#valid_22| |v_ULTIMATE.start_main_~#t2476~0.base_10|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_22|, #memory_int=|v_#memory_int_10|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, ULTIMATE.start_main_~#t2476~0.offset=|v_ULTIMATE.start_main_~#t2476~0.offset_9|, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_11|, ULTIMATE.start_main_~#t2476~0.base=|v_ULTIMATE.start_main_~#t2476~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2476~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t2476~0.base] because there is no mapped edge [2019-12-27 18:46:35,014 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] P1ENTRY-->L4-3: Formula: (and (= |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out2141836608| 1) (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out2141836608 |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out2141836608|) (= |P1Thread1of1ForFork1_#in~arg.offset_In2141836608| P1Thread1of1ForFork1_~arg.offset_Out2141836608) (= ~x$w_buff0_used~0_Out2141836608 1) (= ~x$w_buff1~0_Out2141836608 ~x$w_buff0~0_In2141836608) (= (mod ~x$w_buff1_used~0_Out2141836608 256) 0) (= P1Thread1of1ForFork1_~arg.base_Out2141836608 |P1Thread1of1ForFork1_#in~arg.base_In2141836608|) (= ~x$w_buff0~0_Out2141836608 2) (= ~x$w_buff0_used~0_In2141836608 ~x$w_buff1_used~0_Out2141836608)) InVars {~x$w_buff0~0=~x$w_buff0~0_In2141836608, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In2141836608|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In2141836608|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2141836608} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out2141836608, ~x$w_buff0~0=~x$w_buff0~0_Out2141836608, P1Thread1of1ForFork1_~arg.offset=P1Thread1of1ForFork1_~arg.offset_Out2141836608, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out2141836608|, P1Thread1of1ForFork1_~arg.base=P1Thread1of1ForFork1_~arg.base_Out2141836608, ~x$w_buff1~0=~x$w_buff1~0_Out2141836608, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In2141836608|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In2141836608|, ~x$w_buff1_used~0=~x$w_buff1_used~0_Out2141836608, ~x$w_buff0_used~0=~x$w_buff0_used~0_Out2141836608} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-27 18:46:35,016 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L726-2-->L726-5: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In1955731239 256))) (.cse0 (= |P0Thread1of1ForFork0_#t~ite3_Out1955731239| |P0Thread1of1ForFork0_#t~ite4_Out1955731239|)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1955731239 256)))) (or (and .cse0 (or .cse1 .cse2) (= |P0Thread1of1ForFork0_#t~ite3_Out1955731239| ~x~0_In1955731239)) (and (= |P0Thread1of1ForFork0_#t~ite3_Out1955731239| ~x$w_buff1~0_In1955731239) (not .cse2) .cse0 (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1955731239, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1955731239, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1955731239, ~x~0=~x~0_In1955731239} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out1955731239|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out1955731239|, ~x$w_buff1~0=~x$w_buff1~0_In1955731239, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1955731239, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1955731239, ~x~0=~x~0_In1955731239} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-27 18:46:35,017 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L755-->L755-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1654141439 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1654141439 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1654141439| ~x$w_buff0_used~0_In-1654141439) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-1654141439| 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1654141439, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1654141439} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1654141439|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1654141439, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1654141439} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-27 18:46:35,017 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L727-->L727-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-585250855 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-585250855 256)))) (or (and (= ~x$w_buff0_used~0_In-585250855 |P0Thread1of1ForFork0_#t~ite5_Out-585250855|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-585250855|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-585250855, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-585250855} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-585250855|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-585250855, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-585250855} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-27 18:46:35,018 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L728-->L728-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd1~0_In1355077651 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1355077651 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1355077651 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In1355077651 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1355077651|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~x$w_buff1_used~0_In1355077651 |P0Thread1of1ForFork0_#t~ite6_Out1355077651|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1355077651, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1355077651, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1355077651, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1355077651} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1355077651|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1355077651, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1355077651, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1355077651, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1355077651} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-27 18:46:35,018 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L729-->L729-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1256867442 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In1256867442 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In1256867442 |P0Thread1of1ForFork0_#t~ite7_Out1256867442|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite7_Out1256867442|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1256867442, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1256867442} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1256867442, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1256867442|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1256867442} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-27 18:46:35,019 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] L730-->L730-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1162149510 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-1162149510 256))) (.cse2 (= (mod ~x$r_buff1_thd1~0_In-1162149510 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In-1162149510 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1162149510| ~x$r_buff1_thd1~0_In-1162149510) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1162149510| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1162149510, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1162149510, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1162149510, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1162149510} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1162149510, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1162149510|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1162149510, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1162149510, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1162149510} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-27 18:46:35,019 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L730-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_79 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_5|) (= (+ v_~__unbuffered_cnt~0_43 1) v_~__unbuffered_cnt~0_42) (= |v_P0Thread1of1ForFork0_#res.offset_5| 0)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_5|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_79} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-27 18:46:35,019 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L756-->L756-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In498128541 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In498128541 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In498128541 256))) (.cse3 (= (mod ~x$r_buff0_thd2~0_In498128541 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite12_Out498128541| ~x$w_buff1_used~0_In498128541)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out498128541| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In498128541, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In498128541, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In498128541, ~x$w_buff0_used~0=~x$w_buff0_used~0_In498128541} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In498128541, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In498128541, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out498128541|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In498128541, ~x$w_buff0_used~0=~x$w_buff0_used~0_In498128541} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-27 18:46:35,020 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L757-->L758: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In-1405746107 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1405746107 256)))) (or (and (not .cse0) (not .cse1) (= 0 ~x$r_buff0_thd2~0_Out-1405746107)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd2~0_In-1405746107 ~x$r_buff0_thd2~0_Out-1405746107)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1405746107, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1405746107} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1405746107|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1405746107, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1405746107} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-27 18:46:35,020 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L758-->L758-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In640946529 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In640946529 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In640946529 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In640946529 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out640946529| ~x$r_buff1_thd2~0_In640946529)) (and (= |P1Thread1of1ForFork1_#t~ite14_Out640946529| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In640946529, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In640946529, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In640946529, ~x$w_buff0_used~0=~x$w_buff0_used~0_In640946529} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In640946529, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In640946529, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In640946529, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out640946529|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In640946529} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-27 18:46:35,020 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [662] [662] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_5|) (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= v_~x$r_buff1_thd2~0_45 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_5| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_5|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_45, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-27 18:46:35,021 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [585] [585] L783-->L785-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_91 256) 0) (= (mod v_~x$r_buff0_thd0~0_49 256) 0)) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_49, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_91} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_49, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_91} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-27 18:46:35,021 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L785-2-->L785-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-1884319793 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd0~0_In-1884319793 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out-1884319793| ~x$w_buff1~0_In-1884319793) (not .cse1)) (and (or .cse1 .cse0) (= ~x~0_In-1884319793 |ULTIMATE.start_main_#t~ite17_Out-1884319793|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1884319793, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1884319793, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1884319793, ~x~0=~x~0_In-1884319793} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-1884319793|, ~x$w_buff1~0=~x$w_buff1~0_In-1884319793, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1884319793, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1884319793, ~x~0=~x~0_In-1884319793} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-27 18:46:35,021 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [609] [609] L785-4-->L786: Formula: (= v_~x~0_39 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_8|, ~x~0=v_~x~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-12-27 18:46:35,021 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L786-->L786-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-1159362027 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1159362027 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite19_Out-1159362027|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-1159362027 |ULTIMATE.start_main_#t~ite19_Out-1159362027|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1159362027, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1159362027} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1159362027, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1159362027|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1159362027} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-27 18:46:35,022 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-->L787-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In710775941 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In710775941 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In710775941 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In710775941 256)))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out710775941| ~x$w_buff1_used~0_In710775941) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite20_Out710775941| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In710775941, ~x$w_buff1_used~0=~x$w_buff1_used~0_In710775941, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In710775941, ~x$w_buff0_used~0=~x$w_buff0_used~0_In710775941} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In710775941, ~x$w_buff1_used~0=~x$w_buff1_used~0_In710775941, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out710775941|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In710775941, ~x$w_buff0_used~0=~x$w_buff0_used~0_In710775941} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-27 18:46:35,022 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L788-->L788-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In1740747701 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1740747701 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite21_Out1740747701| ~x$r_buff0_thd0~0_In1740747701) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite21_Out1740747701| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1740747701, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1740747701} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1740747701, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1740747701|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1740747701} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-27 18:46:35,023 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L789-->L789-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-240668617 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-240668617 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In-240668617 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-240668617 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite22_Out-240668617| 0)) (and (= |ULTIMATE.start_main_#t~ite22_Out-240668617| ~x$r_buff1_thd0~0_In-240668617) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-240668617, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-240668617, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-240668617, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-240668617} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-240668617, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-240668617, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-240668617, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-240668617|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-240668617} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-27 18:46:35,027 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L800-->L800-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2093384592 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite38_Out-2093384592| ~x$w_buff1_used~0_In-2093384592) (= |ULTIMATE.start_main_#t~ite37_In-2093384592| |ULTIMATE.start_main_#t~ite37_Out-2093384592|)) (and .cse0 (= |ULTIMATE.start_main_#t~ite37_Out-2093384592| ~x$w_buff1_used~0_In-2093384592) (= |ULTIMATE.start_main_#t~ite38_Out-2093384592| |ULTIMATE.start_main_#t~ite37_Out-2093384592|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-2093384592 256)))) (or (and (= 0 (mod ~x$w_buff1_used~0_In-2093384592 256)) .cse1) (and (= 0 (mod ~x$r_buff1_thd0~0_In-2093384592 256)) .cse1) (= (mod ~x$w_buff0_used~0_In-2093384592 256) 0)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2093384592, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2093384592, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In-2093384592|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2093384592, ~weak$$choice2~0=~weak$$choice2~0_In-2093384592, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2093384592} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2093384592, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2093384592, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-2093384592|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-2093384592|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2093384592, ~weak$$choice2~0=~weak$$choice2~0_In-2093384592, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2093384592} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-27 18:46:35,028 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [590] [590] L801-->L802: Formula: (and (= v_~x$r_buff0_thd0~0_57 v_~x$r_buff0_thd0~0_56) (not (= (mod v_~weak$$choice2~0_21 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_57, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_56, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_7|, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-27 18:46:35,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [664] [664] L804-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_10 256)) (= v_~x~0_75 v_~x$mem_tmp~0_14) (= v_~x$flush_delayed~0_25 0) (not (= (mod v_~x$flush_delayed~0_26 256) 0))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~x$mem_tmp~0=v_~x$mem_tmp~0_14} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~x$mem_tmp~0=v_~x$mem_tmp~0_14, ~x~0=v_~x~0_75, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-27 18:46:35,029 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [669] [669] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-27 18:46:35,092 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.12 06:46:35 BasicIcfg [2019-12-27 18:46:35,093 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-27 18:46:35,100 INFO L168 Benchmark]: Toolchain (without parser) took 33227.51 ms. Allocated memory was 148.4 MB in the beginning and 886.0 MB in the end (delta: 737.7 MB). Free memory was 104.3 MB in the beginning and 515.0 MB in the end (delta: -410.6 MB). Peak memory consumption was 327.0 MB. Max. memory is 7.1 GB. [2019-12-27 18:46:35,101 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 148.4 MB. Free memory was 124.7 MB in the beginning and 124.5 MB in the end (delta: 209.7 kB). Peak memory consumption was 209.7 kB. Max. memory is 7.1 GB. [2019-12-27 18:46:35,101 INFO L168 Benchmark]: CACSL2BoogieTranslator took 842.70 ms. Allocated memory was 148.4 MB in the beginning and 205.0 MB in the end (delta: 56.6 MB). Free memory was 103.9 MB in the beginning and 157.6 MB in the end (delta: -53.7 MB). Peak memory consumption was 20.3 MB. Max. memory is 7.1 GB. [2019-12-27 18:46:35,102 INFO L168 Benchmark]: Boogie Procedure Inliner took 80.06 ms. Allocated memory is still 205.0 MB. Free memory was 157.6 MB in the beginning and 154.5 MB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 7.1 GB. [2019-12-27 18:46:35,102 INFO L168 Benchmark]: Boogie Preprocessor took 44.16 ms. Allocated memory is still 205.0 MB. Free memory was 154.5 MB in the beginning and 152.6 MB in the end (delta: 1.9 MB). Peak memory consumption was 1.9 MB. Max. memory is 7.1 GB. [2019-12-27 18:46:35,103 INFO L168 Benchmark]: RCFGBuilder took 728.93 ms. Allocated memory is still 205.0 MB. Free memory was 152.6 MB in the beginning and 108.6 MB in the end (delta: 44.0 MB). Peak memory consumption was 44.0 MB. Max. memory is 7.1 GB. [2019-12-27 18:46:35,103 INFO L168 Benchmark]: TraceAbstraction took 31516.93 ms. Allocated memory was 205.0 MB in the beginning and 886.0 MB in the end (delta: 681.1 MB). Free memory was 107.9 MB in the beginning and 515.0 MB in the end (delta: -407.1 MB). Peak memory consumption was 274.0 MB. Max. memory is 7.1 GB. [2019-12-27 18:46:35,110 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 148.4 MB. Free memory was 124.7 MB in the beginning and 124.5 MB in the end (delta: 209.7 kB). Peak memory consumption was 209.7 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 842.70 ms. Allocated memory was 148.4 MB in the beginning and 205.0 MB in the end (delta: 56.6 MB). Free memory was 103.9 MB in the beginning and 157.6 MB in the end (delta: -53.7 MB). Peak memory consumption was 20.3 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 80.06 ms. Allocated memory is still 205.0 MB. Free memory was 157.6 MB in the beginning and 154.5 MB in the end (delta: 3.2 MB). Peak memory consumption was 3.2 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 44.16 ms. Allocated memory is still 205.0 MB. Free memory was 154.5 MB in the beginning and 152.6 MB in the end (delta: 1.9 MB). Peak memory consumption was 1.9 MB. Max. memory is 7.1 GB. * RCFGBuilder took 728.93 ms. Allocated memory is still 205.0 MB. Free memory was 152.6 MB in the beginning and 108.6 MB in the end (delta: 44.0 MB). Peak memory consumption was 44.0 MB. Max. memory is 7.1 GB. * TraceAbstraction took 31516.93 ms. Allocated memory was 205.0 MB in the beginning and 886.0 MB in the end (delta: 681.1 MB). Free memory was 107.9 MB in the beginning and 515.0 MB in the end (delta: -407.1 MB). Peak memory consumption was 274.0 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.9s, 145 ProgramPointsBefore, 79 ProgramPointsAfterwards, 179 TransitionsBefore, 90 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 27 TrivialSequentialCompositions, 41 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 28 ConcurrentYvCompositions, 26 ChoiceCompositions, 3606 VarBasedMoverChecksPositive, 166 VarBasedMoverChecksNegative, 18 SemBasedMoverChecksPositive, 205 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.4s, 0 MoverChecksTotal, 47380 CheckedPairsTotal, 96 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L777] FCALL, FORK 0 pthread_create(&t2475, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L779] FCALL, FORK 0 pthread_create(&t2476, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L745] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L746] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L747] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L748] 2 x$r_buff0_thd2 = (_Bool)1 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L754] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L720] 1 y = 2 [L723] 1 x = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L754] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L726] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L726] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L727] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L728] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L729] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L755] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L756] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L786] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L787] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L788] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L789] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 x$flush_delayed = weak$$choice2 [L795] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L797] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L797] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L798] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L798] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L799] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L799] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L800] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L802] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L802] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 139 locations, 2 error locations. Result: UNSAFE, OverallTime: 31.2s, OverallIterations: 21, TraceHistogramMax: 1, AutomataDifference: 15.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2108 SDtfs, 3515 SDslu, 7252 SDs, 0 SdLazy, 8107 SolverSat, 558 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 433 GetRequests, 57 SyntacticMatches, 46 SemanticMatches, 330 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2999 ImplicationChecksByTransitivity, 9.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14126occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.8s AutomataMinimizationTime, 20 MinimizatonAttempts, 12672 StatesRemovedByMinimization, 18 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 3.8s InterpolantComputationTime, 878 NumberOfCodeBlocks, 878 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 804 ConstructedInterpolants, 0 QuantifiedInterpolants, 211319 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...