/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-VariableLbe-MCR.epf -i ../../../trunk/examples/svcomp/pthread-wmm/mix043_power.opt.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-4336eb1 [2019-12-27 21:14:02,912 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-27 21:14:02,915 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-27 21:14:02,930 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-27 21:14:02,930 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-27 21:14:02,931 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-27 21:14:02,932 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-27 21:14:02,934 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-27 21:14:02,936 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-27 21:14:02,936 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-27 21:14:02,937 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-27 21:14:02,938 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-27 21:14:02,939 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-27 21:14:02,940 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-27 21:14:02,940 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-27 21:14:02,942 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-27 21:14:02,942 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-27 21:14:02,943 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-27 21:14:02,945 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-27 21:14:02,947 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-27 21:14:02,948 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-27 21:14:02,949 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-27 21:14:02,950 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-27 21:14:02,951 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-27 21:14:02,954 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-27 21:14:02,954 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-27 21:14:02,954 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-27 21:14:02,955 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-27 21:14:02,955 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-27 21:14:02,956 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-27 21:14:02,957 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-27 21:14:02,957 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-27 21:14:02,958 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-27 21:14:02,959 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-27 21:14:02,960 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-27 21:14:02,960 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-27 21:14:02,961 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-27 21:14:02,961 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-27 21:14:02,961 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-27 21:14:02,962 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-27 21:14:02,963 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-27 21:14:02,963 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-VariableLbe-MCR.epf [2019-12-27 21:14:02,977 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-27 21:14:02,978 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-27 21:14:02,979 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-27 21:14:02,979 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-27 21:14:02,979 INFO L138 SettingsManager]: * Use SBE=true [2019-12-27 21:14:02,980 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-27 21:14:02,980 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-27 21:14:02,981 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-27 21:14:02,981 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-27 21:14:02,981 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-27 21:14:02,981 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-27 21:14:02,981 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-27 21:14:02,982 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-27 21:14:02,982 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-27 21:14:02,982 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-27 21:14:02,982 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-27 21:14:02,982 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-27 21:14:02,984 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-27 21:14:02,984 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-27 21:14:02,984 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-27 21:14:02,984 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-27 21:14:02,985 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-27 21:14:02,985 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-27 21:14:02,985 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-27 21:14:02,985 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-27 21:14:02,986 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-27 21:14:02,986 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-27 21:14:02,986 INFO L138 SettingsManager]: * Override the interpolant automaton setting of the refinement strategy=true [2019-12-27 21:14:02,986 INFO L138 SettingsManager]: * Large block encoding in concurrent analysis=VARIABLE_BASED_MOVER_CHECK [2019-12-27 21:14:02,986 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-27 21:14:02,987 INFO L138 SettingsManager]: * Interpolant automaton=MCR [2019-12-27 21:14:02,987 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-27 21:14:03,306 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-27 21:14:03,318 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-27 21:14:03,322 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-27 21:14:03,323 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-27 21:14:03,323 INFO L275 PluginConnector]: CDTParser initialized [2019-12-27 21:14:03,324 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-wmm/mix043_power.opt.i [2019-12-27 21:14:03,402 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5cf63a686/a91140247b4d436f9bc9daa9e0dc6f8c/FLAG5682f61c5 [2019-12-27 21:14:03,968 INFO L306 CDTParser]: Found 1 translation units. [2019-12-27 21:14:03,968 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-wmm/mix043_power.opt.i [2019-12-27 21:14:03,992 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5cf63a686/a91140247b4d436f9bc9daa9e0dc6f8c/FLAG5682f61c5 [2019-12-27 21:14:04,224 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/5cf63a686/a91140247b4d436f9bc9daa9e0dc6f8c [2019-12-27 21:14:04,231 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-27 21:14:04,233 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2019-12-27 21:14:04,234 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-27 21:14:04,234 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-27 21:14:04,238 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-27 21:14:04,238 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.12 09:14:04" (1/1) ... [2019-12-27 21:14:04,241 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@677b895b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04, skipping insertion in model container [2019-12-27 21:14:04,241 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 27.12 09:14:04" (1/1) ... [2019-12-27 21:14:04,249 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-27 21:14:04,306 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-27 21:14:04,825 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-27 21:14:04,837 INFO L203 MainTranslator]: Completed pre-run [2019-12-27 21:14:04,904 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-27 21:14:04,981 INFO L208 MainTranslator]: Completed translation [2019-12-27 21:14:04,982 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04 WrapperNode [2019-12-27 21:14:04,982 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-27 21:14:04,983 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-27 21:14:04,983 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-27 21:14:04,983 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-27 21:14:04,991 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04" (1/1) ... [2019-12-27 21:14:05,010 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04" (1/1) ... [2019-12-27 21:14:05,055 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-27 21:14:05,055 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-27 21:14:05,055 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-27 21:14:05,056 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-27 21:14:05,064 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04" (1/1) ... [2019-12-27 21:14:05,064 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04" (1/1) ... [2019-12-27 21:14:05,069 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04" (1/1) ... [2019-12-27 21:14:05,069 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04" (1/1) ... [2019-12-27 21:14:05,079 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04" (1/1) ... [2019-12-27 21:14:05,083 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04" (1/1) ... [2019-12-27 21:14:05,087 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04" (1/1) ... [2019-12-27 21:14:05,092 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-27 21:14:05,093 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-27 21:14:05,093 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-27 21:14:05,093 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-27 21:14:05,094 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-27 21:14:05,164 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-27 21:14:05,164 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-27 21:14:05,164 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-27 21:14:05,164 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-27 21:14:05,165 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-27 21:14:05,165 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-27 21:14:05,165 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-27 21:14:05,165 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-27 21:14:05,165 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-27 21:14:05,165 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-27 21:14:05,166 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-27 21:14:05,166 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-27 21:14:05,166 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-27 21:14:05,166 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-27 21:14:05,166 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-27 21:14:05,168 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-27 21:14:05,973 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-27 21:14:05,973 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-27 21:14:05,975 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.12 09:14:05 BoogieIcfgContainer [2019-12-27 21:14:05,975 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-27 21:14:05,976 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-27 21:14:05,976 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-27 21:14:05,979 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-27 21:14:05,979 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 27.12 09:14:04" (1/3) ... [2019-12-27 21:14:05,980 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1df1bc14 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.12 09:14:05, skipping insertion in model container [2019-12-27 21:14:05,980 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 27.12 09:14:04" (2/3) ... [2019-12-27 21:14:05,980 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1df1bc14 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 27.12 09:14:05, skipping insertion in model container [2019-12-27 21:14:05,981 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 27.12 09:14:05" (3/3) ... [2019-12-27 21:14:05,982 INFO L109 eAbstractionObserver]: Analyzing ICFG mix043_power.opt.i [2019-12-27 21:14:05,991 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-27 21:14:05,991 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-27 21:14:05,999 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-27 21:14:06,000 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-27 21:14:06,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,041 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,041 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,042 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,042 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,043 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,043 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,044 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,045 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,045 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,052 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,053 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,053 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,053 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,053 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,054 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,054 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,054 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,055 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,055 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,055 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,055 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,055 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,056 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,056 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,056 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,057 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,057 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,057 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,057 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,057 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,058 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,075 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,075 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,075 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,075 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,076 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,076 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,076 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,076 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,077 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,077 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,077 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,077 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,080 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,081 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,081 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,081 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,087 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,088 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,088 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,088 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,091 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,091 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,093 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,094 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,094 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,094 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,094 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,095 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,095 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,095 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,095 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,095 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,096 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,096 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork3_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-27 21:14:06,109 INFO L249 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2019-12-27 21:14:06,125 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-27 21:14:06,125 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-27 21:14:06,125 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-27 21:14:06,125 INFO L376 AbstractCegarLoop]: Backedges is MCR [2019-12-27 21:14:06,125 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-27 21:14:06,125 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-27 21:14:06,126 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-27 21:14:06,126 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-27 21:14:06,145 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 182 places, 210 transitions [2019-12-27 21:14:06,147 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 182 places, 210 transitions [2019-12-27 21:14:06,268 INFO L132 PetriNetUnfolder]: 41/206 cut-off events. [2019-12-27 21:14:06,268 INFO L133 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-27 21:14:06,286 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 206 events. 41/206 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 6. Compared 265 event pairs. 0/163 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-27 21:14:06,303 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 182 places, 210 transitions [2019-12-27 21:14:06,393 INFO L132 PetriNetUnfolder]: 41/206 cut-off events. [2019-12-27 21:14:06,393 INFO L133 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-27 21:14:06,400 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 206 events. 41/206 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 6. Compared 265 event pairs. 0/163 useless extension candidates. Maximal degree in co-relation 172. Up to 2 conditions per place. [2019-12-27 21:14:06,415 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 12668 [2019-12-27 21:14:06,416 INFO L182 etLargeBlockEncoding]: Variable Check. [2019-12-27 21:14:10,045 WARN L192 SmtUtils]: Spent 308.00 ms on a formula simplification. DAG size of input: 101 DAG size of output: 99 [2019-12-27 21:14:10,234 WARN L192 SmtUtils]: Spent 186.00 ms on a formula simplification that was a NOOP. DAG size: 97 [2019-12-27 21:14:10,259 INFO L206 etLargeBlockEncoding]: Checked pairs total: 57720 [2019-12-27 21:14:10,259 INFO L214 etLargeBlockEncoding]: Total number of compositions: 124 [2019-12-27 21:14:10,264 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 91 places, 98 transitions [2019-12-27 21:14:12,454 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 34622 states. [2019-12-27 21:14:12,456 INFO L276 IsEmpty]: Start isEmpty. Operand 34622 states. [2019-12-27 21:14:12,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-12-27 21:14:12,464 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:14:12,464 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:14:12,465 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:14:12,471 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:14:12,472 INFO L82 PathProgramCache]: Analyzing trace with hash 86209296, now seen corresponding path program 1 times [2019-12-27 21:14:12,480 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:14:12,481 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [817044070] [2019-12-27 21:14:12,481 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:14:12,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:14:12,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:14:12,731 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [817044070] [2019-12-27 21:14:12,732 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:14:12,732 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-27 21:14:12,733 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1159747484] [2019-12-27 21:14:12,733 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:14:12,739 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:14:12,754 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 10 states and 9 transitions. [2019-12-27 21:14:12,754 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:14:12,758 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 21:14:12,759 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-27 21:14:12,759 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:14:12,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-27 21:14:12,774 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-27 21:14:12,776 INFO L87 Difference]: Start difference. First operand 34622 states. Second operand 3 states. [2019-12-27 21:14:14,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:14:14,047 INFO L93 Difference]: Finished difference Result 34422 states and 146848 transitions. [2019-12-27 21:14:14,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-27 21:14:14,049 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-12-27 21:14:14,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:14:14,351 INFO L225 Difference]: With dead ends: 34422 [2019-12-27 21:14:14,351 INFO L226 Difference]: Without dead ends: 33750 [2019-12-27 21:14:14,353 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-27 21:14:14,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33750 states. [2019-12-27 21:14:15,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33750 to 33750. [2019-12-27 21:14:15,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33750 states. [2019-12-27 21:14:16,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33750 states to 33750 states and 144104 transitions. [2019-12-27 21:14:16,379 INFO L78 Accepts]: Start accepts. Automaton has 33750 states and 144104 transitions. Word has length 9 [2019-12-27 21:14:16,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:14:16,380 INFO L462 AbstractCegarLoop]: Abstraction has 33750 states and 144104 transitions. [2019-12-27 21:14:16,380 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-27 21:14:16,380 INFO L276 IsEmpty]: Start isEmpty. Operand 33750 states and 144104 transitions. [2019-12-27 21:14:16,391 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-27 21:14:16,391 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:14:16,391 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:14:16,392 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:14:16,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:14:16,392 INFO L82 PathProgramCache]: Analyzing trace with hash 2020718279, now seen corresponding path program 1 times [2019-12-27 21:14:16,393 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:14:16,393 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920102041] [2019-12-27 21:14:16,393 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:14:16,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:14:16,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:14:16,556 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920102041] [2019-12-27 21:14:16,557 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:14:16,557 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-27 21:14:16,557 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1584615738] [2019-12-27 21:14:16,558 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:14:16,561 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:14:16,569 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 28 states and 39 transitions. [2019-12-27 21:14:16,570 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:14:16,571 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 21:14:16,572 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-27 21:14:16,573 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:14:16,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-27 21:14:16,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-27 21:14:16,573 INFO L87 Difference]: Start difference. First operand 33750 states and 144104 transitions. Second operand 4 states. [2019-12-27 21:14:18,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:14:18,993 INFO L93 Difference]: Finished difference Result 52526 states and 216740 transitions. [2019-12-27 21:14:18,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-27 21:14:18,993 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-27 21:14:18,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:14:19,290 INFO L225 Difference]: With dead ends: 52526 [2019-12-27 21:14:19,290 INFO L226 Difference]: Without dead ends: 52498 [2019-12-27 21:14:19,293 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-27 21:14:19,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52498 states. [2019-12-27 21:14:21,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52498 to 47958. [2019-12-27 21:14:21,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47958 states. [2019-12-27 21:14:21,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47958 states to 47958 states and 199860 transitions. [2019-12-27 21:14:21,563 INFO L78 Accepts]: Start accepts. Automaton has 47958 states and 199860 transitions. Word has length 15 [2019-12-27 21:14:21,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:14:21,563 INFO L462 AbstractCegarLoop]: Abstraction has 47958 states and 199860 transitions. [2019-12-27 21:14:21,564 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-27 21:14:21,564 INFO L276 IsEmpty]: Start isEmpty. Operand 47958 states and 199860 transitions. [2019-12-27 21:14:21,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2019-12-27 21:14:21,567 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:14:21,567 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:14:21,567 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:14:21,568 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:14:21,568 INFO L82 PathProgramCache]: Analyzing trace with hash -1977980563, now seen corresponding path program 1 times [2019-12-27 21:14:21,568 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:14:21,569 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1799479974] [2019-12-27 21:14:21,569 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:14:21,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:14:21,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:14:21,633 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1799479974] [2019-12-27 21:14:21,633 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:14:21,634 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-27 21:14:21,634 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1057290374] [2019-12-27 21:14:21,634 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:14:21,636 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:14:21,638 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 16 states and 15 transitions. [2019-12-27 21:14:21,638 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:14:21,639 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 21:14:21,639 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-27 21:14:21,639 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:14:21,639 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-27 21:14:21,639 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-27 21:14:21,640 INFO L87 Difference]: Start difference. First operand 47958 states and 199860 transitions. Second operand 4 states. [2019-12-27 21:14:22,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:14:22,134 INFO L93 Difference]: Finished difference Result 59070 states and 244072 transitions. [2019-12-27 21:14:22,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-27 21:14:22,135 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2019-12-27 21:14:22,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:14:24,663 INFO L225 Difference]: With dead ends: 59070 [2019-12-27 21:14:24,663 INFO L226 Difference]: Without dead ends: 59070 [2019-12-27 21:14:24,663 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-27 21:14:25,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59070 states. [2019-12-27 21:14:26,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59070 to 53006. [2019-12-27 21:14:26,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53006 states. [2019-12-27 21:14:26,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53006 states to 53006 states and 220392 transitions. [2019-12-27 21:14:26,428 INFO L78 Accepts]: Start accepts. Automaton has 53006 states and 220392 transitions. Word has length 15 [2019-12-27 21:14:26,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:14:26,429 INFO L462 AbstractCegarLoop]: Abstraction has 53006 states and 220392 transitions. [2019-12-27 21:14:26,429 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-27 21:14:26,429 INFO L276 IsEmpty]: Start isEmpty. Operand 53006 states and 220392 transitions. [2019-12-27 21:14:26,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-27 21:14:26,442 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:14:26,442 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:14:26,442 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:14:26,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:14:26,442 INFO L82 PathProgramCache]: Analyzing trace with hash -587282460, now seen corresponding path program 1 times [2019-12-27 21:14:26,443 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:14:26,443 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1112806726] [2019-12-27 21:14:26,443 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:14:26,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:14:26,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:14:26,563 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1112806726] [2019-12-27 21:14:26,563 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:14:26,563 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-27 21:14:26,563 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1657939446] [2019-12-27 21:14:26,564 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:14:26,566 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:14:26,572 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 40 states and 57 transitions. [2019-12-27 21:14:26,572 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:14:26,572 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 21:14:26,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-27 21:14:26,573 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:14:26,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-27 21:14:26,573 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-27 21:14:26,574 INFO L87 Difference]: Start difference. First operand 53006 states and 220392 transitions. Second operand 5 states. [2019-12-27 21:14:27,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:14:27,746 INFO L93 Difference]: Finished difference Result 70534 states and 288484 transitions. [2019-12-27 21:14:27,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-27 21:14:27,747 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-27 21:14:27,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:14:27,929 INFO L225 Difference]: With dead ends: 70534 [2019-12-27 21:14:27,929 INFO L226 Difference]: Without dead ends: 70506 [2019-12-27 21:14:27,929 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-27 21:14:28,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70506 states. [2019-12-27 21:14:31,563 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70506 to 52682. [2019-12-27 21:14:31,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52682 states. [2019-12-27 21:14:31,965 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52682 states to 52682 states and 218712 transitions. [2019-12-27 21:14:31,965 INFO L78 Accepts]: Start accepts. Automaton has 52682 states and 218712 transitions. Word has length 21 [2019-12-27 21:14:31,965 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:14:31,966 INFO L462 AbstractCegarLoop]: Abstraction has 52682 states and 218712 transitions. [2019-12-27 21:14:31,966 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-27 21:14:31,966 INFO L276 IsEmpty]: Start isEmpty. Operand 52682 states and 218712 transitions. [2019-12-27 21:14:32,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-27 21:14:32,026 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:14:32,026 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:14:32,026 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:14:32,026 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:14:32,027 INFO L82 PathProgramCache]: Analyzing trace with hash -1693897678, now seen corresponding path program 1 times [2019-12-27 21:14:32,027 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:14:32,027 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241902635] [2019-12-27 21:14:32,028 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:14:32,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:14:32,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:14:32,081 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241902635] [2019-12-27 21:14:32,081 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:14:32,081 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-27 21:14:32,081 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [76771838] [2019-12-27 21:14:32,081 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:14:32,088 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:14:32,095 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 30 states and 29 transitions. [2019-12-27 21:14:32,095 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:14:32,095 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 21:14:32,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-27 21:14:32,096 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:14:32,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-27 21:14:32,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-27 21:14:32,096 INFO L87 Difference]: Start difference. First operand 52682 states and 218712 transitions. Second operand 3 states. [2019-12-27 21:14:32,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:14:32,482 INFO L93 Difference]: Finished difference Result 65362 states and 268648 transitions. [2019-12-27 21:14:32,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-27 21:14:32,482 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 29 [2019-12-27 21:14:32,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:14:32,642 INFO L225 Difference]: With dead ends: 65362 [2019-12-27 21:14:32,642 INFO L226 Difference]: Without dead ends: 65362 [2019-12-27 21:14:32,642 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-27 21:14:32,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65362 states. [2019-12-27 21:14:36,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65362 to 57878. [2019-12-27 21:14:36,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57878 states. [2019-12-27 21:14:36,762 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57878 states to 57878 states and 239624 transitions. [2019-12-27 21:14:36,762 INFO L78 Accepts]: Start accepts. Automaton has 57878 states and 239624 transitions. Word has length 29 [2019-12-27 21:14:36,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:14:36,763 INFO L462 AbstractCegarLoop]: Abstraction has 57878 states and 239624 transitions. [2019-12-27 21:14:36,763 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-27 21:14:36,763 INFO L276 IsEmpty]: Start isEmpty. Operand 57878 states and 239624 transitions. [2019-12-27 21:14:36,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-27 21:14:36,800 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:14:36,800 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:14:36,801 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:14:36,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:14:36,801 INFO L82 PathProgramCache]: Analyzing trace with hash -1910359084, now seen corresponding path program 1 times [2019-12-27 21:14:36,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:14:36,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [369526837] [2019-12-27 21:14:36,802 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:14:36,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:14:36,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:14:36,890 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [369526837] [2019-12-27 21:14:36,890 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:14:36,890 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-27 21:14:36,891 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [65751798] [2019-12-27 21:14:36,891 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:14:36,898 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:14:36,906 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 30 states and 29 transitions. [2019-12-27 21:14:36,907 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:14:36,907 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 21:14:36,907 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-27 21:14:36,908 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:14:36,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-27 21:14:36,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-27 21:14:36,908 INFO L87 Difference]: Start difference. First operand 57878 states and 239624 transitions. Second operand 6 states. [2019-12-27 21:14:37,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:14:37,663 INFO L93 Difference]: Finished difference Result 82714 states and 336740 transitions. [2019-12-27 21:14:37,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-27 21:14:37,664 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2019-12-27 21:14:37,665 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:14:37,869 INFO L225 Difference]: With dead ends: 82714 [2019-12-27 21:14:37,870 INFO L226 Difference]: Without dead ends: 82650 [2019-12-27 21:14:37,870 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-27 21:14:38,241 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82650 states. [2019-12-27 21:14:39,769 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82650 to 66690. [2019-12-27 21:14:39,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66690 states. [2019-12-27 21:14:44,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66690 states to 66690 states and 274804 transitions. [2019-12-27 21:14:44,298 INFO L78 Accepts]: Start accepts. Automaton has 66690 states and 274804 transitions. Word has length 29 [2019-12-27 21:14:44,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:14:44,299 INFO L462 AbstractCegarLoop]: Abstraction has 66690 states and 274804 transitions. [2019-12-27 21:14:44,299 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-27 21:14:44,299 INFO L276 IsEmpty]: Start isEmpty. Operand 66690 states and 274804 transitions. [2019-12-27 21:14:44,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-27 21:14:44,377 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:14:44,377 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:14:44,377 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:14:44,377 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:14:44,377 INFO L82 PathProgramCache]: Analyzing trace with hash 1476951563, now seen corresponding path program 1 times [2019-12-27 21:14:44,378 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:14:44,378 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [230876120] [2019-12-27 21:14:44,378 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:14:44,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:14:44,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:14:44,472 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [230876120] [2019-12-27 21:14:44,472 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:14:44,472 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-27 21:14:44,472 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1495945606] [2019-12-27 21:14:44,472 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:14:44,480 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:14:44,494 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 54 states and 71 transitions. [2019-12-27 21:14:44,494 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:14:44,495 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 21:14:44,495 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-27 21:14:44,495 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:14:44,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-27 21:14:44,496 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-27 21:14:44,496 INFO L87 Difference]: Start difference. First operand 66690 states and 274804 transitions. Second operand 7 states. [2019-12-27 21:14:45,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:14:45,932 INFO L93 Difference]: Finished difference Result 90854 states and 367944 transitions. [2019-12-27 21:14:45,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-27 21:14:45,933 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 35 [2019-12-27 21:14:45,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:14:46,165 INFO L225 Difference]: With dead ends: 90854 [2019-12-27 21:14:46,165 INFO L226 Difference]: Without dead ends: 90750 [2019-12-27 21:14:46,166 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2019-12-27 21:14:46,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90750 states. [2019-12-27 21:14:47,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90750 to 59942. [2019-12-27 21:14:47,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59942 states. [2019-12-27 21:14:48,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59942 states to 59942 states and 248164 transitions. [2019-12-27 21:14:48,040 INFO L78 Accepts]: Start accepts. Automaton has 59942 states and 248164 transitions. Word has length 35 [2019-12-27 21:14:48,040 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:14:48,040 INFO L462 AbstractCegarLoop]: Abstraction has 59942 states and 248164 transitions. [2019-12-27 21:14:48,040 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-27 21:14:48,040 INFO L276 IsEmpty]: Start isEmpty. Operand 59942 states and 248164 transitions. [2019-12-27 21:14:48,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2019-12-27 21:14:48,100 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:14:48,100 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:14:48,100 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:14:48,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:14:48,101 INFO L82 PathProgramCache]: Analyzing trace with hash -29640414, now seen corresponding path program 1 times [2019-12-27 21:14:48,102 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:14:48,102 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749487746] [2019-12-27 21:14:48,102 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:14:48,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:14:48,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:14:48,201 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1749487746] [2019-12-27 21:14:48,201 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:14:48,201 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-27 21:14:48,202 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1033298465] [2019-12-27 21:14:48,202 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:14:48,209 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:14:48,217 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 37 states and 37 transitions. [2019-12-27 21:14:48,217 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:14:48,218 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 21:14:48,218 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-27 21:14:48,218 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:14:48,219 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-27 21:14:48,219 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-27 21:14:48,219 INFO L87 Difference]: Start difference. First operand 59942 states and 248164 transitions. Second operand 5 states. [2019-12-27 21:14:49,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:14:49,091 INFO L93 Difference]: Finished difference Result 61906 states and 256028 transitions. [2019-12-27 21:14:49,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-27 21:14:49,092 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2019-12-27 21:14:49,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:14:49,237 INFO L225 Difference]: With dead ends: 61906 [2019-12-27 21:14:49,238 INFO L226 Difference]: Without dead ends: 59254 [2019-12-27 21:14:49,238 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-27 21:14:49,539 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59254 states. [2019-12-27 21:14:50,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59254 to 59254. [2019-12-27 21:14:50,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59254 states. [2019-12-27 21:14:51,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59254 states to 59254 states and 245100 transitions. [2019-12-27 21:14:51,306 INFO L78 Accepts]: Start accepts. Automaton has 59254 states and 245100 transitions. Word has length 35 [2019-12-27 21:14:51,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:14:51,306 INFO L462 AbstractCegarLoop]: Abstraction has 59254 states and 245100 transitions. [2019-12-27 21:14:51,307 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-27 21:14:51,307 INFO L276 IsEmpty]: Start isEmpty. Operand 59254 states and 245100 transitions. [2019-12-27 21:14:51,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2019-12-27 21:14:51,384 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:14:51,384 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:14:51,385 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:14:51,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:14:51,385 INFO L82 PathProgramCache]: Analyzing trace with hash 1282093875, now seen corresponding path program 1 times [2019-12-27 21:14:51,386 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:14:51,386 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2056686888] [2019-12-27 21:14:51,386 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:14:51,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:14:51,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:14:51,435 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2056686888] [2019-12-27 21:14:51,435 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:14:51,436 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-27 21:14:51,436 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1922216218] [2019-12-27 21:14:51,436 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:14:51,443 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:14:51,454 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 43 states and 48 transitions. [2019-12-27 21:14:51,455 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:14:51,463 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-27 21:14:51,463 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-27 21:14:51,463 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:14:51,464 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-27 21:14:51,464 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-27 21:14:51,464 INFO L87 Difference]: Start difference. First operand 59254 states and 245100 transitions. Second operand 4 states. [2019-12-27 21:14:51,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:14:51,923 INFO L93 Difference]: Finished difference Result 59254 states and 244380 transitions. [2019-12-27 21:14:51,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-27 21:14:51,923 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 36 [2019-12-27 21:14:51,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:14:52,065 INFO L225 Difference]: With dead ends: 59254 [2019-12-27 21:14:52,066 INFO L226 Difference]: Without dead ends: 59254 [2019-12-27 21:14:52,066 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-27 21:14:52,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59254 states. [2019-12-27 21:14:56,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59254 to 59254. [2019-12-27 21:14:56,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59254 states. [2019-12-27 21:14:56,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59254 states to 59254 states and 244380 transitions. [2019-12-27 21:14:56,424 INFO L78 Accepts]: Start accepts. Automaton has 59254 states and 244380 transitions. Word has length 36 [2019-12-27 21:14:56,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:14:56,424 INFO L462 AbstractCegarLoop]: Abstraction has 59254 states and 244380 transitions. [2019-12-27 21:14:56,424 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-27 21:14:56,424 INFO L276 IsEmpty]: Start isEmpty. Operand 59254 states and 244380 transitions. [2019-12-27 21:14:56,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-27 21:14:56,481 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:14:56,481 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:14:56,481 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:14:56,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:14:56,482 INFO L82 PathProgramCache]: Analyzing trace with hash -2137371719, now seen corresponding path program 1 times [2019-12-27 21:14:56,482 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:14:56,482 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1644849191] [2019-12-27 21:14:56,482 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:14:56,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:14:56,661 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:14:56,662 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1644849191] [2019-12-27 21:14:56,662 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:14:56,662 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-27 21:14:56,662 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [250815470] [2019-12-27 21:14:56,662 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:14:56,670 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:14:56,680 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 41 states and 43 transitions. [2019-12-27 21:14:56,681 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:14:56,681 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 21:14:56,681 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-27 21:14:56,681 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:14:56,682 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-27 21:14:56,682 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2019-12-27 21:14:56,682 INFO L87 Difference]: Start difference. First operand 59254 states and 244380 transitions. Second operand 10 states. [2019-12-27 21:14:57,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:14:57,953 INFO L93 Difference]: Finished difference Result 127011 states and 529842 transitions. [2019-12-27 21:14:57,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-27 21:14:57,953 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 37 [2019-12-27 21:14:57,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:14:58,271 INFO L225 Difference]: With dead ends: 127011 [2019-12-27 21:14:58,271 INFO L226 Difference]: Without dead ends: 107783 [2019-12-27 21:14:58,271 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=72, Invalid=270, Unknown=0, NotChecked=0, Total=342 [2019-12-27 21:14:59,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107783 states. [2019-12-27 21:15:00,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107783 to 95305. [2019-12-27 21:15:00,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95305 states. [2019-12-27 21:15:05,742 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95305 states to 95305 states and 398927 transitions. [2019-12-27 21:15:05,742 INFO L78 Accepts]: Start accepts. Automaton has 95305 states and 398927 transitions. Word has length 37 [2019-12-27 21:15:05,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:15:05,743 INFO L462 AbstractCegarLoop]: Abstraction has 95305 states and 398927 transitions. [2019-12-27 21:15:05,743 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-27 21:15:05,743 INFO L276 IsEmpty]: Start isEmpty. Operand 95305 states and 398927 transitions. [2019-12-27 21:15:05,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-27 21:15:05,869 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:15:05,869 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:15:05,870 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:15:05,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:15:05,870 INFO L82 PathProgramCache]: Analyzing trace with hash 253483219, now seen corresponding path program 1 times [2019-12-27 21:15:05,870 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:15:05,871 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738997696] [2019-12-27 21:15:05,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:15:05,888 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:15:06,048 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:15:06,048 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1738997696] [2019-12-27 21:15:06,049 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:15:06,049 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-27 21:15:06,049 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1657105104] [2019-12-27 21:15:06,050 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:15:06,057 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:15:06,071 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 51 states and 65 transitions. [2019-12-27 21:15:06,071 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:15:06,085 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-27 21:15:06,085 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-27 21:15:06,085 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:15:06,085 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-27 21:15:06,086 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-12-27 21:15:06,086 INFO L87 Difference]: Start difference. First operand 95305 states and 398927 transitions. Second operand 12 states. [2019-12-27 21:15:07,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:15:07,804 INFO L93 Difference]: Finished difference Result 151288 states and 629738 transitions. [2019-12-27 21:15:07,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-27 21:15:07,805 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 38 [2019-12-27 21:15:07,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:15:08,168 INFO L225 Difference]: With dead ends: 151288 [2019-12-27 21:15:08,168 INFO L226 Difference]: Without dead ends: 131160 [2019-12-27 21:15:08,168 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=99, Invalid=363, Unknown=0, NotChecked=0, Total=462 [2019-12-27 21:15:09,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131160 states. [2019-12-27 21:15:10,735 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131160 to 89934. [2019-12-27 21:15:10,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89934 states. [2019-12-27 21:15:11,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89934 states to 89934 states and 372448 transitions. [2019-12-27 21:15:11,026 INFO L78 Accepts]: Start accepts. Automaton has 89934 states and 372448 transitions. Word has length 38 [2019-12-27 21:15:11,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:15:11,026 INFO L462 AbstractCegarLoop]: Abstraction has 89934 states and 372448 transitions. [2019-12-27 21:15:11,026 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-27 21:15:11,026 INFO L276 IsEmpty]: Start isEmpty. Operand 89934 states and 372448 transitions. [2019-12-27 21:15:11,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-27 21:15:11,929 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:15:11,929 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:15:11,929 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:15:11,930 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:15:11,930 INFO L82 PathProgramCache]: Analyzing trace with hash -86186748, now seen corresponding path program 1 times [2019-12-27 21:15:11,930 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:15:11,931 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [180138288] [2019-12-27 21:15:11,931 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:15:11,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:15:12,181 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:15:12,181 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [180138288] [2019-12-27 21:15:12,181 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:15:12,181 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-27 21:15:12,182 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2063933100] [2019-12-27 21:15:12,182 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:15:12,191 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:15:12,205 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 42 states and 44 transitions. [2019-12-27 21:15:12,205 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:15:12,206 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 0 times. [2019-12-27 21:15:12,206 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-27 21:15:12,206 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:15:12,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-27 21:15:12,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-27 21:15:12,207 INFO L87 Difference]: Start difference. First operand 89934 states and 372448 transitions. Second operand 9 states. [2019-12-27 21:15:13,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:15:13,962 INFO L93 Difference]: Finished difference Result 189434 states and 783588 transitions. [2019-12-27 21:15:13,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-27 21:15:13,962 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 38 [2019-12-27 21:15:13,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:15:14,551 INFO L225 Difference]: With dead ends: 189434 [2019-12-27 21:15:14,552 INFO L226 Difference]: Without dead ends: 187538 [2019-12-27 21:15:14,552 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 8 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-27 21:15:16,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187538 states. [2019-12-27 21:15:24,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187538 to 126718. [2019-12-27 21:15:24,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126718 states. [2019-12-27 21:15:24,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126718 states to 126718 states and 528184 transitions. [2019-12-27 21:15:24,969 INFO L78 Accepts]: Start accepts. Automaton has 126718 states and 528184 transitions. Word has length 38 [2019-12-27 21:15:24,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:15:24,969 INFO L462 AbstractCegarLoop]: Abstraction has 126718 states and 528184 transitions. [2019-12-27 21:15:24,969 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-27 21:15:24,969 INFO L276 IsEmpty]: Start isEmpty. Operand 126718 states and 528184 transitions. [2019-12-27 21:15:25,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-27 21:15:25,156 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:15:25,156 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:15:25,157 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:15:25,157 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:15:25,157 INFO L82 PathProgramCache]: Analyzing trace with hash -1871388061, now seen corresponding path program 2 times [2019-12-27 21:15:25,157 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:15:25,158 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [731198937] [2019-12-27 21:15:25,158 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:15:25,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:15:25,374 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:15:25,374 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [731198937] [2019-12-27 21:15:25,375 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:15:25,375 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-27 21:15:25,375 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1465441500] [2019-12-27 21:15:25,375 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:15:25,383 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:15:25,401 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 71 states and 82 transitions. [2019-12-27 21:15:25,401 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:15:25,425 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 5 times. [2019-12-27 21:15:25,425 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-27 21:15:25,426 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:15:25,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-27 21:15:25,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2019-12-27 21:15:25,426 INFO L87 Difference]: Start difference. First operand 126718 states and 528184 transitions. Second operand 11 states. [2019-12-27 21:15:27,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:15:27,775 INFO L93 Difference]: Finished difference Result 215990 states and 905976 transitions. [2019-12-27 21:15:27,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-27 21:15:27,775 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 38 [2019-12-27 21:15:27,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:15:28,451 INFO L225 Difference]: With dead ends: 215990 [2019-12-27 21:15:28,451 INFO L226 Difference]: Without dead ends: 197506 [2019-12-27 21:15:28,452 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=76, Invalid=266, Unknown=0, NotChecked=0, Total=342 [2019-12-27 21:15:34,298 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197506 states. [2019-12-27 21:15:36,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197506 to 126774. [2019-12-27 21:15:36,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126774 states. [2019-12-27 21:15:37,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126774 states to 126774 states and 528408 transitions. [2019-12-27 21:15:37,837 INFO L78 Accepts]: Start accepts. Automaton has 126774 states and 528408 transitions. Word has length 38 [2019-12-27 21:15:37,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:15:37,837 INFO L462 AbstractCegarLoop]: Abstraction has 126774 states and 528408 transitions. [2019-12-27 21:15:37,837 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-27 21:15:37,838 INFO L276 IsEmpty]: Start isEmpty. Operand 126774 states and 528408 transitions. [2019-12-27 21:15:38,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-27 21:15:38,028 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:15:38,028 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:15:38,028 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:15:38,028 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:15:38,028 INFO L82 PathProgramCache]: Analyzing trace with hash -1463650419, now seen corresponding path program 3 times [2019-12-27 21:15:38,029 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:15:38,029 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941150302] [2019-12-27 21:15:38,029 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:15:38,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:15:38,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:15:38,165 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1941150302] [2019-12-27 21:15:38,165 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:15:38,166 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-27 21:15:38,166 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [726143413] [2019-12-27 21:15:38,166 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:15:38,176 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:15:38,200 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 73 states and 86 transitions. [2019-12-27 21:15:38,200 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:15:38,227 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 21:15:38,249 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-27 21:15:38,249 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-27 21:15:38,249 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:15:38,250 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-27 21:15:38,250 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=84, Unknown=0, NotChecked=0, Total=110 [2019-12-27 21:15:38,250 INFO L87 Difference]: Start difference. First operand 126774 states and 528408 transitions. Second operand 11 states. [2019-12-27 21:15:41,463 WARN L192 SmtUtils]: Spent 1.21 s on a formula simplification that was a NOOP. DAG size: 11 [2019-12-27 21:15:42,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:15:42,454 INFO L93 Difference]: Finished difference Result 289852 states and 1219485 transitions. [2019-12-27 21:15:42,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-27 21:15:42,455 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 38 [2019-12-27 21:15:42,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:15:43,316 INFO L225 Difference]: With dead ends: 289852 [2019-12-27 21:15:43,317 INFO L226 Difference]: Without dead ends: 263380 [2019-12-27 21:15:43,317 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=136, Invalid=514, Unknown=0, NotChecked=0, Total=650 [2019-12-27 21:15:51,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263380 states. [2019-12-27 21:15:53,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263380 to 126006. [2019-12-27 21:15:53,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126006 states. [2019-12-27 21:15:54,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126006 states to 126006 states and 524744 transitions. [2019-12-27 21:15:54,804 INFO L78 Accepts]: Start accepts. Automaton has 126006 states and 524744 transitions. Word has length 38 [2019-12-27 21:15:54,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:15:54,805 INFO L462 AbstractCegarLoop]: Abstraction has 126006 states and 524744 transitions. [2019-12-27 21:15:54,805 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-27 21:15:54,805 INFO L276 IsEmpty]: Start isEmpty. Operand 126006 states and 524744 transitions. [2019-12-27 21:15:54,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-27 21:15:54,998 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:15:54,998 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:15:54,999 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:15:54,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:15:54,999 INFO L82 PathProgramCache]: Analyzing trace with hash -57723684, now seen corresponding path program 2 times [2019-12-27 21:15:54,999 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:15:55,000 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084116097] [2019-12-27 21:15:55,000 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:15:55,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:15:55,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:15:55,096 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1084116097] [2019-12-27 21:15:55,096 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:15:55,097 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-27 21:15:55,097 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1769771467] [2019-12-27 21:15:55,097 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:15:55,105 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:15:55,119 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 47 states and 53 transitions. [2019-12-27 21:15:55,120 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:15:55,122 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-27 21:15:55,122 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-27 21:15:55,122 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:15:55,122 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-27 21:15:55,123 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-27 21:15:55,123 INFO L87 Difference]: Start difference. First operand 126006 states and 524744 transitions. Second operand 5 states. [2019-12-27 21:15:55,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:15:55,809 INFO L93 Difference]: Finished difference Result 102934 states and 422664 transitions. [2019-12-27 21:15:55,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-27 21:15:55,809 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 38 [2019-12-27 21:15:55,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:15:56,090 INFO L225 Difference]: With dead ends: 102934 [2019-12-27 21:15:56,091 INFO L226 Difference]: Without dead ends: 101062 [2019-12-27 21:15:56,091 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-27 21:16:00,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101062 states. [2019-12-27 21:16:01,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101062 to 70790. [2019-12-27 21:16:01,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70790 states. [2019-12-27 21:16:02,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70790 states to 70790 states and 288464 transitions. [2019-12-27 21:16:02,539 INFO L78 Accepts]: Start accepts. Automaton has 70790 states and 288464 transitions. Word has length 38 [2019-12-27 21:16:02,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:02,540 INFO L462 AbstractCegarLoop]: Abstraction has 70790 states and 288464 transitions. [2019-12-27 21:16:02,540 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-27 21:16:02,540 INFO L276 IsEmpty]: Start isEmpty. Operand 70790 states and 288464 transitions. [2019-12-27 21:16:02,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-27 21:16:02,641 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:02,641 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:02,641 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:02,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:02,642 INFO L82 PathProgramCache]: Analyzing trace with hash -1835482695, now seen corresponding path program 1 times [2019-12-27 21:16:02,642 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:02,642 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486531099] [2019-12-27 21:16:02,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:02,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:02,728 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:02,728 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [486531099] [2019-12-27 21:16:02,728 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:02,728 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-27 21:16:02,729 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1129408908] [2019-12-27 21:16:02,729 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:02,737 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:02,750 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 47 states and 53 transitions. [2019-12-27 21:16:02,750 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:02,774 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 21:16:02,802 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-27 21:16:02,802 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-27 21:16:02,802 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:02,802 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-27 21:16:02,803 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-27 21:16:02,803 INFO L87 Difference]: Start difference. First operand 70790 states and 288464 transitions. Second operand 8 states. [2019-12-27 21:16:03,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:03,972 INFO L93 Difference]: Finished difference Result 114072 states and 426191 transitions. [2019-12-27 21:16:03,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-27 21:16:03,972 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 39 [2019-12-27 21:16:03,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:04,247 INFO L225 Difference]: With dead ends: 114072 [2019-12-27 21:16:04,247 INFO L226 Difference]: Without dead ends: 112380 [2019-12-27 21:16:04,247 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=64, Invalid=118, Unknown=0, NotChecked=0, Total=182 [2019-12-27 21:16:05,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112380 states. [2019-12-27 21:16:06,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112380 to 55066. [2019-12-27 21:16:06,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55066 states. [2019-12-27 21:16:06,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55066 states to 55066 states and 206829 transitions. [2019-12-27 21:16:06,527 INFO L78 Accepts]: Start accepts. Automaton has 55066 states and 206829 transitions. Word has length 39 [2019-12-27 21:16:06,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:06,527 INFO L462 AbstractCegarLoop]: Abstraction has 55066 states and 206829 transitions. [2019-12-27 21:16:06,527 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-27 21:16:06,527 INFO L276 IsEmpty]: Start isEmpty. Operand 55066 states and 206829 transitions. [2019-12-27 21:16:06,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-27 21:16:06,590 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:06,590 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:06,590 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:06,590 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:06,590 INFO L82 PathProgramCache]: Analyzing trace with hash -1050444447, now seen corresponding path program 1 times [2019-12-27 21:16:06,591 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:06,591 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1749700124] [2019-12-27 21:16:06,591 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:06,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:06,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:06,679 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1749700124] [2019-12-27 21:16:06,680 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:06,680 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-27 21:16:06,680 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1596696243] [2019-12-27 21:16:06,680 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:06,688 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:07,134 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 55 states and 68 transitions. [2019-12-27 21:16:07,134 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:07,165 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 21:16:07,189 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-27 21:16:07,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-27 21:16:07,190 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:07,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-27 21:16:07,190 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-12-27 21:16:07,190 INFO L87 Difference]: Start difference. First operand 55066 states and 206829 transitions. Second operand 9 states. [2019-12-27 21:16:08,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:08,087 INFO L93 Difference]: Finished difference Result 44724 states and 138042 transitions. [2019-12-27 21:16:08,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-27 21:16:08,088 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 40 [2019-12-27 21:16:08,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:08,152 INFO L225 Difference]: With dead ends: 44724 [2019-12-27 21:16:08,153 INFO L226 Difference]: Without dead ends: 43384 [2019-12-27 21:16:08,153 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=105, Invalid=201, Unknown=0, NotChecked=0, Total=306 [2019-12-27 21:16:08,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43384 states. [2019-12-27 21:16:08,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43384 to 22031. [2019-12-27 21:16:08,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22031 states. [2019-12-27 21:16:08,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22031 states to 22031 states and 68299 transitions. [2019-12-27 21:16:08,633 INFO L78 Accepts]: Start accepts. Automaton has 22031 states and 68299 transitions. Word has length 40 [2019-12-27 21:16:08,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:08,633 INFO L462 AbstractCegarLoop]: Abstraction has 22031 states and 68299 transitions. [2019-12-27 21:16:08,633 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-27 21:16:08,633 INFO L276 IsEmpty]: Start isEmpty. Operand 22031 states and 68299 transitions. [2019-12-27 21:16:08,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-27 21:16:08,650 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:08,650 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:08,650 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:08,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:08,650 INFO L82 PathProgramCache]: Analyzing trace with hash 1699921163, now seen corresponding path program 1 times [2019-12-27 21:16:08,651 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:08,651 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1261834631] [2019-12-27 21:16:08,651 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:08,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:08,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:08,739 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1261834631] [2019-12-27 21:16:08,739 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:08,739 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-27 21:16:08,739 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1513637591] [2019-12-27 21:16:08,739 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:08,748 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:08,769 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 64 states and 85 transitions. [2019-12-27 21:16:08,770 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:08,771 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 1 times. [2019-12-27 21:16:08,771 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-27 21:16:08,772 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:08,772 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-27 21:16:08,772 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-27 21:16:08,772 INFO L87 Difference]: Start difference. First operand 22031 states and 68299 transitions. Second operand 6 states. [2019-12-27 21:16:09,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:09,064 INFO L93 Difference]: Finished difference Result 34625 states and 107456 transitions. [2019-12-27 21:16:09,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-27 21:16:09,065 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-27 21:16:09,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:09,103 INFO L225 Difference]: With dead ends: 34625 [2019-12-27 21:16:09,103 INFO L226 Difference]: Without dead ends: 15146 [2019-12-27 21:16:09,104 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-27 21:16:09,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15146 states. [2019-12-27 21:16:09,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15146 to 15146. [2019-12-27 21:16:09,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15146 states. [2019-12-27 21:16:09,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15146 states to 15146 states and 47160 transitions. [2019-12-27 21:16:09,539 INFO L78 Accepts]: Start accepts. Automaton has 15146 states and 47160 transitions. Word has length 41 [2019-12-27 21:16:09,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:09,540 INFO L462 AbstractCegarLoop]: Abstraction has 15146 states and 47160 transitions. [2019-12-27 21:16:09,540 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-27 21:16:09,540 INFO L276 IsEmpty]: Start isEmpty. Operand 15146 states and 47160 transitions. [2019-12-27 21:16:09,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-27 21:16:09,555 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:09,555 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:09,555 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:09,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:09,556 INFO L82 PathProgramCache]: Analyzing trace with hash -991967821, now seen corresponding path program 2 times [2019-12-27 21:16:09,556 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:09,557 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541217032] [2019-12-27 21:16:09,557 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:09,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:09,689 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:09,689 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1541217032] [2019-12-27 21:16:09,689 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:09,690 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-27 21:16:09,690 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1400724939] [2019-12-27 21:16:09,690 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:09,714 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:09,748 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 56 states and 69 transitions. [2019-12-27 21:16:09,749 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:09,992 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 2 times. [2019-12-27 21:16:09,992 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-27 21:16:09,992 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:09,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-27 21:16:09,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-27 21:16:09,993 INFO L87 Difference]: Start difference. First operand 15146 states and 47160 transitions. Second operand 8 states. [2019-12-27 21:16:10,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:10,378 INFO L93 Difference]: Finished difference Result 28297 states and 88285 transitions. [2019-12-27 21:16:10,378 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-27 21:16:10,378 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 41 [2019-12-27 21:16:10,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:10,418 INFO L225 Difference]: With dead ends: 28297 [2019-12-27 21:16:10,418 INFO L226 Difference]: Without dead ends: 17456 [2019-12-27 21:16:10,419 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=47, Invalid=85, Unknown=0, NotChecked=0, Total=132 [2019-12-27 21:16:10,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17456 states. [2019-12-27 21:16:10,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17456 to 15127. [2019-12-27 21:16:10,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15127 states. [2019-12-27 21:16:10,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15127 states to 15127 states and 45415 transitions. [2019-12-27 21:16:10,696 INFO L78 Accepts]: Start accepts. Automaton has 15127 states and 45415 transitions. Word has length 41 [2019-12-27 21:16:10,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:10,697 INFO L462 AbstractCegarLoop]: Abstraction has 15127 states and 45415 transitions. [2019-12-27 21:16:10,697 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-27 21:16:10,697 INFO L276 IsEmpty]: Start isEmpty. Operand 15127 states and 45415 transitions. [2019-12-27 21:16:10,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-27 21:16:10,711 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:10,711 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:10,711 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:10,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:10,712 INFO L82 PathProgramCache]: Analyzing trace with hash 127761457, now seen corresponding path program 3 times [2019-12-27 21:16:10,712 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:10,712 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132409207] [2019-12-27 21:16:10,713 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:10,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:10,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:10,796 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132409207] [2019-12-27 21:16:10,796 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:10,796 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-27 21:16:10,796 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1789944449] [2019-12-27 21:16:10,796 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:10,805 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:10,822 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 50 states and 57 transitions. [2019-12-27 21:16:10,822 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:10,880 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 6 times. [2019-12-27 21:16:10,880 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-27 21:16:10,880 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:10,880 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-27 21:16:10,881 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-27 21:16:10,881 INFO L87 Difference]: Start difference. First operand 15127 states and 45415 transitions. Second operand 9 states. [2019-12-27 21:16:11,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:11,394 INFO L93 Difference]: Finished difference Result 4384 states and 10443 transitions. [2019-12-27 21:16:11,394 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-27 21:16:11,394 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 41 [2019-12-27 21:16:11,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:11,400 INFO L225 Difference]: With dead ends: 4384 [2019-12-27 21:16:11,400 INFO L226 Difference]: Without dead ends: 3853 [2019-12-27 21:16:11,401 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=150, Unknown=0, NotChecked=0, Total=240 [2019-12-27 21:16:11,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3853 states. [2019-12-27 21:16:11,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3853 to 2737. [2019-12-27 21:16:11,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2737 states. [2019-12-27 21:16:11,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2737 states to 2737 states and 6435 transitions. [2019-12-27 21:16:11,448 INFO L78 Accepts]: Start accepts. Automaton has 2737 states and 6435 transitions. Word has length 41 [2019-12-27 21:16:11,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:11,448 INFO L462 AbstractCegarLoop]: Abstraction has 2737 states and 6435 transitions. [2019-12-27 21:16:11,449 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-27 21:16:11,449 INFO L276 IsEmpty]: Start isEmpty. Operand 2737 states and 6435 transitions. [2019-12-27 21:16:11,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2019-12-27 21:16:11,452 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:11,452 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:11,452 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:11,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:11,453 INFO L82 PathProgramCache]: Analyzing trace with hash 323536583, now seen corresponding path program 1 times [2019-12-27 21:16:11,453 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:11,454 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829942945] [2019-12-27 21:16:11,454 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:11,476 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:11,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:11,556 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [829942945] [2019-12-27 21:16:11,556 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:11,557 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-27 21:16:11,557 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [267938165] [2019-12-27 21:16:11,557 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:11,577 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:11,606 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 65 states and 80 transitions. [2019-12-27 21:16:11,606 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:11,632 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 3 times. [2019-12-27 21:16:11,633 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-27 21:16:11,633 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:11,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-27 21:16:11,633 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-27 21:16:11,633 INFO L87 Difference]: Start difference. First operand 2737 states and 6435 transitions. Second operand 8 states. [2019-12-27 21:16:11,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:11,813 INFO L93 Difference]: Finished difference Result 1204 states and 3044 transitions. [2019-12-27 21:16:11,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-27 21:16:11,813 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 48 [2019-12-27 21:16:11,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:11,815 INFO L225 Difference]: With dead ends: 1204 [2019-12-27 21:16:11,815 INFO L226 Difference]: Without dead ends: 869 [2019-12-27 21:16:11,816 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=94, Unknown=0, NotChecked=0, Total=156 [2019-12-27 21:16:11,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 869 states. [2019-12-27 21:16:11,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 869 to 773. [2019-12-27 21:16:11,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 773 states. [2019-12-27 21:16:11,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 773 states to 773 states and 1869 transitions. [2019-12-27 21:16:11,826 INFO L78 Accepts]: Start accepts. Automaton has 773 states and 1869 transitions. Word has length 48 [2019-12-27 21:16:11,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:11,826 INFO L462 AbstractCegarLoop]: Abstraction has 773 states and 1869 transitions. [2019-12-27 21:16:11,826 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-27 21:16:11,826 INFO L276 IsEmpty]: Start isEmpty. Operand 773 states and 1869 transitions. [2019-12-27 21:16:11,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2019-12-27 21:16:11,827 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:11,828 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:11,828 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:11,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:11,828 INFO L82 PathProgramCache]: Analyzing trace with hash 2083563203, now seen corresponding path program 1 times [2019-12-27 21:16:11,829 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:11,829 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [703167122] [2019-12-27 21:16:11,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:11,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:11,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:11,887 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [703167122] [2019-12-27 21:16:11,887 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:11,888 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-27 21:16:11,888 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1691779230] [2019-12-27 21:16:11,888 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:11,905 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:11,987 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 143 states and 239 transitions. [2019-12-27 21:16:11,987 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:12,013 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 7 times. [2019-12-27 21:16:12,013 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-27 21:16:12,013 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:12,014 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-27 21:16:12,014 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-27 21:16:12,014 INFO L87 Difference]: Start difference. First operand 773 states and 1869 transitions. Second operand 5 states. [2019-12-27 21:16:12,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:12,176 INFO L93 Difference]: Finished difference Result 1022 states and 2413 transitions. [2019-12-27 21:16:12,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-27 21:16:12,176 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 59 [2019-12-27 21:16:12,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:12,178 INFO L225 Difference]: With dead ends: 1022 [2019-12-27 21:16:12,178 INFO L226 Difference]: Without dead ends: 1022 [2019-12-27 21:16:12,179 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-27 21:16:12,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1022 states. [2019-12-27 21:16:12,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1022 to 739. [2019-12-27 21:16:12,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 739 states. [2019-12-27 21:16:12,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 739 states to 739 states and 1745 transitions. [2019-12-27 21:16:12,189 INFO L78 Accepts]: Start accepts. Automaton has 739 states and 1745 transitions. Word has length 59 [2019-12-27 21:16:12,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:12,189 INFO L462 AbstractCegarLoop]: Abstraction has 739 states and 1745 transitions. [2019-12-27 21:16:12,189 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-27 21:16:12,189 INFO L276 IsEmpty]: Start isEmpty. Operand 739 states and 1745 transitions. [2019-12-27 21:16:12,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-27 21:16:12,190 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:12,190 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:12,190 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:12,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:12,190 INFO L82 PathProgramCache]: Analyzing trace with hash 1577814574, now seen corresponding path program 1 times [2019-12-27 21:16:12,191 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:12,191 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1651070181] [2019-12-27 21:16:12,191 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:12,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:12,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:12,422 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1651070181] [2019-12-27 21:16:12,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:12,422 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-27 21:16:12,423 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2045859366] [2019-12-27 21:16:12,423 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:12,439 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:12,518 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 107 states and 152 transitions. [2019-12-27 21:16:12,518 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:12,525 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 21:16:12,688 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 11 times. [2019-12-27 21:16:12,688 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-27 21:16:12,689 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:12,689 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-27 21:16:12,689 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=216, Unknown=0, NotChecked=0, Total=272 [2019-12-27 21:16:12,689 INFO L87 Difference]: Start difference. First operand 739 states and 1745 transitions. Second operand 17 states. [2019-12-27 21:16:14,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:14,654 INFO L93 Difference]: Finished difference Result 2482 states and 5678 transitions. [2019-12-27 21:16:14,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-27 21:16:14,655 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 60 [2019-12-27 21:16:14,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:14,656 INFO L225 Difference]: With dead ends: 2482 [2019-12-27 21:16:14,656 INFO L226 Difference]: Without dead ends: 347 [2019-12-27 21:16:14,657 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 10 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 281 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=335, Invalid=1225, Unknown=0, NotChecked=0, Total=1560 [2019-12-27 21:16:14,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2019-12-27 21:16:14,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 215. [2019-12-27 21:16:14,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 215 states. [2019-12-27 21:16:14,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 215 states to 215 states and 375 transitions. [2019-12-27 21:16:14,661 INFO L78 Accepts]: Start accepts. Automaton has 215 states and 375 transitions. Word has length 60 [2019-12-27 21:16:14,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:14,661 INFO L462 AbstractCegarLoop]: Abstraction has 215 states and 375 transitions. [2019-12-27 21:16:14,661 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-27 21:16:14,661 INFO L276 IsEmpty]: Start isEmpty. Operand 215 states and 375 transitions. [2019-12-27 21:16:14,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-27 21:16:14,662 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:14,662 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:14,662 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:14,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:14,662 INFO L82 PathProgramCache]: Analyzing trace with hash -450753008, now seen corresponding path program 2 times [2019-12-27 21:16:14,663 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:14,663 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1415803348] [2019-12-27 21:16:14,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:14,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:15,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:15,245 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1415803348] [2019-12-27 21:16:15,245 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:15,245 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-27 21:16:15,245 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [1445302028] [2019-12-27 21:16:15,245 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:15,263 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:15,322 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 88 states and 109 transitions. [2019-12-27 21:16:15,322 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:15,331 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 21:16:15,432 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 21:16:15,663 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 10 times. [2019-12-27 21:16:15,663 INFO L442 AbstractCegarLoop]: Interpolant automaton has 24 states [2019-12-27 21:16:15,664 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:15,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-27 21:16:15,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=92, Invalid=460, Unknown=0, NotChecked=0, Total=552 [2019-12-27 21:16:15,665 INFO L87 Difference]: Start difference. First operand 215 states and 375 transitions. Second operand 24 states. [2019-12-27 21:16:18,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:18,079 INFO L93 Difference]: Finished difference Result 637 states and 1118 transitions. [2019-12-27 21:16:18,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-27 21:16:18,080 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 60 [2019-12-27 21:16:18,080 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:18,081 INFO L225 Difference]: With dead ends: 637 [2019-12-27 21:16:18,081 INFO L226 Difference]: Without dead ends: 558 [2019-12-27 21:16:18,082 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 8 SyntacticMatches, 2 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 440 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=387, Invalid=1965, Unknown=0, NotChecked=0, Total=2352 [2019-12-27 21:16:18,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 558 states. [2019-12-27 21:16:18,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 558 to 243. [2019-12-27 21:16:18,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 243 states. [2019-12-27 21:16:18,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 243 states to 243 states and 429 transitions. [2019-12-27 21:16:18,087 INFO L78 Accepts]: Start accepts. Automaton has 243 states and 429 transitions. Word has length 60 [2019-12-27 21:16:18,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:18,087 INFO L462 AbstractCegarLoop]: Abstraction has 243 states and 429 transitions. [2019-12-27 21:16:18,087 INFO L463 AbstractCegarLoop]: Interpolant automaton has 24 states. [2019-12-27 21:16:18,087 INFO L276 IsEmpty]: Start isEmpty. Operand 243 states and 429 transitions. [2019-12-27 21:16:18,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-27 21:16:18,088 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:18,088 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:18,088 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:18,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:18,089 INFO L82 PathProgramCache]: Analyzing trace with hash -2016155998, now seen corresponding path program 3 times [2019-12-27 21:16:18,089 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:18,089 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [184150484] [2019-12-27 21:16:18,090 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:18,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:18,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:18,359 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [184150484] [2019-12-27 21:16:18,359 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:18,359 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-27 21:16:18,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2339862] [2019-12-27 21:16:18,360 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:18,376 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:18,435 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 98 states and 123 transitions. [2019-12-27 21:16:18,435 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:18,495 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 5 times. [2019-12-27 21:16:18,496 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-27 21:16:18,496 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:18,496 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-27 21:16:18,497 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-27 21:16:18,497 INFO L87 Difference]: Start difference. First operand 243 states and 429 transitions. Second operand 16 states. [2019-12-27 21:16:19,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:19,908 INFO L93 Difference]: Finished difference Result 494 states and 841 transitions. [2019-12-27 21:16:19,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-27 21:16:19,908 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 60 [2019-12-27 21:16:19,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:19,909 INFO L225 Difference]: With dead ends: 494 [2019-12-27 21:16:19,909 INFO L226 Difference]: Without dead ends: 347 [2019-12-27 21:16:19,910 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 182 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=190, Invalid=866, Unknown=0, NotChecked=0, Total=1056 [2019-12-27 21:16:19,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2019-12-27 21:16:19,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 227. [2019-12-27 21:16:19,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227 states. [2019-12-27 21:16:19,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227 states to 227 states and 395 transitions. [2019-12-27 21:16:19,914 INFO L78 Accepts]: Start accepts. Automaton has 227 states and 395 transitions. Word has length 60 [2019-12-27 21:16:19,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:19,914 INFO L462 AbstractCegarLoop]: Abstraction has 227 states and 395 transitions. [2019-12-27 21:16:19,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-27 21:16:19,914 INFO L276 IsEmpty]: Start isEmpty. Operand 227 states and 395 transitions. [2019-12-27 21:16:19,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-27 21:16:19,914 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:19,915 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:19,915 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:19,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:19,915 INFO L82 PathProgramCache]: Analyzing trace with hash -1199767330, now seen corresponding path program 4 times [2019-12-27 21:16:19,915 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:19,916 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [417813188] [2019-12-27 21:16:19,916 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:19,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:20,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:20,220 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [417813188] [2019-12-27 21:16:20,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:20,220 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-27 21:16:20,220 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [732304108] [2019-12-27 21:16:20,220 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:20,238 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:20,307 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 97 states and 129 transitions. [2019-12-27 21:16:20,307 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:20,325 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 21:16:20,326 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 21:16:20,473 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 10 times. [2019-12-27 21:16:20,474 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-27 21:16:20,474 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:20,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-27 21:16:20,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=227, Unknown=0, NotChecked=0, Total=272 [2019-12-27 21:16:20,475 INFO L87 Difference]: Start difference. First operand 227 states and 395 transitions. Second operand 17 states. [2019-12-27 21:16:21,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:21,862 INFO L93 Difference]: Finished difference Result 457 states and 761 transitions. [2019-12-27 21:16:21,863 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-27 21:16:21,863 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 60 [2019-12-27 21:16:21,863 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:21,864 INFO L225 Difference]: With dead ends: 457 [2019-12-27 21:16:21,864 INFO L226 Difference]: Without dead ends: 334 [2019-12-27 21:16:21,865 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 4 SyntacticMatches, 4 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 261 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=216, Invalid=1044, Unknown=0, NotChecked=0, Total=1260 [2019-12-27 21:16:21,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 334 states. [2019-12-27 21:16:21,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 334 to 223. [2019-12-27 21:16:21,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223 states. [2019-12-27 21:16:21,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223 states to 223 states and 386 transitions. [2019-12-27 21:16:21,869 INFO L78 Accepts]: Start accepts. Automaton has 223 states and 386 transitions. Word has length 60 [2019-12-27 21:16:21,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:21,869 INFO L462 AbstractCegarLoop]: Abstraction has 223 states and 386 transitions. [2019-12-27 21:16:21,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-27 21:16:21,869 INFO L276 IsEmpty]: Start isEmpty. Operand 223 states and 386 transitions. [2019-12-27 21:16:21,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-27 21:16:21,870 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:21,870 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:21,870 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:21,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:21,870 INFO L82 PathProgramCache]: Analyzing trace with hash 1921577050, now seen corresponding path program 5 times [2019-12-27 21:16:21,871 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:21,871 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [381875950] [2019-12-27 21:16:21,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:21,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:22,382 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:22,382 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [381875950] [2019-12-27 21:16:22,383 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:22,383 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-27 21:16:22,385 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [798647607] [2019-12-27 21:16:22,385 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:22,404 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:22,461 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 83 states and 102 transitions. [2019-12-27 21:16:22,461 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:22,471 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2019-12-27 21:16:22,563 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 3 times. [2019-12-27 21:16:22,563 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-27 21:16:22,563 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:22,564 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-27 21:16:22,564 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=313, Unknown=0, NotChecked=0, Total=380 [2019-12-27 21:16:22,564 INFO L87 Difference]: Start difference. First operand 223 states and 386 transitions. Second operand 20 states. [2019-12-27 21:16:23,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:23,920 INFO L93 Difference]: Finished difference Result 495 states and 838 transitions. [2019-12-27 21:16:23,920 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-27 21:16:23,920 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 60 [2019-12-27 21:16:23,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:23,921 INFO L225 Difference]: With dead ends: 495 [2019-12-27 21:16:23,922 INFO L226 Difference]: Without dead ends: 400 [2019-12-27 21:16:23,923 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 288 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=246, Invalid=1236, Unknown=0, NotChecked=0, Total=1482 [2019-12-27 21:16:23,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 400 states. [2019-12-27 21:16:23,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 400 to 235. [2019-12-27 21:16:23,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 235 states. [2019-12-27 21:16:23,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 235 states to 235 states and 407 transitions. [2019-12-27 21:16:23,928 INFO L78 Accepts]: Start accepts. Automaton has 235 states and 407 transitions. Word has length 60 [2019-12-27 21:16:23,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:23,928 INFO L462 AbstractCegarLoop]: Abstraction has 235 states and 407 transitions. [2019-12-27 21:16:23,928 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-27 21:16:23,928 INFO L276 IsEmpty]: Start isEmpty. Operand 235 states and 407 transitions. [2019-12-27 21:16:23,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-27 21:16:23,928 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:23,929 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:23,929 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:23,929 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:23,929 INFO L82 PathProgramCache]: Analyzing trace with hash -566918370, now seen corresponding path program 6 times [2019-12-27 21:16:23,930 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:23,930 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [437818386] [2019-12-27 21:16:23,930 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:23,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-27 21:16:24,300 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-27 21:16:24,300 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [437818386] [2019-12-27 21:16:24,300 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-27 21:16:24,300 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-27 21:16:24,301 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleMcr [2023751776] [2019-12-27 21:16:24,301 INFO L132 pAbStrategyModuleMcr]: Constructing automaton for MCR equivalence class. [2019-12-27 21:16:24,453 INFO L197 pAbStrategyModuleMcr]: Started intersection. [2019-12-27 21:16:24,516 INFO L208 pAbStrategyModuleMcr]: Finished intersection with 91 states and 119 transitions. [2019-12-27 21:16:24,516 INFO L219 pAbStrategyModuleMcr]: Constructing interpolant automaton by labelling MCR automaton. [2019-12-27 21:16:24,560 INFO L288 pAbStrategyModuleMcr]: Construction finished. Needed to calculate wp 4 times. [2019-12-27 21:16:24,560 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-27 21:16:24,561 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-27 21:16:24,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-27 21:16:24,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-12-27 21:16:24,562 INFO L87 Difference]: Start difference. First operand 235 states and 407 transitions. Second operand 14 states. [2019-12-27 21:16:25,390 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-27 21:16:25,390 INFO L93 Difference]: Finished difference Result 322 states and 532 transitions. [2019-12-27 21:16:25,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-27 21:16:25,391 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 60 [2019-12-27 21:16:25,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-27 21:16:25,392 INFO L225 Difference]: With dead ends: 322 [2019-12-27 21:16:25,392 INFO L226 Difference]: Without dead ends: 194 [2019-12-27 21:16:25,393 INFO L631 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=122, Invalid=478, Unknown=0, NotChecked=0, Total=600 [2019-12-27 21:16:25,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2019-12-27 21:16:25,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 191. [2019-12-27 21:16:25,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2019-12-27 21:16:25,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 326 transitions. [2019-12-27 21:16:25,398 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 326 transitions. Word has length 60 [2019-12-27 21:16:25,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-27 21:16:25,398 INFO L462 AbstractCegarLoop]: Abstraction has 191 states and 326 transitions. [2019-12-27 21:16:25,398 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-27 21:16:25,399 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 326 transitions. [2019-12-27 21:16:25,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-27 21:16:25,399 INFO L403 BasicCegarLoop]: Found error trace [2019-12-27 21:16:25,400 INFO L411 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-27 21:16:25,400 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P3Err0ASSERT_VIOLATIONERROR_FUNCTION, P3Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-27 21:16:25,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-27 21:16:25,401 INFO L82 PathProgramCache]: Analyzing trace with hash 790518800, now seen corresponding path program 7 times [2019-12-27 21:16:25,402 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-27 21:16:25,402 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [233023495] [2019-12-27 21:16:25,402 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-27 21:16:25,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-27 21:16:25,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-27 21:16:25,636 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-27 21:16:25,637 INFO L476 BasicCegarLoop]: Counterexample might be feasible [2019-12-27 21:16:25,642 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] ULTIMATE.startENTRY-->L835: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= (store |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1133~0.base_21| (store (select |v_#memory_int_28| |v_ULTIMATE.start_main_~#t1133~0.base_21|) |v_ULTIMATE.start_main_~#t1133~0.offset_16| 0)) |v_#memory_int_27|) (= 0 v_~z$w_buff1~0_23) (= v_~x~0_11 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1133~0.base_21|) 0) (= 0 v_~z$r_buff1_thd1~0_10) (= v_~z$read_delayed_var~0.offset_6 0) (= |v_ULTIMATE.start_main_~#t1133~0.offset_16| 0) (= |v_#NULL.offset_7| 0) (= 0 v_~__unbuffered_p1_EAX~0_11) (= v_~z$w_buff0_used~0_104 0) (= 0 v_~__unbuffered_p0_EAX~0_10) (= v_~z$r_buff0_thd4~0_29 0) (= v_~z$r_buff0_thd0~0_83 0) (= 0 v_~__unbuffered_p3_EAX~0_12) (= 0 v_~weak$$choice2~0_32) (= v_~z$read_delayed~0_5 0) (= 0 v_~z$r_buff1_thd0~0_50) (= |v_#length_27| (store |v_#length_28| |v_ULTIMATE.start_main_~#t1133~0.base_21| 4)) (= 0 v_~z$flush_delayed~0_17) (= v_~z$read_delayed_var~0.base_6 0) (= 0 v_~z$r_buff1_thd2~0_10) (= 0 v_~z$w_buff1_used~0_64) (= v_~a~0_10 0) (= 0 v_~weak$$choice0~0_7) (= 0 v_~__unbuffered_cnt~0_24) (< 0 |v_#StackHeapBarrier_20|) (= v_~z$r_buff0_thd1~0_11 0) (= 0 |v_#NULL.base_7|) (= v_~z~0_27 0) (= 0 v_~__unbuffered_p3_EBX~0_12) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t1133~0.base_21| 1)) (= v_~z$r_buff0_thd2~0_9 0) (= v_~z$mem_tmp~0_12 0) (= v_~y~0_10 0) (= 0 v_~z$w_buff0~0_25) (< |v_#StackHeapBarrier_20| |v_ULTIMATE.start_main_~#t1133~0.base_21|) (= v_~main$tmp_guard0~0_11 0) (= v_~b~0_12 0) (= v_~main$tmp_guard1~0_13 0) (= v_~z$r_buff0_thd3~0_22 0) (= 0 v_~z$r_buff1_thd3~0_17) (= 0 v_~z$r_buff1_thd4~0_19))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_20|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_28|, #length=|v_#length_28|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_10|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_10, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_8|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_13|, ULTIMATE.start_main_~#t1134~0.offset=|v_ULTIMATE.start_main_~#t1134~0.offset_16|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_11|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_12|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_8|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_13|, ~a~0=v_~a~0_10, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_83, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_10, ULTIMATE.start_main_~#t1136~0.base=|v_ULTIMATE.start_main_~#t1136~0.base_22|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_11, ~z$r_buff0_thd4~0=v_~z$r_buff0_thd4~0_29, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_12, #length=|v_#length_27|, ULTIMATE.start_main_~#t1133~0.base=|v_ULTIMATE.start_main_~#t1133~0.base_21|, ULTIMATE.start_main_~#t1134~0.base=|v_ULTIMATE.start_main_~#t1134~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_12, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_14|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_11|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_64, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_12|, ~z$flush_delayed~0=v_~z$flush_delayed~0_17, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_10|, ULTIMATE.start_main_~#t1136~0.offset=|v_ULTIMATE.start_main_~#t1136~0.offset_16|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_14|, ~weak$$choice0~0=v_~weak$$choice0~0_7, #StackHeapBarrier=|v_#StackHeapBarrier_20|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_12|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_10, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_22, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_24, ULTIMATE.start_main_~#t1135~0.offset=|v_ULTIMATE.start_main_~#t1135~0.offset_16|, ~x~0=v_~x~0_11, ~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_19, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_11|, ~z$read_delayed~0=v_~z$read_delayed~0_5, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ~z$w_buff1~0=v_~z$w_buff1~0_23, ULTIMATE.start_main_~#t1135~0.base=|v_ULTIMATE.start_main_~#t1135~0.base_21|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_10|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_8|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_14|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_8|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_11|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_13|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_50, ULTIMATE.start_main_#t~nondet26=|v_ULTIMATE.start_main_#t~nondet26_6|, ~y~0=v_~y~0_10, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_9, ULTIMATE.start_main_~#t1133~0.offset=|v_ULTIMATE.start_main_~#t1133~0.offset_16|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_104, ~z$w_buff0~0=v_~z$w_buff0~0_25, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_10|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_6|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_17, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_14|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_11|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_11, ~__unbuffered_p3_EBX~0=v_~__unbuffered_p3_EBX~0_12, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_12|, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_13|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_12|, ~b~0=v_~b~0_12, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_27|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, ULTIMATE.start_main_#t~nondet18=|v_ULTIMATE.start_main_#t~nondet18_5|, ~z~0=v_~z~0_27, ~weak$$choice2~0=v_~weak$$choice2~0_32, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_11} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t1134~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~a~0, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t1136~0.base, ~__unbuffered_p1_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_~#t1133~0.base, ULTIMATE.start_main_~#t1134~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t1136~0.offset, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ULTIMATE.start_main_#t~nondet15, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1135~0.offset, ~x~0, ~z$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ULTIMATE.start_main_~#t1135~0.base, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~z$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet26, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t1133~0.offset, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~__unbuffered_p3_EBX~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ~b~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_#t~nondet18, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-27 21:16:25,648 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L835-1-->L837: Formula: (and (= |v_ULTIMATE.start_main_~#t1134~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t1134~0.base_12|)) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t1134~0.base_12| 4)) (= (store |v_#valid_45| |v_ULTIMATE.start_main_~#t1134~0.base_12| 1) |v_#valid_44|) (= 0 (select |v_#valid_45| |v_ULTIMATE.start_main_~#t1134~0.base_12|)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1134~0.base_12|) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1134~0.base_12| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t1134~0.base_12|) |v_ULTIMATE.start_main_~#t1134~0.offset_10| 1)) |v_#memory_int_21|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_22|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_~#t1134~0.base=|v_ULTIMATE.start_main_~#t1134~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_21|, ULTIMATE.start_main_~#t1134~0.offset=|v_ULTIMATE.start_main_~#t1134~0.offset_10|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_4|, #length=|v_#length_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1134~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1134~0.offset, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-27 21:16:25,649 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] L837-1-->L839: Formula: (and (= 0 (select |v_#valid_36| |v_ULTIMATE.start_main_~#t1135~0.base_8|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1135~0.base_8|) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1135~0.base_8| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t1135~0.base_8|) |v_ULTIMATE.start_main_~#t1135~0.offset_8| 2)) |v_#memory_int_17|) (= 0 |v_ULTIMATE.start_main_~#t1135~0.offset_8|) (= |v_#valid_35| (store |v_#valid_36| |v_ULTIMATE.start_main_~#t1135~0.base_8| 1)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1135~0.base_8| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t1135~0.base_8|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_36|, #memory_int=|v_#memory_int_18|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_3|, ULTIMATE.start_main_~#t1135~0.base=|v_ULTIMATE.start_main_~#t1135~0.base_8|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1135~0.offset=|v_ULTIMATE.start_main_~#t1135~0.offset_8|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ULTIMATE.start_main_~#t1135~0.base, #length, ULTIMATE.start_main_~#t1135~0.offset] because there is no mapped edge [2019-12-27 21:16:25,652 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L839-1-->L841: Formula: (and (= |v_ULTIMATE.start_main_~#t1136~0.offset_10| 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1136~0.base_12| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1136~0.base_12|) |v_ULTIMATE.start_main_~#t1136~0.offset_10| 3)) |v_#memory_int_23|) (not (= 0 |v_ULTIMATE.start_main_~#t1136~0.base_12|)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1136~0.base_12| 4)) (= |v_#valid_46| (store |v_#valid_47| |v_ULTIMATE.start_main_~#t1136~0.base_12| 1)) (< |v_#StackHeapBarrier_14| |v_ULTIMATE.start_main_~#t1136~0.base_12|) (= 0 (select |v_#valid_47| |v_ULTIMATE.start_main_~#t1136~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_14|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_14|, ULTIMATE.start_main_~#t1136~0.base=|v_ULTIMATE.start_main_~#t1136~0.base_12|, #valid=|v_#valid_46|, #memory_int=|v_#memory_int_23|, #length=|v_#length_23|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_4|, ULTIMATE.start_main_~#t1136~0.offset=|v_ULTIMATE.start_main_~#t1136~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1136~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet17, ULTIMATE.start_main_~#t1136~0.offset] because there is no mapped edge [2019-12-27 21:16:25,654 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L4-->L812: Formula: (and (= ~z$r_buff0_thd4~0_In1196000632 ~z$r_buff1_thd4~0_Out1196000632) (= ~z$r_buff0_thd4~0_Out1196000632 1) (= ~z$r_buff1_thd0~0_Out1196000632 ~z$r_buff0_thd0~0_In1196000632) (= ~z$r_buff1_thd3~0_Out1196000632 ~z$r_buff0_thd3~0_In1196000632) (= ~z$r_buff0_thd1~0_In1196000632 ~z$r_buff1_thd1~0_Out1196000632) (= ~__unbuffered_p3_EAX~0_Out1196000632 ~a~0_Out1196000632) (= 1 ~a~0_Out1196000632) (not (= P3Thread1of1ForFork3___VERIFIER_assert_~expression_In1196000632 0)) (= ~z$r_buff1_thd2~0_Out1196000632 ~z$r_buff0_thd2~0_In1196000632) (= ~__unbuffered_p3_EBX~0_Out1196000632 ~b~0_In1196000632)) InVars {P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In1196000632, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1196000632, ~b~0=~b~0_In1196000632, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1196000632, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1196000632, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1196000632, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1196000632} OutVars{P3Thread1of1ForFork3___VERIFIER_assert_~expression=P3Thread1of1ForFork3___VERIFIER_assert_~expression_In1196000632, ~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_Out1196000632, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out1196000632, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out1196000632, ~__unbuffered_p3_EBX~0=~__unbuffered_p3_EBX~0_Out1196000632, ~a~0=~a~0_Out1196000632, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1196000632, ~b~0=~b~0_In1196000632, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out1196000632, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out1196000632, ~__unbuffered_p3_EAX~0=~__unbuffered_p3_EAX~0_Out1196000632, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out1196000632, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1196000632, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1196000632, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1196000632} AuxVars[] AssignedVars[~a~0, ~z$r_buff1_thd4~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~__unbuffered_p3_EAX~0, ~z$r_buff0_thd4~0, ~__unbuffered_p3_EBX~0] because there is no mapped edge [2019-12-27 21:16:25,654 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] P0ENTRY-->P0EXIT: Formula: (and (= v_~__unbuffered_p0_EAX~0_6 v_~x~0_7) (= 0 |v_P0Thread1of1ForFork0_#res.base_5|) (= 1 v_~b~0_8) (= v_P0Thread1of1ForFork0_~arg.offset_4 |v_P0Thread1of1ForFork0_#in~arg.offset_4|) (= |v_P0Thread1of1ForFork0_#res.offset_5| 0) (= v_P0Thread1of1ForFork0_~arg.base_4 |v_P0Thread1of1ForFork0_#in~arg.base_4|) (= (+ v_~__unbuffered_cnt~0_20 1) v_~__unbuffered_cnt~0_19)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_4|, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_4|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_20, ~x~0=v_~x~0_7} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_4|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_6, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_5|, ~b~0=v_~b~0_8, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_4|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_19, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_4, ~x~0=v_~x~0_7, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_4} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork0_#res.offset, ~b~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-27 21:16:25,666 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] P1ENTRY-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_13 1) v_~__unbuffered_cnt~0_12) (= v_~__unbuffered_p1_EAX~0_6 v_~y~0_5) (= 1 v_~x~0_5) (= 0 |v_P1Thread1of1ForFork1_#res.base_5|) (= |v_P1Thread1of1ForFork1_#in~arg.offset_4| v_P1Thread1of1ForFork1_~arg.offset_4) (= v_P1Thread1of1ForFork1_~arg.base_4 |v_P1Thread1of1ForFork1_#in~arg.base_4|) (= |v_P1Thread1of1ForFork1_#res.offset_5| 0)) InVars {P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_4|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_4|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~y~0=v_~y~0_5} OutVars{P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_4, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_5|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_6, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_4, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_4|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_4|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_12, ~y~0=v_~y~0_5, ~x~0=v_~x~0_5, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork1_~arg.base, ~__unbuffered_cnt~0, ~x~0, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-27 21:16:25,667 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [737] [737] L813-->L813-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-1858069413 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In-1858069413 256)))) (or (and (= |P3Thread1of1ForFork3_#t~ite11_Out-1858069413| ~z$w_buff0_used~0_In-1858069413) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P3Thread1of1ForFork3_#t~ite11_Out-1858069413| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1858069413, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1858069413} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1858069413, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-1858069413, P3Thread1of1ForFork3_#t~ite11=|P3Thread1of1ForFork3_#t~ite11_Out-1858069413|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite11] because there is no mapped edge [2019-12-27 21:16:25,668 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] L776-2-->L776-4: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1894623105 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1894623105 256)))) (or (and (= ~z~0_In1894623105 |P2Thread1of1ForFork2_#t~ite3_Out1894623105|) (or .cse0 .cse1)) (and (not .cse0) (= ~z$w_buff1~0_In1894623105 |P2Thread1of1ForFork2_#t~ite3_Out1894623105|) (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1894623105, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1894623105, ~z$w_buff1~0=~z$w_buff1~0_In1894623105, ~z~0=~z~0_In1894623105} OutVars{P2Thread1of1ForFork2_#t~ite3=|P2Thread1of1ForFork2_#t~ite3_Out1894623105|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1894623105, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1894623105, ~z$w_buff1~0=~z$w_buff1~0_In1894623105, ~z~0=~z~0_In1894623105} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-27 21:16:25,668 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [669] [669] L776-4-->L777: Formula: (= v_~z~0_15 |v_P2Thread1of1ForFork2_#t~ite3_8|) InVars {P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_8|} OutVars{P2Thread1of1ForFork2_#t~ite4=|v_P2Thread1of1ForFork2_#t~ite4_7|, P2Thread1of1ForFork2_#t~ite3=|v_P2Thread1of1ForFork2_#t~ite3_7|, ~z~0=v_~z~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite4, P2Thread1of1ForFork2_#t~ite3, ~z~0] because there is no mapped edge [2019-12-27 21:16:25,669 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [731] [731] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In1424033976 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In1424033976 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite5_Out1424033976| ~z$w_buff0_used~0_In1424033976)) (and (= |P2Thread1of1ForFork2_#t~ite5_Out1424033976| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1424033976, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1424033976} OutVars{P2Thread1of1ForFork2_#t~ite5=|P2Thread1of1ForFork2_#t~ite5_Out1424033976|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1424033976, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1424033976} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-27 21:16:25,670 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [729] [729] L778-->L778-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In18370383 256))) (.cse2 (= (mod ~z$r_buff0_thd3~0_In18370383 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In18370383 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In18370383 256)))) (or (and (= ~z$w_buff1_used~0_In18370383 |P2Thread1of1ForFork2_#t~ite6_Out18370383|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite6_Out18370383| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In18370383, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In18370383, ~z$w_buff1_used~0=~z$w_buff1_used~0_In18370383, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In18370383} OutVars{P2Thread1of1ForFork2_#t~ite6=|P2Thread1of1ForFork2_#t~ite6_Out18370383|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In18370383, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In18370383, ~z$w_buff1_used~0=~z$w_buff1_used~0_In18370383, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In18370383} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-27 21:16:25,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In202808350 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In202808350 256) 0))) (or (and (= ~z$r_buff0_thd3~0_In202808350 |P2Thread1of1ForFork2_#t~ite7_Out202808350|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork2_#t~ite7_Out202808350|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In202808350, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In202808350} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In202808350, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In202808350, P2Thread1of1ForFork2_#t~ite7=|P2Thread1of1ForFork2_#t~ite7_Out202808350|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-27 21:16:25,671 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [727] [727] L780-->L780-2: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd3~0_In1851277672 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In1851277672 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1851277672 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1851277672 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite8_Out1851277672| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite8_Out1851277672| ~z$r_buff1_thd3~0_In1851277672) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1851277672, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1851277672, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1851277672, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1851277672} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1851277672, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1851277672, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1851277672, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1851277672, P2Thread1of1ForFork2_#t~ite8=|P2Thread1of1ForFork2_#t~ite8_Out1851277672|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-27 21:16:25,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L780-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_5|) (= v_~__unbuffered_cnt~0_14 (+ v_~__unbuffered_cnt~0_15 1)) (= v_~z$r_buff1_thd3~0_14 |v_P2Thread1of1ForFork2_#t~ite8_8|) (= |v_P2Thread1of1ForFork2_#res.offset_5| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_15, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_8|} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_14, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_5|, P2Thread1of1ForFork2_#t~ite8=|v_P2Thread1of1ForFork2_#t~ite8_7|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset, P2Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-27 21:16:25,672 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L814-->L814-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1767159511 256))) (.cse0 (= (mod ~z$r_buff1_thd4~0_In1767159511 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd4~0_In1767159511 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In1767159511 256) 0))) (or (and (= ~z$w_buff1_used~0_In1767159511 |P3Thread1of1ForFork3_#t~ite12_Out1767159511|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P3Thread1of1ForFork3_#t~ite12_Out1767159511|) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1767159511, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1767159511, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1767159511, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1767159511} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In1767159511, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1767159511, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In1767159511, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1767159511, P3Thread1of1ForFork3_#t~ite12=|P3Thread1of1ForFork3_#t~ite12_Out1767159511|} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite12] because there is no mapped edge [2019-12-27 21:16:25,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [735] [735] L815-->L816: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-737340160 256))) (.cse0 (= (mod ~z$r_buff0_thd4~0_In-737340160 256) 0))) (or (and (= ~z$r_buff0_thd4~0_Out-737340160 ~z$r_buff0_thd4~0_In-737340160) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 ~z$r_buff0_thd4~0_Out-737340160)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-737340160, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-737340160} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-737340160, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_Out-737340160, P3Thread1of1ForFork3_#t~ite13=|P3Thread1of1ForFork3_#t~ite13_Out-737340160|} AuxVars[] AssignedVars[~z$r_buff0_thd4~0, P3Thread1of1ForFork3_#t~ite13] because there is no mapped edge [2019-12-27 21:16:25,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [728] [728] L816-->L816-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd4~0_In-266817781 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-266817781 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd4~0_In-266817781 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-266817781 256)))) (or (and (= 0 |P3Thread1of1ForFork3_#t~ite14_Out-266817781|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P3Thread1of1ForFork3_#t~ite14_Out-266817781| ~z$r_buff1_thd4~0_In-266817781) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-266817781, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-266817781, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-266817781, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-266817781} OutVars{~z$r_buff1_thd4~0=~z$r_buff1_thd4~0_In-266817781, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-266817781, P3Thread1of1ForFork3_#t~ite14=|P3Thread1of1ForFork3_#t~ite14_Out-266817781|, ~z$r_buff0_thd4~0=~z$r_buff0_thd4~0_In-266817781, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-266817781} AuxVars[] AssignedVars[P3Thread1of1ForFork3_#t~ite14] because there is no mapped edge [2019-12-27 21:16:25,673 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L816-2-->P3EXIT: Formula: (and (= |v_P3Thread1of1ForFork3_#t~ite14_8| v_~z$r_buff1_thd4~0_16) (= (+ v_~__unbuffered_cnt~0_17 1) v_~__unbuffered_cnt~0_16) (= 0 |v_P3Thread1of1ForFork3_#res.offset_5|) (= 0 |v_P3Thread1of1ForFork3_#res.base_5|)) InVars {P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_17} OutVars{~z$r_buff1_thd4~0=v_~z$r_buff1_thd4~0_16, P3Thread1of1ForFork3_#t~ite14=|v_P3Thread1of1ForFork3_#t~ite14_7|, P3Thread1of1ForFork3_#res.base=|v_P3Thread1of1ForFork3_#res.base_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_16, P3Thread1of1ForFork3_#res.offset=|v_P3Thread1of1ForFork3_#res.offset_5|} AuxVars[] AssignedVars[~z$r_buff1_thd4~0, P3Thread1of1ForFork3_#t~ite14, P3Thread1of1ForFork3_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-27 21:16:25,674 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L845-->L847-2: Formula: (and (or (= (mod v_~z$r_buff0_thd0~0_47 256) 0) (= (mod v_~z$w_buff0_used~0_70 256) 0)) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_47, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_70, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_47, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_70, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-27 21:16:25,674 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L847-2-->L847-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd0~0_In543080501 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite20_Out543080501| |ULTIMATE.start_main_#t~ite19_Out543080501|)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In543080501 256)))) (or (and (or .cse0 .cse1) (= ~z~0_In543080501 |ULTIMATE.start_main_#t~ite19_Out543080501|) .cse2) (and (not .cse1) (= ~z$w_buff1~0_In543080501 |ULTIMATE.start_main_#t~ite19_Out543080501|) .cse2 (not .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In543080501, ~z$w_buff1_used~0=~z$w_buff1_used~0_In543080501, ~z$w_buff1~0=~z$w_buff1~0_In543080501, ~z~0=~z~0_In543080501} OutVars{ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out543080501|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In543080501, ~z$w_buff1_used~0=~z$w_buff1_used~0_In543080501, ~z$w_buff1~0=~z$w_buff1~0_In543080501, ~z~0=~z~0_In543080501, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out543080501|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-27 21:16:25,675 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [725] [725] L848-->L848-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In237275650 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd0~0_In237275650 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite21_Out237275650|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In237275650 |ULTIMATE.start_main_#t~ite21_Out237275650|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In237275650, ~z$w_buff0_used~0=~z$w_buff0_used~0_In237275650} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In237275650, ~z$w_buff0_used~0=~z$w_buff0_used~0_In237275650, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out237275650|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-27 21:16:25,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L849-->L849-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-100931537 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In-100931537 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-100931537 256) 0)) (.cse3 (= (mod ~z$r_buff1_thd0~0_In-100931537 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-100931537 |ULTIMATE.start_main_#t~ite22_Out-100931537|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out-100931537|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-100931537, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-100931537, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-100931537, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-100931537} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-100931537, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-100931537, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-100931537, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-100931537, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-100931537|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-27 21:16:25,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [732] [732] L850-->L850-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-493675121 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-493675121 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite23_Out-493675121| 0) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In-493675121 |ULTIMATE.start_main_#t~ite23_Out-493675121|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-493675121, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-493675121} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-493675121, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-493675121, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-493675121|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-27 21:16:25,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L851-->L851-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-1109220529 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In-1109220529 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1109220529 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1109220529 256)))) (or (and (= ~z$r_buff1_thd0~0_In-1109220529 |ULTIMATE.start_main_#t~ite24_Out-1109220529|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite24_Out-1109220529|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1109220529, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1109220529, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1109220529, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1109220529} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1109220529, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1109220529, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1109220529, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1109220529|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1109220529} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24] because there is no mapped edge [2019-12-27 21:16:25,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L861-->L861-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1705570808 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite37_Out1705570808| ~z$w_buff0_used~0_In1705570808) (= |ULTIMATE.start_main_#t~ite36_In1705570808| |ULTIMATE.start_main_#t~ite36_Out1705570808|)) (and (= |ULTIMATE.start_main_#t~ite36_Out1705570808| |ULTIMATE.start_main_#t~ite37_Out1705570808|) .cse0 (= |ULTIMATE.start_main_#t~ite36_Out1705570808| ~z$w_buff0_used~0_In1705570808) (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1705570808 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In1705570808 256)) .cse1) (and (= 0 (mod ~z$r_buff1_thd0~0_In1705570808 256)) .cse1) (= (mod ~z$w_buff0_used~0_In1705570808 256) 0)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1705570808, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1705570808, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1705570808, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1705570808, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_In1705570808|, ~weak$$choice2~0=~weak$$choice2~0_In1705570808} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1705570808, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1705570808, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1705570808, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1705570808, ULTIMATE.start_main_#t~ite36=|ULTIMATE.start_main_#t~ite36_Out1705570808|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out1705570808|, ~weak$$choice2~0=~weak$$choice2~0_In1705570808} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-27 21:16:25,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L862-->L862-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In1700789233 256)))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite40_Out1700789233| |ULTIMATE.start_main_#t~ite39_Out1700789233|) (= |ULTIMATE.start_main_#t~ite39_Out1700789233| ~z$w_buff1_used~0_In1700789233) (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1700789233 256)))) (or (and .cse1 (= (mod ~z$r_buff1_thd0~0_In1700789233 256) 0)) (= 0 (mod ~z$w_buff0_used~0_In1700789233 256)) (and .cse1 (= (mod ~z$w_buff1_used~0_In1700789233 256) 0))))) (and (= |ULTIMATE.start_main_#t~ite39_In1700789233| |ULTIMATE.start_main_#t~ite39_Out1700789233|) (= |ULTIMATE.start_main_#t~ite40_Out1700789233| ~z$w_buff1_used~0_In1700789233) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1700789233, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1700789233, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_In1700789233|, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1700789233, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1700789233, ~weak$$choice2~0=~weak$$choice2~0_In1700789233} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1700789233, ULTIMATE.start_main_#t~ite40=|ULTIMATE.start_main_#t~ite40_Out1700789233|, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out1700789233|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1700789233, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1700789233, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1700789233, ~weak$$choice2~0=~weak$$choice2~0_In1700789233} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-27 21:16:25,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L863-->L864: Formula: (and (= v_~z$r_buff0_thd0~0_58 v_~z$r_buff0_thd0~0_57) (not (= 0 (mod v_~weak$$choice2~0_20 256)))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_58, ~weak$$choice2~0=v_~weak$$choice2~0_20} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_57, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_8|, ~weak$$choice2~0=v_~weak$$choice2~0_20, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-27 21:16:25,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L866-->L4: Formula: (and (= (mod v_~main$tmp_guard1~0_7 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_~z~0_21 v_~z$mem_tmp~0_7) (= 0 v_~z$flush_delayed~0_10) (not (= (mod v_~z$flush_delayed~0_11 256) 0))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_7, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_11} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_7, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_9|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_7, ~z$flush_delayed~0=v_~z$flush_delayed~0_10, ~z~0=v_~z~0_21, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite47, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-27 21:16:25,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-27 21:16:25,818 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 27.12 09:16:25 BasicIcfg [2019-12-27 21:16:25,819 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-27 21:16:25,821 INFO L168 Benchmark]: Toolchain (without parser) took 141588.17 ms. Allocated memory was 145.2 MB in the beginning and 3.7 GB in the end (delta: 3.6 GB). Free memory was 100.4 MB in the beginning and 2.3 GB in the end (delta: -2.2 GB). Peak memory consumption was 1.3 GB. Max. memory is 7.1 GB. [2019-12-27 21:16:25,821 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 145.2 MB. Free memory was 120.3 MB in the beginning and 120.1 MB in the end (delta: 209.8 kB). Peak memory consumption was 209.8 kB. Max. memory is 7.1 GB. [2019-12-27 21:16:25,825 INFO L168 Benchmark]: CACSL2BoogieTranslator took 748.32 ms. Allocated memory was 145.2 MB in the beginning and 200.3 MB in the end (delta: 55.1 MB). Free memory was 100.0 MB in the beginning and 153.0 MB in the end (delta: -53.1 MB). Peak memory consumption was 20.6 MB. Max. memory is 7.1 GB. [2019-12-27 21:16:25,825 INFO L168 Benchmark]: Boogie Procedure Inliner took 72.02 ms. Allocated memory is still 200.3 MB. Free memory was 153.0 MB in the beginning and 150.4 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. [2019-12-27 21:16:25,825 INFO L168 Benchmark]: Boogie Preprocessor took 37.23 ms. Allocated memory is still 200.3 MB. Free memory was 150.4 MB in the beginning and 147.7 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. [2019-12-27 21:16:25,826 INFO L168 Benchmark]: RCFGBuilder took 881.96 ms. Allocated memory is still 200.3 MB. Free memory was 147.7 MB in the beginning and 98.0 MB in the end (delta: 49.7 MB). Peak memory consumption was 49.7 MB. Max. memory is 7.1 GB. [2019-12-27 21:16:25,826 INFO L168 Benchmark]: TraceAbstraction took 139843.65 ms. Allocated memory was 200.3 MB in the beginning and 3.7 GB in the end (delta: 3.5 GB). Free memory was 98.0 MB in the beginning and 2.3 GB in the end (delta: -2.2 GB). Peak memory consumption was 1.3 GB. Max. memory is 7.1 GB. [2019-12-27 21:16:25,834 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 145.2 MB. Free memory was 120.3 MB in the beginning and 120.1 MB in the end (delta: 209.8 kB). Peak memory consumption was 209.8 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 748.32 ms. Allocated memory was 145.2 MB in the beginning and 200.3 MB in the end (delta: 55.1 MB). Free memory was 100.0 MB in the beginning and 153.0 MB in the end (delta: -53.1 MB). Peak memory consumption was 20.6 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 72.02 ms. Allocated memory is still 200.3 MB. Free memory was 153.0 MB in the beginning and 150.4 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 37.23 ms. Allocated memory is still 200.3 MB. Free memory was 150.4 MB in the beginning and 147.7 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. * RCFGBuilder took 881.96 ms. Allocated memory is still 200.3 MB. Free memory was 147.7 MB in the beginning and 98.0 MB in the end (delta: 49.7 MB). Peak memory consumption was 49.7 MB. Max. memory is 7.1 GB. * TraceAbstraction took 139843.65 ms. Allocated memory was 200.3 MB in the beginning and 3.7 GB in the end (delta: 3.5 GB). Free memory was 98.0 MB in the beginning and 2.3 GB in the end (delta: -2.2 GB). Peak memory consumption was 1.3 GB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.1s, 182 ProgramPointsBefore, 91 ProgramPointsAfterwards, 210 TransitionsBefore, 98 TransitionsAfterwards, 12668 CoEnabledTransitionPairs, 8 FixpointIterations, 38 TrivialSequentialCompositions, 49 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 26 ChoiceCompositions, 4581 VarBasedMoverChecksPositive, 178 VarBasedMoverChecksNegative, 0 SemBasedMoverChecksPositive, 0 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.0s, 0 MoverChecksTotal, 57720 CheckedPairsTotal, 124 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L835] FCALL, FORK 0 pthread_create(&t1133, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L837] FCALL, FORK 0 pthread_create(&t1134, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L839] FCALL, FORK 0 pthread_create(&t1135, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L841] FCALL, FORK 0 pthread_create(&t1136, ((void *)0), P3, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=0, __unbuffered_p3_EBX=0, a=0, arg={0:0}, arg={0:0}, arg={0:0}, b=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L790] 4 z$w_buff1 = z$w_buff0 [L791] 4 z$w_buff0 = 2 [L792] 4 z$w_buff1_used = z$w_buff0_used [L793] 4 z$w_buff0_used = (_Bool)1 [L812] EXPR 4 z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L770] 3 y = 1 [L773] 3 z = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L812] 4 z = z$w_buff0_used && z$r_buff0_thd4 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd4 ? z$w_buff1 : z) [L776] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L777] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L778] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L779] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L813] 4 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd4 ? (_Bool)0 : z$w_buff0_used [L814] 4 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd4 || z$w_buff1_used && z$r_buff1_thd4 ? (_Bool)0 : z$w_buff1_used [L843] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L847] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L848] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L849] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L850] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L851] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L854] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L855] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L856] 0 z$flush_delayed = weak$$choice2 [L857] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L858] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L859] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L859] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L860] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L860] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L861] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L862] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L864] EXPR 0 weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L864] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L865] 0 main$tmp_guard1 = !(z == 2 && __unbuffered_p0_EAX == 0 && __unbuffered_p1_EAX == 0 && __unbuffered_p3_EAX == 1 && __unbuffered_p3_EBX == 0) VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p3_EAX=1, __unbuffered_p3_EBX=0, a=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, b=1, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=9, weak$$choice2=1, x=1, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff0_thd4=1, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$r_buff1_thd4=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 139.5s, OverallIterations: 29, TraceHistogramMax: 1, AutomataDifference: 41.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4322 SDtfs, 7459 SDslu, 18073 SDs, 0 SdLazy, 12014 SolverSat, 685 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 11.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 534 GetRequests, 74 SyntacticMatches, 36 SemanticMatches, 424 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1938 ImplicationChecksByTransitivity, 10.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=126774occurred in iteration=13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 80.5s AutomataMinimizationTime, 28 MinimizatonAttempts, 518919 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 4.0s InterpolantComputationTime, 1180 NumberOfCodeBlocks, 1180 NumberOfCodeBlocksAsserted, 29 NumberOfCheckSat, 1092 ConstructedInterpolants, 0 QuantifiedInterpolants, 338547 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 28 InterpolantComputations, 28 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...