/usr/bin/java -Xmx8000000000 -Xss4m -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata ./data -tc ../../../trunk/examples/toolchains/AutomizerCInline.xml -s ../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-SemanticLbe-McrStrategy.epf -i ../../../trunk/examples/svcomp/pthread-atomic/qrcu-1.i -------------------------------------------------------------------------------- This is Ultimate 0.1.25-b981219 [2020-04-18 07:36:27,381 INFO L177 SettingsManager]: Resetting all preferences to default values... [2020-04-18 07:36:27,384 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2020-04-18 07:36:27,396 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2020-04-18 07:36:27,397 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2020-04-18 07:36:27,398 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2020-04-18 07:36:27,399 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2020-04-18 07:36:27,401 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2020-04-18 07:36:27,402 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2020-04-18 07:36:27,403 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2020-04-18 07:36:27,404 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2020-04-18 07:36:27,405 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2020-04-18 07:36:27,406 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2020-04-18 07:36:27,407 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2020-04-18 07:36:27,408 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2020-04-18 07:36:27,409 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2020-04-18 07:36:27,410 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2020-04-18 07:36:27,411 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2020-04-18 07:36:27,412 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2020-04-18 07:36:27,414 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2020-04-18 07:36:27,416 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2020-04-18 07:36:27,417 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2020-04-18 07:36:27,418 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2020-04-18 07:36:27,419 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2020-04-18 07:36:27,423 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2020-04-18 07:36:27,423 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2020-04-18 07:36:27,423 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2020-04-18 07:36:27,424 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2020-04-18 07:36:27,425 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2020-04-18 07:36:27,425 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2020-04-18 07:36:27,426 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2020-04-18 07:36:27,426 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2020-04-18 07:36:27,427 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2020-04-18 07:36:27,428 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2020-04-18 07:36:27,431 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2020-04-18 07:36:27,431 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2020-04-18 07:36:27,432 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2020-04-18 07:36:27,432 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2020-04-18 07:36:27,432 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2020-04-18 07:36:27,433 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2020-04-18 07:36:27,434 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2020-04-18 07:36:27,435 INFO L101 SettingsManager]: Beginning loading settings from /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/automizer/concurrent/svcomp-Reach-32bit-Automizer_Default-noMmResRef-FA-SemanticLbe-McrStrategy.epf [2020-04-18 07:36:27,448 INFO L113 SettingsManager]: Loading preferences was successful [2020-04-18 07:36:27,449 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2020-04-18 07:36:27,450 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2020-04-18 07:36:27,450 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2020-04-18 07:36:27,450 INFO L138 SettingsManager]: * Use SBE=true [2020-04-18 07:36:27,451 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2020-04-18 07:36:27,451 INFO L138 SettingsManager]: * sizeof long=4 [2020-04-18 07:36:27,451 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2020-04-18 07:36:27,451 INFO L138 SettingsManager]: * sizeof POINTER=4 [2020-04-18 07:36:27,451 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2020-04-18 07:36:27,452 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2020-04-18 07:36:27,452 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2020-04-18 07:36:27,452 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2020-04-18 07:36:27,452 INFO L138 SettingsManager]: * sizeof long double=12 [2020-04-18 07:36:27,452 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2020-04-18 07:36:27,453 INFO L138 SettingsManager]: * Use constant arrays=true [2020-04-18 07:36:27,453 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2020-04-18 07:36:27,453 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2020-04-18 07:36:27,453 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2020-04-18 07:36:27,453 INFO L138 SettingsManager]: * To the following directory=./dump/ [2020-04-18 07:36:27,454 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2020-04-18 07:36:27,454 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2020-04-18 07:36:27,454 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2020-04-18 07:36:27,454 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2020-04-18 07:36:27,454 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2020-04-18 07:36:27,455 INFO L138 SettingsManager]: * Trace refinement strategy=MCR [2020-04-18 07:36:27,455 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2020-04-18 07:36:27,455 INFO L138 SettingsManager]: * Trace refinement strategy used in MCR=CAMEL [2020-04-18 07:36:27,455 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2020-04-18 07:36:27,455 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2020-04-18 07:36:27,756 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2020-04-18 07:36:27,769 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2020-04-18 07:36:27,773 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2020-04-18 07:36:27,774 INFO L271 PluginConnector]: Initializing CDTParser... [2020-04-18 07:36:27,774 INFO L275 PluginConnector]: CDTParser initialized [2020-04-18 07:36:27,775 INFO L429 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/pthread-atomic/qrcu-1.i [2020-04-18 07:36:27,851 INFO L220 CDTParser]: Created temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6f60e93c5/58b40ab4159a457ca907a8a29cdcd98b/FLAG8cceef81b [2020-04-18 07:36:28,474 INFO L306 CDTParser]: Found 1 translation units. [2020-04-18 07:36:28,477 INFO L160 CDTParser]: Scanning /storage/repos/ultimate/trunk/examples/svcomp/pthread-atomic/qrcu-1.i [2020-04-18 07:36:28,491 INFO L349 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6f60e93c5/58b40ab4159a457ca907a8a29cdcd98b/FLAG8cceef81b [2020-04-18 07:36:28,698 INFO L357 CDTParser]: Successfully deleted /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/data/6f60e93c5/58b40ab4159a457ca907a8a29cdcd98b [2020-04-18 07:36:28,710 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2020-04-18 07:36:28,734 INFO L131 ToolchainWalker]: Walking toolchain with 5 elements. [2020-04-18 07:36:28,735 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2020-04-18 07:36:28,735 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2020-04-18 07:36:28,738 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2020-04-18 07:36:28,739 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.04 07:36:28" (1/1) ... [2020-04-18 07:36:28,742 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3c4c0620 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:28, skipping insertion in model container [2020-04-18 07:36:28,742 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 18.04 07:36:28" (1/1) ... [2020-04-18 07:36:28,749 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2020-04-18 07:36:28,809 INFO L178 MainTranslator]: Built tables and reachable declarations [2020-04-18 07:36:29,323 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-04-18 07:36:29,337 INFO L203 MainTranslator]: Completed pre-run [2020-04-18 07:36:29,387 INFO L206 PostProcessor]: Analyzing one entry point: main [2020-04-18 07:36:29,463 INFO L208 MainTranslator]: Completed translation [2020-04-18 07:36:29,464 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:29 WrapperNode [2020-04-18 07:36:29,464 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2020-04-18 07:36:29,465 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2020-04-18 07:36:29,465 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2020-04-18 07:36:29,465 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2020-04-18 07:36:29,474 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:29" (1/1) ... [2020-04-18 07:36:29,492 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:29" (1/1) ... [2020-04-18 07:36:29,524 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2020-04-18 07:36:29,524 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2020-04-18 07:36:29,524 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2020-04-18 07:36:29,525 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2020-04-18 07:36:29,534 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:29" (1/1) ... [2020-04-18 07:36:29,534 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:29" (1/1) ... [2020-04-18 07:36:29,540 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:29" (1/1) ... [2020-04-18 07:36:29,540 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:29" (1/1) ... [2020-04-18 07:36:29,548 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:29" (1/1) ... [2020-04-18 07:36:29,560 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:29" (1/1) ... [2020-04-18 07:36:29,566 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:29" (1/1) ... [2020-04-18 07:36:29,576 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2020-04-18 07:36:29,576 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2020-04-18 07:36:29,576 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2020-04-18 07:36:29,576 INFO L275 PluginConnector]: RCFGBuilder initialized [2020-04-18 07:36:29,577 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:29" (1/1) ... No working directory specified, using /storage/repos/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2020-04-18 07:36:29,637 INFO L130 BoogieDeclarations]: Found specification of procedure qrcu_reader1 [2020-04-18 07:36:29,637 INFO L138 BoogieDeclarations]: Found implementation of procedure qrcu_reader1 [2020-04-18 07:36:29,637 INFO L130 BoogieDeclarations]: Found specification of procedure qrcu_reader2 [2020-04-18 07:36:29,637 INFO L138 BoogieDeclarations]: Found implementation of procedure qrcu_reader2 [2020-04-18 07:36:29,637 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2020-04-18 07:36:29,637 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2020-04-18 07:36:29,637 INFO L130 BoogieDeclarations]: Found specification of procedure qrcu_updater [2020-04-18 07:36:29,638 INFO L138 BoogieDeclarations]: Found implementation of procedure qrcu_updater [2020-04-18 07:36:29,638 INFO L130 BoogieDeclarations]: Found specification of procedure #PthreadsMutexLock [2020-04-18 07:36:29,638 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2020-04-18 07:36:29,638 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2020-04-18 07:36:29,638 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2020-04-18 07:36:29,639 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2020-04-18 07:36:29,639 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2020-04-18 07:36:29,640 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2020-04-18 07:36:31,028 INFO L290 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2020-04-18 07:36:31,028 INFO L295 CfgBuilder]: Removed 8 assume(true) statements. [2020-04-18 07:36:31,032 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.04 07:36:31 BoogieIcfgContainer [2020-04-18 07:36:31,033 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2020-04-18 07:36:31,034 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2020-04-18 07:36:31,034 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2020-04-18 07:36:31,038 INFO L275 PluginConnector]: TraceAbstraction initialized [2020-04-18 07:36:31,038 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 18.04 07:36:28" (1/3) ... [2020-04-18 07:36:31,039 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b4f8c66 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.04 07:36:31, skipping insertion in model container [2020-04-18 07:36:31,040 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 18.04 07:36:29" (2/3) ... [2020-04-18 07:36:31,040 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b4f8c66 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 18.04 07:36:31, skipping insertion in model container [2020-04-18 07:36:31,040 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 18.04 07:36:31" (3/3) ... [2020-04-18 07:36:31,042 INFO L109 eAbstractionObserver]: Analyzing ICFG qrcu-1.i [2020-04-18 07:36:31,054 WARN L146 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2020-04-18 07:36:31,055 INFO L157 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2020-04-18 07:36:31,062 INFO L169 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2020-04-18 07:36:31,063 INFO L340 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2020-04-18 07:36:31,100 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,100 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,100 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,101 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,101 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_~myidx~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,101 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_~myidx~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,102 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#t~nondet8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,102 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_~myidx~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,102 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use_done_#in~myidx| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,102 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use_done_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,102 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use_done_#t~post5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,103 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use_done_~myidx not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,103 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#t~nondet8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,103 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#t~nondet8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,103 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,104 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,104 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#t~nondet8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,104 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#t~nondet8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,104 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_~myidx~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,104 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use1_~myidx not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,105 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,105 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,105 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,105 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use1_#in~myidx| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,106 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,106 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,106 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,106 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,106 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,107 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_~myidx~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,107 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use2_#in~myidx| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,107 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,107 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use2_~myidx not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,107 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,107 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use2_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,108 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,108 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,108 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,109 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,109 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_~myidx~1 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,109 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_~myidx~1 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,109 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,110 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_~myidx~1 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,110 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use_done_#in~myidx| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,110 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use_done_~myidx not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,110 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use_done_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,110 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use_done_#t~post5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,111 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,111 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,111 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,111 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,111 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,111 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,112 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_~myidx~1 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,112 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,112 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use1_~myidx not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,112 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,112 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use1_#in~myidx| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,112 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,113 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,113 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,113 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,113 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,113 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,114 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_~myidx~1 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,114 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use2_#in~myidx| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,114 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use2_~myidx not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,114 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,114 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,114 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use2_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,116 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,116 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,116 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,116 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,117 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~i~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,117 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart1~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,117 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart1~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,117 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart2~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,118 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart2~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,118 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,118 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart2~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,118 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart2~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,118 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart1~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,119 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart1~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,119 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_~readerstart2.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,119 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_#in~readerstart1.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,119 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_#in~readerstart1.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,119 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_~readerstart1.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,119 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_#in~readerstart2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,120 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_~readerstart2.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,120 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_#in~readerstart2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,120 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_~readerstart1.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,120 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,120 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,121 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,121 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,121 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,121 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,121 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,122 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,122 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,122 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,122 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,122 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,123 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,123 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,123 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,123 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,123 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,124 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,124 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,124 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart1~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,124 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart1~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,124 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,125 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,125 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,125 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,125 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,125 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,125 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,126 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress1_#t~nondet6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,126 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress1_~readerstart1 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,126 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress1_#in~readerstart1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,126 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,127 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress1_~readerstart1 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,127 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,127 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress1_#in~readerstart1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,127 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress1_#t~nondet6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,127 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,127 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,128 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,128 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,128 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,128 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress1_#t~nondet6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,128 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress1_~readerstart1 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,128 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress1_#in~readerstart1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,129 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,129 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,129 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,129 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,129 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,130 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,130 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,130 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,130 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,130 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart2~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,131 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart2~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,131 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~mem20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,131 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,131 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,131 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~mem20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,131 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,132 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress2_~readerstart2 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,132 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,132 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress2_#in~readerstart2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,132 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress2_#t~nondet7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,132 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,133 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress2_~readerstart2 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,133 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,133 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress2_#in~readerstart2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,133 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress2_#t~nondet7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,133 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,133 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~mem20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,134 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,134 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress2_~readerstart2 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,134 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,134 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,134 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress2_#in~readerstart2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,134 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress2_#t~nondet7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,135 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,135 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,135 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~mem20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,135 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,135 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,136 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,136 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,136 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart1~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,136 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,136 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,137 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart1~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,137 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart1~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,137 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,137 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,137 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart2~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,138 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart2~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,138 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart2~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,141 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~mem20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,141 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_#in~readerstart2.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,142 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,142 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,142 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,142 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~post18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,142 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress1_#in~readerstart1| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,142 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress2_#in~readerstart2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,143 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,143 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart1~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,143 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_#in~readerstart1.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,143 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,143 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,144 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart2~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,144 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress1_~readerstart1 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,144 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_~readerstart1.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,144 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_~readerstart2.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,144 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,144 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress2_~readerstart2 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,145 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart2~0.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,145 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_~readerstart1.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,145 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress1_#t~nondet6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,145 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_check_progress2_#t~nondet7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,145 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_~#readerstart1~0.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,146 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,146 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,146 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~i~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,146 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,146 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,147 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_~readerstart2.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,147 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,147 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,147 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_#in~readerstart1.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,147 WARN L315 ript$VariableManager]: TermVariabe qrcu_updaterThread1of1ForFork0_~sum~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,148 WARN L315 ript$VariableManager]: TermVariabe |qrcu_updaterThread1of1ForFork0___VERIFIER_atomic_take_snapshot_#in~readerstart2.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,150 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use_done_#t~post5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,150 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use2_~myidx not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,150 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use1_#in~myidx| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,150 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,151 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use_done_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,151 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,151 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,151 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,151 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use_done_#in~myidx| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,151 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,152 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use2_#in~myidx| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,152 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_~myidx~0 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,152 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use_done_~myidx not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,152 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,153 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use1_~myidx not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,153 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1___VERIFIER_atomic_use2_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,153 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#t~nondet8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,153 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,153 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader1Thread1of1ForFork1_#t~nondet9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,155 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,156 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,156 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_~myidx~1 not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,156 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use1_~myidx not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,156 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use2_~myidx not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,156 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,157 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use2_#t~post3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,157 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use1_#in~myidx| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,157 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2_assume_abort_if_not_~cond not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,157 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use_done_#t~post4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,157 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use_done_#t~post5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,157 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,158 WARN L315 ript$VariableManager]: TermVariabe qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use_done_~myidx not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,158 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,158 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use2_#in~myidx| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,158 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use1_#t~post2| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,158 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2___VERIFIER_atomic_use_done_#in~myidx| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,159 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,159 WARN L315 ript$VariableManager]: TermVariabe |qrcu_reader2Thread1of1ForFork2_assume_abort_if_not_#in~cond| not constructed by VariableManager. Cannot ensure absence of name clashes. [2020-04-18 07:36:31,185 INFO L251 AbstractCegarLoop]: Starting to check reachability of 7 error locations. [2020-04-18 07:36:31,206 INFO L375 AbstractCegarLoop]: Interprodecural is true [2020-04-18 07:36:31,206 INFO L376 AbstractCegarLoop]: Hoare is true [2020-04-18 07:36:31,206 INFO L377 AbstractCegarLoop]: Compute interpolants for FPandBP [2020-04-18 07:36:31,206 INFO L378 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2020-04-18 07:36:31,206 INFO L379 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2020-04-18 07:36:31,206 INFO L380 AbstractCegarLoop]: Difference is false [2020-04-18 07:36:31,207 INFO L381 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2020-04-18 07:36:31,207 INFO L385 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2020-04-18 07:36:31,226 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 157 places, 173 transitions, 388 flow [2020-04-18 07:36:31,228 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 157 places, 173 transitions, 388 flow [2020-04-18 07:36:31,328 INFO L129 PetriNetUnfolder]: 25/181 cut-off events. [2020-04-18 07:36:31,329 INFO L130 PetriNetUnfolder]: For 12/12 co-relation queries the response was YES. [2020-04-18 07:36:31,339 INFO L80 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 181 events. 25/181 cut-off events. For 12/12 co-relation queries the response was YES. Maximal size of possible extension queue 7. Compared 447 event pairs, 0 based on Foata normal form. 0/158 useless extension candidates. Maximal degree in co-relation 143. Up to 6 conditions per place. [2020-04-18 07:36:31,351 INFO L71 FinitePrefix]: Start finitePrefix. Operand has 157 places, 173 transitions, 388 flow [2020-04-18 07:36:31,432 INFO L129 PetriNetUnfolder]: 25/181 cut-off events. [2020-04-18 07:36:31,432 INFO L130 PetriNetUnfolder]: For 12/12 co-relation queries the response was YES. [2020-04-18 07:36:31,438 INFO L80 FinitePrefix]: Finished finitePrefix Result has 203 conditions, 181 events. 25/181 cut-off events. For 12/12 co-relation queries the response was YES. Maximal size of possible extension queue 7. Compared 447 event pairs, 0 based on Foata normal form. 0/158 useless extension candidates. Maximal degree in co-relation 143. Up to 6 conditions per place. [2020-04-18 07:36:31,452 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10344 [2020-04-18 07:36:31,453 INFO L170 etLargeBlockEncoding]: Semantic Check. [2020-04-18 07:36:32,139 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2020-04-18 07:36:32,150 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2020-04-18 07:36:32,449 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2020-04-18 07:36:32,454 INFO L319 QuantifierPusher]: Applying distributivity, recursing on 2 terms [2020-04-18 07:36:34,778 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 49 [2020-04-18 07:36:35,476 WARN L192 SmtUtils]: Spent 326.00 ms on a formula simplification. DAG size of input: 100 DAG size of output: 94 [2020-04-18 07:36:35,625 WARN L192 SmtUtils]: Spent 144.00 ms on a formula simplification that was a NOOP. DAG size: 90 [2020-04-18 07:36:35,659 INFO L206 etLargeBlockEncoding]: Checked pairs total: 17077 [2020-04-18 07:36:35,660 INFO L214 etLargeBlockEncoding]: Total number of compositions: 117 [2020-04-18 07:36:35,663 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 66 places, 76 transitions, 194 flow [2020-04-18 07:36:35,959 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 4685 states. [2020-04-18 07:36:35,961 INFO L276 IsEmpty]: Start isEmpty. Operand 4685 states. [2020-04-18 07:36:35,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2020-04-18 07:36:35,999 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:36,000 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:36,001 INFO L427 AbstractCegarLoop]: === Iteration 1 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:36,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:36,011 INFO L82 PathProgramCache]: Analyzing trace with hash -1695589928, now seen corresponding path program 1 times [2020-04-18 07:36:36,022 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:36,023 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1276941452] [2020-04-18 07:36:36,045 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:36,081 INFO L259 McrAutomatonBuilder]: Finished intersection with 13 states and 12 transitions. [2020-04-18 07:36:36,083 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states. [2020-04-18 07:36:36,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2020-04-18 07:36:36,087 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:36,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:36,088 INFO L82 PathProgramCache]: Analyzing trace with hash -1695589928, now seen corresponding path program 2 times [2020-04-18 07:36:36,097 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:36,098 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1983760418] [2020-04-18 07:36:36,099 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:36,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:36,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:36,475 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1983760418] [2020-04-18 07:36:36,476 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:36,477 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:36:36,479 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:36,480 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:36,490 INFO L259 McrAutomatonBuilder]: Finished intersection with 13 states and 12 transitions. [2020-04-18 07:36:36,490 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:36,511 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:36,515 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:36:36,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 07:36:36,517 INFO L87 Difference]: Start difference. First operand 13 states. Second operand 5 states. [2020-04-18 07:36:36,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:36,545 INFO L93 Difference]: Finished difference Result 13 states and 12 transitions. [2020-04-18 07:36:36,545 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 12 transitions. [2020-04-18 07:36:36,546 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:36,546 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1276941452] [2020-04-18 07:36:36,547 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:36,547 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4] total 4 [2020-04-18 07:36:36,547 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1276941452] [2020-04-18 07:36:36,549 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 07:36:36,549 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:36,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:36:36,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2020-04-18 07:36:36,554 INFO L87 Difference]: Start difference. First operand 4685 states. Second operand 5 states. [2020-04-18 07:36:36,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:36,952 INFO L93 Difference]: Finished difference Result 7129 states and 25788 transitions. [2020-04-18 07:36:36,953 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2020-04-18 07:36:36,954 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 12 [2020-04-18 07:36:36,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:37,022 INFO L225 Difference]: With dead ends: 7129 [2020-04-18 07:36:37,022 INFO L226 Difference]: Without dead ends: 6040 [2020-04-18 07:36:37,024 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 07:36:37,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6040 states. [2020-04-18 07:36:37,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6040 to 5035. [2020-04-18 07:36:37,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5035 states. [2020-04-18 07:36:37,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5035 states to 5035 states and 19082 transitions. [2020-04-18 07:36:37,352 INFO L78 Accepts]: Start accepts. Automaton has 5035 states and 19082 transitions. Word has length 12 [2020-04-18 07:36:37,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:37,353 INFO L479 AbstractCegarLoop]: Abstraction has 5035 states and 19082 transitions. [2020-04-18 07:36:37,353 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 07:36:37,353 INFO L276 IsEmpty]: Start isEmpty. Operand 5035 states and 19082 transitions. [2020-04-18 07:36:37,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2020-04-18 07:36:37,356 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:37,356 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:37,356 INFO L427 AbstractCegarLoop]: === Iteration 2 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:37,357 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:37,357 INFO L82 PathProgramCache]: Analyzing trace with hash -1706642389, now seen corresponding path program 1 times [2020-04-18 07:36:37,359 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:37,359 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [122593337] [2020-04-18 07:36:37,360 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:37,369 INFO L259 McrAutomatonBuilder]: Finished intersection with 13 states and 12 transitions. [2020-04-18 07:36:37,370 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states. [2020-04-18 07:36:37,370 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2020-04-18 07:36:37,370 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:37,370 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:37,371 INFO L82 PathProgramCache]: Analyzing trace with hash -1706642389, now seen corresponding path program 2 times [2020-04-18 07:36:37,371 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:37,371 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920301188] [2020-04-18 07:36:37,371 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:37,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:37,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:37,463 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920301188] [2020-04-18 07:36:37,463 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:37,463 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:36:37,464 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:37,465 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:37,466 INFO L259 McrAutomatonBuilder]: Finished intersection with 13 states and 12 transitions. [2020-04-18 07:36:37,467 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:37,492 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:37,492 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:36:37,492 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2020-04-18 07:36:37,492 INFO L87 Difference]: Start difference. First operand 13 states. Second operand 5 states. [2020-04-18 07:36:37,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:37,531 INFO L93 Difference]: Finished difference Result 13 states and 12 transitions. [2020-04-18 07:36:37,531 INFO L276 IsEmpty]: Start isEmpty. Operand 13 states and 12 transitions. [2020-04-18 07:36:37,531 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:37,531 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [122593337] [2020-04-18 07:36:37,532 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:37,532 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4] total 4 [2020-04-18 07:36:37,532 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [122593337] [2020-04-18 07:36:37,533 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 07:36:37,533 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:37,533 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:36:37,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 07:36:37,534 INFO L87 Difference]: Start difference. First operand 5035 states and 19082 transitions. Second operand 5 states. [2020-04-18 07:36:37,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:37,743 INFO L93 Difference]: Finished difference Result 6078 states and 21993 transitions. [2020-04-18 07:36:37,744 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2020-04-18 07:36:37,744 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 12 [2020-04-18 07:36:37,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:37,794 INFO L225 Difference]: With dead ends: 6078 [2020-04-18 07:36:37,794 INFO L226 Difference]: Without dead ends: 6078 [2020-04-18 07:36:37,799 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2020-04-18 07:36:37,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6078 states. [2020-04-18 07:36:38,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6078 to 4657. [2020-04-18 07:36:38,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4657 states. [2020-04-18 07:36:38,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4657 states to 4657 states and 17269 transitions. [2020-04-18 07:36:38,089 INFO L78 Accepts]: Start accepts. Automaton has 4657 states and 17269 transitions. Word has length 12 [2020-04-18 07:36:38,089 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:38,089 INFO L479 AbstractCegarLoop]: Abstraction has 4657 states and 17269 transitions. [2020-04-18 07:36:38,089 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 07:36:38,089 INFO L276 IsEmpty]: Start isEmpty. Operand 4657 states and 17269 transitions. [2020-04-18 07:36:38,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 07:36:38,092 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:38,092 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:38,092 INFO L427 AbstractCegarLoop]: === Iteration 3 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:38,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:38,093 INFO L82 PathProgramCache]: Analyzing trace with hash -1018352926, now seen corresponding path program 1 times [2020-04-18 07:36:38,093 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:38,095 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [265477297] [2020-04-18 07:36:38,096 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:38,096 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 07:36:38,097 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states. [2020-04-18 07:36:38,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 07:36:38,097 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:38,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:38,098 INFO L82 PathProgramCache]: Analyzing trace with hash -1018352926, now seen corresponding path program 2 times [2020-04-18 07:36:38,098 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:38,098 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319816182] [2020-04-18 07:36:38,098 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:38,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:38,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:38,202 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [319816182] [2020-04-18 07:36:38,203 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:38,203 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 07:36:38,203 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:38,207 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:38,209 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 07:36:38,209 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:38,213 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:38,213 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:38,213 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:38,214 INFO L87 Difference]: Start difference. First operand 14 states. Second operand 3 states. [2020-04-18 07:36:38,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:38,217 INFO L93 Difference]: Finished difference Result 14 states and 13 transitions. [2020-04-18 07:36:38,218 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 13 transitions. [2020-04-18 07:36:38,218 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:38,218 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [265477297] [2020-04-18 07:36:38,219 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:38,219 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 07:36:38,219 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [265477297] [2020-04-18 07:36:38,219 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 07:36:38,219 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:38,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:38,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:38,220 INFO L87 Difference]: Start difference. First operand 4657 states and 17269 transitions. Second operand 3 states. [2020-04-18 07:36:38,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:38,297 INFO L93 Difference]: Finished difference Result 4510 states and 16702 transitions. [2020-04-18 07:36:38,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 07:36:38,297 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2020-04-18 07:36:38,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:38,344 INFO L225 Difference]: With dead ends: 4510 [2020-04-18 07:36:38,344 INFO L226 Difference]: Without dead ends: 4510 [2020-04-18 07:36:38,345 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:38,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4510 states. [2020-04-18 07:36:38,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4510 to 4510. [2020-04-18 07:36:38,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4510 states. [2020-04-18 07:36:38,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4510 states to 4510 states and 16702 transitions. [2020-04-18 07:36:38,523 INFO L78 Accepts]: Start accepts. Automaton has 4510 states and 16702 transitions. Word has length 13 [2020-04-18 07:36:38,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:38,524 INFO L479 AbstractCegarLoop]: Abstraction has 4510 states and 16702 transitions. [2020-04-18 07:36:38,524 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 07:36:38,524 INFO L276 IsEmpty]: Start isEmpty. Operand 4510 states and 16702 transitions. [2020-04-18 07:36:38,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 07:36:38,527 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:38,527 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:38,527 INFO L427 AbstractCegarLoop]: === Iteration 4 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:38,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:38,528 INFO L82 PathProgramCache]: Analyzing trace with hash -1018352917, now seen corresponding path program 1 times [2020-04-18 07:36:38,528 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:38,528 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1628017457] [2020-04-18 07:36:38,529 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:38,529 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 07:36:38,530 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states. [2020-04-18 07:36:38,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2020-04-18 07:36:38,530 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:38,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:38,531 INFO L82 PathProgramCache]: Analyzing trace with hash -1018352917, now seen corresponding path program 2 times [2020-04-18 07:36:38,532 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:38,532 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1875775048] [2020-04-18 07:36:38,532 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:38,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:38,585 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:38,586 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1875775048] [2020-04-18 07:36:38,586 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:38,586 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2020-04-18 07:36:38,586 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:38,588 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:38,589 INFO L259 McrAutomatonBuilder]: Finished intersection with 14 states and 13 transitions. [2020-04-18 07:36:38,590 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:38,594 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:38,594 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:38,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:38,595 INFO L87 Difference]: Start difference. First operand 14 states. Second operand 3 states. [2020-04-18 07:36:38,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:38,598 INFO L93 Difference]: Finished difference Result 14 states and 13 transitions. [2020-04-18 07:36:38,598 INFO L276 IsEmpty]: Start isEmpty. Operand 14 states and 13 transitions. [2020-04-18 07:36:38,598 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:38,599 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1628017457] [2020-04-18 07:36:38,599 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:38,599 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [1] total 1 [2020-04-18 07:36:38,599 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1628017457] [2020-04-18 07:36:38,600 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 07:36:38,600 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:38,600 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:38,600 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:38,600 INFO L87 Difference]: Start difference. First operand 4510 states and 16702 transitions. Second operand 3 states. [2020-04-18 07:36:38,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:38,645 INFO L93 Difference]: Finished difference Result 4363 states and 16135 transitions. [2020-04-18 07:36:38,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 07:36:38,645 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2020-04-18 07:36:38,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:38,663 INFO L225 Difference]: With dead ends: 4363 [2020-04-18 07:36:38,663 INFO L226 Difference]: Without dead ends: 4341 [2020-04-18 07:36:38,664 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:38,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4341 states. [2020-04-18 07:36:38,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4341 to 4341. [2020-04-18 07:36:38,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4341 states. [2020-04-18 07:36:38,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4341 states to 4341 states and 16045 transitions. [2020-04-18 07:36:38,801 INFO L78 Accepts]: Start accepts. Automaton has 4341 states and 16045 transitions. Word has length 13 [2020-04-18 07:36:38,801 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:38,801 INFO L479 AbstractCegarLoop]: Abstraction has 4341 states and 16045 transitions. [2020-04-18 07:36:38,801 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 07:36:38,801 INFO L276 IsEmpty]: Start isEmpty. Operand 4341 states and 16045 transitions. [2020-04-18 07:36:38,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2020-04-18 07:36:38,805 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:38,806 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:38,806 INFO L427 AbstractCegarLoop]: === Iteration 5 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:38,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:38,806 INFO L82 PathProgramCache]: Analyzing trace with hash 1052240727, now seen corresponding path program 1 times [2020-04-18 07:36:38,807 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:38,807 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [886256410] [2020-04-18 07:36:38,807 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:38,809 INFO L259 McrAutomatonBuilder]: Finished intersection with 57 states and 96 transitions. [2020-04-18 07:36:38,809 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states. [2020-04-18 07:36:38,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2020-04-18 07:36:38,810 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:38,810 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:38,810 INFO L82 PathProgramCache]: Analyzing trace with hash 1052240727, now seen corresponding path program 2 times [2020-04-18 07:36:38,811 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:38,811 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [391691730] [2020-04-18 07:36:38,811 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:38,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:38,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:38,836 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [391691730] [2020-04-18 07:36:38,836 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:38,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 07:36:38,837 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:38,838 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:38,842 INFO L259 McrAutomatonBuilder]: Finished intersection with 33 states and 48 transitions. [2020-04-18 07:36:38,842 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:38,852 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:38,853 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:38,853 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:38,853 INFO L87 Difference]: Start difference. First operand 57 states. Second operand 3 states. [2020-04-18 07:36:38,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:38,859 INFO L93 Difference]: Finished difference Result 57 states and 96 transitions. [2020-04-18 07:36:38,859 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 96 transitions. [2020-04-18 07:36:38,859 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:38,860 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [886256410] [2020-04-18 07:36:38,860 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:38,860 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 07:36:38,860 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [886256410] [2020-04-18 07:36:38,860 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 07:36:38,860 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:38,861 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:38,861 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:38,861 INFO L87 Difference]: Start difference. First operand 4341 states and 16045 transitions. Second operand 3 states. [2020-04-18 07:36:39,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:39,299 INFO L93 Difference]: Finished difference Result 4803 states and 17559 transitions. [2020-04-18 07:36:39,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 07:36:39,300 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2020-04-18 07:36:39,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:39,319 INFO L225 Difference]: With dead ends: 4803 [2020-04-18 07:36:39,319 INFO L226 Difference]: Without dead ends: 4803 [2020-04-18 07:36:39,319 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 14 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:39,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4803 states. [2020-04-18 07:36:39,437 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4803 to 4488. [2020-04-18 07:36:39,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4488 states. [2020-04-18 07:36:39,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4488 states to 4488 states and 16685 transitions. [2020-04-18 07:36:39,455 INFO L78 Accepts]: Start accepts. Automaton has 4488 states and 16685 transitions. Word has length 16 [2020-04-18 07:36:39,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:39,455 INFO L479 AbstractCegarLoop]: Abstraction has 4488 states and 16685 transitions. [2020-04-18 07:36:39,455 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 07:36:39,455 INFO L276 IsEmpty]: Start isEmpty. Operand 4488 states and 16685 transitions. [2020-04-18 07:36:39,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:39,461 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:39,461 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:39,462 INFO L427 AbstractCegarLoop]: === Iteration 6 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:39,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:39,462 INFO L82 PathProgramCache]: Analyzing trace with hash -1734948541, now seen corresponding path program 1 times [2020-04-18 07:36:39,462 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:39,463 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [493532945] [2020-04-18 07:36:39,463 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:39,464 INFO L259 McrAutomatonBuilder]: Finished intersection with 62 states and 105 transitions. [2020-04-18 07:36:39,465 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states. [2020-04-18 07:36:39,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:39,466 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:39,466 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:39,466 INFO L82 PathProgramCache]: Analyzing trace with hash -1734948541, now seen corresponding path program 2 times [2020-04-18 07:36:39,466 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:39,467 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [312920269] [2020-04-18 07:36:39,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:39,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:39,540 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:39,541 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [312920269] [2020-04-18 07:36:39,541 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:39,541 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:36:39,541 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:39,543 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:39,547 INFO L259 McrAutomatonBuilder]: Finished intersection with 34 states and 49 transitions. [2020-04-18 07:36:39,547 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:39,566 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:39,566 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:36:39,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2020-04-18 07:36:39,567 INFO L87 Difference]: Start difference. First operand 62 states. Second operand 5 states. [2020-04-18 07:36:39,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:39,611 INFO L93 Difference]: Finished difference Result 78 states and 127 transitions. [2020-04-18 07:36:39,611 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 127 transitions. [2020-04-18 07:36:39,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:39,612 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:36:39,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:39,612 INFO L82 PathProgramCache]: Analyzing trace with hash 580220331, now seen corresponding path program 3 times [2020-04-18 07:36:39,612 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:39,613 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2090915837] [2020-04-18 07:36:39,613 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:39,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:39,680 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:39,680 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2090915837] [2020-04-18 07:36:39,681 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:39,681 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:36:39,681 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:39,683 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:39,688 INFO L259 McrAutomatonBuilder]: Finished intersection with 43 states and 67 transitions. [2020-04-18 07:36:39,688 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:39,735 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 07:36:39,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:36:39,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2020-04-18 07:36:39,736 INFO L87 Difference]: Start difference. First operand 78 states and 127 transitions. Second operand 5 states. [2020-04-18 07:36:39,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:39,765 INFO L93 Difference]: Finished difference Result 80 states and 127 transitions. [2020-04-18 07:36:39,766 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 127 transitions. [2020-04-18 07:36:39,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:39,766 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:36:39,766 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:39,767 INFO L82 PathProgramCache]: Analyzing trace with hash 580214631, now seen corresponding path program 4 times [2020-04-18 07:36:39,767 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:39,767 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1095328245] [2020-04-18 07:36:39,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:39,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:39,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:39,857 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1095328245] [2020-04-18 07:36:39,857 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:39,857 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 07:36:39,858 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:39,859 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:39,866 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 65 transitions. [2020-04-18 07:36:39,867 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:39,965 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 07:36:39,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-04-18 07:36:39,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2020-04-18 07:36:39,966 INFO L87 Difference]: Start difference. First operand 80 states and 127 transitions. Second operand 8 states. [2020-04-18 07:36:40,079 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:40,079 INFO L93 Difference]: Finished difference Result 87 states and 133 transitions. [2020-04-18 07:36:40,079 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 133 transitions. [2020-04-18 07:36:40,080 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:40,080 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [493532945] [2020-04-18 07:36:40,080 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:40,081 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 07:36:40,081 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [493532945] [2020-04-18 07:36:40,081 INFO L459 AbstractCegarLoop]: Interpolant automaton has 13 states [2020-04-18 07:36:40,081 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:40,082 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2020-04-18 07:36:40,082 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=218, Unknown=0, NotChecked=0, Total=272 [2020-04-18 07:36:40,082 INFO L87 Difference]: Start difference. First operand 4488 states and 16685 transitions. Second operand 13 states. [2020-04-18 07:36:42,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:42,672 INFO L93 Difference]: Finished difference Result 9648 states and 32631 transitions. [2020-04-18 07:36:42,673 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2020-04-18 07:36:42,673 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 17 [2020-04-18 07:36:42,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:42,711 INFO L225 Difference]: With dead ends: 9648 [2020-04-18 07:36:42,711 INFO L226 Difference]: Without dead ends: 9648 [2020-04-18 07:36:42,713 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 99 GetRequests, 49 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 681 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=478, Invalid=2174, Unknown=0, NotChecked=0, Total=2652 [2020-04-18 07:36:42,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9648 states. [2020-04-18 07:36:42,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9648 to 6505. [2020-04-18 07:36:42,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6505 states. [2020-04-18 07:36:43,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6505 states to 6505 states and 23454 transitions. [2020-04-18 07:36:43,005 INFO L78 Accepts]: Start accepts. Automaton has 6505 states and 23454 transitions. Word has length 17 [2020-04-18 07:36:43,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:43,005 INFO L479 AbstractCegarLoop]: Abstraction has 6505 states and 23454 transitions. [2020-04-18 07:36:43,005 INFO L480 AbstractCegarLoop]: Interpolant automaton has 13 states. [2020-04-18 07:36:43,005 INFO L276 IsEmpty]: Start isEmpty. Operand 6505 states and 23454 transitions. [2020-04-18 07:36:43,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:43,012 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:43,012 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:43,012 INFO L427 AbstractCegarLoop]: === Iteration 7 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:43,012 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:43,013 INFO L82 PathProgramCache]: Analyzing trace with hash -2077782408, now seen corresponding path program 1 times [2020-04-18 07:36:43,013 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:43,013 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1180157631] [2020-04-18 07:36:43,014 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:43,015 INFO L259 McrAutomatonBuilder]: Finished intersection with 62 states and 105 transitions. [2020-04-18 07:36:43,015 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states. [2020-04-18 07:36:43,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:43,016 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:43,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:43,016 INFO L82 PathProgramCache]: Analyzing trace with hash -2077782408, now seen corresponding path program 2 times [2020-04-18 07:36:43,016 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:43,017 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954656747] [2020-04-18 07:36:43,017 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:43,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:43,074 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:43,074 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1954656747] [2020-04-18 07:36:43,074 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:43,074 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 07:36:43,075 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:43,076 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:43,080 INFO L259 McrAutomatonBuilder]: Finished intersection with 34 states and 49 transitions. [2020-04-18 07:36:43,080 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:43,105 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:43,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2020-04-18 07:36:43,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2020-04-18 07:36:43,105 INFO L87 Difference]: Start difference. First operand 62 states. Second operand 6 states. [2020-04-18 07:36:43,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:43,172 INFO L93 Difference]: Finished difference Result 78 states and 127 transitions. [2020-04-18 07:36:43,172 INFO L276 IsEmpty]: Start isEmpty. Operand 78 states and 127 transitions. [2020-04-18 07:36:43,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:43,172 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:36:43,173 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:43,173 INFO L82 PathProgramCache]: Analyzing trace with hash 1929453696, now seen corresponding path program 3 times [2020-04-18 07:36:43,173 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:43,173 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [29579555] [2020-04-18 07:36:43,173 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:43,183 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:43,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:43,234 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [29579555] [2020-04-18 07:36:43,234 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:43,234 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 07:36:43,235 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:43,236 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:43,241 INFO L259 McrAutomatonBuilder]: Finished intersection with 35 states and 51 transitions. [2020-04-18 07:36:43,241 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:43,287 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 07:36:43,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-04-18 07:36:43,290 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=82, Unknown=0, NotChecked=0, Total=110 [2020-04-18 07:36:43,290 INFO L87 Difference]: Start difference. First operand 78 states and 127 transitions. Second operand 8 states. [2020-04-18 07:36:43,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:43,484 INFO L93 Difference]: Finished difference Result 98 states and 153 transitions. [2020-04-18 07:36:43,484 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 153 transitions. [2020-04-18 07:36:43,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:43,485 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:36:43,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:43,486 INFO L82 PathProgramCache]: Analyzing trace with hash 1829355936, now seen corresponding path program 4 times [2020-04-18 07:36:43,486 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:43,486 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553643541] [2020-04-18 07:36:43,487 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:43,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:43,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:43,533 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1553643541] [2020-04-18 07:36:43,533 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:43,533 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:36:43,533 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:43,535 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:43,540 INFO L259 McrAutomatonBuilder]: Finished intersection with 42 states and 65 transitions. [2020-04-18 07:36:43,540 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:43,609 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 07:36:43,609 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:36:43,609 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=196, Unknown=0, NotChecked=0, Total=240 [2020-04-18 07:36:43,609 INFO L87 Difference]: Start difference. First operand 98 states and 153 transitions. Second operand 5 states. [2020-04-18 07:36:43,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:43,638 INFO L93 Difference]: Finished difference Result 102 states and 153 transitions. [2020-04-18 07:36:43,638 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 153 transitions. [2020-04-18 07:36:43,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:43,639 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 07:36:43,639 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:43,640 INFO L82 PathProgramCache]: Analyzing trace with hash 1829350236, now seen corresponding path program 5 times [2020-04-18 07:36:43,642 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:43,642 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1745048387] [2020-04-18 07:36:43,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:43,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:43,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:43,717 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1745048387] [2020-04-18 07:36:43,717 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:43,717 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 07:36:43,717 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:43,718 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:43,723 INFO L259 McrAutomatonBuilder]: Finished intersection with 40 states and 61 transitions. [2020-04-18 07:36:43,723 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:43,838 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 07:36:43,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-04-18 07:36:43,839 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=361, Unknown=0, NotChecked=0, Total=420 [2020-04-18 07:36:43,839 INFO L87 Difference]: Start difference. First operand 102 states and 153 transitions. Second operand 8 states. [2020-04-18 07:36:43,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:43,963 INFO L93 Difference]: Finished difference Result 109 states and 159 transitions. [2020-04-18 07:36:43,963 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 159 transitions. [2020-04-18 07:36:43,964 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:43,965 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1180157631] [2020-04-18 07:36:43,965 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:43,965 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 07:36:43,965 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1180157631] [2020-04-18 07:36:43,965 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2020-04-18 07:36:43,965 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:43,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-04-18 07:36:43,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=471, Unknown=0, NotChecked=0, Total=552 [2020-04-18 07:36:43,966 INFO L87 Difference]: Start difference. First operand 6505 states and 23454 transitions. Second operand 17 states. [2020-04-18 07:36:47,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:47,232 INFO L93 Difference]: Finished difference Result 9859 states and 32480 transitions. [2020-04-18 07:36:47,233 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2020-04-18 07:36:47,233 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 17 [2020-04-18 07:36:47,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:47,267 INFO L225 Difference]: With dead ends: 9859 [2020-04-18 07:36:47,267 INFO L226 Difference]: Without dead ends: 9859 [2020-04-18 07:36:47,269 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1076 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=652, Invalid=3508, Unknown=0, NotChecked=0, Total=4160 [2020-04-18 07:36:47,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9859 states. [2020-04-18 07:36:47,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9859 to 6280. [2020-04-18 07:36:47,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6280 states. [2020-04-18 07:36:47,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6280 states to 6280 states and 22061 transitions. [2020-04-18 07:36:47,465 INFO L78 Accepts]: Start accepts. Automaton has 6280 states and 22061 transitions. Word has length 17 [2020-04-18 07:36:47,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:47,466 INFO L479 AbstractCegarLoop]: Abstraction has 6280 states and 22061 transitions. [2020-04-18 07:36:47,466 INFO L480 AbstractCegarLoop]: Interpolant automaton has 17 states. [2020-04-18 07:36:47,466 INFO L276 IsEmpty]: Start isEmpty. Operand 6280 states and 22061 transitions. [2020-04-18 07:36:47,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:47,475 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:47,475 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:47,475 INFO L427 AbstractCegarLoop]: === Iteration 8 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:47,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:47,476 INFO L82 PathProgramCache]: Analyzing trace with hash -1298404913, now seen corresponding path program 1 times [2020-04-18 07:36:47,476 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:47,477 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1116942263] [2020-04-18 07:36:47,478 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:47,479 INFO L259 McrAutomatonBuilder]: Finished intersection with 54 states and 89 transitions. [2020-04-18 07:36:47,480 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states. [2020-04-18 07:36:47,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:47,480 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:47,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:47,481 INFO L82 PathProgramCache]: Analyzing trace with hash -1285948793, now seen corresponding path program 2 times [2020-04-18 07:36:47,481 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:47,481 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876420777] [2020-04-18 07:36:47,482 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:47,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:47,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:47,526 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1876420777] [2020-04-18 07:36:47,527 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:47,527 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:36:47,527 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:47,529 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:47,534 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 59 transitions. [2020-04-18 07:36:47,535 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:47,544 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:47,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:47,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:47,544 INFO L87 Difference]: Start difference. First operand 54 states. Second operand 3 states. [2020-04-18 07:36:47,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:47,556 INFO L93 Difference]: Finished difference Result 55 states and 89 transitions. [2020-04-18 07:36:47,556 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 89 transitions. [2020-04-18 07:36:47,556 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:47,556 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:36:47,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:47,557 INFO L82 PathProgramCache]: Analyzing trace with hash -1298404913, now seen corresponding path program 3 times [2020-04-18 07:36:47,557 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:47,558 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [652729019] [2020-04-18 07:36:47,558 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:47,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:47,624 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:47,625 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [652729019] [2020-04-18 07:36:47,625 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:47,625 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:36:47,625 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:47,627 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:47,631 INFO L259 McrAutomatonBuilder]: Finished intersection with 38 states and 57 transitions. [2020-04-18 07:36:47,632 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:47,637 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:47,638 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-04-18 07:36:47,638 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2020-04-18 07:36:47,638 INFO L87 Difference]: Start difference. First operand 55 states and 89 transitions. Second operand 4 states. [2020-04-18 07:36:47,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:47,735 INFO L93 Difference]: Finished difference Result 62 states and 95 transitions. [2020-04-18 07:36:47,735 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 95 transitions. [2020-04-18 07:36:47,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2020-04-18 07:36:47,736 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:36:47,736 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:47,736 INFO L82 PathProgramCache]: Analyzing trace with hash -1828933937, now seen corresponding path program 4 times [2020-04-18 07:36:47,736 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:47,736 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1608920605] [2020-04-18 07:36:47,737 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:47,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:47,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:47,812 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1608920605] [2020-04-18 07:36:47,812 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:47,812 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:36:47,812 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:47,814 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:47,817 INFO L259 McrAutomatonBuilder]: Finished intersection with 26 states and 33 transitions. [2020-04-18 07:36:47,818 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:47,843 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 07:36:47,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:36:47,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2020-04-18 07:36:47,843 INFO L87 Difference]: Start difference. First operand 62 states and 95 transitions. Second operand 5 states. [2020-04-18 07:36:47,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:47,892 INFO L93 Difference]: Finished difference Result 79 states and 117 transitions. [2020-04-18 07:36:47,892 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 117 transitions. [2020-04-18 07:36:47,892 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:47,893 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1116942263] [2020-04-18 07:36:47,893 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:47,893 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4] total 4 [2020-04-18 07:36:47,893 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1116942263] [2020-04-18 07:36:47,893 INFO L459 AbstractCegarLoop]: Interpolant automaton has 7 states [2020-04-18 07:36:47,894 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:47,894 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 07:36:47,894 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2020-04-18 07:36:47,894 INFO L87 Difference]: Start difference. First operand 6280 states and 22061 transitions. Second operand 7 states. [2020-04-18 07:36:48,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:48,386 INFO L93 Difference]: Finished difference Result 9375 states and 32205 transitions. [2020-04-18 07:36:48,386 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2020-04-18 07:36:48,386 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 17 [2020-04-18 07:36:48,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:48,403 INFO L225 Difference]: With dead ends: 9375 [2020-04-18 07:36:48,404 INFO L226 Difference]: Without dead ends: 5139 [2020-04-18 07:36:48,406 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 47 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=227, Unknown=0, NotChecked=0, Total=306 [2020-04-18 07:36:48,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5139 states. [2020-04-18 07:36:48,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5139 to 4964. [2020-04-18 07:36:48,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4964 states. [2020-04-18 07:36:48,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4964 states to 4964 states and 16384 transitions. [2020-04-18 07:36:48,515 INFO L78 Accepts]: Start accepts. Automaton has 4964 states and 16384 transitions. Word has length 17 [2020-04-18 07:36:48,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:48,515 INFO L479 AbstractCegarLoop]: Abstraction has 4964 states and 16384 transitions. [2020-04-18 07:36:48,516 INFO L480 AbstractCegarLoop]: Interpolant automaton has 7 states. [2020-04-18 07:36:48,516 INFO L276 IsEmpty]: Start isEmpty. Operand 4964 states and 16384 transitions. [2020-04-18 07:36:48,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 07:36:48,519 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:48,519 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:48,519 INFO L427 AbstractCegarLoop]: === Iteration 9 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:48,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:48,519 INFO L82 PathProgramCache]: Analyzing trace with hash -1362785496, now seen corresponding path program 1 times [2020-04-18 07:36:48,520 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:48,521 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [361489254] [2020-04-18 07:36:48,522 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:48,523 INFO L259 McrAutomatonBuilder]: Finished intersection with 86 states and 151 transitions. [2020-04-18 07:36:48,524 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states. [2020-04-18 07:36:48,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 07:36:48,526 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:48,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:48,526 INFO L82 PathProgramCache]: Analyzing trace with hash -1362785496, now seen corresponding path program 2 times [2020-04-18 07:36:48,526 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:48,527 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [695027083] [2020-04-18 07:36:48,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:48,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:48,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:48,588 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [695027083] [2020-04-18 07:36:48,588 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:48,588 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:36:48,589 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:48,593 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:48,598 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 69 transitions. [2020-04-18 07:36:48,598 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:48,607 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:48,607 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:48,607 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:48,607 INFO L87 Difference]: Start difference. First operand 86 states. Second operand 3 states. [2020-04-18 07:36:48,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:48,620 INFO L93 Difference]: Finished difference Result 88 states and 152 transitions. [2020-04-18 07:36:48,621 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 152 transitions. [2020-04-18 07:36:48,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 07:36:48,621 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:36:48,621 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:48,621 INFO L82 PathProgramCache]: Analyzing trace with hash -838212034, now seen corresponding path program 3 times [2020-04-18 07:36:48,622 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:48,622 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050847564] [2020-04-18 07:36:48,622 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:48,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:48,698 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:48,698 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1050847564] [2020-04-18 07:36:48,699 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:48,699 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:36:48,700 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:48,702 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:48,707 INFO L259 McrAutomatonBuilder]: Finished intersection with 36 states and 51 transitions. [2020-04-18 07:36:48,707 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:48,729 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:48,729 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:36:48,729 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2020-04-18 07:36:48,729 INFO L87 Difference]: Start difference. First operand 88 states and 152 transitions. Second operand 5 states. [2020-04-18 07:36:48,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:48,798 INFO L93 Difference]: Finished difference Result 118 states and 201 transitions. [2020-04-18 07:36:48,799 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 201 transitions. [2020-04-18 07:36:48,799 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 07:36:48,799 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:36:48,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:48,799 INFO L82 PathProgramCache]: Analyzing trace with hash -753985370, now seen corresponding path program 4 times [2020-04-18 07:36:48,800 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:48,800 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1898450315] [2020-04-18 07:36:48,800 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:48,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:48,894 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:48,895 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1898450315] [2020-04-18 07:36:48,895 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:48,895 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:36:48,896 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:48,899 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:48,904 INFO L259 McrAutomatonBuilder]: Finished intersection with 45 states and 69 transitions. [2020-04-18 07:36:48,905 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:49,071 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 07:36:49,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-04-18 07:36:49,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2020-04-18 07:36:49,072 INFO L87 Difference]: Start difference. First operand 118 states and 201 transitions. Second operand 10 states. [2020-04-18 07:36:49,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:49,225 INFO L93 Difference]: Finished difference Result 145 states and 237 transitions. [2020-04-18 07:36:49,226 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 237 transitions. [2020-04-18 07:36:49,226 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:49,226 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [361489254] [2020-04-18 07:36:49,227 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:49,227 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4] total 4 [2020-04-18 07:36:49,227 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [361489254] [2020-04-18 07:36:49,227 INFO L459 AbstractCegarLoop]: Interpolant automaton has 14 states [2020-04-18 07:36:49,227 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:49,227 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 07:36:49,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=250, Unknown=0, NotChecked=0, Total=306 [2020-04-18 07:36:49,228 INFO L87 Difference]: Start difference. First operand 4964 states and 16384 transitions. Second operand 14 states. [2020-04-18 07:36:52,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:52,517 INFO L93 Difference]: Finished difference Result 7584 states and 23480 transitions. [2020-04-18 07:36:52,518 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2020-04-18 07:36:52,518 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 19 [2020-04-18 07:36:52,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:52,533 INFO L225 Difference]: With dead ends: 7584 [2020-04-18 07:36:52,533 INFO L226 Difference]: Without dead ends: 6011 [2020-04-18 07:36:52,535 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 152 GetRequests, 84 SyntacticMatches, 0 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1479 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=689, Invalid=4141, Unknown=0, NotChecked=0, Total=4830 [2020-04-18 07:36:52,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6011 states. [2020-04-18 07:36:52,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6011 to 2946. [2020-04-18 07:36:52,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2946 states. [2020-04-18 07:36:52,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2946 states to 2946 states and 9474 transitions. [2020-04-18 07:36:52,635 INFO L78 Accepts]: Start accepts. Automaton has 2946 states and 9474 transitions. Word has length 19 [2020-04-18 07:36:52,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:52,636 INFO L479 AbstractCegarLoop]: Abstraction has 2946 states and 9474 transitions. [2020-04-18 07:36:52,636 INFO L480 AbstractCegarLoop]: Interpolant automaton has 14 states. [2020-04-18 07:36:52,636 INFO L276 IsEmpty]: Start isEmpty. Operand 2946 states and 9474 transitions. [2020-04-18 07:36:52,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 07:36:52,639 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:52,639 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:52,640 INFO L427 AbstractCegarLoop]: === Iteration 10 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:52,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:52,640 INFO L82 PathProgramCache]: Analyzing trace with hash -1664997293, now seen corresponding path program 1 times [2020-04-18 07:36:52,640 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:52,640 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [331129327] [2020-04-18 07:36:52,641 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:52,642 INFO L259 McrAutomatonBuilder]: Finished intersection with 74 states and 127 transitions. [2020-04-18 07:36:52,643 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states. [2020-04-18 07:36:52,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 07:36:52,643 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:52,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:52,644 INFO L82 PathProgramCache]: Analyzing trace with hash 1153816899, now seen corresponding path program 2 times [2020-04-18 07:36:52,644 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:52,644 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858041375] [2020-04-18 07:36:52,644 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:52,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:52,672 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:52,672 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1858041375] [2020-04-18 07:36:52,672 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:52,673 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:36:52,673 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:52,675 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:52,680 INFO L259 McrAutomatonBuilder]: Finished intersection with 41 states and 61 transitions. [2020-04-18 07:36:52,680 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:52,683 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:52,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:52,683 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:52,684 INFO L87 Difference]: Start difference. First operand 74 states. Second operand 3 states. [2020-04-18 07:36:52,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:52,692 INFO L93 Difference]: Finished difference Result 77 states and 129 transitions. [2020-04-18 07:36:52,692 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 129 transitions. [2020-04-18 07:36:52,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 07:36:52,693 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:36:52,693 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:52,693 INFO L82 PathProgramCache]: Analyzing trace with hash 2068387467, now seen corresponding path program 3 times [2020-04-18 07:36:52,693 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:52,694 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [912008529] [2020-04-18 07:36:52,694 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:52,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:52,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:52,730 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [912008529] [2020-04-18 07:36:52,730 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:52,730 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 07:36:52,730 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:52,733 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:52,738 INFO L259 McrAutomatonBuilder]: Finished intersection with 40 states and 59 transitions. [2020-04-18 07:36:52,738 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:52,742 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:52,743 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-04-18 07:36:52,743 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2020-04-18 07:36:52,743 INFO L87 Difference]: Start difference. First operand 77 states and 129 transitions. Second operand 4 states. [2020-04-18 07:36:52,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:52,767 INFO L93 Difference]: Finished difference Result 98 states and 161 transitions. [2020-04-18 07:36:52,767 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 161 transitions. [2020-04-18 07:36:52,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 07:36:52,768 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:36:52,768 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:52,768 INFO L82 PathProgramCache]: Analyzing trace with hash -963863669, now seen corresponding path program 4 times [2020-04-18 07:36:52,768 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:52,768 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457557842] [2020-04-18 07:36:52,769 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:52,777 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:52,815 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:52,815 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [457557842] [2020-04-18 07:36:52,816 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:52,816 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:36:52,816 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:52,818 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:52,821 INFO L259 McrAutomatonBuilder]: Finished intersection with 28 states and 35 transitions. [2020-04-18 07:36:52,822 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:52,848 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 07:36:52,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:36:52,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2020-04-18 07:36:52,849 INFO L87 Difference]: Start difference. First operand 98 states and 161 transitions. Second operand 5 states. [2020-04-18 07:36:52,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:52,909 INFO L93 Difference]: Finished difference Result 133 states and 214 transitions. [2020-04-18 07:36:52,909 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 214 transitions. [2020-04-18 07:36:52,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2020-04-18 07:36:52,909 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 07:36:52,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:52,910 INFO L82 PathProgramCache]: Analyzing trace with hash 1657299723, now seen corresponding path program 5 times [2020-04-18 07:36:52,910 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:52,910 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1793783967] [2020-04-18 07:36:52,910 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:52,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:52,947 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:52,947 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1793783967] [2020-04-18 07:36:52,948 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:52,948 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:36:52,948 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:52,950 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:52,954 INFO L259 McrAutomatonBuilder]: Finished intersection with 30 states and 39 transitions. [2020-04-18 07:36:52,954 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:52,965 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 07:36:52,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:52,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2020-04-18 07:36:52,966 INFO L87 Difference]: Start difference. First operand 133 states and 214 transitions. Second operand 3 states. [2020-04-18 07:36:52,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:52,975 INFO L93 Difference]: Finished difference Result 139 states and 217 transitions. [2020-04-18 07:36:52,975 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 217 transitions. [2020-04-18 07:36:52,976 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:52,976 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [331129327] [2020-04-18 07:36:52,976 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:52,977 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2] total 2 [2020-04-18 07:36:52,977 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [331129327] [2020-04-18 07:36:52,977 INFO L459 AbstractCegarLoop]: Interpolant automaton has 8 states [2020-04-18 07:36:52,977 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:52,977 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-04-18 07:36:52,977 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2020-04-18 07:36:52,978 INFO L87 Difference]: Start difference. First operand 2946 states and 9474 transitions. Second operand 8 states. [2020-04-18 07:36:53,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:53,701 INFO L93 Difference]: Finished difference Result 3080 states and 9765 transitions. [2020-04-18 07:36:53,701 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2020-04-18 07:36:53,701 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 19 [2020-04-18 07:36:53,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:53,704 INFO L225 Difference]: With dead ends: 3080 [2020-04-18 07:36:53,704 INFO L226 Difference]: Without dead ends: 1521 [2020-04-18 07:36:53,705 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 109 GetRequests, 86 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=126, Invalid=474, Unknown=0, NotChecked=0, Total=600 [2020-04-18 07:36:53,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1521 states. [2020-04-18 07:36:53,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1521 to 1268. [2020-04-18 07:36:53,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1268 states. [2020-04-18 07:36:53,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1268 states to 1268 states and 3424 transitions. [2020-04-18 07:36:53,731 INFO L78 Accepts]: Start accepts. Automaton has 1268 states and 3424 transitions. Word has length 19 [2020-04-18 07:36:53,731 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:53,732 INFO L479 AbstractCegarLoop]: Abstraction has 1268 states and 3424 transitions. [2020-04-18 07:36:53,732 INFO L480 AbstractCegarLoop]: Interpolant automaton has 8 states. [2020-04-18 07:36:53,732 INFO L276 IsEmpty]: Start isEmpty. Operand 1268 states and 3424 transitions. [2020-04-18 07:36:53,734 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2020-04-18 07:36:53,734 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:53,734 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:53,734 INFO L427 AbstractCegarLoop]: === Iteration 11 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:53,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:53,735 INFO L82 PathProgramCache]: Analyzing trace with hash 1941638346, now seen corresponding path program 1 times [2020-04-18 07:36:53,735 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:53,735 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [208834012] [2020-04-18 07:36:53,737 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:53,738 INFO L259 McrAutomatonBuilder]: Finished intersection with 87 states and 150 transitions. [2020-04-18 07:36:53,739 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states. [2020-04-18 07:36:53,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2020-04-18 07:36:53,739 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:53,739 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:53,740 INFO L82 PathProgramCache]: Analyzing trace with hash 1941638346, now seen corresponding path program 2 times [2020-04-18 07:36:53,740 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:53,740 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [161858754] [2020-04-18 07:36:53,740 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:53,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:53,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:53,785 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [161858754] [2020-04-18 07:36:53,785 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:53,785 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 07:36:53,786 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:53,788 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:53,793 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 54 transitions. [2020-04-18 07:36:53,793 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:53,797 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:53,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:53,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:53,798 INFO L87 Difference]: Start difference. First operand 87 states. Second operand 3 states. [2020-04-18 07:36:53,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:53,803 INFO L93 Difference]: Finished difference Result 87 states and 150 transitions. [2020-04-18 07:36:53,803 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 150 transitions. [2020-04-18 07:36:53,803 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:53,803 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [208834012] [2020-04-18 07:36:53,804 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:53,804 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 07:36:53,804 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [208834012] [2020-04-18 07:36:53,804 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 07:36:53,804 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:53,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:53,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:53,805 INFO L87 Difference]: Start difference. First operand 1268 states and 3424 transitions. Second operand 3 states. [2020-04-18 07:36:53,833 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:53,833 INFO L93 Difference]: Finished difference Result 1582 states and 4210 transitions. [2020-04-18 07:36:53,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 07:36:53,834 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2020-04-18 07:36:53,834 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:53,837 INFO L225 Difference]: With dead ends: 1582 [2020-04-18 07:36:53,837 INFO L226 Difference]: Without dead ends: 1582 [2020-04-18 07:36:53,837 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:53,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1582 states. [2020-04-18 07:36:53,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1582 to 1308. [2020-04-18 07:36:53,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1308 states. [2020-04-18 07:36:53,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1308 states to 1308 states and 3527 transitions. [2020-04-18 07:36:53,864 INFO L78 Accepts]: Start accepts. Automaton has 1308 states and 3527 transitions. Word has length 22 [2020-04-18 07:36:53,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:53,864 INFO L479 AbstractCegarLoop]: Abstraction has 1308 states and 3527 transitions. [2020-04-18 07:36:53,865 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 07:36:53,865 INFO L276 IsEmpty]: Start isEmpty. Operand 1308 states and 3527 transitions. [2020-04-18 07:36:53,867 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2020-04-18 07:36:53,867 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:53,867 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:53,867 INFO L427 AbstractCegarLoop]: === Iteration 12 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:53,867 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:53,868 INFO L82 PathProgramCache]: Analyzing trace with hash 1941639276, now seen corresponding path program 1 times [2020-04-18 07:36:53,868 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:53,868 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1020427330] [2020-04-18 07:36:53,869 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:53,870 INFO L259 McrAutomatonBuilder]: Finished intersection with 87 states and 150 transitions. [2020-04-18 07:36:53,871 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states. [2020-04-18 07:36:53,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2020-04-18 07:36:53,871 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:53,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:53,872 INFO L82 PathProgramCache]: Analyzing trace with hash 1941639276, now seen corresponding path program 2 times [2020-04-18 07:36:53,872 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:53,872 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [132432762] [2020-04-18 07:36:53,872 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:53,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:53,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:53,907 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [132432762] [2020-04-18 07:36:53,908 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:53,908 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:36:53,908 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:53,912 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:53,917 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 54 transitions. [2020-04-18 07:36:53,918 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:53,932 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:53,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:36:53,933 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2020-04-18 07:36:53,933 INFO L87 Difference]: Start difference. First operand 87 states. Second operand 5 states. [2020-04-18 07:36:53,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:53,957 INFO L93 Difference]: Finished difference Result 87 states and 150 transitions. [2020-04-18 07:36:53,957 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 150 transitions. [2020-04-18 07:36:53,957 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:53,958 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1020427330] [2020-04-18 07:36:53,958 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:53,958 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4] total 4 [2020-04-18 07:36:53,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1020427330] [2020-04-18 07:36:53,958 INFO L459 AbstractCegarLoop]: Interpolant automaton has 5 states [2020-04-18 07:36:53,959 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:53,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:36:53,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2020-04-18 07:36:53,959 INFO L87 Difference]: Start difference. First operand 1308 states and 3527 transitions. Second operand 5 states. [2020-04-18 07:36:54,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:54,051 INFO L93 Difference]: Finished difference Result 1700 states and 4392 transitions. [2020-04-18 07:36:54,051 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2020-04-18 07:36:54,051 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2020-04-18 07:36:54,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:54,054 INFO L225 Difference]: With dead ends: 1700 [2020-04-18 07:36:54,054 INFO L226 Difference]: Without dead ends: 1638 [2020-04-18 07:36:54,054 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2020-04-18 07:36:54,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1638 states. [2020-04-18 07:36:54,077 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1638 to 1352. [2020-04-18 07:36:54,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1352 states. [2020-04-18 07:36:54,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1352 states to 1352 states and 3645 transitions. [2020-04-18 07:36:54,081 INFO L78 Accepts]: Start accepts. Automaton has 1352 states and 3645 transitions. Word has length 22 [2020-04-18 07:36:54,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:54,081 INFO L479 AbstractCegarLoop]: Abstraction has 1352 states and 3645 transitions. [2020-04-18 07:36:54,081 INFO L480 AbstractCegarLoop]: Interpolant automaton has 5 states. [2020-04-18 07:36:54,081 INFO L276 IsEmpty]: Start isEmpty. Operand 1352 states and 3645 transitions. [2020-04-18 07:36:54,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2020-04-18 07:36:54,084 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:54,084 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:54,084 INFO L427 AbstractCegarLoop]: === Iteration 13 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:54,084 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:54,084 INFO L82 PathProgramCache]: Analyzing trace with hash -1325472824, now seen corresponding path program 1 times [2020-04-18 07:36:54,084 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:54,085 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1226298395] [2020-04-18 07:36:54,085 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:54,087 INFO L259 McrAutomatonBuilder]: Finished intersection with 87 states and 150 transitions. [2020-04-18 07:36:54,087 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states. [2020-04-18 07:36:54,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2020-04-18 07:36:54,088 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:54,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:54,088 INFO L82 PathProgramCache]: Analyzing trace with hash -1325472824, now seen corresponding path program 2 times [2020-04-18 07:36:54,088 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:54,089 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187613432] [2020-04-18 07:36:54,089 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:54,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:54,128 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:54,129 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1187613432] [2020-04-18 07:36:54,129 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:54,129 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:36:54,129 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:54,131 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:54,136 INFO L259 McrAutomatonBuilder]: Finished intersection with 39 states and 54 transitions. [2020-04-18 07:36:54,137 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:54,139 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:54,139 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:54,140 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:54,140 INFO L87 Difference]: Start difference. First operand 87 states. Second operand 3 states. [2020-04-18 07:36:54,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:54,141 INFO L93 Difference]: Finished difference Result 87 states and 150 transitions. [2020-04-18 07:36:54,141 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 150 transitions. [2020-04-18 07:36:54,142 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:54,142 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1226298395] [2020-04-18 07:36:54,142 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:54,142 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [2] total 2 [2020-04-18 07:36:54,142 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1226298395] [2020-04-18 07:36:54,143 INFO L459 AbstractCegarLoop]: Interpolant automaton has 3 states [2020-04-18 07:36:54,143 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:54,143 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:54,145 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:54,146 INFO L87 Difference]: Start difference. First operand 1352 states and 3645 transitions. Second operand 3 states. [2020-04-18 07:36:54,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:54,164 INFO L93 Difference]: Finished difference Result 924 states and 2330 transitions. [2020-04-18 07:36:54,165 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2020-04-18 07:36:54,165 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2020-04-18 07:36:54,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:54,166 INFO L225 Difference]: With dead ends: 924 [2020-04-18 07:36:54,167 INFO L226 Difference]: Without dead ends: 924 [2020-04-18 07:36:54,167 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 20 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:54,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 924 states. [2020-04-18 07:36:54,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 924 to 872. [2020-04-18 07:36:54,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 872 states. [2020-04-18 07:36:54,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 872 states to 872 states and 2254 transitions. [2020-04-18 07:36:54,182 INFO L78 Accepts]: Start accepts. Automaton has 872 states and 2254 transitions. Word has length 22 [2020-04-18 07:36:54,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:54,182 INFO L479 AbstractCegarLoop]: Abstraction has 872 states and 2254 transitions. [2020-04-18 07:36:54,182 INFO L480 AbstractCegarLoop]: Interpolant automaton has 3 states. [2020-04-18 07:36:54,182 INFO L276 IsEmpty]: Start isEmpty. Operand 872 states and 2254 transitions. [2020-04-18 07:36:54,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:36:54,184 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:54,184 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:54,185 INFO L427 AbstractCegarLoop]: === Iteration 14 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:54,185 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:54,185 INFO L82 PathProgramCache]: Analyzing trace with hash 1327463445, now seen corresponding path program 1 times [2020-04-18 07:36:54,185 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:54,185 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [503846145] [2020-04-18 07:36:54,186 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:54,192 INFO L259 McrAutomatonBuilder]: Finished intersection with 366 states and 923 transitions. [2020-04-18 07:36:54,194 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states. [2020-04-18 07:36:54,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:36:54,195 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:54,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:54,196 INFO L82 PathProgramCache]: Analyzing trace with hash 1870448589, now seen corresponding path program 2 times [2020-04-18 07:36:54,196 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:54,196 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [22130853] [2020-04-18 07:36:54,196 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:54,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:54,222 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:54,222 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [22130853] [2020-04-18 07:36:54,223 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:54,223 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:36:54,223 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:54,226 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:54,242 INFO L259 McrAutomatonBuilder]: Finished intersection with 108 states and 217 transitions. [2020-04-18 07:36:54,242 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:54,248 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:54,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:54,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:54,249 INFO L87 Difference]: Start difference. First operand 366 states. Second operand 3 states. [2020-04-18 07:36:54,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:54,257 INFO L93 Difference]: Finished difference Result 373 states and 929 transitions. [2020-04-18 07:36:54,257 INFO L276 IsEmpty]: Start isEmpty. Operand 373 states and 929 transitions. [2020-04-18 07:36:54,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:36:54,258 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:36:54,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:54,258 INFO L82 PathProgramCache]: Analyzing trace with hash 1857992469, now seen corresponding path program 3 times [2020-04-18 07:36:54,259 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:54,259 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1643305593] [2020-04-18 07:36:54,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:54,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:54,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:54,288 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1643305593] [2020-04-18 07:36:54,288 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:54,288 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:36:54,288 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:54,291 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:54,307 INFO L259 McrAutomatonBuilder]: Finished intersection with 107 states and 215 transitions. [2020-04-18 07:36:54,307 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:54,319 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 07:36:54,319 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-04-18 07:36:54,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2020-04-18 07:36:54,319 INFO L87 Difference]: Start difference. First operand 373 states and 929 transitions. Second operand 4 states. [2020-04-18 07:36:54,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:54,345 INFO L93 Difference]: Finished difference Result 422 states and 1013 transitions. [2020-04-18 07:36:54,345 INFO L276 IsEmpty]: Start isEmpty. Operand 422 states and 1013 transitions. [2020-04-18 07:36:54,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:36:54,346 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:36:54,347 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:54,347 INFO L82 PathProgramCache]: Analyzing trace with hash 1327463445, now seen corresponding path program 4 times [2020-04-18 07:36:54,347 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:54,347 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [251908576] [2020-04-18 07:36:54,348 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:54,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:54,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:54,422 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [251908576] [2020-04-18 07:36:54,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:54,422 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 07:36:54,422 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:54,427 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:54,439 INFO L259 McrAutomatonBuilder]: Finished intersection with 92 states and 183 transitions. [2020-04-18 07:36:54,439 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:54,481 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 07:36:54,481 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 07:36:54,482 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2020-04-18 07:36:54,482 INFO L87 Difference]: Start difference. First operand 422 states and 1013 transitions. Second operand 7 states. [2020-04-18 07:36:54,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:54,662 INFO L93 Difference]: Finished difference Result 675 states and 1569 transitions. [2020-04-18 07:36:54,662 INFO L276 IsEmpty]: Start isEmpty. Operand 675 states and 1569 transitions. [2020-04-18 07:36:54,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:36:54,664 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 07:36:54,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:54,665 INFO L82 PathProgramCache]: Analyzing trace with hash 832466405, now seen corresponding path program 5 times [2020-04-18 07:36:54,665 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:54,665 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [919420284] [2020-04-18 07:36:54,666 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:54,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:54,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:54,759 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [919420284] [2020-04-18 07:36:54,759 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:54,759 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 07:36:54,759 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:54,762 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:54,777 INFO L259 McrAutomatonBuilder]: Finished intersection with 100 states and 205 transitions. [2020-04-18 07:36:54,778 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:54,864 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 07:36:54,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-04-18 07:36:54,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=88, Invalid=292, Unknown=0, NotChecked=0, Total=380 [2020-04-18 07:36:54,865 INFO L87 Difference]: Start difference. First operand 675 states and 1569 transitions. Second operand 8 states. [2020-04-18 07:36:55,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:55,237 INFO L93 Difference]: Finished difference Result 879 states and 1964 transitions. [2020-04-18 07:36:55,238 INFO L276 IsEmpty]: Start isEmpty. Operand 879 states and 1964 transitions. [2020-04-18 07:36:55,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:36:55,240 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 07:36:55,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:55,240 INFO L82 PathProgramCache]: Analyzing trace with hash 675200963, now seen corresponding path program 6 times [2020-04-18 07:36:55,240 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:55,241 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [70109572] [2020-04-18 07:36:55,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:55,250 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:55,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:55,335 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [70109572] [2020-04-18 07:36:55,335 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:55,335 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 07:36:55,336 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:55,338 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:55,352 INFO L259 McrAutomatonBuilder]: Finished intersection with 85 states and 169 transitions. [2020-04-18 07:36:55,352 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:55,437 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 18 times. [2020-04-18 07:36:55,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 07:36:55,438 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=162, Invalid=540, Unknown=0, NotChecked=0, Total=702 [2020-04-18 07:36:55,438 INFO L87 Difference]: Start difference. First operand 879 states and 1964 transitions. Second operand 11 states. [2020-04-18 07:36:56,069 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:56,069 INFO L93 Difference]: Finished difference Result 920 states and 2032 transitions. [2020-04-18 07:36:56,070 INFO L276 IsEmpty]: Start isEmpty. Operand 920 states and 2032 transitions. [2020-04-18 07:36:56,072 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:36:56,072 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [503846145] [2020-04-18 07:36:56,073 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:36:56,073 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7] total 7 [2020-04-18 07:36:56,073 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [503846145] [2020-04-18 07:36:56,073 INFO L459 AbstractCegarLoop]: Interpolant automaton has 17 states [2020-04-18 07:36:56,073 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:36:56,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2020-04-18 07:36:56,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=241, Invalid=751, Unknown=0, NotChecked=0, Total=992 [2020-04-18 07:36:56,074 INFO L87 Difference]: Start difference. First operand 872 states and 2254 transitions. Second operand 17 states. [2020-04-18 07:36:57,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:57,527 INFO L93 Difference]: Finished difference Result 1550 states and 3722 transitions. [2020-04-18 07:36:57,528 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2020-04-18 07:36:57,528 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 23 [2020-04-18 07:36:57,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:36:57,531 INFO L225 Difference]: With dead ends: 1550 [2020-04-18 07:36:57,531 INFO L226 Difference]: Without dead ends: 1539 [2020-04-18 07:36:57,533 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 879 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=639, Invalid=2223, Unknown=0, NotChecked=0, Total=2862 [2020-04-18 07:36:57,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1539 states. [2020-04-18 07:36:57,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1539 to 891. [2020-04-18 07:36:57,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 891 states. [2020-04-18 07:36:57,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 891 states to 891 states and 2288 transitions. [2020-04-18 07:36:57,555 INFO L78 Accepts]: Start accepts. Automaton has 891 states and 2288 transitions. Word has length 23 [2020-04-18 07:36:57,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:36:57,555 INFO L479 AbstractCegarLoop]: Abstraction has 891 states and 2288 transitions. [2020-04-18 07:36:57,555 INFO L480 AbstractCegarLoop]: Interpolant automaton has 17 states. [2020-04-18 07:36:57,555 INFO L276 IsEmpty]: Start isEmpty. Operand 891 states and 2288 transitions. [2020-04-18 07:36:57,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:36:57,557 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:36:57,557 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:36:57,557 INFO L427 AbstractCegarLoop]: === Iteration 15 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:36:57,558 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:57,558 INFO L82 PathProgramCache]: Analyzing trace with hash 984629578, now seen corresponding path program 1 times [2020-04-18 07:36:57,558 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:36:57,558 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [222657060] [2020-04-18 07:36:57,560 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:57,565 INFO L259 McrAutomatonBuilder]: Finished intersection with 366 states and 923 transitions. [2020-04-18 07:36:57,567 INFO L276 IsEmpty]: Start isEmpty. Operand 366 states. [2020-04-18 07:36:57,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:36:57,568 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:36:57,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:57,569 INFO L82 PathProgramCache]: Analyzing trace with hash -301077886, now seen corresponding path program 2 times [2020-04-18 07:36:57,569 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:57,569 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1336998862] [2020-04-18 07:36:57,569 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:57,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:57,649 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:57,649 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1336998862] [2020-04-18 07:36:57,650 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:57,650 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:36:57,650 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:57,653 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:57,669 INFO L259 McrAutomatonBuilder]: Finished intersection with 107 states and 215 transitions. [2020-04-18 07:36:57,670 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:57,673 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:36:57,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2020-04-18 07:36:57,673 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2020-04-18 07:36:57,673 INFO L87 Difference]: Start difference. First operand 366 states. Second operand 3 states. [2020-04-18 07:36:57,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:57,684 INFO L93 Difference]: Finished difference Result 373 states and 929 transitions. [2020-04-18 07:36:57,684 INFO L276 IsEmpty]: Start isEmpty. Operand 373 states and 929 transitions. [2020-04-18 07:36:57,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:36:57,685 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:36:57,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:57,685 INFO L82 PathProgramCache]: Analyzing trace with hash -313534006, now seen corresponding path program 3 times [2020-04-18 07:36:57,685 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:57,686 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [895858500] [2020-04-18 07:36:57,686 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:57,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:57,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:57,734 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [895858500] [2020-04-18 07:36:57,734 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:57,734 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:36:57,734 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:57,737 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:57,752 INFO L259 McrAutomatonBuilder]: Finished intersection with 105 states and 211 transitions. [2020-04-18 07:36:57,753 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:57,777 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 07:36:57,777 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-04-18 07:36:57,777 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2020-04-18 07:36:57,777 INFO L87 Difference]: Start difference. First operand 373 states and 929 transitions. Second operand 4 states. [2020-04-18 07:36:57,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:57,805 INFO L93 Difference]: Finished difference Result 422 states and 1013 transitions. [2020-04-18 07:36:57,805 INFO L276 IsEmpty]: Start isEmpty. Operand 422 states and 1013 transitions. [2020-04-18 07:36:57,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:36:57,806 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:36:57,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:57,807 INFO L82 PathProgramCache]: Analyzing trace with hash 984629578, now seen corresponding path program 4 times [2020-04-18 07:36:57,807 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:57,807 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [423149745] [2020-04-18 07:36:57,807 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:57,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:57,871 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:57,872 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [423149745] [2020-04-18 07:36:57,872 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:57,872 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 07:36:57,872 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:57,875 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:57,888 INFO L259 McrAutomatonBuilder]: Finished intersection with 92 states and 183 transitions. [2020-04-18 07:36:57,888 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:57,940 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 07:36:57,941 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-04-18 07:36:57,941 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2020-04-18 07:36:57,942 INFO L87 Difference]: Start difference. First operand 422 states and 1013 transitions. Second operand 8 states. [2020-04-18 07:36:58,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:58,218 INFO L93 Difference]: Finished difference Result 664 states and 1550 transitions. [2020-04-18 07:36:58,218 INFO L276 IsEmpty]: Start isEmpty. Operand 664 states and 1550 transitions. [2020-04-18 07:36:58,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:36:58,220 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 07:36:58,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:58,220 INFO L82 PathProgramCache]: Analyzing trace with hash 489632538, now seen corresponding path program 5 times [2020-04-18 07:36:58,220 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:58,221 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [963431633] [2020-04-18 07:36:58,221 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:58,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:58,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:58,325 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [963431633] [2020-04-18 07:36:58,325 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:58,325 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2020-04-18 07:36:58,326 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:58,328 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:58,344 INFO L259 McrAutomatonBuilder]: Finished intersection with 100 states and 205 transitions. [2020-04-18 07:36:58,344 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:58,414 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 07:36:58,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 07:36:58,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=108, Invalid=398, Unknown=0, NotChecked=0, Total=506 [2020-04-18 07:36:58,415 INFO L87 Difference]: Start difference. First operand 664 states and 1550 transitions. Second operand 9 states. [2020-04-18 07:36:58,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:36:58,976 INFO L93 Difference]: Finished difference Result 859 states and 1932 transitions. [2020-04-18 07:36:58,976 INFO L276 IsEmpty]: Start isEmpty. Operand 859 states and 1932 transitions. [2020-04-18 07:36:58,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:36:58,979 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 07:36:58,979 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:36:58,980 INFO L82 PathProgramCache]: Analyzing trace with hash 332367096, now seen corresponding path program 6 times [2020-04-18 07:36:58,980 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:36:58,980 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1884312101] [2020-04-18 07:36:58,981 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:36:58,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:36:59,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:36:59,093 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1884312101] [2020-04-18 07:36:59,094 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:36:59,094 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2020-04-18 07:36:59,094 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:36:59,097 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:36:59,112 INFO L259 McrAutomatonBuilder]: Finished intersection with 85 states and 169 transitions. [2020-04-18 07:36:59,112 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:36:59,234 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 18 times. [2020-04-18 07:36:59,234 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 07:36:59,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=217, Invalid=839, Unknown=0, NotChecked=0, Total=1056 [2020-04-18 07:36:59,235 INFO L87 Difference]: Start difference. First operand 859 states and 1932 transitions. Second operand 12 states. [2020-04-18 07:37:00,122 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:00,122 INFO L93 Difference]: Finished difference Result 898 states and 1996 transitions. [2020-04-18 07:37:00,122 INFO L276 IsEmpty]: Start isEmpty. Operand 898 states and 1996 transitions. [2020-04-18 07:37:00,124 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:37:00,125 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [222657060] [2020-04-18 07:37:00,125 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:37:00,125 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8] total 8 [2020-04-18 07:37:00,126 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [222657060] [2020-04-18 07:37:00,126 INFO L459 AbstractCegarLoop]: Interpolant automaton has 18 states [2020-04-18 07:37:00,126 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:37:00,126 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2020-04-18 07:37:00,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=319, Invalid=1163, Unknown=0, NotChecked=0, Total=1482 [2020-04-18 07:37:00,127 INFO L87 Difference]: Start difference. First operand 891 states and 2288 transitions. Second operand 18 states. [2020-04-18 07:37:02,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:02,071 INFO L93 Difference]: Finished difference Result 1531 states and 3622 transitions. [2020-04-18 07:37:02,071 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2020-04-18 07:37:02,072 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 23 [2020-04-18 07:37:02,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:37:02,074 INFO L225 Difference]: With dead ends: 1531 [2020-04-18 07:37:02,075 INFO L226 Difference]: Without dead ends: 1531 [2020-04-18 07:37:02,076 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 207 GetRequests, 137 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1572 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=900, Invalid=3930, Unknown=0, NotChecked=0, Total=4830 [2020-04-18 07:37:02,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1531 states. [2020-04-18 07:37:02,094 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1531 to 876. [2020-04-18 07:37:02,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 876 states. [2020-04-18 07:37:02,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 876 states to 876 states and 2246 transitions. [2020-04-18 07:37:02,097 INFO L78 Accepts]: Start accepts. Automaton has 876 states and 2246 transitions. Word has length 23 [2020-04-18 07:37:02,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:37:02,097 INFO L479 AbstractCegarLoop]: Abstraction has 876 states and 2246 transitions. [2020-04-18 07:37:02,097 INFO L480 AbstractCegarLoop]: Interpolant automaton has 18 states. [2020-04-18 07:37:02,097 INFO L276 IsEmpty]: Start isEmpty. Operand 876 states and 2246 transitions. [2020-04-18 07:37:02,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:02,099 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:37:02,099 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:37:02,100 INFO L427 AbstractCegarLoop]: === Iteration 16 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:37:02,100 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:02,100 INFO L82 PathProgramCache]: Analyzing trace with hash 1429355883, now seen corresponding path program 1 times [2020-04-18 07:37:02,100 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:37:02,100 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [294893488] [2020-04-18 07:37:02,101 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:02,106 INFO L259 McrAutomatonBuilder]: Finished intersection with 362 states and 915 transitions. [2020-04-18 07:37:02,108 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states. [2020-04-18 07:37:02,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:02,109 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:37:02,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:02,110 INFO L82 PathProgramCache]: Analyzing trace with hash -2029693541, now seen corresponding path program 2 times [2020-04-18 07:37:02,110 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:02,110 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2027073842] [2020-04-18 07:37:02,111 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:02,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:02,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:02,160 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2027073842] [2020-04-18 07:37:02,160 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:02,160 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:37:02,161 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:02,163 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:02,176 INFO L259 McrAutomatonBuilder]: Finished intersection with 93 states and 177 transitions. [2020-04-18 07:37:02,176 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:02,193 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:37:02,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:37:02,193 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2020-04-18 07:37:02,193 INFO L87 Difference]: Start difference. First operand 362 states. Second operand 5 states. [2020-04-18 07:37:02,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:02,271 INFO L93 Difference]: Finished difference Result 550 states and 1381 transitions. [2020-04-18 07:37:02,272 INFO L276 IsEmpty]: Start isEmpty. Operand 550 states and 1381 transitions. [2020-04-18 07:37:02,273 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:02,273 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:37:02,273 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:02,273 INFO L82 PathProgramCache]: Analyzing trace with hash 528707419, now seen corresponding path program 3 times [2020-04-18 07:37:02,273 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:02,274 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [236908884] [2020-04-18 07:37:02,274 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:02,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:02,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:02,323 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [236908884] [2020-04-18 07:37:02,323 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:02,323 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 07:37:02,323 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:02,325 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:02,336 INFO L259 McrAutomatonBuilder]: Finished intersection with 77 states and 145 transitions. [2020-04-18 07:37:02,337 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:02,342 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:37:02,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2020-04-18 07:37:02,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2020-04-18 07:37:02,343 INFO L87 Difference]: Start difference. First operand 550 states and 1381 transitions. Second operand 6 states. [2020-04-18 07:37:02,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:02,456 INFO L93 Difference]: Finished difference Result 590 states and 1448 transitions. [2020-04-18 07:37:02,456 INFO L276 IsEmpty]: Start isEmpty. Operand 590 states and 1448 transitions. [2020-04-18 07:37:02,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:02,458 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:37:02,459 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:02,459 INFO L82 PathProgramCache]: Analyzing trace with hash 1429355883, now seen corresponding path program 4 times [2020-04-18 07:37:02,459 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:02,460 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2023465320] [2020-04-18 07:37:02,460 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:02,474 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:02,681 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:02,681 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2023465320] [2020-04-18 07:37:02,682 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:02,682 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 07:37:02,682 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:02,686 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:02,703 INFO L259 McrAutomatonBuilder]: Finished intersection with 72 states and 135 transitions. [2020-04-18 07:37:02,703 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:03,223 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 52 [2020-04-18 07:37:03,538 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 12 times. [2020-04-18 07:37:03,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 07:37:03,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=63, Invalid=243, Unknown=0, NotChecked=0, Total=306 [2020-04-18 07:37:03,539 INFO L87 Difference]: Start difference. First operand 590 states and 1448 transitions. Second operand 14 states. [2020-04-18 07:37:06,566 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:06,566 INFO L93 Difference]: Finished difference Result 910 states and 2182 transitions. [2020-04-18 07:37:06,567 INFO L276 IsEmpty]: Start isEmpty. Operand 910 states and 2182 transitions. [2020-04-18 07:37:06,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:06,569 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 07:37:06,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:06,569 INFO L82 PathProgramCache]: Analyzing trace with hash -85746213, now seen corresponding path program 5 times [2020-04-18 07:37:06,569 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:06,569 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [305548490] [2020-04-18 07:37:06,569 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:06,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:06,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:06,678 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [305548490] [2020-04-18 07:37:06,679 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:06,679 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2020-04-18 07:37:06,679 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:06,681 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:06,692 INFO L259 McrAutomatonBuilder]: Finished intersection with 76 states and 145 transitions. [2020-04-18 07:37:06,692 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:07,115 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 16 times. [2020-04-18 07:37:07,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2020-04-18 07:37:07,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=271, Invalid=919, Unknown=0, NotChecked=0, Total=1190 [2020-04-18 07:37:07,117 INFO L87 Difference]: Start difference. First operand 910 states and 2182 transitions. Second operand 16 states. [2020-04-18 07:37:09,851 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 59 DAG size of output: 42 [2020-04-18 07:37:10,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:10,327 INFO L93 Difference]: Finished difference Result 952 states and 2241 transitions. [2020-04-18 07:37:10,327 INFO L276 IsEmpty]: Start isEmpty. Operand 952 states and 2241 transitions. [2020-04-18 07:37:10,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:10,329 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 07:37:10,329 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:10,329 INFO L82 PathProgramCache]: Analyzing trace with hash 1205539843, now seen corresponding path program 6 times [2020-04-18 07:37:10,329 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:10,330 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1430124860] [2020-04-18 07:37:10,330 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:10,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:10,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:10,356 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1430124860] [2020-04-18 07:37:10,356 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:10,357 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:37:10,357 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:10,359 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:10,431 INFO L259 McrAutomatonBuilder]: Finished intersection with 132 states and 281 transitions. [2020-04-18 07:37:10,432 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:10,518 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 07:37:10,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:37:10,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=412, Invalid=1480, Unknown=0, NotChecked=0, Total=1892 [2020-04-18 07:37:10,520 INFO L87 Difference]: Start difference. First operand 952 states and 2241 transitions. Second operand 5 states. [2020-04-18 07:37:10,557 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:10,557 INFO L93 Difference]: Finished difference Result 977 states and 2257 transitions. [2020-04-18 07:37:10,557 INFO L276 IsEmpty]: Start isEmpty. Operand 977 states and 2257 transitions. [2020-04-18 07:37:10,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:10,559 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 07:37:10,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:10,560 INFO L82 PathProgramCache]: Analyzing trace with hash 1906032831, now seen corresponding path program 7 times [2020-04-18 07:37:10,560 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:10,560 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961941114] [2020-04-18 07:37:10,560 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:10,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:10,601 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:10,602 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [961941114] [2020-04-18 07:37:10,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:10,602 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:37:10,602 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:10,605 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:10,625 INFO L259 McrAutomatonBuilder]: Finished intersection with 136 states and 294 transitions. [2020-04-18 07:37:10,625 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:10,785 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 07:37:10,785 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-04-18 07:37:10,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=427, Invalid=1925, Unknown=0, NotChecked=0, Total=2352 [2020-04-18 07:37:10,786 INFO L87 Difference]: Start difference. First operand 977 states and 2257 transitions. Second operand 8 states. [2020-04-18 07:37:10,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:10,935 INFO L93 Difference]: Finished difference Result 1047 states and 2359 transitions. [2020-04-18 07:37:10,936 INFO L276 IsEmpty]: Start isEmpty. Operand 1047 states and 2359 transitions. [2020-04-18 07:37:10,937 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:37:10,937 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [294893488] [2020-04-18 07:37:10,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:37:10,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4] total 4 [2020-04-18 07:37:10,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [294893488] [2020-04-18 07:37:10,938 INFO L459 AbstractCegarLoop]: Interpolant automaton has 28 states [2020-04-18 07:37:10,938 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:37:10,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2020-04-18 07:37:10,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=449, Invalid=2203, Unknown=0, NotChecked=0, Total=2652 [2020-04-18 07:37:10,939 INFO L87 Difference]: Start difference. First operand 876 states and 2246 transitions. Second operand 28 states. [2020-04-18 07:37:11,216 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 41 [2020-04-18 07:37:11,426 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 42 [2020-04-18 07:37:12,464 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 41 DAG size of output: 40 [2020-04-18 07:37:12,684 WARN L192 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 48 [2020-04-18 07:37:12,961 WARN L192 SmtUtils]: Spent 220.00 ms on a formula simplification. DAG size of input: 92 DAG size of output: 72 [2020-04-18 07:37:13,282 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 45 [2020-04-18 07:37:13,499 WARN L192 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 88 DAG size of output: 69 [2020-04-18 07:37:13,671 WARN L192 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 50 [2020-04-18 07:37:14,371 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 49 DAG size of output: 48 [2020-04-18 07:37:14,667 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 63 [2020-04-18 07:37:16,802 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 47 DAG size of output: 46 [2020-04-18 07:37:17,474 WARN L192 SmtUtils]: Spent 117.00 ms on a formula simplification that was a NOOP. DAG size: 80 [2020-04-18 07:37:19,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:19,662 INFO L93 Difference]: Finished difference Result 2403 states and 5855 transitions. [2020-04-18 07:37:19,662 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 89 states. [2020-04-18 07:37:19,662 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 23 [2020-04-18 07:37:19,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:37:19,667 INFO L225 Difference]: With dead ends: 2403 [2020-04-18 07:37:19,667 INFO L226 Difference]: Without dead ends: 2403 [2020-04-18 07:37:19,670 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 282 GetRequests, 156 SyntacticMatches, 8 SemanticMatches, 118 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5425 ImplicationChecksByTransitivity, 7.7s TimeCoverageRelationStatistics Valid=1968, Invalid=12312, Unknown=0, NotChecked=0, Total=14280 [2020-04-18 07:37:19,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2403 states. [2020-04-18 07:37:19,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2403 to 1028. [2020-04-18 07:37:19,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1028 states. [2020-04-18 07:37:19,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1028 states to 1028 states and 2692 transitions. [2020-04-18 07:37:19,696 INFO L78 Accepts]: Start accepts. Automaton has 1028 states and 2692 transitions. Word has length 23 [2020-04-18 07:37:19,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:37:19,696 INFO L479 AbstractCegarLoop]: Abstraction has 1028 states and 2692 transitions. [2020-04-18 07:37:19,697 INFO L480 AbstractCegarLoop]: Interpolant automaton has 28 states. [2020-04-18 07:37:19,697 INFO L276 IsEmpty]: Start isEmpty. Operand 1028 states and 2692 transitions. [2020-04-18 07:37:19,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:19,699 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:37:19,699 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:37:19,699 INFO L427 AbstractCegarLoop]: === Iteration 17 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:37:19,699 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:19,699 INFO L82 PathProgramCache]: Analyzing trace with hash -1609486768, now seen corresponding path program 1 times [2020-04-18 07:37:19,700 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:37:19,700 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [228709156] [2020-04-18 07:37:19,701 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:19,704 INFO L259 McrAutomatonBuilder]: Finished intersection with 362 states and 915 transitions. [2020-04-18 07:37:19,706 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states. [2020-04-18 07:37:19,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:19,707 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:37:19,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:19,708 INFO L82 PathProgramCache]: Analyzing trace with hash -1512530160, now seen corresponding path program 2 times [2020-04-18 07:37:19,708 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:19,708 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1510607844] [2020-04-18 07:37:19,708 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:19,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:19,762 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:19,763 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1510607844] [2020-04-18 07:37:19,763 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:19,763 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 07:37:19,763 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:19,766 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:19,778 INFO L259 McrAutomatonBuilder]: Finished intersection with 90 states and 171 transitions. [2020-04-18 07:37:19,779 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:19,803 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:37:19,803 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2020-04-18 07:37:19,803 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2020-04-18 07:37:19,804 INFO L87 Difference]: Start difference. First operand 362 states. Second operand 6 states. [2020-04-18 07:37:19,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:19,935 INFO L93 Difference]: Finished difference Result 560 states and 1399 transitions. [2020-04-18 07:37:19,935 INFO L276 IsEmpty]: Start isEmpty. Operand 560 states and 1399 transitions. [2020-04-18 07:37:19,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:19,936 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:37:19,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:19,937 INFO L82 PathProgramCache]: Analyzing trace with hash -118920800, now seen corresponding path program 3 times [2020-04-18 07:37:19,937 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:19,937 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1301894024] [2020-04-18 07:37:19,938 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:19,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:20,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:20,031 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1301894024] [2020-04-18 07:37:20,031 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:20,032 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2020-04-18 07:37:20,032 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:20,034 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:20,049 INFO L259 McrAutomatonBuilder]: Finished intersection with 81 states and 155 transitions. [2020-04-18 07:37:20,050 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:20,912 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 18 times. [2020-04-18 07:37:20,912 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2020-04-18 07:37:20,912 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=89, Invalid=417, Unknown=0, NotChecked=0, Total=506 [2020-04-18 07:37:20,913 INFO L87 Difference]: Start difference. First operand 560 states and 1399 transitions. Second operand 19 states. [2020-04-18 07:37:21,193 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 58 DAG size of output: 39 [2020-04-18 07:37:22,725 WARN L192 SmtUtils]: Spent 104.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 42 [2020-04-18 07:37:26,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:26,571 INFO L93 Difference]: Finished difference Result 833 states and 2061 transitions. [2020-04-18 07:37:26,571 INFO L276 IsEmpty]: Start isEmpty. Operand 833 states and 2061 transitions. [2020-04-18 07:37:26,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:26,573 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:37:26,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:26,573 INFO L82 PathProgramCache]: Analyzing trace with hash 1122929432, now seen corresponding path program 4 times [2020-04-18 07:37:26,574 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:26,574 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1716682796] [2020-04-18 07:37:26,574 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:26,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:26,644 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:26,644 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1716682796] [2020-04-18 07:37:26,644 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:26,645 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 07:37:26,645 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:26,648 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:26,664 INFO L259 McrAutomatonBuilder]: Finished intersection with 105 states and 211 transitions. [2020-04-18 07:37:26,664 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:26,796 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 07:37:26,796 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-04-18 07:37:26,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=567, Invalid=2295, Unknown=0, NotChecked=0, Total=2862 [2020-04-18 07:37:26,798 INFO L87 Difference]: Start difference. First operand 833 states and 2061 transitions. Second operand 8 states. [2020-04-18 07:37:27,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:27,085 INFO L93 Difference]: Finished difference Result 1223 states and 2981 transitions. [2020-04-18 07:37:27,086 INFO L276 IsEmpty]: Start isEmpty. Operand 1223 states and 2981 transitions. [2020-04-18 07:37:27,087 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:27,088 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 07:37:27,088 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:27,088 INFO L82 PathProgramCache]: Analyzing trace with hash 1731447904, now seen corresponding path program 5 times [2020-04-18 07:37:27,088 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:27,088 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1755657437] [2020-04-18 07:37:27,089 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:27,097 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:27,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:27,154 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1755657437] [2020-04-18 07:37:27,154 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:27,155 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 07:37:27,155 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:27,157 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:27,174 INFO L259 McrAutomatonBuilder]: Finished intersection with 102 states and 210 transitions. [2020-04-18 07:37:27,174 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:27,251 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 07:37:27,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-04-18 07:37:27,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=609, Invalid=2697, Unknown=0, NotChecked=0, Total=3306 [2020-04-18 07:37:27,253 INFO L87 Difference]: Start difference. First operand 1223 states and 2981 transitions. Second operand 10 states. [2020-04-18 07:37:27,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:27,685 INFO L93 Difference]: Finished difference Result 1259 states and 3029 transitions. [2020-04-18 07:37:27,685 INFO L276 IsEmpty]: Start isEmpty. Operand 1259 states and 3029 transitions. [2020-04-18 07:37:27,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:27,688 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 07:37:27,688 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:27,688 INFO L82 PathProgramCache]: Analyzing trace with hash -16657352, now seen corresponding path program 6 times [2020-04-18 07:37:27,688 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:27,689 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1803832414] [2020-04-18 07:37:27,689 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:27,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:27,726 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:27,726 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1803832414] [2020-04-18 07:37:27,726 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:27,726 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:37:27,726 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:27,729 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:27,748 INFO L259 McrAutomatonBuilder]: Finished intersection with 126 states and 267 transitions. [2020-04-18 07:37:27,748 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:27,893 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 3 times. [2020-04-18 07:37:27,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:37:27,895 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=627, Invalid=3155, Unknown=0, NotChecked=0, Total=3782 [2020-04-18 07:37:27,895 INFO L87 Difference]: Start difference. First operand 1259 states and 3029 transitions. Second operand 5 states. [2020-04-18 07:37:27,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:27,954 INFO L93 Difference]: Finished difference Result 1302 states and 3061 transitions. [2020-04-18 07:37:27,954 INFO L276 IsEmpty]: Start isEmpty. Operand 1302 states and 3061 transitions. [2020-04-18 07:37:27,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:27,957 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 07:37:27,957 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:27,958 INFO L82 PathProgramCache]: Analyzing trace with hash 683835636, now seen corresponding path program 7 times [2020-04-18 07:37:27,958 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:27,958 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1354911775] [2020-04-18 07:37:27,958 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:27,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:28,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:28,033 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1354911775] [2020-04-18 07:37:28,033 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:28,034 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:37:28,034 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:28,038 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:28,119 INFO L259 McrAutomatonBuilder]: Finished intersection with 124 states and 263 transitions. [2020-04-18 07:37:28,120 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:28,360 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 07:37:28,361 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-04-18 07:37:28,362 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=642, Invalid=3780, Unknown=0, NotChecked=0, Total=4422 [2020-04-18 07:37:28,363 INFO L87 Difference]: Start difference. First operand 1302 states and 3061 transitions. Second operand 8 states. [2020-04-18 07:37:28,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:28,518 INFO L93 Difference]: Finished difference Result 1359 states and 3152 transitions. [2020-04-18 07:37:28,518 INFO L276 IsEmpty]: Start isEmpty. Operand 1359 states and 3152 transitions. [2020-04-18 07:37:28,520 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:37:28,521 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [228709156] [2020-04-18 07:37:28,521 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:37:28,521 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4] total 4 [2020-04-18 07:37:28,521 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [228709156] [2020-04-18 07:37:28,521 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2020-04-18 07:37:28,522 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:37:28,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2020-04-18 07:37:28,523 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=664, Invalid=4166, Unknown=0, NotChecked=0, Total=4830 [2020-04-18 07:37:28,523 INFO L87 Difference]: Start difference. First operand 1028 states and 2692 transitions. Second operand 34 states. [2020-04-18 07:37:28,890 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 41 [2020-04-18 07:37:29,112 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 42 [2020-04-18 07:37:30,827 WARN L192 SmtUtils]: Spent 194.00 ms on a formula simplification. DAG size of input: 90 DAG size of output: 70 [2020-04-18 07:37:31,007 WARN L192 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 48 [2020-04-18 07:37:31,582 WARN L192 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 86 DAG size of output: 67 [2020-04-18 07:37:31,886 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 50 [2020-04-18 07:37:32,068 WARN L192 SmtUtils]: Spent 118.00 ms on a formula simplification. DAG size of input: 69 DAG size of output: 50 [2020-04-18 07:37:32,933 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 93 DAG size of output: 59 [2020-04-18 07:37:34,112 WARN L192 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 62 [2020-04-18 07:37:36,072 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 52 DAG size of output: 50 [2020-04-18 07:37:41,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:41,132 INFO L93 Difference]: Finished difference Result 2339 states and 5736 transitions. [2020-04-18 07:37:41,133 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 122 states. [2020-04-18 07:37:41,133 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 23 [2020-04-18 07:37:41,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:37:41,137 INFO L225 Difference]: With dead ends: 2339 [2020-04-18 07:37:41,137 INFO L226 Difference]: Without dead ends: 2339 [2020-04-18 07:37:41,139 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 315 GetRequests, 149 SyntacticMatches, 2 SemanticMatches, 164 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10637 ImplicationChecksByTransitivity, 10.3s TimeCoverageRelationStatistics Valid=3230, Invalid=24160, Unknown=0, NotChecked=0, Total=27390 [2020-04-18 07:37:41,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2339 states. [2020-04-18 07:37:41,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2339 to 1013. [2020-04-18 07:37:41,166 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1013 states. [2020-04-18 07:37:41,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1013 states to 1013 states and 2655 transitions. [2020-04-18 07:37:41,169 INFO L78 Accepts]: Start accepts. Automaton has 1013 states and 2655 transitions. Word has length 23 [2020-04-18 07:37:41,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:37:41,170 INFO L479 AbstractCegarLoop]: Abstraction has 1013 states and 2655 transitions. [2020-04-18 07:37:41,170 INFO L480 AbstractCegarLoop]: Interpolant automaton has 34 states. [2020-04-18 07:37:41,170 INFO L276 IsEmpty]: Start isEmpty. Operand 1013 states and 2655 transitions. [2020-04-18 07:37:41,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:41,222 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:37:41,222 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:37:41,222 INFO L427 AbstractCegarLoop]: === Iteration 18 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:37:41,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:41,223 INFO L82 PathProgramCache]: Analyzing trace with hash 597689859, now seen corresponding path program 1 times [2020-04-18 07:37:41,223 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:37:41,223 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [268200763] [2020-04-18 07:37:41,224 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:41,229 INFO L259 McrAutomatonBuilder]: Finished intersection with 362 states and 915 transitions. [2020-04-18 07:37:41,232 INFO L276 IsEmpty]: Start isEmpty. Operand 362 states. [2020-04-18 07:37:41,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:41,233 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:37:41,233 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:41,233 INFO L82 PathProgramCache]: Analyzing trace with hash -1287272803, now seen corresponding path program 2 times [2020-04-18 07:37:41,233 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:41,234 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2086144214] [2020-04-18 07:37:41,234 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:41,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:41,284 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:41,284 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2086144214] [2020-04-18 07:37:41,285 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:41,285 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 07:37:41,285 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:41,287 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:41,308 INFO L259 McrAutomatonBuilder]: Finished intersection with 129 states and 274 transitions. [2020-04-18 07:37:41,308 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:41,466 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 9 times. [2020-04-18 07:37:41,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 07:37:41,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2020-04-18 07:37:41,467 INFO L87 Difference]: Start difference. First operand 362 states. Second operand 9 states. [2020-04-18 07:37:41,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:41,661 INFO L93 Difference]: Finished difference Result 496 states and 1240 transitions. [2020-04-18 07:37:41,661 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 1240 transitions. [2020-04-18 07:37:41,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:41,663 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:37:41,663 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:41,663 INFO L82 PathProgramCache]: Analyzing trace with hash -475009189, now seen corresponding path program 3 times [2020-04-18 07:37:41,663 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:41,664 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [270431812] [2020-04-18 07:37:41,664 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:41,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:41,691 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:41,691 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [270431812] [2020-04-18 07:37:41,691 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:41,692 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:37:41,692 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:41,694 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:41,718 INFO L259 McrAutomatonBuilder]: Finished intersection with 147 states and 327 transitions. [2020-04-18 07:37:41,718 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:41,750 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 07:37:41,750 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-04-18 07:37:41,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2020-04-18 07:37:41,750 INFO L87 Difference]: Start difference. First operand 496 states and 1240 transitions. Second operand 4 states. [2020-04-18 07:37:41,761 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:41,761 INFO L93 Difference]: Finished difference Result 507 states and 1249 transitions. [2020-04-18 07:37:41,762 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 1249 transitions. [2020-04-18 07:37:41,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2020-04-18 07:37:41,763 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:37:41,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:41,763 INFO L82 PathProgramCache]: Analyzing trace with hash -1283490643, now seen corresponding path program 4 times [2020-04-18 07:37:41,763 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:41,763 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1687861487] [2020-04-18 07:37:41,764 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:41,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:41,808 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:37:41,808 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1687861487] [2020-04-18 07:37:41,808 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:41,809 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 07:37:41,809 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:41,813 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:41,832 INFO L259 McrAutomatonBuilder]: Finished intersection with 127 states and 275 transitions. [2020-04-18 07:37:41,832 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:41,945 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 7 times. [2020-04-18 07:37:41,945 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 07:37:41,945 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2020-04-18 07:37:41,946 INFO L87 Difference]: Start difference. First operand 507 states and 1249 transitions. Second operand 7 states. [2020-04-18 07:37:41,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:41,998 INFO L93 Difference]: Finished difference Result 507 states and 1249 transitions. [2020-04-18 07:37:41,999 INFO L276 IsEmpty]: Start isEmpty. Operand 507 states and 1249 transitions. [2020-04-18 07:37:42,000 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:37:42,000 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [268200763] [2020-04-18 07:37:42,000 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:37:42,001 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 07:37:42,001 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [268200763] [2020-04-18 07:37:42,001 INFO L459 AbstractCegarLoop]: Interpolant automaton has 15 states [2020-04-18 07:37:42,001 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:37:42,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2020-04-18 07:37:42,002 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2020-04-18 07:37:42,002 INFO L87 Difference]: Start difference. First operand 1013 states and 2655 transitions. Second operand 15 states. [2020-04-18 07:37:43,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:43,290 INFO L93 Difference]: Finished difference Result 1221 states and 3209 transitions. [2020-04-18 07:37:43,290 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2020-04-18 07:37:43,291 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 23 [2020-04-18 07:37:43,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:37:43,293 INFO L225 Difference]: With dead ends: 1221 [2020-04-18 07:37:43,293 INFO L226 Difference]: Without dead ends: 1164 [2020-04-18 07:37:43,294 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 107 GetRequests, 71 SyntacticMatches, 1 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 250 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=243, Invalid=1089, Unknown=0, NotChecked=0, Total=1332 [2020-04-18 07:37:43,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1164 states. [2020-04-18 07:37:43,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1164 to 964. [2020-04-18 07:37:43,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 964 states. [2020-04-18 07:37:43,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 964 states to 964 states and 2492 transitions. [2020-04-18 07:37:43,311 INFO L78 Accepts]: Start accepts. Automaton has 964 states and 2492 transitions. Word has length 23 [2020-04-18 07:37:43,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:37:43,312 INFO L479 AbstractCegarLoop]: Abstraction has 964 states and 2492 transitions. [2020-04-18 07:37:43,312 INFO L480 AbstractCegarLoop]: Interpolant automaton has 15 states. [2020-04-18 07:37:43,312 INFO L276 IsEmpty]: Start isEmpty. Operand 964 states and 2492 transitions. [2020-04-18 07:37:43,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2020-04-18 07:37:43,314 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:37:43,314 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:37:43,314 INFO L427 AbstractCegarLoop]: === Iteration 19 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:37:43,314 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:43,315 INFO L82 PathProgramCache]: Analyzing trace with hash 336198431, now seen corresponding path program 1 times [2020-04-18 07:37:43,315 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:37:43,315 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1739001797] [2020-04-18 07:37:43,316 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:43,322 INFO L259 McrAutomatonBuilder]: Finished intersection with 434 states and 1112 transitions. [2020-04-18 07:37:43,325 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states. [2020-04-18 07:37:43,326 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2020-04-18 07:37:43,326 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:37:43,326 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:43,327 INFO L82 PathProgramCache]: Analyzing trace with hash 1354037933, now seen corresponding path program 2 times [2020-04-18 07:37:43,327 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:43,327 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2088106185] [2020-04-18 07:37:43,327 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:43,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:43,380 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2020-04-18 07:37:43,381 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2088106185] [2020-04-18 07:37:43,381 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:43,381 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:37:43,381 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:43,383 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:43,401 INFO L259 McrAutomatonBuilder]: Finished intersection with 141 states and 303 transitions. [2020-04-18 07:37:43,401 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:43,420 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 07:37:43,420 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2020-04-18 07:37:43,420 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2020-04-18 07:37:43,421 INFO L87 Difference]: Start difference. First operand 434 states. Second operand 5 states. [2020-04-18 07:37:43,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:43,514 INFO L93 Difference]: Finished difference Result 682 states and 1710 transitions. [2020-04-18 07:37:43,515 INFO L276 IsEmpty]: Start isEmpty. Operand 682 states and 1710 transitions. [2020-04-18 07:37:43,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2020-04-18 07:37:43,516 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:37:43,517 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:43,517 INFO L82 PathProgramCache]: Analyzing trace with hash -382528403, now seen corresponding path program 3 times [2020-04-18 07:37:43,517 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:43,517 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441735989] [2020-04-18 07:37:43,518 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:43,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:43,674 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2020-04-18 07:37:43,674 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [441735989] [2020-04-18 07:37:43,674 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:43,675 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2020-04-18 07:37:43,675 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:43,677 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:43,696 INFO L259 McrAutomatonBuilder]: Finished intersection with 115 states and 241 transitions. [2020-04-18 07:37:43,696 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:44,378 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 24 times. [2020-04-18 07:37:44,379 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2020-04-18 07:37:44,379 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=378, Unknown=0, NotChecked=0, Total=462 [2020-04-18 07:37:44,379 INFO L87 Difference]: Start difference. First operand 682 states and 1710 transitions. Second operand 18 states. [2020-04-18 07:37:47,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:47,344 INFO L93 Difference]: Finished difference Result 950 states and 2348 transitions. [2020-04-18 07:37:47,344 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 2348 transitions. [2020-04-18 07:37:47,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2020-04-18 07:37:47,346 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:37:47,346 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:47,347 INFO L82 PathProgramCache]: Analyzing trace with hash 1472024725, now seen corresponding path program 4 times [2020-04-18 07:37:47,347 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:47,347 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696143017] [2020-04-18 07:37:47,347 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:47,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:47,380 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2020-04-18 07:37:47,380 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1696143017] [2020-04-18 07:37:47,380 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:47,380 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:37:47,381 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:47,383 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:47,410 INFO L259 McrAutomatonBuilder]: Finished intersection with 164 states and 362 transitions. [2020-04-18 07:37:47,410 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:47,524 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 07:37:47,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2020-04-18 07:37:47,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=415, Invalid=1477, Unknown=0, NotChecked=0, Total=1892 [2020-04-18 07:37:47,525 INFO L87 Difference]: Start difference. First operand 950 states and 2348 transitions. Second operand 6 states. [2020-04-18 07:37:47,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:47,630 INFO L93 Difference]: Finished difference Result 967 states and 2360 transitions. [2020-04-18 07:37:47,630 INFO L276 IsEmpty]: Start isEmpty. Operand 967 states and 2360 transitions. [2020-04-18 07:37:47,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2020-04-18 07:37:47,632 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 07:37:47,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:47,633 INFO L82 PathProgramCache]: Analyzing trace with hash -2122449583, now seen corresponding path program 5 times [2020-04-18 07:37:47,633 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:47,633 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [923112914] [2020-04-18 07:37:47,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:47,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:47,681 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2020-04-18 07:37:47,682 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [923112914] [2020-04-18 07:37:47,682 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:47,682 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:37:47,682 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:47,684 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:47,705 INFO L259 McrAutomatonBuilder]: Finished intersection with 165 states and 367 transitions. [2020-04-18 07:37:47,705 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:47,861 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 07:37:47,862 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-04-18 07:37:47,862 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=439, Invalid=2011, Unknown=0, NotChecked=0, Total=2450 [2020-04-18 07:37:47,862 INFO L87 Difference]: Start difference. First operand 967 states and 2360 transitions. Second operand 8 states. [2020-04-18 07:37:48,179 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:48,179 INFO L93 Difference]: Finished difference Result 1115 states and 2704 transitions. [2020-04-18 07:37:48,179 INFO L276 IsEmpty]: Start isEmpty. Operand 1115 states and 2704 transitions. [2020-04-18 07:37:48,181 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:37:48,181 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1739001797] [2020-04-18 07:37:48,181 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:37:48,182 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4] total 4 [2020-04-18 07:37:48,182 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1739001797] [2020-04-18 07:37:48,182 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2020-04-18 07:37:48,182 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:37:48,182 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2020-04-18 07:37:48,183 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=474, Invalid=2496, Unknown=0, NotChecked=0, Total=2970 [2020-04-18 07:37:48,183 INFO L87 Difference]: Start difference. First operand 964 states and 2492 transitions. Second operand 30 states. [2020-04-18 07:37:49,794 WARN L192 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 65 [2020-04-18 07:37:50,497 WARN L192 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 58 [2020-04-18 07:37:52,512 WARN L192 SmtUtils]: Spent 192.00 ms on a formula simplification that was a NOOP. DAG size: 67 [2020-04-18 07:37:52,725 WARN L192 SmtUtils]: Spent 152.00 ms on a formula simplification that was a NOOP. DAG size: 67 [2020-04-18 07:37:52,969 WARN L192 SmtUtils]: Spent 188.00 ms on a formula simplification that was a NOOP. DAG size: 70 [2020-04-18 07:37:55,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:55,803 INFO L93 Difference]: Finished difference Result 1832 states and 4499 transitions. [2020-04-18 07:37:55,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 77 states. [2020-04-18 07:37:55,804 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 24 [2020-04-18 07:37:55,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:37:55,807 INFO L225 Difference]: With dead ends: 1832 [2020-04-18 07:37:55,807 INFO L226 Difference]: Without dead ends: 1828 [2020-04-18 07:37:55,809 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 223 GetRequests, 101 SyntacticMatches, 4 SemanticMatches, 118 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5003 ImplicationChecksByTransitivity, 5.9s TimeCoverageRelationStatistics Valid=2172, Invalid=12108, Unknown=0, NotChecked=0, Total=14280 [2020-04-18 07:37:55,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1828 states. [2020-04-18 07:37:55,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1828 to 928. [2020-04-18 07:37:55,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 928 states. [2020-04-18 07:37:55,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 928 states to 928 states and 2393 transitions. [2020-04-18 07:37:55,827 INFO L78 Accepts]: Start accepts. Automaton has 928 states and 2393 transitions. Word has length 24 [2020-04-18 07:37:55,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:37:55,828 INFO L479 AbstractCegarLoop]: Abstraction has 928 states and 2393 transitions. [2020-04-18 07:37:55,828 INFO L480 AbstractCegarLoop]: Interpolant automaton has 30 states. [2020-04-18 07:37:55,828 INFO L276 IsEmpty]: Start isEmpty. Operand 928 states and 2393 transitions. [2020-04-18 07:37:55,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2020-04-18 07:37:55,830 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:37:55,830 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:37:55,830 INFO L427 AbstractCegarLoop]: === Iteration 20 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:37:55,830 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:55,830 INFO L82 PathProgramCache]: Analyzing trace with hash -1949684456, now seen corresponding path program 1 times [2020-04-18 07:37:55,831 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:37:55,831 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [2135684047] [2020-04-18 07:37:55,832 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:55,836 INFO L259 McrAutomatonBuilder]: Finished intersection with 434 states and 1112 transitions. [2020-04-18 07:37:55,837 INFO L276 IsEmpty]: Start isEmpty. Operand 434 states. [2020-04-18 07:37:55,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2020-04-18 07:37:55,838 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:37:55,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:55,839 INFO L82 PathProgramCache]: Analyzing trace with hash 632359322, now seen corresponding path program 2 times [2020-04-18 07:37:55,839 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:55,839 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1524772015] [2020-04-18 07:37:55,839 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:55,846 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:55,889 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2020-04-18 07:37:55,889 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1524772015] [2020-04-18 07:37:55,890 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:55,890 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2020-04-18 07:37:55,890 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:55,892 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:55,916 INFO L259 McrAutomatonBuilder]: Finished intersection with 140 states and 300 transitions. [2020-04-18 07:37:55,917 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:56,075 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 12 times. [2020-04-18 07:37:56,075 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2020-04-18 07:37:56,075 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2020-04-18 07:37:56,076 INFO L87 Difference]: Start difference. First operand 434 states. Second operand 11 states. [2020-04-18 07:37:57,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:37:57,735 INFO L93 Difference]: Finished difference Result 720 states and 1823 transitions. [2020-04-18 07:37:57,735 INFO L276 IsEmpty]: Start isEmpty. Operand 720 states and 1823 transitions. [2020-04-18 07:37:57,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2020-04-18 07:37:57,737 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:37:57,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:37:57,737 INFO L82 PathProgramCache]: Analyzing trace with hash 2025968682, now seen corresponding path program 3 times [2020-04-18 07:37:57,738 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:37:57,738 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1427498484] [2020-04-18 07:37:57,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:37:57,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:37:57,828 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2020-04-18 07:37:57,828 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1427498484] [2020-04-18 07:37:57,828 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:37:57,828 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2020-04-18 07:37:57,828 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:37:57,830 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:37:57,849 INFO L259 McrAutomatonBuilder]: Finished intersection with 119 states and 249 transitions. [2020-04-18 07:37:57,850 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:37:59,690 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 44 times. [2020-04-18 07:37:59,690 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2020-04-18 07:37:59,691 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=298, Invalid=2252, Unknown=0, NotChecked=0, Total=2550 [2020-04-18 07:37:59,691 INFO L87 Difference]: Start difference. First operand 720 states and 1823 transitions. Second operand 32 states. [2020-04-18 07:38:02,606 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 30 [2020-04-18 07:38:03,560 WARN L192 SmtUtils]: Spent 137.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 30 [2020-04-18 07:38:03,772 WARN L192 SmtUtils]: Spent 105.00 ms on a formula simplification. DAG size of input: 40 DAG size of output: 30 [2020-04-18 07:38:04,235 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 30 [2020-04-18 07:38:05,126 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 30 [2020-04-18 07:38:06,029 WARN L192 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 30 [2020-04-18 07:38:06,902 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 34 DAG size of output: 32 [2020-04-18 07:38:08,592 WARN L192 SmtUtils]: Spent 176.00 ms on a formula simplification. DAG size of input: 38 DAG size of output: 34 [2020-04-18 07:38:09,531 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 33 [2020-04-18 07:38:09,945 WARN L192 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 33 DAG size of output: 30 [2020-04-18 07:38:10,231 WARN L192 SmtUtils]: Spent 151.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 33 [2020-04-18 07:38:11,957 WARN L192 SmtUtils]: Spent 192.00 ms on a formula simplification. DAG size of input: 36 DAG size of output: 35 [2020-04-18 07:38:13,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:13,462 INFO L93 Difference]: Finished difference Result 1070 states and 2709 transitions. [2020-04-18 07:38:13,462 INFO L276 IsEmpty]: Start isEmpty. Operand 1070 states and 2709 transitions. [2020-04-18 07:38:13,464 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2020-04-18 07:38:13,465 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:38:13,465 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:13,465 INFO L82 PathProgramCache]: Analyzing trace with hash -1374989988, now seen corresponding path program 4 times [2020-04-18 07:38:13,465 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:38:13,466 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1337644482] [2020-04-18 07:38:13,466 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:38:13,475 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:38:13,494 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2020-04-18 07:38:13,494 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1337644482] [2020-04-18 07:38:13,494 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:38:13,494 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:38:13,495 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:38:13,497 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:13,527 INFO L259 McrAutomatonBuilder]: Finished intersection with 158 states and 348 transitions. [2020-04-18 07:38:13,527 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:38:13,717 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 07:38:13,718 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2020-04-18 07:38:13,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1606, Invalid=9106, Unknown=0, NotChecked=0, Total=10712 [2020-04-18 07:38:13,719 INFO L87 Difference]: Start difference. First operand 1070 states and 2709 transitions. Second operand 6 states. [2020-04-18 07:38:13,834 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:13,834 INFO L93 Difference]: Finished difference Result 1089 states and 2724 transitions. [2020-04-18 07:38:13,835 INFO L276 IsEmpty]: Start isEmpty. Operand 1089 states and 2724 transitions. [2020-04-18 07:38:13,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2020-04-18 07:38:13,836 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 07:38:13,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:13,837 INFO L82 PathProgramCache]: Analyzing trace with hash -674497000, now seen corresponding path program 5 times [2020-04-18 07:38:13,837 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:38:13,837 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [57229195] [2020-04-18 07:38:13,838 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:38:13,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:38:13,922 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2020-04-18 07:38:13,923 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [57229195] [2020-04-18 07:38:13,923 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:38:13,923 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:38:13,923 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:38:13,926 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:13,956 INFO L259 McrAutomatonBuilder]: Finished intersection with 153 states and 336 transitions. [2020-04-18 07:38:13,956 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:38:14,263 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 5 times. [2020-04-18 07:38:14,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2020-04-18 07:38:14,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1640, Invalid=10570, Unknown=0, NotChecked=0, Total=12210 [2020-04-18 07:38:14,264 INFO L87 Difference]: Start difference. First operand 1089 states and 2724 transitions. Second operand 8 states. [2020-04-18 07:38:14,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:14,932 INFO L93 Difference]: Finished difference Result 1307 states and 3178 transitions. [2020-04-18 07:38:14,932 INFO L276 IsEmpty]: Start isEmpty. Operand 1307 states and 3178 transitions. [2020-04-18 07:38:14,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2020-04-18 07:38:14,934 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 07:38:14,935 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:14,935 INFO L82 PathProgramCache]: Analyzing trace with hash -45412586, now seen corresponding path program 6 times [2020-04-18 07:38:14,935 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:38:14,935 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616653310] [2020-04-18 07:38:14,935 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:38:14,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:38:14,984 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2020-04-18 07:38:14,985 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616653310] [2020-04-18 07:38:14,985 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:38:14,985 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2020-04-18 07:38:14,986 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:38:15,030 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:15,046 INFO L259 McrAutomatonBuilder]: Finished intersection with 127 states and 267 transitions. [2020-04-18 07:38:15,046 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:38:15,441 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 8 times. [2020-04-18 07:38:15,441 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2020-04-18 07:38:15,442 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1749, Invalid=13503, Unknown=0, NotChecked=0, Total=15252 [2020-04-18 07:38:15,442 INFO L87 Difference]: Start difference. First operand 1307 states and 3178 transitions. Second operand 10 states. [2020-04-18 07:38:15,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:15,933 INFO L93 Difference]: Finished difference Result 1353 states and 3275 transitions. [2020-04-18 07:38:15,933 INFO L276 IsEmpty]: Start isEmpty. Operand 1353 states and 3275 transitions. [2020-04-18 07:38:15,936 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:38:15,936 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [2135684047] [2020-04-18 07:38:15,936 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:38:15,936 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3] total 3 [2020-04-18 07:38:15,936 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [2135684047] [2020-04-18 07:38:15,937 INFO L459 AbstractCegarLoop]: Interpolant automaton has 56 states [2020-04-18 07:38:15,937 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:38:15,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2020-04-18 07:38:15,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1813, Invalid=14957, Unknown=0, NotChecked=0, Total=16770 [2020-04-18 07:38:15,938 INFO L87 Difference]: Start difference. First operand 928 states and 2393 transitions. Second operand 56 states. [2020-04-18 07:38:18,132 WARN L192 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 61 [2020-04-18 07:38:19,046 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 57 [2020-04-18 07:38:19,467 WARN L192 SmtUtils]: Spent 108.00 ms on a formula simplification. DAG size of input: 44 DAG size of output: 38 [2020-04-18 07:38:20,026 WARN L192 SmtUtils]: Spent 166.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 61 [2020-04-18 07:38:21,772 WARN L192 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 43 DAG size of output: 38 [2020-04-18 07:38:23,411 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 56 [2020-04-18 07:38:26,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:26,443 INFO L93 Difference]: Finished difference Result 1580 states and 3912 transitions. [2020-04-18 07:38:26,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 88 states. [2020-04-18 07:38:26,444 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 24 [2020-04-18 07:38:26,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:38:26,447 INFO L225 Difference]: With dead ends: 1580 [2020-04-18 07:38:26,447 INFO L226 Difference]: Without dead ends: 1580 [2020-04-18 07:38:26,450 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 345 GetRequests, 144 SyntacticMatches, 1 SemanticMatches, 200 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16228 ImplicationChecksByTransitivity, 13.3s TimeCoverageRelationStatistics Valid=4678, Invalid=35924, Unknown=0, NotChecked=0, Total=40602 [2020-04-18 07:38:26,453 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1580 states. [2020-04-18 07:38:26,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1580 to 796. [2020-04-18 07:38:26,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 796 states. [2020-04-18 07:38:26,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 796 states to 796 states and 2019 transitions. [2020-04-18 07:38:26,468 INFO L78 Accepts]: Start accepts. Automaton has 796 states and 2019 transitions. Word has length 24 [2020-04-18 07:38:26,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:38:26,468 INFO L479 AbstractCegarLoop]: Abstraction has 796 states and 2019 transitions. [2020-04-18 07:38:26,468 INFO L480 AbstractCegarLoop]: Interpolant automaton has 56 states. [2020-04-18 07:38:26,468 INFO L276 IsEmpty]: Start isEmpty. Operand 796 states and 2019 transitions. [2020-04-18 07:38:26,470 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:38:26,470 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:38:26,470 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:38:26,470 INFO L427 AbstractCegarLoop]: === Iteration 21 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:38:26,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:26,471 INFO L82 PathProgramCache]: Analyzing trace with hash -1479560372, now seen corresponding path program 1 times [2020-04-18 07:38:26,471 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:38:26,471 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [448834459] [2020-04-18 07:38:26,472 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:26,482 INFO L259 McrAutomatonBuilder]: Finished intersection with 541 states and 1388 transitions. [2020-04-18 07:38:26,485 INFO L276 IsEmpty]: Start isEmpty. Operand 541 states. [2020-04-18 07:38:26,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:38:26,487 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:38:26,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:26,487 INFO L82 PathProgramCache]: Analyzing trace with hash -2108318316, now seen corresponding path program 2 times [2020-04-18 07:38:26,488 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:38:26,488 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [465130774] [2020-04-18 07:38:26,488 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:38:26,497 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:38:26,529 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:38:26,530 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [465130774] [2020-04-18 07:38:26,530 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:38:26,530 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2020-04-18 07:38:26,530 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:38:26,533 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:26,556 INFO L259 McrAutomatonBuilder]: Finished intersection with 122 states and 240 transitions. [2020-04-18 07:38:26,556 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:38:26,567 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 1 times. [2020-04-18 07:38:26,567 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-04-18 07:38:26,567 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2020-04-18 07:38:26,568 INFO L87 Difference]: Start difference. First operand 541 states. Second operand 4 states. [2020-04-18 07:38:26,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:26,597 INFO L93 Difference]: Finished difference Result 625 states and 1537 transitions. [2020-04-18 07:38:26,598 INFO L276 IsEmpty]: Start isEmpty. Operand 625 states and 1537 transitions. [2020-04-18 07:38:26,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:38:26,599 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:38:26,599 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:26,600 INFO L82 PathProgramCache]: Analyzing trace with hash -1479560372, now seen corresponding path program 3 times [2020-04-18 07:38:26,600 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:38:26,600 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [750174995] [2020-04-18 07:38:26,600 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:38:26,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:38:26,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:38:26,713 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [750174995] [2020-04-18 07:38:26,713 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:38:26,714 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2020-04-18 07:38:26,714 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:38:26,716 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:26,730 INFO L259 McrAutomatonBuilder]: Finished intersection with 97 states and 188 transitions. [2020-04-18 07:38:26,730 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:38:26,821 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 07:38:26,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 07:38:26,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=173, Unknown=0, NotChecked=0, Total=210 [2020-04-18 07:38:26,822 INFO L87 Difference]: Start difference. First operand 625 states and 1537 transitions. Second operand 12 states. [2020-04-18 07:38:28,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:28,492 INFO L93 Difference]: Finished difference Result 820 states and 1908 transitions. [2020-04-18 07:38:28,492 INFO L276 IsEmpty]: Start isEmpty. Operand 820 states and 1908 transitions. [2020-04-18 07:38:28,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:38:28,494 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:38:28,494 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:28,495 INFO L82 PathProgramCache]: Analyzing trace with hash 1190093692, now seen corresponding path program 4 times [2020-04-18 07:38:28,495 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:38:28,495 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810329502] [2020-04-18 07:38:28,495 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:38:28,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:38:28,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:38:28,593 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1810329502] [2020-04-18 07:38:28,593 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:38:28,593 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2020-04-18 07:38:28,594 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:38:28,597 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:28,612 INFO L259 McrAutomatonBuilder]: Finished intersection with 105 states and 210 transitions. [2020-04-18 07:38:28,612 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:38:28,630 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 6 times. [2020-04-18 07:38:28,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2020-04-18 07:38:28,631 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=489, Invalid=2061, Unknown=0, NotChecked=0, Total=2550 [2020-04-18 07:38:28,631 INFO L87 Difference]: Start difference. First operand 820 states and 1908 transitions. Second operand 12 states. [2020-04-18 07:38:29,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:29,943 INFO L93 Difference]: Finished difference Result 1068 states and 2378 transitions. [2020-04-18 07:38:29,943 INFO L276 IsEmpty]: Start isEmpty. Operand 1068 states and 2378 transitions. [2020-04-18 07:38:29,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:38:29,946 INFO L105 Mcr]: ---- MCR iteration 3 ---- [2020-04-18 07:38:29,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:29,946 INFO L82 PathProgramCache]: Analyzing trace with hash 70430570, now seen corresponding path program 5 times [2020-04-18 07:38:29,946 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:38:29,947 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471596849] [2020-04-18 07:38:29,947 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:38:29,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:38:30,009 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:38:30,010 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [471596849] [2020-04-18 07:38:30,010 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:38:30,010 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 07:38:30,010 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:38:30,013 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:30,035 INFO L259 McrAutomatonBuilder]: Finished intersection with 100 states and 198 transitions. [2020-04-18 07:38:30,035 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:38:30,132 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 0 times. [2020-04-18 07:38:30,132 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2020-04-18 07:38:30,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=633, Invalid=3273, Unknown=0, NotChecked=0, Total=3906 [2020-04-18 07:38:30,133 INFO L87 Difference]: Start difference. First operand 1068 states and 2378 transitions. Second operand 7 states. [2020-04-18 07:38:30,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:30,296 INFO L93 Difference]: Finished difference Result 1403 states and 3109 transitions. [2020-04-18 07:38:30,296 INFO L276 IsEmpty]: Start isEmpty. Operand 1403 states and 3109 transitions. [2020-04-18 07:38:30,298 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:38:30,298 INFO L105 Mcr]: ---- MCR iteration 4 ---- [2020-04-18 07:38:30,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:30,299 INFO L82 PathProgramCache]: Analyzing trace with hash -1570740908, now seen corresponding path program 6 times [2020-04-18 07:38:30,299 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:38:30,299 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1971848717] [2020-04-18 07:38:30,300 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:38:30,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:38:30,367 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:38:30,367 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1971848717] [2020-04-18 07:38:30,367 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:38:30,367 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 07:38:30,368 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:38:30,371 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:30,390 INFO L259 McrAutomatonBuilder]: Finished intersection with 98 states and 182 transitions. [2020-04-18 07:38:30,391 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:38:31,878 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 22 times. [2020-04-18 07:38:31,879 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2020-04-18 07:38:31,879 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=735, Invalid=5427, Unknown=0, NotChecked=0, Total=6162 [2020-04-18 07:38:31,879 INFO L87 Difference]: Start difference. First operand 1403 states and 3109 transitions. Second operand 19 states. [2020-04-18 07:38:32,149 WARN L192 SmtUtils]: Spent 107.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 44 [2020-04-18 07:38:32,335 WARN L192 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 40 [2020-04-18 07:38:32,670 WARN L192 SmtUtils]: Spent 183.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 78 [2020-04-18 07:38:33,582 WARN L192 SmtUtils]: Spent 102.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 46 [2020-04-18 07:38:33,761 WARN L192 SmtUtils]: Spent 130.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 71 [2020-04-18 07:38:35,383 WARN L192 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 42 [2020-04-18 07:38:35,949 WARN L192 SmtUtils]: Spent 172.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 75 [2020-04-18 07:38:36,257 WARN L192 SmtUtils]: Spent 109.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 36 [2020-04-18 07:38:37,196 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 49 [2020-04-18 07:38:37,798 WARN L192 SmtUtils]: Spent 161.00 ms on a formula simplification. DAG size of input: 66 DAG size of output: 65 [2020-04-18 07:38:39,108 WARN L192 SmtUtils]: Spent 110.00 ms on a formula simplification that was a NOOP. DAG size: 74 [2020-04-18 07:38:39,582 WARN L192 SmtUtils]: Spent 103.00 ms on a formula simplification. DAG size of input: 62 DAG size of output: 46 [2020-04-18 07:38:39,889 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 62 [2020-04-18 07:38:40,163 WARN L192 SmtUtils]: Spent 185.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 80 [2020-04-18 07:38:41,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:41,260 INFO L93 Difference]: Finished difference Result 2579 states and 5592 transitions. [2020-04-18 07:38:41,260 INFO L276 IsEmpty]: Start isEmpty. Operand 2579 states and 5592 transitions. [2020-04-18 07:38:41,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:38:41,263 INFO L105 Mcr]: ---- MCR iteration 5 ---- [2020-04-18 07:38:41,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:41,264 INFO L82 PathProgramCache]: Analyzing trace with hash 587113784, now seen corresponding path program 7 times [2020-04-18 07:38:41,264 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:38:41,264 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1680412943] [2020-04-18 07:38:41,265 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:38:41,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:38:41,289 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:38:41,290 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1680412943] [2020-04-18 07:38:41,290 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:38:41,290 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:38:41,290 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:38:41,292 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:41,305 INFO L259 McrAutomatonBuilder]: Finished intersection with 70 states and 118 transitions. [2020-04-18 07:38:41,305 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:38:41,382 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 07:38:41,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2020-04-18 07:38:41,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1470, Invalid=12336, Unknown=0, NotChecked=0, Total=13806 [2020-04-18 07:38:41,383 INFO L87 Difference]: Start difference. First operand 2579 states and 5592 transitions. Second operand 4 states. [2020-04-18 07:38:41,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:41,428 INFO L93 Difference]: Finished difference Result 2747 states and 5948 transitions. [2020-04-18 07:38:41,428 INFO L276 IsEmpty]: Start isEmpty. Operand 2747 states and 5948 transitions. [2020-04-18 07:38:41,431 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:38:41,432 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [448834459] [2020-04-18 07:38:41,432 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:38:41,432 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4] total 4 [2020-04-18 07:38:41,433 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [448834459] [2020-04-18 07:38:41,433 INFO L459 AbstractCegarLoop]: Interpolant automaton has 34 states [2020-04-18 07:38:41,433 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:38:41,433 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2020-04-18 07:38:41,434 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1501, Invalid=12541, Unknown=0, NotChecked=0, Total=14042 [2020-04-18 07:38:41,434 INFO L87 Difference]: Start difference. First operand 796 states and 2019 transitions. Second operand 34 states. [2020-04-18 07:38:42,398 WARN L192 SmtUtils]: Spent 244.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 56 [2020-04-18 07:38:43,711 WARN L192 SmtUtils]: Spent 123.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 49 [2020-04-18 07:38:43,873 WARN L192 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 48 [2020-04-18 07:38:44,872 WARN L192 SmtUtils]: Spent 240.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 72 [2020-04-18 07:38:45,253 WARN L192 SmtUtils]: Spent 254.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 72 [2020-04-18 07:38:45,584 WARN L192 SmtUtils]: Spent 238.00 ms on a formula simplification that was a NOOP. DAG size: 73 [2020-04-18 07:38:45,959 WARN L192 SmtUtils]: Spent 101.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 54 [2020-04-18 07:38:49,224 WARN L192 SmtUtils]: Spent 149.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 57 [2020-04-18 07:38:49,478 WARN L192 SmtUtils]: Spent 140.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 55 [2020-04-18 07:38:49,732 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 49 [2020-04-18 07:38:51,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:51,746 INFO L93 Difference]: Finished difference Result 1870 states and 4420 transitions. [2020-04-18 07:38:51,746 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 128 states. [2020-04-18 07:38:51,747 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 28 [2020-04-18 07:38:51,747 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:38:51,749 INFO L225 Difference]: With dead ends: 1870 [2020-04-18 07:38:51,749 INFO L226 Difference]: Without dead ends: 1479 [2020-04-18 07:38:51,753 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 510 GetRequests, 270 SyntacticMatches, 3 SemanticMatches, 237 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22520 ImplicationChecksByTransitivity, 13.6s TimeCoverageRelationStatistics Valid=6887, Invalid=49995, Unknown=0, NotChecked=0, Total=56882 [2020-04-18 07:38:51,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1479 states. [2020-04-18 07:38:51,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1479 to 603. [2020-04-18 07:38:51,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 603 states. [2020-04-18 07:38:51,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 603 states to 603 states and 1500 transitions. [2020-04-18 07:38:51,763 INFO L78 Accepts]: Start accepts. Automaton has 603 states and 1500 transitions. Word has length 28 [2020-04-18 07:38:51,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:38:51,763 INFO L479 AbstractCegarLoop]: Abstraction has 603 states and 1500 transitions. [2020-04-18 07:38:51,764 INFO L480 AbstractCegarLoop]: Interpolant automaton has 34 states. [2020-04-18 07:38:51,764 INFO L276 IsEmpty]: Start isEmpty. Operand 603 states and 1500 transitions. [2020-04-18 07:38:51,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:38:51,765 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:38:51,765 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:38:51,765 INFO L427 AbstractCegarLoop]: === Iteration 22 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:38:51,765 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:51,765 INFO L82 PathProgramCache]: Analyzing trace with hash -1057851644, now seen corresponding path program 1 times [2020-04-18 07:38:51,766 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:38:51,766 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [534858440] [2020-04-18 07:38:51,767 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:51,772 INFO L259 McrAutomatonBuilder]: Finished intersection with 537 states and 1380 transitions. [2020-04-18 07:38:51,775 INFO L276 IsEmpty]: Start isEmpty. Operand 537 states. [2020-04-18 07:38:51,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:38:51,776 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:38:51,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:51,776 INFO L82 PathProgramCache]: Analyzing trace with hash -1057851644, now seen corresponding path program 2 times [2020-04-18 07:38:51,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:38:51,776 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1381074929] [2020-04-18 07:38:51,776 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:38:51,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:38:51,824 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:38:51,824 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1381074929] [2020-04-18 07:38:51,824 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:38:51,825 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:38:51,825 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:38:51,828 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:51,842 INFO L259 McrAutomatonBuilder]: Finished intersection with 76 states and 130 transitions. [2020-04-18 07:38:51,842 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:38:51,869 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 07:38:51,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2020-04-18 07:38:51,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2020-04-18 07:38:51,870 INFO L87 Difference]: Start difference. First operand 537 states. Second operand 6 states. [2020-04-18 07:38:51,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:38:51,908 INFO L93 Difference]: Finished difference Result 687 states and 1745 transitions. [2020-04-18 07:38:51,908 INFO L276 IsEmpty]: Start isEmpty. Operand 687 states and 1745 transitions. [2020-04-18 07:38:51,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:38:51,909 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:38:51,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:38:51,910 INFO L82 PathProgramCache]: Analyzing trace with hash -1444003196, now seen corresponding path program 3 times [2020-04-18 07:38:51,910 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:38:51,910 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1684916607] [2020-04-18 07:38:51,910 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:38:51,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:38:51,974 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:38:51,975 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1684916607] [2020-04-18 07:38:51,975 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:38:51,975 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 07:38:51,975 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:38:51,978 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:38:51,996 INFO L259 McrAutomatonBuilder]: Finished intersection with 90 states and 166 transitions. [2020-04-18 07:38:51,997 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:38:52,725 WARN L192 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 63 [2020-04-18 07:38:52,874 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 56 DAG size of output: 56 [2020-04-18 07:38:53,141 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 17 times. [2020-04-18 07:38:53,142 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2020-04-18 07:38:53,142 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=94, Invalid=412, Unknown=0, NotChecked=0, Total=506 [2020-04-18 07:38:53,142 INFO L87 Difference]: Start difference. First operand 687 states and 1745 transitions. Second operand 18 states. [2020-04-18 07:38:53,542 WARN L192 SmtUtils]: Spent 182.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 54 [2020-04-18 07:38:53,879 WARN L192 SmtUtils]: Spent 223.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 49 [2020-04-18 07:38:54,028 WARN L192 SmtUtils]: Spent 124.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 51 [2020-04-18 07:38:54,254 WARN L192 SmtUtils]: Spent 159.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 49 [2020-04-18 07:38:54,425 WARN L192 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 70 DAG size of output: 46 [2020-04-18 07:38:54,798 WARN L192 SmtUtils]: Spent 275.00 ms on a formula simplification. DAG size of input: 80 DAG size of output: 55 [2020-04-18 07:38:55,059 WARN L192 SmtUtils]: Spent 134.00 ms on a formula simplification. DAG size of input: 67 DAG size of output: 46 [2020-04-18 07:38:56,170 WARN L192 SmtUtils]: Spent 307.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 75 [2020-04-18 07:38:56,385 WARN L192 SmtUtils]: Spent 175.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 52 [2020-04-18 07:38:56,671 WARN L192 SmtUtils]: Spent 194.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 56 [2020-04-18 07:38:57,154 WARN L192 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 71 [2020-04-18 07:38:57,810 WARN L192 SmtUtils]: Spent 391.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 81 [2020-04-18 07:38:58,046 WARN L192 SmtUtils]: Spent 157.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 51 [2020-04-18 07:38:58,205 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 53 [2020-04-18 07:38:58,696 WARN L192 SmtUtils]: Spent 253.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 68 [2020-04-18 07:38:58,985 WARN L192 SmtUtils]: Spent 141.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 63 [2020-04-18 07:38:59,893 WARN L192 SmtUtils]: Spent 129.00 ms on a formula simplification. DAG size of input: 64 DAG size of output: 64 [2020-04-18 07:39:00,329 WARN L192 SmtUtils]: Spent 296.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 57 [2020-04-18 07:39:00,809 WARN L192 SmtUtils]: Spent 312.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 74 [2020-04-18 07:39:01,601 WARN L192 SmtUtils]: Spent 136.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 42 [2020-04-18 07:39:02,174 WARN L192 SmtUtils]: Spent 278.00 ms on a formula simplification. DAG size of input: 71 DAG size of output: 71 [2020-04-18 07:39:02,869 WARN L192 SmtUtils]: Spent 283.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 72 [2020-04-18 07:39:03,761 WARN L192 SmtUtils]: Spent 330.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 77 [2020-04-18 07:39:04,151 WARN L192 SmtUtils]: Spent 309.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 75 [2020-04-18 07:39:04,494 WARN L192 SmtUtils]: Spent 171.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 68 [2020-04-18 07:39:04,879 WARN L192 SmtUtils]: Spent 233.00 ms on a formula simplification. DAG size of input: 76 DAG size of output: 51 [2020-04-18 07:39:05,476 WARN L192 SmtUtils]: Spent 361.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 78 [2020-04-18 07:39:05,944 WARN L192 SmtUtils]: Spent 302.00 ms on a formula simplification. DAG size of input: 74 DAG size of output: 74 [2020-04-18 07:39:06,133 WARN L192 SmtUtils]: Spent 116.00 ms on a formula simplification. DAG size of input: 61 DAG size of output: 61 [2020-04-18 07:39:06,479 WARN L192 SmtUtils]: Spent 190.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 57 [2020-04-18 07:39:06,835 WARN L192 SmtUtils]: Spent 211.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 73 [2020-04-18 07:39:07,268 WARN L192 SmtUtils]: Spent 310.00 ms on a formula simplification. DAG size of input: 77 DAG size of output: 76 [2020-04-18 07:39:07,515 WARN L192 SmtUtils]: Spent 111.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 60 [2020-04-18 07:39:08,191 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 54 [2020-04-18 07:39:08,618 WARN L192 SmtUtils]: Spent 270.00 ms on a formula simplification. DAG size of input: 72 DAG size of output: 71 [2020-04-18 07:39:08,987 WARN L192 SmtUtils]: Spent 202.00 ms on a formula simplification. DAG size of input: 73 DAG size of output: 72 [2020-04-18 07:39:09,576 WARN L192 SmtUtils]: Spent 157.00 ms on a formula simplification that was a NOOP. DAG size: 74 [2020-04-18 07:39:09,817 WARN L192 SmtUtils]: Spent 156.00 ms on a formula simplification. DAG size of input: 68 DAG size of output: 67 [2020-04-18 07:39:10,183 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 65 DAG size of output: 44 [2020-04-18 07:39:10,547 WARN L192 SmtUtils]: Spent 290.00 ms on a formula simplification. DAG size of input: 75 DAG size of output: 74 [2020-04-18 07:39:11,013 WARN L192 SmtUtils]: Spent 384.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 80 [2020-04-18 07:39:11,246 WARN L192 SmtUtils]: Spent 126.00 ms on a formula simplification. DAG size of input: 63 DAG size of output: 62 [2020-04-18 07:39:12,123 WARN L192 SmtUtils]: Spent 344.00 ms on a formula simplification. DAG size of input: 78 DAG size of output: 77 [2020-04-18 07:39:12,317 WARN L192 SmtUtils]: Spent 106.00 ms on a formula simplification. DAG size of input: 60 DAG size of output: 59 [2020-04-18 07:39:13,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:39:13,055 INFO L93 Difference]: Finished difference Result 1449 states and 3557 transitions. [2020-04-18 07:39:13,055 INFO L276 IsEmpty]: Start isEmpty. Operand 1449 states and 3557 transitions. [2020-04-18 07:39:13,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:39:13,057 INFO L105 Mcr]: ---- MCR iteration 2 ---- [2020-04-18 07:39:13,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:39:13,057 INFO L82 PathProgramCache]: Analyzing trace with hash 1604527192, now seen corresponding path program 4 times [2020-04-18 07:39:13,058 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:39:13,058 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1870066753] [2020-04-18 07:39:13,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:39:13,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:39:13,111 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:39:13,111 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1870066753] [2020-04-18 07:39:13,111 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:39:13,112 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2020-04-18 07:39:13,112 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:39:13,114 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:39:13,132 INFO L259 McrAutomatonBuilder]: Finished intersection with 100 states and 188 transitions. [2020-04-18 07:39:13,132 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:39:13,872 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 14 times. [2020-04-18 07:39:13,873 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2020-04-18 07:39:13,873 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1552, Invalid=7190, Unknown=0, NotChecked=0, Total=8742 [2020-04-18 07:39:13,873 INFO L87 Difference]: Start difference. First operand 1449 states and 3557 transitions. Second operand 14 states. [2020-04-18 07:39:15,005 WARN L192 SmtUtils]: Spent 100.00 ms on a formula simplification. DAG size of input: 57 DAG size of output: 39 [2020-04-18 07:39:15,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:39:15,591 INFO L93 Difference]: Finished difference Result 2148 states and 5149 transitions. [2020-04-18 07:39:15,591 INFO L276 IsEmpty]: Start isEmpty. Operand 2148 states and 5149 transitions. [2020-04-18 07:39:15,594 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:39:15,594 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [534858440] [2020-04-18 07:39:15,594 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:39:15,594 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6] total 6 [2020-04-18 07:39:15,594 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [534858440] [2020-04-18 07:39:15,595 INFO L459 AbstractCegarLoop]: Interpolant automaton has 30 states [2020-04-18 07:39:15,595 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:39:15,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2020-04-18 07:39:15,596 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1813, Invalid=8087, Unknown=0, NotChecked=0, Total=9900 [2020-04-18 07:39:15,596 INFO L87 Difference]: Start difference. First operand 603 states and 1500 transitions. Second operand 30 states. [2020-04-18 07:39:16,873 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:39:16,874 INFO L93 Difference]: Finished difference Result 755 states and 1950 transitions. [2020-04-18 07:39:16,874 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2020-04-18 07:39:16,874 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 28 [2020-04-18 07:39:16,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:39:16,875 INFO L225 Difference]: With dead ends: 755 [2020-04-18 07:39:16,875 INFO L226 Difference]: Without dead ends: 448 [2020-04-18 07:39:16,876 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 105 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4491 ImplicationChecksByTransitivity, 14.6s TimeCoverageRelationStatistics Valid=2056, Invalid=9286, Unknown=0, NotChecked=0, Total=11342 [2020-04-18 07:39:16,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 448 states. [2020-04-18 07:39:16,880 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 448 to 328. [2020-04-18 07:39:16,880 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2020-04-18 07:39:16,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 778 transitions. [2020-04-18 07:39:16,881 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 778 transitions. Word has length 28 [2020-04-18 07:39:16,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:39:16,881 INFO L479 AbstractCegarLoop]: Abstraction has 328 states and 778 transitions. [2020-04-18 07:39:16,881 INFO L480 AbstractCegarLoop]: Interpolant automaton has 30 states. [2020-04-18 07:39:16,882 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 778 transitions. [2020-04-18 07:39:16,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:39:16,882 INFO L417 BasicCegarLoop]: Found error trace [2020-04-18 07:39:16,882 INFO L425 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2020-04-18 07:39:16,882 INFO L427 AbstractCegarLoop]: === Iteration 23 === [qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, qrcu_updaterErr1ASSERT_VIOLATIONERROR_FUNCTION, qrcu_updaterErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2020-04-18 07:39:16,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:39:16,883 INFO L82 PathProgramCache]: Analyzing trace with hash -89217678, now seen corresponding path program 1 times [2020-04-18 07:39:16,883 INFO L163 FreeRefinementEngine]: Executing refinement strategy MCR [2020-04-18 07:39:16,883 INFO L354 FreeRefinementEngine]: Using trace check StrategyModuleMcr [1158230826] [2020-04-18 07:39:16,884 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:39:16,890 INFO L259 McrAutomatonBuilder]: Finished intersection with 537 states and 1380 transitions. [2020-04-18 07:39:16,892 INFO L276 IsEmpty]: Start isEmpty. Operand 537 states. [2020-04-18 07:39:16,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:39:16,893 INFO L105 Mcr]: ---- MCR iteration 0 ---- [2020-04-18 07:39:16,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:39:16,893 INFO L82 PathProgramCache]: Analyzing trace with hash -89217678, now seen corresponding path program 2 times [2020-04-18 07:39:16,893 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:39:16,893 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [813999178] [2020-04-18 07:39:16,893 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:39:16,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:39:16,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:39:16,938 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [813999178] [2020-04-18 07:39:16,938 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:39:16,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:39:16,939 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:39:16,941 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:39:16,953 INFO L259 McrAutomatonBuilder]: Finished intersection with 82 states and 142 transitions. [2020-04-18 07:39:16,953 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:39:16,973 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 4 times. [2020-04-18 07:39:16,973 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2020-04-18 07:39:16,973 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2020-04-18 07:39:16,974 INFO L87 Difference]: Start difference. First operand 537 states. Second operand 6 states. [2020-04-18 07:39:17,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:39:17,054 INFO L93 Difference]: Finished difference Result 722 states and 1808 transitions. [2020-04-18 07:39:17,054 INFO L276 IsEmpty]: Start isEmpty. Operand 722 states and 1808 transitions. [2020-04-18 07:39:17,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2020-04-18 07:39:17,055 INFO L105 Mcr]: ---- MCR iteration 1 ---- [2020-04-18 07:39:17,055 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2020-04-18 07:39:17,055 INFO L82 PathProgramCache]: Analyzing trace with hash 671158002, now seen corresponding path program 3 times [2020-04-18 07:39:17,056 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2020-04-18 07:39:17,056 INFO L354 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581066673] [2020-04-18 07:39:17,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2020-04-18 07:39:17,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2020-04-18 07:39:17,088 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2020-04-18 07:39:17,088 INFO L354 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1581066673] [2020-04-18 07:39:17,089 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2020-04-18 07:39:17,089 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2020-04-18 07:39:17,089 INFO L201 McrAutomatonBuilder]: Constructing automaton for MCR equivalence class. [2020-04-18 07:39:17,092 INFO L256 McrAutomatonBuilder]: Started intersection. [2020-04-18 07:39:17,106 INFO L259 McrAutomatonBuilder]: Finished intersection with 80 states and 138 transitions. [2020-04-18 07:39:17,107 INFO L282 McrAutomatonBuilder]: Constructing interpolant automaton by labelling MCR automaton. [2020-04-18 07:39:17,123 INFO L356 McrAutomatonBuilder]: Construction finished. Needed to calculate wp 2 times. [2020-04-18 07:39:17,124 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2020-04-18 07:39:17,124 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2020-04-18 07:39:17,125 INFO L87 Difference]: Start difference. First operand 722 states and 1808 transitions. Second operand 6 states. [2020-04-18 07:39:17,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:39:17,179 INFO L93 Difference]: Finished difference Result 732 states and 1821 transitions. [2020-04-18 07:39:17,179 INFO L276 IsEmpty]: Start isEmpty. Operand 732 states and 1821 transitions. [2020-04-18 07:39:17,180 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:39:17,180 INFO L354 FreeRefinementEngine]: Using interpolant generator StrategyModuleMcr [1158230826] [2020-04-18 07:39:17,180 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 1 imperfect interpolant sequences. [2020-04-18 07:39:17,180 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4] total 4 [2020-04-18 07:39:17,180 INFO L156 tionRefinementEngine]: Using interpolant automaton builder StrategyModuleMcr [1158230826] [2020-04-18 07:39:17,181 INFO L459 AbstractCegarLoop]: Interpolant automaton has 9 states [2020-04-18 07:39:17,181 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy MCR [2020-04-18 07:39:17,181 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2020-04-18 07:39:17,181 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2020-04-18 07:39:17,181 INFO L87 Difference]: Start difference. First operand 328 states and 778 transitions. Second operand 9 states. [2020-04-18 07:39:17,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2020-04-18 07:39:17,333 INFO L93 Difference]: Finished difference Result 276 states and 692 transitions. [2020-04-18 07:39:17,334 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2020-04-18 07:39:17,334 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 28 [2020-04-18 07:39:17,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2020-04-18 07:39:17,334 INFO L225 Difference]: With dead ends: 276 [2020-04-18 07:39:17,334 INFO L226 Difference]: Without dead ends: 0 [2020-04-18 07:39:17,335 INFO L678 BasicCegarLoop]: 0 DeclaredPredicates, 71 GetRequests, 57 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=63, Invalid=177, Unknown=0, NotChecked=0, Total=240 [2020-04-18 07:39:17,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 0 states. [2020-04-18 07:39:17,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 0 to 0. [2020-04-18 07:39:17,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 0 states. [2020-04-18 07:39:17,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 0 states to 0 states and 0 transitions. [2020-04-18 07:39:17,336 INFO L78 Accepts]: Start accepts. Automaton has 0 states and 0 transitions. Word has length 28 [2020-04-18 07:39:17,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2020-04-18 07:39:17,337 INFO L479 AbstractCegarLoop]: Abstraction has 0 states and 0 transitions. [2020-04-18 07:39:17,337 INFO L480 AbstractCegarLoop]: Interpolant automaton has 9 states. [2020-04-18 07:39:17,337 INFO L276 IsEmpty]: Start isEmpty. Operand 0 states and 0 transitions. [2020-04-18 07:39:17,337 INFO L282 IsEmpty]: Finished isEmpty. No accepting run. [2020-04-18 07:39:17,341 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 18.04 07:39:17 BasicIcfg [2020-04-18 07:39:17,341 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2020-04-18 07:39:17,342 INFO L168 Benchmark]: Toolchain (without parser) took 168631.76 ms. Allocated memory was 143.1 MB in the beginning and 1.3 GB in the end (delta: 1.1 GB). Free memory was 97.6 MB in the beginning and 365.5 MB in the end (delta: -267.8 MB). Peak memory consumption was 850.5 MB. Max. memory is 7.1 GB. [2020-04-18 07:39:17,343 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 143.1 MB. Free memory was 118.2 MB in the beginning and 118.0 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. [2020-04-18 07:39:17,343 INFO L168 Benchmark]: CACSL2BoogieTranslator took 730.00 ms. Allocated memory was 143.1 MB in the beginning and 199.8 MB in the end (delta: 56.6 MB). Free memory was 95.7 MB in the beginning and 154.7 MB in the end (delta: -59.0 MB). Peak memory consumption was 20.7 MB. Max. memory is 7.1 GB. [2020-04-18 07:39:17,344 INFO L168 Benchmark]: Boogie Procedure Inliner took 59.14 ms. Allocated memory is still 199.8 MB. Free memory was 154.7 MB in the beginning and 152.0 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. [2020-04-18 07:39:17,344 INFO L168 Benchmark]: Boogie Preprocessor took 51.52 ms. Allocated memory is still 199.8 MB. Free memory was 152.0 MB in the beginning and 149.9 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. [2020-04-18 07:39:17,344 INFO L168 Benchmark]: RCFGBuilder took 1456.80 ms. Allocated memory was 199.8 MB in the beginning and 229.1 MB in the end (delta: 29.4 MB). Free memory was 149.9 MB in the beginning and 149.4 MB in the end (delta: 501.4 kB). Peak memory consumption was 73.9 MB. Max. memory is 7.1 GB. [2020-04-18 07:39:17,345 INFO L168 Benchmark]: TraceAbstraction took 166307.35 ms. Allocated memory was 229.1 MB in the beginning and 1.3 GB in the end (delta: 1.0 GB). Free memory was 148.0 MB in the beginning and 365.5 MB in the end (delta: -217.5 MB). Peak memory consumption was 814.9 MB. Max. memory is 7.1 GB. [2020-04-18 07:39:17,347 INFO L336 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 143.1 MB. Free memory was 118.2 MB in the beginning and 118.0 MB in the end (delta: 210.0 kB). Peak memory consumption was 210.0 kB. Max. memory is 7.1 GB. * CACSL2BoogieTranslator took 730.00 ms. Allocated memory was 143.1 MB in the beginning and 199.8 MB in the end (delta: 56.6 MB). Free memory was 95.7 MB in the beginning and 154.7 MB in the end (delta: -59.0 MB). Peak memory consumption was 20.7 MB. Max. memory is 7.1 GB. * Boogie Procedure Inliner took 59.14 ms. Allocated memory is still 199.8 MB. Free memory was 154.7 MB in the beginning and 152.0 MB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 7.1 GB. * Boogie Preprocessor took 51.52 ms. Allocated memory is still 199.8 MB. Free memory was 152.0 MB in the beginning and 149.9 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 7.1 GB. * RCFGBuilder took 1456.80 ms. Allocated memory was 199.8 MB in the beginning and 229.1 MB in the end (delta: 29.4 MB). Free memory was 149.9 MB in the beginning and 149.4 MB in the end (delta: 501.4 kB). Peak memory consumption was 73.9 MB. Max. memory is 7.1 GB. * TraceAbstraction took 166307.35 ms. Allocated memory was 229.1 MB in the beginning and 1.3 GB in the end (delta: 1.0 GB). Free memory was 148.0 MB in the beginning and 365.5 MB in the end (delta: -217.5 MB). Peak memory consumption was 814.9 MB. Max. memory is 7.1 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.4s, 157 ProgramPointsBefore, 66 ProgramPointsAfterwards, 173 TransitionsBefore, 76 TransitionsAfterwards, 10344 CoEnabledTransitionPairs, 6 FixpointIterations, 28 TrivialSequentialCompositions, 77 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 12 ConcurrentYvCompositions, 6 ChoiceCompositions, 4907 VarBasedMoverChecksPositive, 92 VarBasedMoverChecksNegative, 29 SemBasedMoverChecksPositive, 84 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 17077 CheckedPairsTotal, 117 TotalNumberOfCompositions - PositiveResult [Line: 701]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - PositiveResult [Line: 708]: call of __VERIFIER_error() unreachable For all program executions holds that call of __VERIFIER_error() unreachable at this location - AllSpecificationsHoldResult: All specifications hold 2 specifications checked. All of them hold - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 148 locations, 2 error locations. Started 1 CEGAR loops. VerificationResult: SAFE, OverallTime: 166.1s, OverallIterations: 23, TraceHistogramMax: 1, AutomataDifference: 67.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 4.7s, HoareTripleCheckerStatistics: 3054 SDtfs, 13149 SDslu, 22279 SDs, 0 SdLazy, 26021 SolverSat, 3408 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 26.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3147 GetRequests, 1771 SyntacticMatches, 25 SemanticMatches, 1351 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70446 ImplicationChecksByTransitivity, 73.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6505occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.0s AutomataMinimizationTime, 23 MinimizatonAttempts, 20452 StatesRemovedByMinimization, 20 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: No data available, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be correct! Received shutdown request...